LLVM 20.0.0git
Public Types | Public Member Functions | List of all members
llvm::mca::LSUnitBase Class Referenceabstract

Abstract base interface for LS (load/store) units in llvm-mca. More...

#include "llvm/MCA/HardwareUnits/LSUnit.h"

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Public Types

enum  Status { LSU_AVAILABLE = 0 , LSU_LQUEUE_FULL , LSU_SQUEUE_FULL }
 

Public Member Functions

 LSUnitBase (const MCSchedModel &SM, unsigned LoadQueueSize, unsigned StoreQueueSize, bool AssumeNoAlias)
 
virtual ~LSUnitBase ()
 
unsigned getLoadQueueSize () const
 Returns the total number of entries in the load queue.
 
unsigned getStoreQueueSize () const
 Returns the total number of entries in the store queue.
 
unsigned getUsedLQEntries () const
 
unsigned getUsedSQEntries () const
 
void acquireLQSlot ()
 
void acquireSQSlot ()
 
void releaseLQSlot ()
 
void releaseSQSlot ()
 
bool assumeNoAlias () const
 
virtual Status isAvailable (const InstRef &IR) const =0
 This method checks the availability of the load/store buffers.
 
virtual unsigned dispatch (const InstRef &IR)=0
 Allocates LS resources for instruction IR.
 
bool isSQEmpty () const
 
bool isLQEmpty () const
 
bool isSQFull () const
 
bool isLQFull () const
 
bool isValidGroupID (unsigned Index) const
 
bool isReady (const InstRef &IR) const
 Check if a peviously dispatched instruction IR is now ready for execution.
 
bool isPending (const InstRef &IR) const
 Check if instruction IR only depends on memory instructions that are currently executing.
 
bool isWaiting (const InstRef &IR) const
 Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.
 
bool hasDependentUsers (const InstRef &IR) const
 
const MemoryGroupgetGroup (unsigned Index) const
 
MemoryGroupgetGroup (unsigned Index)
 
unsigned createMemoryGroup ()
 
virtual void onInstructionExecuted (const InstRef &IR)
 
virtual void onInstructionRetired (const InstRef &IR)
 
virtual void onInstructionIssued (const InstRef &IR)
 
virtual void cycleEvent ()
 
void dump () const
 
- Public Member Functions inherited from llvm::mca::HardwareUnit
 HardwareUnit ()=default
 
virtual ~HardwareUnit ()
 

Detailed Description

Abstract base interface for LS (load/store) units in llvm-mca.

Definition at line 190 of file LSUnit.h.

Member Enumeration Documentation

◆ Status

Enumerator
LSU_AVAILABLE 
LSU_LQUEUE_FULL 
LSU_SQUEUE_FULL 

Definition at line 242 of file LSUnit.h.

Constructor & Destructor Documentation

◆ LSUnitBase()

llvm::mca::LSUnitBase::LSUnitBase ( const MCSchedModel SM,
unsigned  LoadQueueSize,
unsigned  StoreQueueSize,
bool  AssumeNoAlias 
)

◆ ~LSUnitBase()

llvm::mca::LSUnitBase::~LSUnitBase ( )
virtualdefault

Member Function Documentation

◆ acquireLQSlot()

void llvm::mca::LSUnitBase::acquireLQSlot ( )
inline

Definition at line 235 of file LSUnit.h.

Referenced by llvm::mca::LSUnit::dispatch().

◆ acquireSQSlot()

void llvm::mca::LSUnitBase::acquireSQSlot ( )
inline

Definition at line 236 of file LSUnit.h.

Referenced by llvm::mca::LSUnit::dispatch().

◆ assumeNoAlias()

bool llvm::mca::LSUnitBase::assumeNoAlias ( ) const
inline

Definition at line 240 of file LSUnit.h.

Referenced by llvm::mca::LSUnit::dispatch().

◆ createMemoryGroup()

unsigned llvm::mca::LSUnitBase::createMemoryGroup ( )
inline

◆ cycleEvent()

void llvm::mca::LSUnitBase::cycleEvent ( )
virtual

Definition at line 44 of file LSUnit.cpp.

References G.

Referenced by llvm::mca::Scheduler::cycleEvent(), and llvm::mca::InOrderIssueStage::cycleStart().

◆ dispatch()

virtual unsigned llvm::mca::LSUnitBase::dispatch ( const InstRef IR)
pure virtual

Allocates LS resources for instruction IR.

This method assumes that a previous call to isAvailable(IR) succeeded with a LSUnitBase::Status value of LSU_AVAILABLE. Returns the GroupID associated with this instruction. That value will be used to set the LSUTokenID field in class Instruction.

Implemented in llvm::mca::LSUnit.

Referenced by llvm::mca::Scheduler::dispatch(), and llvm::mca::InOrderIssueStage::execute().

◆ dump()

void llvm::mca::LSUnitBase::dump ( ) const

◆ getGroup() [1/2]

MemoryGroup & llvm::mca::LSUnitBase::getGroup ( unsigned  Index)
inline

◆ getGroup() [2/2]

const MemoryGroup & llvm::mca::LSUnitBase::getGroup ( unsigned  Index) const
inline

◆ getLoadQueueSize()

unsigned llvm::mca::LSUnitBase::getLoadQueueSize ( ) const
inline

Returns the total number of entries in the load queue.

Definition at line 228 of file LSUnit.h.

Referenced by dump().

◆ getStoreQueueSize()

unsigned llvm::mca::LSUnitBase::getStoreQueueSize ( ) const
inline

Returns the total number of entries in the store queue.

Definition at line 231 of file LSUnit.h.

Referenced by dump().

◆ getUsedLQEntries()

unsigned llvm::mca::LSUnitBase::getUsedLQEntries ( ) const
inline

Definition at line 233 of file LSUnit.h.

Referenced by dump().

◆ getUsedSQEntries()

unsigned llvm::mca::LSUnitBase::getUsedSQEntries ( ) const
inline

Definition at line 234 of file LSUnit.h.

Referenced by dump().

◆ hasDependentUsers()

bool llvm::mca::LSUnitBase::hasDependentUsers ( const InstRef IR) const
inline

◆ isAvailable()

virtual Status llvm::mca::LSUnitBase::isAvailable ( const InstRef IR) const
pure virtual

This method checks the availability of the load/store buffers.

Returns LSU_AVAILABLE if there are enough load/store queue entries to accomodate instruction IR. By default, LSU_AVAILABLE is returned if IR is not a memory operation.

Implemented in llvm::mca::LSUnit.

Referenced by llvm::mca::Scheduler::isAvailable().

◆ isLQEmpty()

bool llvm::mca::LSUnitBase::isLQEmpty ( ) const
inline

Definition at line 264 of file LSUnit.h.

◆ isLQFull()

bool llvm::mca::LSUnitBase::isLQFull ( ) const
inline

Definition at line 266 of file LSUnit.h.

Referenced by llvm::mca::LSUnit::isAvailable().

◆ isPending()

bool llvm::mca::LSUnitBase::isPending ( const InstRef IR) const
inline

Check if instruction IR only depends on memory instructions that are currently executing.

Definition at line 281 of file LSUnit.h.

References getGroup(), IR, and llvm::mca::MemoryGroup::isPending().

Referenced by llvm::mca::Scheduler::analyzeDataDependencies(), and llvm::mca::Scheduler::dispatch().

◆ isReady()

bool llvm::mca::LSUnitBase::isReady ( const InstRef IR) const
inline

Check if a peviously dispatched instruction IR is now ready for execution.

Definition at line 273 of file LSUnit.h.

References getGroup(), IR, and llvm::mca::MemoryGroup::isReady().

Referenced by llvm::mca::Scheduler::dispatch().

◆ isSQEmpty()

bool llvm::mca::LSUnitBase::isSQEmpty ( ) const
inline

Definition at line 263 of file LSUnit.h.

◆ isSQFull()

bool llvm::mca::LSUnitBase::isSQFull ( ) const
inline

Definition at line 265 of file LSUnit.h.

Referenced by llvm::mca::LSUnit::isAvailable().

◆ isValidGroupID()

bool llvm::mca::LSUnitBase::isValidGroupID ( unsigned  Index) const
inline

◆ isWaiting()

bool llvm::mca::LSUnitBase::isWaiting ( const InstRef IR) const
inline

Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.

Definition at line 289 of file LSUnit.h.

References getGroup(), IR, and llvm::mca::MemoryGroup::isWaiting().

Referenced by llvm::mca::Scheduler::dispatch().

◆ onInstructionExecuted()

void llvm::mca::LSUnitBase::onInstructionExecuted ( const InstRef IR)
virtual

Reimplemented in llvm::mca::LSUnit.

Definition at line 205 of file LSUnit.cpp.

References assert(), and IR.

Referenced by llvm::mca::LSUnit::onInstructionExecuted().

◆ onInstructionIssued()

virtual void llvm::mca::LSUnitBase::onInstructionIssued ( const InstRef IR)
inlinevirtual

Definition at line 325 of file LSUnit.h.

References IR.

◆ onInstructionRetired()

void llvm::mca::LSUnitBase::onInstructionRetired ( const InstRef IR)
virtual

◆ releaseLQSlot()

void llvm::mca::LSUnitBase::releaseLQSlot ( )
inline

Definition at line 237 of file LSUnit.h.

Referenced by onInstructionRetired().

◆ releaseSQSlot()

void llvm::mca::LSUnitBase::releaseSQSlot ( )
inline

Definition at line 238 of file LSUnit.h.

Referenced by onInstructionRetired().


The documentation for this class was generated from the following files: