LLVM 20.0.0git
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Abstract base interface for LS (load/store) units in llvm-mca. More...
#include "llvm/MCA/HardwareUnits/LSUnit.h"
Public Types | |
enum | Status { LSU_AVAILABLE = 0 , LSU_LQUEUE_FULL , LSU_SQUEUE_FULL } |
Public Member Functions | |
LSUnitBase (const MCSchedModel &SM, unsigned LoadQueueSize, unsigned StoreQueueSize, bool AssumeNoAlias) | |
virtual | ~LSUnitBase () |
unsigned | getLoadQueueSize () const |
Returns the total number of entries in the load queue. | |
unsigned | getStoreQueueSize () const |
Returns the total number of entries in the store queue. | |
unsigned | getUsedLQEntries () const |
unsigned | getUsedSQEntries () const |
void | acquireLQSlot () |
void | acquireSQSlot () |
void | releaseLQSlot () |
void | releaseSQSlot () |
bool | assumeNoAlias () const |
virtual Status | isAvailable (const InstRef &IR) const =0 |
This method checks the availability of the load/store buffers. | |
virtual unsigned | dispatch (const InstRef &IR)=0 |
Allocates LS resources for instruction IR. | |
bool | isSQEmpty () const |
bool | isLQEmpty () const |
bool | isSQFull () const |
bool | isLQFull () const |
bool | isValidGroupID (unsigned Index) const |
bool | isReady (const InstRef &IR) const |
Check if a peviously dispatched instruction IR is now ready for execution. | |
bool | isPending (const InstRef &IR) const |
Check if instruction IR only depends on memory instructions that are currently executing. | |
bool | isWaiting (const InstRef &IR) const |
Check if instruction IR is still waiting on memory operations, and the wait time is still unknown. | |
bool | hasDependentUsers (const InstRef &IR) const |
const MemoryGroup & | getGroup (unsigned Index) const |
MemoryGroup & | getGroup (unsigned Index) |
unsigned | createMemoryGroup () |
virtual void | onInstructionExecuted (const InstRef &IR) |
virtual void | onInstructionRetired (const InstRef &IR) |
virtual void | onInstructionIssued (const InstRef &IR) |
virtual void | cycleEvent () |
void | dump () const |
Public Member Functions inherited from llvm::mca::HardwareUnit | |
HardwareUnit ()=default | |
virtual | ~HardwareUnit () |
Abstract base interface for LS (load/store) units in llvm-mca.
llvm::mca::LSUnitBase::LSUnitBase | ( | const MCSchedModel & | SM, |
unsigned | LoadQueueSize, | ||
unsigned | StoreQueueSize, | ||
bool | AssumeNoAlias | ||
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Definition at line 24 of file LSUnit.cpp.
References llvm::MCProcResourceDesc::BufferSize, llvm::MCSchedModel::getExtraProcessorInfo(), llvm::MCSchedModel::getProcResource(), llvm::MCSchedModel::hasExtraProcessorInfo(), llvm::MCExtraProcessorInfo::LoadQueueID, and llvm::MCExtraProcessorInfo::StoreQueueID.
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Definition at line 235 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dispatch().
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Definition at line 236 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dispatch().
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Definition at line 240 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::dispatch().
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Definition at line 311 of file LSUnit.h.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::insert().
Referenced by llvm::mca::LSUnit::dispatch().
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Definition at line 44 of file LSUnit.cpp.
References G.
Referenced by llvm::mca::Scheduler::cycleEvent(), and llvm::mca::InOrderIssueStage::cycleStart().
Allocates LS resources for instruction IR.
This method assumes that a previous call to isAvailable(IR)
succeeded with a LSUnitBase::Status value of LSU_AVAILABLE. Returns the GroupID associated with this instruction. That value will be used to set the LSUTokenID field in class Instruction.
Implemented in llvm::mca::LSUnit.
Referenced by llvm::mca::Scheduler::dispatch(), and llvm::mca::InOrderIssueStage::execute().
void llvm::mca::LSUnitBase::dump | ( | ) | const |
Definition at line 50 of file LSUnit.cpp.
References llvm::dbgs(), getLoadQueueSize(), llvm::mca::MemoryGroup::getNumExecuted(), llvm::mca::MemoryGroup::getNumExecutedPredecessors(), llvm::mca::MemoryGroup::getNumExecuting(), llvm::mca::MemoryGroup::getNumExecutingPredecessors(), llvm::mca::MemoryGroup::getNumInstructions(), llvm::mca::MemoryGroup::getNumPredecessors(), getStoreQueueSize(), getUsedLQEntries(), and getUsedSQEntries().
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Definition at line 306 of file LSUnit.h.
References assert(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and isValidGroupID().
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Definition at line 301 of file LSUnit.h.
References assert(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and isValidGroupID().
Referenced by llvm::mca::LSUnit::dispatch(), hasDependentUsers(), isPending(), isReady(), and isWaiting().
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Definition at line 295 of file LSUnit.h.
References getGroup(), llvm::mca::MemoryGroup::getNumSuccessors(), IR, and llvm::mca::MemoryGroup::isExecuted().
Referenced by llvm::mca::Scheduler::issueInstruction().
This method checks the availability of the load/store buffers.
Returns LSU_AVAILABLE if there are enough load/store queue entries to accomodate instruction IR. By default, LSU_AVAILABLE is returned if IR is not a memory operation.
Implemented in llvm::mca::LSUnit.
Referenced by llvm::mca::Scheduler::isAvailable().
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Definition at line 266 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::isAvailable().
Check if instruction IR only depends on memory instructions that are currently executing.
Definition at line 281 of file LSUnit.h.
References getGroup(), IR, and llvm::mca::MemoryGroup::isPending().
Referenced by llvm::mca::Scheduler::analyzeDataDependencies(), and llvm::mca::Scheduler::dispatch().
Check if a peviously dispatched instruction IR is now ready for execution.
Definition at line 273 of file LSUnit.h.
References getGroup(), IR, and llvm::mca::MemoryGroup::isReady().
Referenced by llvm::mca::Scheduler::dispatch().
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Definition at line 265 of file LSUnit.h.
Referenced by llvm::mca::LSUnit::isAvailable().
Definition at line 268 of file LSUnit.h.
References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::contains().
Referenced by getGroup(), and llvm::mca::LSUnit::onInstructionExecuted().
Check if instruction IR is still waiting on memory operations, and the wait time is still unknown.
Definition at line 289 of file LSUnit.h.
References getGroup(), IR, and llvm::mca::MemoryGroup::isWaiting().
Referenced by llvm::mca::Scheduler::dispatch().
Reimplemented in llvm::mca::LSUnit.
Definition at line 205 of file LSUnit.cpp.
Referenced by llvm::mca::LSUnit::onInstructionExecuted().
Definition at line 214 of file LSUnit.cpp.
References assert(), llvm::dbgs(), llvm::mca::InstructionBase::getMayLoad(), llvm::mca::InstructionBase::getMayStore(), IR, LLVM_DEBUG, releaseLQSlot(), and releaseSQSlot().
Referenced by llvm::mca::RetireStage::notifyInstructionRetired().
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Definition at line 237 of file LSUnit.h.
Referenced by onInstructionRetired().
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Definition at line 238 of file LSUnit.h.
Referenced by onInstructionRetired().