LLVM 22.0.0git
llvm::yaml::SIMachineFunctionInfo Struct Referencefinal

#include "Target/AMDGPU/SIMachineFunctionInfo.h"

Inheritance diagram for llvm::yaml::SIMachineFunctionInfo:
[legend]

Public Member Functions

 SIMachineFunctionInfo ()=default
 SIMachineFunctionInfo (const llvm::SIMachineFunctionInfo &, const TargetRegisterInfo &TRI, const llvm::MachineFunction &MF)
void mappingImpl (yaml::IO &YamlIO) override
 ~SIMachineFunctionInfo ()=default
Public Member Functions inherited from llvm::yaml::MachineFunctionInfo
virtual ~MachineFunctionInfo ()=default

Public Attributes

uint64_t ExplicitKernArgSize = 0
Align MaxKernArgAlign
uint32_t LDSSize = 0
uint32_t GDSSize = 0
Align DynLDSAlign
bool IsEntryFunction = false
bool IsChainFunction = false
bool NoSignedZerosFPMath = false
bool MemoryBound = false
bool WaveLimiter = false
bool HasSpilledSGPRs = false
bool HasSpilledVGPRs = false
uint16_t NumWaveDispatchSGPRs = 0
uint16_t NumWaveDispatchVGPRs = 0
uint32_t HighBitsOf32BitAddress = 0
unsigned Occupancy = 0
SmallVector< StringValue, 2 > SpillPhysVGPRS
SmallVector< StringValueWWMReservedRegs
StringValue ScratchRSrcReg = "$private_rsrc_reg"
StringValue FrameOffsetReg = "$fp_reg"
StringValue StackPtrOffsetReg = "$sp_reg"
unsigned BytesInStackArgArea = 0
bool ReturnsVoid = true
std::optional< SIArgumentInfoArgInfo
unsigned PSInputAddr = 0
unsigned PSInputEnable = 0
unsigned MaxMemoryClusterDWords = DefaultMemoryClusterDWordsLimit
SIMode Mode
std::optional< FrameIndexScavengeFI
StringValue VGPRForAGPRCopy
StringValue SGPRForEXECCopy
StringValue LongBranchReservedReg
bool HasInitWholeWave = false
bool IsWholeWaveFunction = false
unsigned DynamicVGPRBlockSize = 0
unsigned ScratchReservedForDynamicVGPRs = 0

Detailed Description

Definition at line 260 of file SIMachineFunctionInfo.h.

Constructor & Destructor Documentation

◆ SIMachineFunctionInfo() [1/2]

llvm::yaml::SIMachineFunctionInfo::SIMachineFunctionInfo ( )
default

References TRI.

◆ SIMachineFunctionInfo() [2/2]

◆ ~SIMachineFunctionInfo()

llvm::yaml::SIMachineFunctionInfo::~SIMachineFunctionInfo ( )
default

Member Function Documentation

◆ mappingImpl()

void yaml::SIMachineFunctionInfo::mappingImpl ( yaml::IO & YamlIO)
overridevirtual

Reimplemented from llvm::yaml::MachineFunctionInfo.

Definition at line 771 of file SIMachineFunctionInfo.cpp.

Member Data Documentation

◆ ArgInfo

◆ BytesInStackArgArea

◆ DynamicVGPRBlockSize

unsigned llvm::yaml::SIMachineFunctionInfo::DynamicVGPRBlockSize = 0

◆ DynLDSAlign

◆ ExplicitKernArgSize

◆ FrameOffsetReg

StringValue llvm::yaml::SIMachineFunctionInfo::FrameOffsetReg = "$fp_reg"

◆ GDSSize

◆ HasInitWholeWave

bool llvm::yaml::SIMachineFunctionInfo::HasInitWholeWave = false

◆ HasSpilledSGPRs

bool llvm::yaml::SIMachineFunctionInfo::HasSpilledSGPRs = false

◆ HasSpilledVGPRs

bool llvm::yaml::SIMachineFunctionInfo::HasSpilledVGPRs = false

◆ HighBitsOf32BitAddress

uint32_t llvm::yaml::SIMachineFunctionInfo::HighBitsOf32BitAddress = 0

◆ IsChainFunction

bool llvm::yaml::SIMachineFunctionInfo::IsChainFunction = false

◆ IsEntryFunction

bool llvm::yaml::SIMachineFunctionInfo::IsEntryFunction = false

◆ IsWholeWaveFunction

bool llvm::yaml::SIMachineFunctionInfo::IsWholeWaveFunction = false

◆ LDSSize

◆ LongBranchReservedReg

◆ MaxKernArgAlign

◆ MaxMemoryClusterDWords

◆ MemoryBound

◆ Mode

◆ NoSignedZerosFPMath

bool llvm::yaml::SIMachineFunctionInfo::NoSignedZerosFPMath = false

◆ NumWaveDispatchSGPRs

uint16_t llvm::yaml::SIMachineFunctionInfo::NumWaveDispatchSGPRs = 0

◆ NumWaveDispatchVGPRs

uint16_t llvm::yaml::SIMachineFunctionInfo::NumWaveDispatchVGPRs = 0

◆ Occupancy

◆ PSInputAddr

◆ PSInputEnable

◆ ReturnsVoid

◆ ScavengeFI

std::optional<FrameIndex> llvm::yaml::SIMachineFunctionInfo::ScavengeFI

◆ ScratchReservedForDynamicVGPRs

unsigned llvm::yaml::SIMachineFunctionInfo::ScratchReservedForDynamicVGPRs = 0

◆ ScratchRSrcReg

StringValue llvm::yaml::SIMachineFunctionInfo::ScratchRSrcReg = "$private_rsrc_reg"

◆ SGPRForEXECCopy

◆ SpillPhysVGPRS

◆ StackPtrOffsetReg

StringValue llvm::yaml::SIMachineFunctionInfo::StackPtrOffsetReg = "$sp_reg"

◆ VGPRForAGPRCopy

◆ WaveLimiter

◆ WWMReservedRegs


The documentation for this struct was generated from the following files: