13#ifndef LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
14#define LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
18#define GET_REGINFO_HEADER
19#include "LanaiGenRegisterInfo.inc"
40 unsigned FIOperandNum,
Wrapper class representing virtual and physical registers.
This is an optimization pass for GlobalISel generic memory operations.
Register getBaseRegister() const
unsigned getRARegister() const
bool hasBasePointer(const MachineFunction &MF) const
bool requiresRegisterScavenging(const MachineFunction &MF) const override
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=nullptr) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
int getDwarfRegNum(unsigned RegNum, bool IsEH) const
bool supportsBackwardScavenger() const override
bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Register getFrameRegister(const MachineFunction &MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override