LLVM 20.0.0git
LanaiRegisterInfo.h
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1//===- LanaiRegisterInfo.h - Lanai Register Information Impl ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Lanai implementation of the TargetRegisterInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
14#define LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
15
17
18#define GET_REGINFO_HEADER
19#include "LanaiGenRegisterInfo.inc"
20
21namespace llvm {
22
25
27 CallingConv::ID) const override;
28
29 // Code Generation virtual methods.
30 const uint16_t *
31 getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
32
33 BitVector getReservedRegs(const MachineFunction &MF) const override;
34
35 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
36
38 unsigned FIOperandNum,
39 RegScavenger *RS = nullptr) const override;
40
41 // Debug information queries.
42 unsigned getRARegister() const;
43 Register getFrameRegister(const MachineFunction &MF) const override;
45 bool hasBasePointer(const MachineFunction &MF) const;
46
47 int getDwarfRegNum(unsigned RegNum, bool IsEH) const;
48};
49
50} // end namespace llvm
51
52#endif // LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
uint64_t IntrinsicInst * II
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Register getBaseRegister() const
unsigned getRARegister() const
bool hasBasePointer(const MachineFunction &MF) const
bool requiresRegisterScavenging(const MachineFunction &MF) const override
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=nullptr) const override
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
int getDwarfRegNum(unsigned RegNum, bool IsEH) const
bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
Register getFrameRegister(const MachineFunction &MF) const override
BitVector getReservedRegs(const MachineFunction &MF) const override