|
| enum | Type {
TypeALU32_2op = 0
, TypeALU32_3op = 1
, TypeALU32_ADDI = 2
, TypeALU64 = 3
,
TypeCJ = 4
, TypeCR = 5
, TypeCVI_4SLOT_MPY = 6
, TypeCVI_GATHER = 7
,
TypeCVI_GATHER_DV = 8
, TypeCVI_GATHER_RST = 9
, TypeCVI_HIST = 10
, TypeCVI_SCATTER = 11
,
TypeCVI_SCATTER_DV = 12
, TypeCVI_SCATTER_NEW_RST = 13
, TypeCVI_SCATTER_NEW_ST = 14
, TypeCVI_SCATTER_RST = 15
,
TypeCVI_VA = 16
, TypeCVI_VA_DV = 17
, TypeCVI_VM_LD = 18
, TypeCVI_VM_NEW_ST = 19
,
TypeCVI_VM_ST = 20
, TypeCVI_VM_STU = 21
, TypeCVI_VM_TMP_LD = 22
, TypeCVI_VM_VP_LDU = 23
,
TypeCVI_VP = 24
, TypeCVI_VP_VS = 25
, TypeCVI_VS = 26
, TypeCVI_VS_VX = 27
,
TypeCVI_VX = 28
, TypeCVI_VX_DV = 29
, TypeCVI_VX_LATE = 30
, TypeCVI_ZW = 31
,
TypeDUPLEX = 32
, TypeENDLOOP = 33
, TypeEXTENDER = 34
, TypeJ = 35
,
TypeLD = 36
, TypeM = 37
, TypeMAPPING = 38
, TypeNCJ = 39
,
TypePSEUDO = 40
, TypeST = 41
, TypeSUBINSN = 42
, TypeS_2op = 43
,
TypeS_3op = 44
, TypeV2LDST = 47
, TypeV4LDST = 48
} |
| |
| enum | AddrMode {
NoAddrMode = 0
, Absolute = 1
, AbsoluteSet = 2
, BaseImmOffset = 3
,
BaseLongOffset = 4
, BaseRegOffset = 5
, PostInc = 6
} |
| |
| enum | MemAccessSize {
NoMemAccess = 0
, ByteAccess
, HalfWordAccess
, WordAccess
,
DoubleWordAccess
, HVXVectorAccess
} |
| |
| enum | {
TypePos = 0
, TypeMask = 0x7f
, SoloPos = 7
, SoloMask = 0x1
,
SoloAXPos = 8
, SoloAXMask = 0x1
, RestrictSlot1AOKPos = 9
, RestrictSlot1AOKMask = 0x1
,
PredicatedPos = 10
, PredicatedMask = 0x1
, PredicatedFalsePos = 11
, PredicatedFalseMask = 0x1
,
PredicatedNewPos = 12
, PredicatedNewMask = 0x1
, PredicateLatePos = 13
, PredicateLateMask = 0x1
,
NewValuePos = 14
, NewValueMask = 0x1
, hasNewValuePos = 15
, hasNewValueMask = 0x1
,
NewValueOpPos = 16
, NewValueOpMask = 0x7
, mayNVStorePos = 19
, mayNVStoreMask = 0x1
,
NVStorePos = 20
, NVStoreMask = 0x1
, mayCVLoadPos = 21
, mayCVLoadMask = 0x1
,
CVLoadPos = 22
, CVLoadMask = 0x1
, ExtendablePos = 23
, ExtendableMask = 0x1
,
ExtendedPos = 24
, ExtendedMask = 0x1
, ExtendableOpPos = 25
, ExtendableOpMask = 0x7
,
ExtentSignedPos = 28
, ExtentSignedMask = 0x1
, ExtentBitsPos = 29
, ExtentBitsMask = 0x1f
,
ExtentAlignPos = 34
, ExtentAlignMask = 0x3
, CofMax1Pos = 36
, CofMax1Mask = 0x1
,
CofRelax1Pos = 37
, CofRelax1Mask = 0x1
, CofRelax2Pos = 38
, CofRelax2Mask = 0x1
,
RestrictNoSlot1StorePos = 39
, RestrictNoSlot1StoreMask = 0x1
, AddrModePos = 40
, AddrModeMask = 0x7
,
MemAccessSizePos = 43
, MemAccesSizeMask = 0xf
, TakenPos = 47
, TakenMask = 0x1
,
FPPos = 48
, FPMask = 0x1
, hasNewValuePos2 = 50
, hasNewValueMask2 = 0x1
,
NewValueOpPos2 = 51
, NewValueOpMask2 = 0x7
, AccumulatorPos = 54
, AccumulatorMask = 0x1
,
PrefersSlot3Pos = 55
, PrefersSlot3Mask = 0x1
, HasHvxTmpPos = 56
, HasHvxTmpMask = 0x1
,
CVINewPos = 58
, CVINewMask = 0x1
, isCVIPos = 59
, isCVIMask = 0x1
,
isHVXALUPos = 60
, isHVXALUMask = 0x1
, isHVXALU2SRCPos = 61
, isHVXALU2SRCMask = 0x1
,
hasUnaryRestrictionPos = 62
, hasUnaryRestrictionMask = 0x1
} |
| |
| enum | HexagonMOTargetFlagVal {
MO_NO_FLAG
, MO_PCREL
, MO_GOT
, MO_LO16
,
MO_HI16
, MO_GPREL
, MO_GDGOT
, MO_GDPLT
,
MO_IE
, MO_IEGOT
, MO_TPREL
, HMOTF_ConstExtended = 0x80
,
MO_Bitmasks = HMOTF_ConstExtended
} |
| |
| enum | SubInstructionGroup {
HSIG_None = 0
, HSIG_L1
, HSIG_L2
, HSIG_S1
,
HSIG_S2
, HSIG_A
, HSIG_Compound
} |
| |
| enum | CompoundGroup { HCG_None = 0
, HCG_A
, HCG_B
, HCG_C
} |
| |
| enum | InstParseBits {
INST_PARSE_MASK = 0x0000c000
, INST_PARSE_PACKET_END = 0x0000c000
, INST_PARSE_LOOP_END = 0x00008000
, INST_PARSE_NOT_END = 0x00004000
,
INST_PARSE_DUPLEX = 0x00000000
, INST_PARSE_EXTENDER = 0x00000000
} |
| |
| enum | InstIClassBits : unsigned {
INST_ICLASS_MASK = 0xf0000000
, INST_ICLASS_EXTENDER = 0x00000000
, INST_ICLASS_J_1 = 0x10000000
, INST_ICLASS_J_2 = 0x20000000
,
INST_ICLASS_LD_ST_1 = 0x30000000
, INST_ICLASS_LD_ST_2 = 0x40000000
, INST_ICLASS_J_3 = 0x50000000
, INST_ICLASS_CR = 0x60000000
,
INST_ICLASS_ALU32_1 = 0x70000000
, INST_ICLASS_XTYPE_1 = 0x80000000
, INST_ICLASS_LD = 0x90000000
, INST_ICLASS_ST = 0xa0000000
,
INST_ICLASS_ALU32_2 = 0xb0000000
, INST_ICLASS_XTYPE_2 = 0xc0000000
, INST_ICLASS_XTYPE_3 = 0xd0000000
, INST_ICLASS_XTYPE_4 = 0xe0000000
,
INST_ICLASS_ALU32_3 = 0xf0000000
} |
| |
HexagonII - This namespace holds all of the target specific flags that instruction info tracks.
