LLVM 20.0.0git
HexagonBaseInfo.h
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1//===- HexagonBaseInfo.h - Top level definitions for Hexagon ----*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains small standalone helper functions and enum definitions for
10// the Hexagon target useful for the compiler back-end and the MC libraries.
11// As such, it deliberately does not include references to LLVM core
12// code gen types, passes, etc..
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
17#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
18
19#include "HexagonDepITypes.h"
21
22namespace llvm {
23
24/// HexagonII - This namespace holds all of the target specific flags that
25/// instruction info tracks.
26namespace HexagonII {
28 unsigned const TypeCVI_LAST = TypeCVI_ZW;
29
30 enum AddrMode {
31 NoAddrMode = 0, // No addressing mode
32 Absolute = 1, // Absolute addressing mode
33 AbsoluteSet = 2, // Absolute set addressing mode
34 BaseImmOffset = 3, // Indirect with offset
35 BaseLongOffset = 4, // Indirect with long offset
36 BaseRegOffset = 5, // Indirect with register offset
37 PostInc = 6 // Post increment addressing mode
38 };
39
47 };
48
49 // MCInstrDesc TSFlags
50 // *** Must match HexagonInstrFormat*.td ***
51 enum {
52 // This 7-bit field describes the insn type.
54 TypeMask = 0x7f,
55
56 // Solo instructions.
58 SoloMask = 0x1,
59 // Packed only with A or X-type instructions.
62 // Only A-type instruction in first slot or nothing.
65
66 // Predicated instructions.
75
76 // New-Value consumer instructions.
79 // New-Value producer instructions.
82 // Which operand consumes or produces a new value.
85 // Stores that can become new-value stores.
88 // New-value store instructions.
91 // Loads that can become current-value loads.
94 // Current-value load instructions.
97
98 // Extendable insns.
101 // Insns must be extended.
104 // Which operand may be extended.
107 // Signed or unsigned range.
110 // Number of bits of range before extending operand.
113 // Alignment power-of-two before extending operand.
116
123
126
127 // Addressing mode for load/store instructions.
130 // Access size for load/store instructions.
133
134 // Branch predicted taken.
137
138 // Floating-point instructions.
139 FPPos = 48,
140 FPMask = 0x1,
141
142 // New-Value producer-2 instructions.
145 // Which operand consumes or produces a new value.
148
149 // Accumulator instructions.
152
153 // Complex XU, prevent xu competition by preferring slot3
156
159
162
165
168
171
174 };
175
176 // *** The code above must match HexagonInstrFormat*.td *** //
177
178 // Hexagon specific MO operand flag mask.
180 // Hexagon-specific MachineOperand target flags.
181 //
182 // When changing these, make sure to update
183 // getSerializableDirectMachineOperandTargetFlags and
184 // getSerializableBitmaskMachineOperandTargetFlags if needed.
186
187 /// MO_PCREL - On a symbol operand, indicates a PC-relative relocation
188 /// Used for computing a global address for PIC compilations
190
191 /// MO_GOT - Indicates a GOT-relative relocation
193
194 // Low or high part of a symbol.
197
198 // Offset from the base of the SDA.
200
201 // MO_GDGOT - indicates GOT relative relocation for TLS
202 // GeneralDynamic method
204
205 // MO_GDPLT - indicates PLT relative relocation for TLS
206 // GeneralDynamic method
208
209 // MO_IE - indicates non PIC relocation for TLS
210 // Initial Executable method
212
213 // MO_IEGOT - indicates PIC relocation for TLS
214 // Initial Executable method
216
217 // MO_TPREL - indicates relocation for TLS
218 // local Executable method
220
221 // HMOTF_ConstExtended
222 // Addendum to above, indicates a const extended op
223 // Can be used as a mask.
225
226 // Union of all bitmasks (currently only HMOTF_ConstExtended).
228 };
229
230 // Hexagon Sub-instruction classes.
239 };
240
241 // Hexagon Compound classes.
246 HCG_C
247 };
248
250 INST_PARSE_MASK = 0x0000c000,
253 INST_PARSE_NOT_END = 0x00004000,
254 INST_PARSE_DUPLEX = 0x00000000,
255 INST_PARSE_EXTENDER = 0x00000000
256 };
257
258 enum InstIClassBits : unsigned {
259 INST_ICLASS_MASK = 0xf0000000,
261 INST_ICLASS_J_1 = 0x10000000,
262 INST_ICLASS_J_2 = 0x20000000,
265 INST_ICLASS_J_3 = 0x50000000,
266 INST_ICLASS_CR = 0x60000000,
269 INST_ICLASS_LD = 0x90000000,
270 INST_ICLASS_ST = 0xa0000000,
275 INST_ICLASS_ALU32_3 = 0xf0000000
276 };
277
280 switch (S) {
281 case ByteAccess: return 1;
282 case HalfWordAccess: return 2;
283 case WordAccess: return 4;
284 case DoubleWordAccess: return 8;
285 default: return 0;
286 }
287 }
288} // end namespace HexagonII
289
290} // end namespace llvm
291
292#endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
#define LLVM_ATTRIBUTE_UNUSED
Definition: Compiler.h:203
unsigned const TypeCVI_LAST
static LLVM_ATTRIBUTE_UNUSED unsigned getMemAccessSizeInBytes(MemAccessSize S)
unsigned const TypeCVI_FIRST
@ MO_PCREL
MO_PCREL - On a symbol operand, indicates a PC-relative relocation Used for computing a global addres...
@ MO_GOT
MO_GOT - Indicates a GOT-relative relocation.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18