LCOV - code coverage report | |||||||||||||||||||||||||
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Filename | Line Coverage ( show details ) | Functions | ||||
GCNSchedStrategy.h |
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100.0 % | 2 / 2 | 0.0 % | 0 / 1 | |
GCNIterativeScheduler.h |
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50.0 % | 2 / 4 | 0.0 % | 0 / 1 | |
SIFrameLowering.h |
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100.0 % | 3 / 3 | 0.0 % | 0 / 2 | |
AMDGPUMachineFunction.h |
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0.0 % | 0 / 12 | 0.0 % | 0 / 6 | |
AMDGPUMachineCFGStructurizer.cpp |
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0.0 % | 0 / 931 | 0.0 % | 0 / 122 | |
AMDGPUTargetTransformInfo.h |
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56.7 % | 17 / 30 | 16.7 % | 2 / 12 | |
SIMachineFunctionInfo.h |
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56.2 % | 95 / 169 | 20.5 % | 9 / 44 | |
AMDGPUMachineModuleInfo.h |
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57.1 % | 8 / 14 | 25.0 % | 1 / 4 | |
SIRegisterInfo.h |
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63.6 % | 14 / 22 | 25.0 % | 2 / 8 | |
AMDGPUSubtarget.h |
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43.6 % | 109 / 250 | 31.5 % | 35 / 111 | |
AMDGPULibFunc.h |
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69.7 % | 23 / 33 | 33.3 % | 4 / 12 | |
SIMachineScheduler.h |
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72.6 % | 45 / 62 | 36.0 % | 9 / 25 | |
AMDGPUIntrinsicInfo.cpp |
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40.0 % | 10 / 25 | 37.5 % | 3 / 8 | |
SIInsertWaitcnts.cpp |
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75.1 % | 483 / 643 | 42.2 % | 19 / 45 | |
GCNRegPressure.h |
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79.3 % | 23 / 29 | 45.5 % | 5 / 11 | |
AMDGPUInstrInfo.cpp |
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85.7 % | 6 / 7 | 50.0 % | 1 / 2 | |
AMDGPUFrameLowering.h |
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100.0 % | 1 / 1 | 50.0 % | 1 / 2 | |
AMDGPUArgumentUsageInfo.h |
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68.8 % | 11 / 16 | 50.0 % | 2 / 4 | |
R600ControlFlowFinalizer.cpp |
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68.2 % | 212 / 311 | 55.0 % | 11 / 20 | |
AMDGPUPerfHintAnalysis.cpp |
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58.7 % | 71 / 121 | 56.2 % | 9 / 16 | |
AMDGPUCodeGenPrepare.cpp |
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72.8 % | 246 / 338 | 56.7 % | 17 / 30 | |
AMDGPUISelDAGToDAG.cpp |
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66.3 % | 611 / 922 | 56.8 % | 46 / 81 | |
AMDGPUTargetMachine.h |
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75.0 % | 9 / 12 | 57.1 % | 4 / 7 | |
SIMemoryLegalizer.cpp |
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81.0 % | 217 / 268 | 61.5 % | 24 / 39 | |
SIInstrInfo.h |
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94.9 % | 74 / 78 | 62.5 % | 5 / 8 | |
SILoadStoreOptimizer.cpp |
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70.8 % | 289 / 408 | 64.0 % | 16 / 25 | |
GCNMinRegStrategy.cpp |
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82.5 % | 94 / 114 | 64.3 % | 9 / 14 | |
SILowerControlFlow.cpp |
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57.1 % | 129 / 226 | 64.3 % | 9 / 14 | |
SIPeepholeSDWA.cpp |
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81.8 % | 292 / 357 | 65.5 % | 19 / 29 | |
SIFoldOperands.cpp |
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83.6 % | 407 / 487 | 66.7 % | 20 / 30 | |
R600EmitClauseMarkers.cpp |
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67.7 % | 84 / 124 | 69.2 % | 9 / 13 | |
SIInsertSkips.cpp |
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44.5 % | 61 / 137 | 70.0 % | 7 / 10 | |
AMDGPUArgumentUsageInfo.cpp |
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56.7 % | 38 / 67 | 71.4 % | 5 / 7 | |
AMDILCFGStructurizer.cpp |
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67.9 % | 309 / 455 | 71.7 % | 38 / 53 | |
SIFormMemoryClauses.cpp |
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64.2 % | 120 / 187 | 73.3 % | 11 / 15 | |
SIWholeQuadMode.cpp |
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81.9 % | 244 / 298 | 73.9 % | 17 / 23 | |
AMDGPUAnnotateUniformValues.cpp |
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65.4 % | 51 / 78 | 76.9 % | 10 / 13 | |
R600ClauseMergePass.cpp |
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80.6 % | 58 / 72 | 77.8 % | 7 / 9 | |
R600OptimizeVectorRegisters.cpp |
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81.2 % | 125 / 154 | 78.9 % | 15 / 19 | |
GCNIterativeScheduler.cpp |
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91.8 % | 236 / 257 | 79.3 % | 23 / 29 | |
R600FrameLowering.h |
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100.0 % | 9 / 9 | 80.0 % | 4 / 5 | |
R600AsmPrinter.cpp |
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95.8 % | 46 / 48 | 80.0 % | 4 / 5 | |
AMDGPUMCInstLower.cpp |
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77.6 % | 111 / 143 | 80.0 % | 8 / 10 | |
R600Packetizer.cpp |
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87.8 % | 130 / 148 | 82.4 % | 14 / 17 | |
AMDGPUISelLowering.h |
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75.0 % | 12 / 16 | 83.3 % | 5 / 6 | |
AMDGPUAlwaysInlinePass.cpp |
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66.7 % | 28 / 42 | 83.3 % | 5 / 6 | |
R600ExpandSpecialInstrs.cpp |
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89.6 % | 95 / 106 | 83.3 % | 5 / 6 | |
AMDGPUUnifyMetadata.cpp |
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67.6 % | 25 / 37 | 83.3 % | 5 / 6 | |
AMDGPUAnnotateKernelFeatures.cpp |
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64.2 % | 68 / 106 | 84.6 % | 11 / 13 | |
SIMachineScheduler.cpp |
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77.6 % | 628 / 809 | 85.2 % | 46 / 54 | |
SIAnnotateControlFlow.cpp |
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91.0 % | 121 / 133 | 86.7 % | 13 / 15 | |
AMDGPURewriteOutArguments.cpp |
|
98.5 % | 134 / 136 | 87.5 % | 7 / 8 | |
AMDGPULowerIntrinsics.cpp |
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94.7 % | 36 / 38 | 87.5 % | 7 / 8 | |
AMDGPULowerKernelAttributes.cpp |
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23.5 % | 19 / 81 | 87.5 % | 7 / 8 | |
SIRegisterInfo.cpp |
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83.7 % | 507 / 606 | 88.1 % | 37 / 42 | |
AMDGPUPromoteAlloca.cpp |
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93.4 % | 267 / 286 | 88.2 % | 15 / 17 | |
AMDGPUAtomicOptimizer.cpp |
|
88.9 % | 120 / 135 | 88.9 % | 8 / 9 | |
SIInstrInfo.cpp |
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81.2 % | 1865 / 2296 | 89.1 % | 114 / 128 | |
SIOptimizeExecMaskingPreRA.cpp |
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96.8 % | 91 / 94 | 90.0 % | 9 / 10 | |
SIFixSGPRCopies.cpp |
|
93.8 % | 210 / 224 | 90.0 % | 18 / 20 | |
R600ISelLowering.cpp |
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88.2 % | 836 / 948 | 90.0 % | 36 / 40 | |
AMDGPULibFunc.cpp |
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57.2 % | 210 / 367 | 90.0 % | 36 / 40 | |
SIISelLowering.cpp |
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91.2 % | 3425 / 3754 | 90.8 % | 157 / 173 | |
AMDGPUISelLowering.cpp |
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84.1 % | 1540 / 1831 | 90.8 % | 109 / 120 | |
R600RegisterInfo.cpp |
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95.6 % | 43 / 45 | 90.9 % | 10 / 11 | |
SIFixWWMLiveness.cpp |
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98.2 % | 111 / 113 | 90.9 % | 10 / 11 | |
SIOptimizeExecMasking.cpp |
|
82.2 % | 97 / 118 | 91.7 % | 11 / 12 | |
AMDGPUTargetTransformInfo.cpp |
|
90.2 % | 212 / 235 | 91.9 % | 34 / 37 | |
R600OpenCLImageTypeLoweringPass.cpp |
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96.4 % | 108 / 112 | 92.3 % | 12 / 13 | |
AMDGPULibCalls.cpp |
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62.8 % | 378 / 602 | 92.5 % | 37 / 40 | |
AMDGPUAsmPrinter.cpp |
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96.9 % | 559 / 577 | 93.1 % | 27 / 29 | |
GCNRegPressure.cpp |
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81.8 % | 139 / 170 | 94.1 % | 16 / 17 | |
AMDGPUTargetMachine.cpp |
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96.3 % | 314 / 326 | 94.4 % | 51 / 54 | |
AMDGPUInstructionSelector.cpp |
|
91.1 % | 297 / 326 | 95.7 % | 22 / 23 | |
AMDGPUSubtarget.cpp |
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96.5 % | 218 / 226 | 96.0 % | 24 / 25 | |
GCNHazardRecognizer.cpp |
|
98.8 % | 248 / 251 | 96.6 % | 28 / 29 | |
R600InstrInfo.cpp |
|
91.4 % | 585 / 640 | 98.7 % | 75 / 76 | |
AMDGPUTargetObjectFile.h |
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100.0 % | 1 / 1 | - | 0 / 0 | |
AMDGPUInstructionSelector.h |
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100.0 % | 1 / 1 | - | 0 / 0 | |
SIISelLowering.h |
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100.0 % | 1 / 1 | - | 0 / 0 | |
AMDGPUHSAMetadataStreamer.h |
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100.0 % | 1 / 1 | - | 0 / 0 | |
SIProgramInfo.h |
|
100.0 % | 1 / 1 | - | 0 / 0 | |
R600InstrInfo.h |
|
100.0 % | 3 / 3 | - | 0 / 0 | |
R600FrameLowering.cpp |
|
100.0 % | 13 / 13 | 100.0 % | 1 / 1 | |
AMDGPUMachineModuleInfo.cpp |
|
100.0 % | 7 / 7 | 100.0 % | 1 / 1 | |
AMDGPUGenRegisterBankInfo.def |
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100.0 % | 11 / 11 | 100.0 % | 1 / 1 | |
AMDGPUPerfHintAnalysis.h |
|
100.0 % | 3 / 3 | 100.0 % | 1 / 1 | |
AMDGPULegalizerInfo.cpp |
|
100.0 % | 67 / 67 | 100.0 % | 1 / 1 | |
AMDGPUTargetObjectFile.cpp |
|
100.0 % | 5 / 5 | 100.0 % | 1 / 1 | |
R600MachineFunctionInfo.cpp |
|
100.0 % | 2 / 2 | 100.0 % | 1 / 1 | |
AMDGPUMachineFunction.cpp |
|
100.0 % | 25 / 25 | 100.0 % | 2 / 2 | |
AMDGPUMacroFusion.cpp |
|
100.0 % | 7 / 7 | 100.0 % | 2 / 2 | |
AMDGPUFrameLowering.cpp |
|
100.0 % | 4 / 4 | 100.0 % | 2 / 2 | |
GCNHazardRecognizer.h |
|
100.0 % | 3 / 3 | 100.0 % | 2 / 2 | |
R600MachineScheduler.h |
|
100.0 % | 2 / 2 | 100.0 % | 3 / 3 | |
AMDGPUAliasAnalysis.h |
|
100.0 % | 11 / 11 | 100.0 % | 3 / 3 | |
AMDGPUCallLowering.cpp |
|
86.6 % | 97 / 112 | 100.0 % | 5 / 5 | |
SIFixVGPRCopies.cpp |
|
100.0 % | 16 / 16 | 100.0 % | 5 / 5 | |
AMDGPULowerKernelArguments.cpp |
|
100.0 % | 84 / 84 | 100.0 % | 5 / 5 | |
SIDebuggerInsertNops.cpp |
|
100.0 % | 21 / 21 | 100.0 % | 6 / 6 | |
AMDGPUUnifyDivergentExitNodes.cpp |
|
100.0 % | 80 / 80 | 100.0 % | 6 / 6 | |
AMDGPUAliasAnalysis.cpp |
|
100.0 % | 24 / 24 | 100.0 % | 6 / 6 | |
AMDGPUOpenCLEnqueuedBlockLowering.cpp |
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100.0 % | 38 / 38 | 100.0 % | 6 / 6 | |
AMDGPURegisterInfo.cpp |
|
100.0 % | 14 / 14 | 100.0 % | 7 / 7 | |
SILowerI1Copies.cpp |
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100.0 % | 61 / 61 | 100.0 % | 7 / 7 | |
GCNILPSched.cpp |
|
94.1 % | 96 / 102 | 100.0 % | 9 / 9 | |
AMDGPUInline.cpp |
|
91.7 % | 55 / 60 | 100.0 % | 9 / 9 | |
GCNSchedStrategy.cpp |
|
92.2 % | 213 / 231 | 100.0 % | 11 / 11 | |
AMDGPURegisterBankInfo.cpp |
|
93.2 % | 287 / 308 | 100.0 % | 13 / 13 | |
SIShrinkInstructions.cpp |
|
97.5 % | 155 / 159 | 100.0 % | 13 / 13 | |
SIMachineFunctionInfo.cpp |
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99.4 % | 163 / 164 | 100.0 % | 14 / 14 | |
SIFrameLowering.cpp |
|
93.8 % | 302 / 322 | 100.0 % | 15 / 15 | |
R600MachineScheduler.cpp |
|
98.1 % | 208 / 212 | 100.0 % | 17 / 17 | |
AMDGPUHSAMetadataStreamer.cpp |
|
96.6 % | 226 / 234 | 100.0 % | 21 / 21 |
Generated by: LCOV version 1.13 |