LLVM API Documentation

PPCTargetMachine.cpp
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00001 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // Top-level implementation for the PowerPC target.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #include "PPCTargetMachine.h"
00015 #include "PPC.h"
00016 #include "llvm/CodeGen/Passes.h"
00017 #include "llvm/MC/MCStreamer.h"
00018 #include "llvm/PassManager.h"
00019 #include "llvm/Support/CommandLine.h"
00020 #include "llvm/Support/FormattedStream.h"
00021 #include "llvm/Support/TargetRegistry.h"
00022 #include "llvm/Target/TargetOptions.h"
00023 using namespace llvm;
00024 
00025 static cl::
00026 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
00027                         cl::desc("Disable CTR loops for PPC"));
00028 
00029 static cl::opt<bool>
00030 VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
00031   cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
00032 
00033 extern "C" void LLVMInitializePowerPCTarget() {
00034   // Register the targets
00035   RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
00036   RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
00037   RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
00038 }
00039 
00040 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
00041                                    StringRef FS, const TargetOptions &Options,
00042                                    Reloc::Model RM, CodeModel::Model CM,
00043                                    CodeGenOpt::Level OL, bool is64Bit)
00044     : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
00045       Subtarget(TT, CPU, FS, *this, is64Bit, OL) {
00046   initAsmInfo();
00047 }
00048 
00049 void PPC32TargetMachine::anchor() { }
00050 
00051 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
00052                                        StringRef CPU, StringRef FS,
00053                                        const TargetOptions &Options,
00054                                        Reloc::Model RM, CodeModel::Model CM,
00055                                        CodeGenOpt::Level OL)
00056   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
00057 }
00058 
00059 void PPC64TargetMachine::anchor() { }
00060 
00061 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
00062                                        StringRef CPU,  StringRef FS,
00063                                        const TargetOptions &Options,
00064                                        Reloc::Model RM, CodeModel::Model CM,
00065                                        CodeGenOpt::Level OL)
00066   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
00067 }
00068 
00069 
00070 //===----------------------------------------------------------------------===//
00071 // Pass Pipeline Configuration
00072 //===----------------------------------------------------------------------===//
00073 
00074 namespace {
00075 /// PPC Code Generator Pass Configuration Options.
00076 class PPCPassConfig : public TargetPassConfig {
00077 public:
00078   PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
00079     : TargetPassConfig(TM, PM) {}
00080 
00081   PPCTargetMachine &getPPCTargetMachine() const {
00082     return getTM<PPCTargetMachine>();
00083   }
00084 
00085   const PPCSubtarget &getPPCSubtarget() const {
00086     return *getPPCTargetMachine().getSubtargetImpl();
00087   }
00088 
00089   bool addPreISel() override;
00090   bool addILPOpts() override;
00091   bool addInstSelector() override;
00092   bool addPreRegAlloc() override;
00093   bool addPreSched2() override;
00094   bool addPreEmitPass() override;
00095 };
00096 } // namespace
00097 
00098 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
00099   return new PPCPassConfig(this, PM);
00100 }
00101 
00102 bool PPCPassConfig::addPreISel() {
00103   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
00104     addPass(createPPCCTRLoops(getPPCTargetMachine()));
00105 
00106   return false;
00107 }
00108 
00109 bool PPCPassConfig::addILPOpts() {
00110   addPass(&EarlyIfConverterID);
00111   return true;
00112 }
00113 
00114 bool PPCPassConfig::addInstSelector() {
00115   // Install an instruction selector.
00116   addPass(createPPCISelDag(getPPCTargetMachine()));
00117 
00118 #ifndef NDEBUG
00119   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
00120     addPass(createPPCCTRLoopsVerify());
00121 #endif
00122 
00123   addPass(createPPCVSXCopyPass());
00124   return false;
00125 }
00126 
00127 bool PPCPassConfig::addPreRegAlloc() {
00128   initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
00129   insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
00130              &PPCVSXFMAMutateID);
00131   return false;
00132 }
00133 
00134 bool PPCPassConfig::addPreSched2() {
00135   addPass(createPPCVSXCopyCleanupPass());
00136 
00137   if (getOptLevel() != CodeGenOpt::None)
00138     addPass(&IfConverterID);
00139 
00140   return true;
00141 }
00142 
00143 bool PPCPassConfig::addPreEmitPass() {
00144   if (getOptLevel() != CodeGenOpt::None)
00145     addPass(createPPCEarlyReturnPass());
00146   // Must run branch selection immediately preceding the asm printer.
00147   addPass(createPPCBranchSelectionPass());
00148   return false;
00149 }
00150 
00151 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
00152                                       JITCodeEmitter &JCE) {
00153   // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
00154   // writing?
00155   Subtarget.SetJITMode();
00156 
00157   // Machine code emitter pass for PowerPC.
00158   PM.add(createPPCJITCodeEmitterPass(*this, JCE));
00159 
00160   return false;
00161 }
00162 
00163 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
00164   // Add first the target-independent BasicTTI pass, then our PPC pass. This
00165   // allows the PPC pass to delegate to the target independent layer when
00166   // appropriate.
00167   PM.add(createBasicTargetTransformInfoPass(this));
00168   PM.add(createPPCTargetTransformInfoPass(this));
00169 }
00170