LLVM API Documentation

PPCTargetMachine.cpp
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00001 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // Top-level implementation for the PowerPC target.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #include "PPCTargetMachine.h"
00015 #include "PPC.h"
00016 #include "llvm/CodeGen/Passes.h"
00017 #include "llvm/MC/MCStreamer.h"
00018 #include "llvm/PassManager.h"
00019 #include "llvm/Support/CommandLine.h"
00020 #include "llvm/Support/FormattedStream.h"
00021 #include "llvm/Support/TargetRegistry.h"
00022 #include "llvm/Target/TargetOptions.h"
00023 using namespace llvm;
00024 
00025 static cl::
00026 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
00027                         cl::desc("Disable CTR loops for PPC"));
00028 
00029 static cl::opt<bool>
00030 VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
00031   cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
00032 
00033 extern "C" void LLVMInitializePowerPCTarget() {
00034   // Register the targets
00035   RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
00036   RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
00037   RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
00038 }
00039 
00040 /// Return the datalayout string of a subtarget.
00041 static std::string getDataLayoutString(const PPCSubtarget &ST) {
00042   const Triple &T = ST.getTargetTriple();
00043 
00044   std::string Ret;
00045 
00046   // Most PPC* platforms are big endian, PPC64LE is little endian.
00047   if (ST.isLittleEndian())
00048     Ret = "e";
00049   else
00050     Ret = "E";
00051 
00052   Ret += DataLayout::getManglingComponent(T);
00053 
00054   // PPC32 has 32 bit pointers. The PS3 (OS Lv2) is a PPC64 machine with 32 bit
00055   // pointers.
00056   if (!ST.isPPC64() || T.getOS() == Triple::Lv2)
00057     Ret += "-p:32:32";
00058 
00059   // Note, the alignment values for f64 and i64 on ppc64 in Darwin
00060   // documentation are wrong; these are correct (i.e. "what gcc does").
00061   if (ST.isPPC64() || ST.isSVR4ABI())
00062     Ret += "-i64:64";
00063   else
00064     Ret += "-f64:32:64";
00065 
00066   // PPC64 has 32 and 64 bit registers, PPC32 has only 32 bit ones.
00067   if (ST.isPPC64())
00068     Ret += "-n32:64";
00069   else
00070     Ret += "-n32";
00071 
00072   return Ret;
00073 }
00074 
00075 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT,
00076                                    StringRef CPU, StringRef FS,
00077                                    const TargetOptions &Options,
00078                                    Reloc::Model RM, CodeModel::Model CM,
00079                                    CodeGenOpt::Level OL,
00080                                    bool is64Bit)
00081   : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
00082     Subtarget(TT, CPU, FS, is64Bit, OL),
00083     DL(getDataLayoutString(Subtarget)), InstrInfo(*this),
00084     FrameLowering(Subtarget), JITInfo(*this, is64Bit),
00085     TLInfo(*this), TSInfo(*this),
00086     InstrItins(Subtarget.getInstrItineraryData()) {
00087   initAsmInfo();
00088 }
00089 
00090 void PPC32TargetMachine::anchor() { }
00091 
00092 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
00093                                        StringRef CPU, StringRef FS,
00094                                        const TargetOptions &Options,
00095                                        Reloc::Model RM, CodeModel::Model CM,
00096                                        CodeGenOpt::Level OL)
00097   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {
00098 }
00099 
00100 void PPC64TargetMachine::anchor() { }
00101 
00102 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
00103                                        StringRef CPU,  StringRef FS,
00104                                        const TargetOptions &Options,
00105                                        Reloc::Model RM, CodeModel::Model CM,
00106                                        CodeGenOpt::Level OL)
00107   : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {
00108 }
00109 
00110 
00111 //===----------------------------------------------------------------------===//
00112 // Pass Pipeline Configuration
00113 //===----------------------------------------------------------------------===//
00114 
00115 namespace {
00116 /// PPC Code Generator Pass Configuration Options.
00117 class PPCPassConfig : public TargetPassConfig {
00118 public:
00119   PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
00120     : TargetPassConfig(TM, PM) {}
00121 
00122   PPCTargetMachine &getPPCTargetMachine() const {
00123     return getTM<PPCTargetMachine>();
00124   }
00125 
00126   const PPCSubtarget &getPPCSubtarget() const {
00127     return *getPPCTargetMachine().getSubtargetImpl();
00128   }
00129 
00130   virtual bool addPreISel();
00131   virtual bool addILPOpts();
00132   virtual bool addInstSelector();
00133   virtual bool addPreRegAlloc();
00134   virtual bool addPreSched2();
00135   virtual bool addPreEmitPass();
00136 };
00137 } // namespace
00138 
00139 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
00140   return new PPCPassConfig(this, PM);
00141 }
00142 
00143 bool PPCPassConfig::addPreISel() {
00144   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
00145     addPass(createPPCCTRLoops(getPPCTargetMachine()));
00146 
00147   return false;
00148 }
00149 
00150 bool PPCPassConfig::addILPOpts() {
00151   if (getPPCSubtarget().hasISEL()) {
00152     addPass(&EarlyIfConverterID);
00153     return true;
00154   }
00155 
00156   return false;
00157 }
00158 
00159 bool PPCPassConfig::addInstSelector() {
00160   // Install an instruction selector.
00161   addPass(createPPCISelDag(getPPCTargetMachine()));
00162 
00163 #ifndef NDEBUG
00164   if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
00165     addPass(createPPCCTRLoopsVerify());
00166 #endif
00167 
00168   if (getPPCSubtarget().hasVSX())
00169     addPass(createPPCVSXCopyPass());
00170 
00171   return false;
00172 }
00173 
00174 bool PPCPassConfig::addPreRegAlloc() {
00175   if (getPPCSubtarget().hasVSX()) {
00176     initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
00177     insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
00178                &PPCVSXFMAMutateID);
00179   }
00180 
00181   return false;
00182 }
00183 
00184 bool PPCPassConfig::addPreSched2() {
00185   if (getPPCSubtarget().hasVSX())
00186     addPass(createPPCVSXCopyCleanupPass());
00187 
00188   if (getOptLevel() != CodeGenOpt::None)
00189     addPass(&IfConverterID);
00190 
00191   return true;
00192 }
00193 
00194 bool PPCPassConfig::addPreEmitPass() {
00195   if (getOptLevel() != CodeGenOpt::None)
00196     addPass(createPPCEarlyReturnPass());
00197   // Must run branch selection immediately preceding the asm printer.
00198   addPass(createPPCBranchSelectionPass());
00199   return false;
00200 }
00201 
00202 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
00203                                       JITCodeEmitter &JCE) {
00204   // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
00205   // writing?
00206   Subtarget.SetJITMode();
00207 
00208   // Machine code emitter pass for PowerPC.
00209   PM.add(createPPCJITCodeEmitterPass(*this, JCE));
00210 
00211   return false;
00212 }
00213 
00214 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
00215   // Add first the target-independent BasicTTI pass, then our PPC pass. This
00216   // allows the PPC pass to delegate to the target independent layer when
00217   // appropriate.
00218   PM.add(createBasicTargetTransformInfoPass(this));
00219   PM.add(createPPCTargetTransformInfoPass(this));
00220 }
00221