LLVM 19.0.0git
Macros | Functions
R600InstrInfo.cpp File Reference

R600 Implementation of TargetInstrInfo. More...

#include "R600InstrInfo.h"
#include "AMDGPU.h"
#include "MCTargetDesc/R600MCTargetDesc.h"
#include "R600.h"
#include "R600Defines.h"
#include "R600Subtarget.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "R600GenDFAPacketizer.inc"
#include "R600GenInstrInfo.inc"

Go to the source code of this file.

Macros

#define GET_INSTRINFO_CTOR_DTOR
 
#define GET_INSTRINFO_CTOR_DTOR
 
#define GET_INSTRMAP_INFO
 
#define GET_INSTRINFO_NAMED_OPS
 
#define OPERAND_CASE(Label)
 

Functions

static std::vector< std::pair< int, unsigned > > Swizzle (std::vector< std::pair< int, unsigned > > Src, R600InstrInfo::BankSwizzle Swz)
 
static unsigned getTransSwizzle (R600InstrInfo::BankSwizzle Swz, unsigned Op)
 
static bool NextPossibleSolution (std::vector< R600InstrInfo::BankSwizzle > &SwzCandidate, unsigned Idx)
 Given a swizzle sequence SwzCandidate and an index Idx, returns the next (in lexicographic term) swizzle sequence assuming that all swizzles after Idx can be skipped.
 
static bool isConstCompatible (R600InstrInfo::BankSwizzle TransSwz, const std::vector< std::pair< int, unsigned > > &TransOps, unsigned ConstCount)
 Instructions in Trans slot can't read gpr at cycle 0 if they also read a const, and can't read a gpr at cycle 1 if they read 2 const.
 
static bool isPredicateSetter (unsigned Opcode)
 
static MachineInstrfindFirstPredicateSetterFrom (MachineBasicBlock &MBB, MachineBasicBlock::iterator I)
 
static bool isJump (unsigned Opcode)
 
static bool isBranch (unsigned Opcode)
 
static MachineBasicBlock::iterator FindLastAluClause (MachineBasicBlock &MBB)
 
static unsigned getSlotedOps (unsigned Op, unsigned Slot)
 

Detailed Description

R600 Implementation of TargetInstrInfo.

Definition in file R600InstrInfo.cpp.

Macro Definition Documentation

◆ GET_INSTRINFO_CTOR_DTOR [1/2]

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 28 of file R600InstrInfo.cpp.

◆ GET_INSTRINFO_CTOR_DTOR [2/2]

#define GET_INSTRINFO_CTOR_DTOR

Definition at line 28 of file R600InstrInfo.cpp.

◆ GET_INSTRINFO_NAMED_OPS

#define GET_INSTRINFO_NAMED_OPS

Definition at line 30 of file R600InstrInfo.cpp.

◆ GET_INSTRMAP_INFO

#define GET_INSTRMAP_INFO

Definition at line 29 of file R600InstrInfo.cpp.

◆ OPERAND_CASE

#define OPERAND_CASE (   Label)
Value:
case Label: { \
static const unsigned Ops[] = \
{ \
Label##_X, \
Label##_Y, \
Label##_Z, \
Label##_W \
}; \
return Ops[Slot]; \
}

Definition at line 1252 of file R600InstrInfo.cpp.

Function Documentation

◆ findFirstPredicateSetterFrom()

static MachineInstr * findFirstPredicateSetterFrom ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  I 
)
static

◆ FindLastAluClause()

static MachineBasicBlock::iterator FindLastAluClause ( MachineBasicBlock MBB)
static

◆ getSlotedOps()

static unsigned getSlotedOps ( unsigned  Op,
unsigned  Slot 
)
static

◆ getTransSwizzle()

static unsigned getTransSwizzle ( R600InstrInfo::BankSwizzle  Swz,
unsigned  Op 
)
static

◆ isBranch()

static bool isBranch ( unsigned  Opcode)
static

◆ isConstCompatible()

static bool isConstCompatible ( R600InstrInfo::BankSwizzle  TransSwz,
const std::vector< std::pair< int, unsigned > > &  TransOps,
unsigned  ConstCount 
)
static

Instructions in Trans slot can't read gpr at cycle 0 if they also read a const, and can't read a gpr at cycle 1 if they read 2 const.

Definition at line 491 of file R600InstrInfo.cpp.

References getTransSwizzle().

Referenced by llvm::R600InstrInfo::fitsReadPortLimitations().

◆ isJump()

static bool isJump ( unsigned  Opcode)
static

Definition at line 638 of file R600InstrInfo.cpp.

Referenced by llvm::R600InstrInfo::analyzeBranch().

◆ isPredicateSetter()

static bool isPredicateSetter ( unsigned  Opcode)
static

◆ NextPossibleSolution()

static bool NextPossibleSolution ( std::vector< R600InstrInfo::BankSwizzle > &  SwzCandidate,
unsigned  Idx 
)
static

Given a swizzle sequence SwzCandidate and an index Idx, returns the next (in lexicographic term) swizzle sequence assuming that all swizzles after Idx can be skipped.

Definition at line 455 of file R600InstrInfo.cpp.

References llvm::R600InstrInfo::ALU_VEC_012_SCL_210, llvm::R600InstrInfo::ALU_VEC_210, assert(), and Idx.

Referenced by llvm::R600InstrInfo::FindSwizzleForVectorSlot().

◆ Swizzle()

static std::vector< std::pair< int, unsigned > > Swizzle ( std::vector< std::pair< int, unsigned > >  Src,
R600InstrInfo::BankSwizzle  Swz 
)
static