Representation of each machine instruction. More...

#include "llvm/CodeGen/MachineInstr.h"

Inheritance diagram for llvm::MachineInstr:

[legend]

Public Types
enum	CommentFlag { ReloadReuse = 0x1 , NoSchedComment = 0x2 , TAsmComments = 0x4 }
	Flags to specify different kinds of comments to output in assembly code. More...

enum	MIFlag { NoFlags = 0 , FrameSetup = 1 << 0 , FrameDestroy = 1 << 1 , BundledPred = 1 << 2 , BundledSucc = 1 << 3 , FmNoNans = 1 << 4 , FmNoInfs = 1 << 5 , FmNsz = 1 << 6 , FmArcp = 1 << 7 , FmContract = 1 << 8 , FmAfn = 1 << 9 , FmReassoc = 1 << 10 , NoUWrap = 1 << 11 , NoSWrap = 1 << 12 , IsExact = 1 << 13 , NoFPExcept = 1 << 14 , NoMerge = 1 << 15 , Unpredictable = 1 << 16 , NoConvergent = 1 << 17 , NonNeg = 1 << 18 , Disjoint = 1 << 19 , NoUSWrap = 1 << 20 }

enum	QueryType { IgnoreBundle , AnyInBundle , AllInBundle }
	API for querying MachineInstr properties. More...

enum	MICheckType { CheckDefs , CheckKillDead , IgnoreDefs , IgnoreVRegDefs }

using	mmo_iterator = ArrayRef< MachineMemOperand * >::iterator

using	mop_iterator = MachineOperand *
	iterator/begin/end - Iterate over all operands of a machine instruction.

using	const_mop_iterator = const MachineOperand *

using	filtered_mop_iterator = filter_iterator< mop_iterator, bool(*)(const MachineOperand &)>

using	filtered_const_mop_iterator = filter_iterator< const_mop_iterator, bool(*)(const MachineOperand &)>

Public Member Functions
	MachineInstr (const MachineInstr &)=delete

MachineInstr &	operator= (const MachineInstr &)=delete

	~MachineInstr ()=delete

const MachineBasicBlock *	getParent () const

MachineBasicBlock *	getParent ()

void	moveBefore (MachineInstr *MovePos)
	Move the instruction before `MovePos`.

const MachineFunction *	getMF () const
	Return the function that contains the basic block that this instruction belongs to.

MachineFunction *	getMF ()

uint8_t	getAsmPrinterFlags () const
	Return the asm printer flags bitvector.

void	clearAsmPrinterFlags ()
	Clear the AsmPrinter bitvector.

bool	getAsmPrinterFlag (CommentFlag Flag) const
	Return whether an AsmPrinter flag is set.

void	setAsmPrinterFlag (uint8_t Flag)
	Set a flag for the AsmPrinter.

void	clearAsmPrinterFlag (CommentFlag Flag)
	Clear specific AsmPrinter flags.

uint32_t	getFlags () const
	Return the MI flags bitvector.

bool	getFlag (MIFlag Flag) const
	Return whether an MI flag is set.

void	setFlag (MIFlag Flag)
	Set a MI flag.

void	setFlags (unsigned flags)

void	clearFlag (MIFlag Flag)
	clearFlag - Clear a MI flag.

void	clearFlags (unsigned flags)

bool	isInsideBundle () const
	Return true if MI is in a bundle (but not the first MI in a bundle).

bool	isBundled () const
	Return true if this instruction part of a bundle.

bool	isBundledWithPred () const
	Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle.

bool	isBundledWithSucc () const
	Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle.

void	bundleWithPred ()
	Bundle this instruction with its predecessor.

void	bundleWithSucc ()
	Bundle this instruction with its successor.

void	unbundleFromPred ()
	Break bundle above this instruction.

void	unbundleFromSucc ()
	Break bundle below this instruction.

const DebugLoc &	getDebugLoc () const
	Returns the debug location id of this MachineInstr.

const MachineOperand &	getDebugOffset () const
	Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise.

MachineOperand &	getDebugOffset ()

const MachineOperand &	getDebugVariableOp () const
	Return the operand for the debug variable referenced by this DBG_VALUE instruction.

MachineOperand &	getDebugVariableOp ()

const DILocalVariable *	getDebugVariable () const
	Return the debug variable referenced by this DBG_VALUE instruction.

const MachineOperand &	getDebugExpressionOp () const
	Return the operand for the complex address expression referenced by this DBG_VALUE instruction.

MachineOperand &	getDebugExpressionOp ()

const DIExpression *	getDebugExpression () const
	Return the complex address expression referenced by this DBG_VALUE instruction.

const DILabel *	getDebugLabel () const
	Return the debug label referenced by this DBG_LABEL instruction.

unsigned	getDebugInstrNum ()
	Fetch the instruction number of this MachineInstr.

unsigned	getDebugInstrNum (MachineFunction &MF)
	Fetch instruction number of this MachineInstr – but before it's inserted into `MF`.

unsigned	peekDebugInstrNum () const
	Examine the instruction number of this MachineInstr.

void	setDebugInstrNum (unsigned Num)
	Set instruction number of this MachineInstr.

void	dropDebugNumber ()
	Drop any variable location debugging information associated with this instruction.

void	emitError (StringRef Msg) const
	Emit an error referring to the source location of this instruction.

const MCInstrDesc &	getDesc () const
	Returns the target instruction descriptor of this MachineInstr.

unsigned	getOpcode () const
	Returns the opcode of this MachineInstr.

unsigned	getNumOperands () const
	Retuns the total number of operands.

unsigned	getNumDebugOperands () const
	Returns the total number of operands which are debug locations.

const MachineOperand &	getOperand (unsigned i) const

MachineOperand &	getOperand (unsigned i)

MachineOperand &	getDebugOperand (unsigned Index)

const MachineOperand &	getDebugOperand (unsigned Index) const

bool	hasDebugOperandForReg (Register Reg) const
	Returns whether this debug value has at least one debug operand with the register `Reg`.

iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > >	getDebugOperandsForReg (Register Reg) const

iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > >	getDebugOperandsForReg (Register Reg)

bool	isDebugOperand (const MachineOperand *Op) const

unsigned	getDebugOperandIndex (const MachineOperand *Op) const

unsigned	getNumDefs () const
	Returns the total number of definitions.

bool	hasImplicitDef () const
	Returns true if the instruction has implicit definition.

unsigned	getNumImplicitOperands () const
	Returns the implicit operands number.

bool	isOperandSubregIdx (unsigned OpIdx) const
	Return true if operand `OpIdx` is a subregister index.

unsigned	getNumExplicitOperands () const
	Returns the number of non-implicit operands.

unsigned	getNumExplicitDefs () const
	Returns the number of non-implicit definitions.

mop_iterator	operands_begin ()

mop_iterator	operands_end ()

const_mop_iterator	operands_begin () const

const_mop_iterator	operands_end () const

iterator_range< mop_iterator >	operands ()

iterator_range< const_mop_iterator >	operands () const

iterator_range< mop_iterator >	explicit_operands ()

iterator_range< const_mop_iterator >	explicit_operands () const

iterator_range< mop_iterator >	implicit_operands ()

iterator_range< const_mop_iterator >	implicit_operands () const

iterator_range< mop_iterator >	debug_operands ()
	Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.

iterator_range< const_mop_iterator >	debug_operands () const
	Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.

iterator_range< mop_iterator >	defs ()
	Returns a range over all explicit operands that are register definitions.

iterator_range< const_mop_iterator >	defs () const
	Returns a range over all explicit operands that are register definitions.

iterator_range< mop_iterator >	uses ()
	Returns a range that includes all operands that are register uses.

iterator_range< const_mop_iterator >	uses () const
	Returns a range that includes all operands that are register uses.

iterator_range< mop_iterator >	explicit_uses ()

iterator_range< const_mop_iterator >	explicit_uses () const

iterator_range< filtered_mop_iterator >	all_defs ()
	Returns an iterator range over all operands that are (explicit or implicit) register defs.

iterator_range< filtered_const_mop_iterator >	all_defs () const
	Returns an iterator range over all operands that are (explicit or implicit) register defs.

iterator_range< filtered_mop_iterator >	all_uses ()
	Returns an iterator range over all operands that are (explicit or implicit) register uses.

iterator_range< filtered_const_mop_iterator >	all_uses () const
	Returns an iterator range over all operands that are (explicit or implicit) register uses.

unsigned	getOperandNo (const_mop_iterator I) const
	Returns the number of the operand iterator `I` points to.

ArrayRef< MachineMemOperand * >	memoperands () const
	Access to memory operands of the instruction.

mmo_iterator	memoperands_begin () const
	Access to memory operands of the instruction.

mmo_iterator	memoperands_end () const
	Access to memory operands of the instruction.

bool	memoperands_empty () const
	Return true if we don't have any memory operands which described the memory access done by this instruction.

bool	hasOneMemOperand () const
	Return true if this instruction has exactly one MachineMemOperand.

unsigned	getNumMemOperands () const
	Return the number of memory operands.

MCSymbol *	getPreInstrSymbol () const
	Helper to extract a pre-instruction symbol if one has been added.

MCSymbol *	getPostInstrSymbol () const
	Helper to extract a post-instruction symbol if one has been added.

MDNode *	getHeapAllocMarker () const
	Helper to extract a heap alloc marker if one has been added.

MDNode *	getPCSections () const
	Helper to extract PCSections metadata target sections.

MDNode *	getMMRAMetadata () const
	Helper to extract mmra.op metadata.

uint32_t	getCFIType () const
	Helper to extract a CFI type hash if one has been added.

bool	hasProperty (unsigned MCFlag, QueryType Type=AnyInBundle) const
	Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has the specified property.

bool	isPreISelOpcode (QueryType Type=IgnoreBundle) const
	Return true if this is an instruction that should go through the usual legalization steps.

bool	isVariadic (QueryType Type=IgnoreBundle) const
	Return true if this instruction can have a variable number of operands.

bool	hasOptionalDef (QueryType Type=IgnoreBundle) const
	Set if this instruction has an optional definition, e.g.

bool	isPseudo (QueryType Type=IgnoreBundle) const
	Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.

bool	isMetaInstruction (QueryType Type=IgnoreBundle) const
	Return true if this instruction doesn't produce any output in the form of executable instructions.

bool	isReturn (QueryType Type=AnyInBundle) const

bool	isEHScopeReturn (QueryType Type=AnyInBundle) const
	Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction.

bool	isCall (QueryType Type=AnyInBundle) const

bool	isCandidateForCallSiteEntry (QueryType Type=IgnoreBundle) const
	Return true if this is a call instruction that may have an associated call site entry in the debug info.

bool	shouldUpdateCallSiteInfo () const
	Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see copyCallSiteInfo, moveCallSiteInfo, eraseCallSiteInfo).

bool	isBarrier (QueryType Type=AnyInBundle) const
	Returns true if the specified instruction stops control flow from executing the instruction immediately following it.

bool	isTerminator (QueryType Type=AnyInBundle) const
	Returns true if this instruction part of the terminator for a basic block.

bool	isBranch (QueryType Type=AnyInBundle) const
	Returns true if this is a conditional, unconditional, or indirect branch.

bool	isIndirectBranch (QueryType Type=AnyInBundle) const
	Return true if this is an indirect branch, such as a branch through a register.

bool	isConditionalBranch (QueryType Type=AnyInBundle) const
	Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block.

bool	isUnconditionalBranch (QueryType Type=AnyInBundle) const
	Return true if this is a branch which always transfers control flow to some other block.

bool	isPredicable (QueryType Type=AllInBundle) const
	Return true if this instruction has a predicate operand that controls execution.

bool	isCompare (QueryType Type=IgnoreBundle) const
	Return true if this instruction is a comparison.

bool	isMoveImmediate (QueryType Type=IgnoreBundle) const
	Return true if this instruction is a move immediate (including conditional moves) instruction.

bool	isMoveReg (QueryType Type=IgnoreBundle) const
	Return true if this instruction is a register move.

bool	isBitcast (QueryType Type=IgnoreBundle) const
	Return true if this instruction is a bitcast instruction.

bool	isSelect (QueryType Type=IgnoreBundle) const
	Return true if this instruction is a select instruction.

bool	isNotDuplicable (QueryType Type=AnyInBundle) const
	Return true if this instruction cannot be safely duplicated.

bool	isConvergent (QueryType Type=AnyInBundle) const
	Return true if this instruction is convergent.

bool	hasDelaySlot (QueryType Type=AnyInBundle) const
	Returns true if the specified instruction has a delay slot which must be filled by the code generator.

bool	canFoldAsLoad (QueryType Type=IgnoreBundle) const
	Return true for instructions that can be folded as memory operands in other instructions.

bool	isRegSequenceLike (QueryType Type=IgnoreBundle) const
	Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.

bool	isExtractSubregLike (QueryType Type=IgnoreBundle) const
	Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions.

bool	isInsertSubregLike (QueryType Type=IgnoreBundle) const
	Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions.

bool	mayLoad (QueryType Type=AnyInBundle) const
	Return true if this instruction could possibly read memory.

bool	mayStore (QueryType Type=AnyInBundle) const
	Return true if this instruction could possibly modify memory.

bool	mayLoadOrStore (QueryType Type=AnyInBundle) const
	Return true if this instruction could possibly read or modify memory.

bool	mayRaiseFPException () const
	Return true if this instruction could possibly raise a floating-point exception.

bool	isCommutable (QueryType Type=IgnoreBundle) const
	Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged.

bool	isConvertibleTo3Addr (QueryType Type=IgnoreBundle) const
	Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed.

bool	usesCustomInsertionHook (QueryType Type=IgnoreBundle) const
	Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block.

bool	hasPostISelHook (QueryType Type=IgnoreBundle) const
	Return true if this instruction requires adjustment after instruction selection by calling a target hook.

bool	isRematerializable (QueryType Type=AllInBundle) const
	Returns true if this instruction is a candidate for remat.

bool	isAsCheapAsAMove (QueryType Type=AllInBundle) const
	Returns true if this instruction has the same cost (or less) than a move instruction.

bool	hasExtraSrcRegAllocReq (QueryType Type=AnyInBundle) const
	Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes.

bool	hasExtraDefRegAllocReq (QueryType Type=AnyInBundle) const
	Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes.

bool	isIdenticalTo (const MachineInstr &Other, MICheckType Check=CheckDefs) const
	Return true if this instruction is identical to `Other`.

bool	isEquivalentDbgInstr (const MachineInstr &Other) const
	Returns true if this instruction is a debug instruction that represents an identical debug value to `Other`.

MachineInstr *	removeFromParent ()
	Unlink 'this' from the containing basic block, and return it without deleting it.

MachineInstr *	removeFromBundle ()
	Unlink this instruction from its basic block and return it without deleting it.

void	eraseFromParent ()
	Unlink 'this' from the containing basic block and delete it.

void	eraseFromBundle ()
	Unlink 'this' from its basic block and delete it.

bool	isEHLabel () const

bool	isGCLabel () const

bool	isAnnotationLabel () const

bool	isLabel () const
	Returns true if the MachineInstr represents a label.

bool	isCFIInstruction () const

bool	isPseudoProbe () const

bool	isPosition () const

bool	isNonListDebugValue () const

bool	isDebugValueList () const

bool	isDebugValue () const

bool	isDebugLabel () const

bool	isDebugRef () const

bool	isDebugValueLike () const

bool	isDebugPHI () const

bool	isDebugInstr () const

bool	isDebugOrPseudoInstr () const

bool	isDebugOffsetImm () const

bool	isIndirectDebugValue () const
	A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate.

bool	isDebugEntryValue () const
	A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.

bool	isUndefDebugValue () const
	Return true if the instruction is a debug value which describes a part of a variable as unavailable.

bool	isJumpTableDebugInfo () const

bool	isPHI () const

bool	isKill () const

bool	isImplicitDef () const

bool	isInlineAsm () const

bool	mayFoldInlineAsmRegOp (unsigned OpId) const
	Returns true if the register operand can be folded with a load or store into a frame index.

bool	isStackAligningInlineAsm () const

InlineAsm::AsmDialect	getInlineAsmDialect () const

bool	isInsertSubreg () const

bool	isSubregToReg () const

bool	isRegSequence () const

bool	isBundle () const

bool	isCopy () const

bool	isFullCopy () const

bool	isExtractSubreg () const

bool	isCopyLike () const
	Return true if the instruction behaves like a copy.

bool	isIdentityCopy () const
	Return true is the instruction is an identity copy.

bool	isTransient () const
	Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost.

unsigned	getBundleSize () const
	Return the number of instructions inside the MI bundle, excluding the bundle header.

bool	readsRegister (Register Reg, const TargetRegisterInfo *TRI) const
	Return true if the MachineInstr reads the specified register.

bool	readsVirtualRegister (Register Reg) const
	Return true if the MachineInstr reads the specified virtual register.

std::pair< bool, bool >	readsWritesVirtualRegister (Register Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
	Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.

bool	killsRegister (Register Reg, const TargetRegisterInfo *TRI) const
	Return true if the MachineInstr kills the specified register.

bool	definesRegister (Register Reg, const TargetRegisterInfo *TRI) const
	Return true if the MachineInstr fully defines the specified register.

bool	modifiesRegister (Register Reg, const TargetRegisterInfo *TRI) const
	Return true if the MachineInstr modifies (fully define or partially define) the specified register.

bool	registerDefIsDead (Register Reg, const TargetRegisterInfo *TRI) const
	Returns true if the register is dead in this machine instruction.

bool	hasRegisterImplicitUseOperand (Register Reg) const
	Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers).

int	findRegisterUseOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const
	Returns the operand index that is a use of the specific register or -1 if it is not found.

MachineOperand *	findRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false)
	Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index.

const MachineOperand *	findRegisterUseOperand (Register Reg, const TargetRegisterInfo *TRI, bool isKill=false) const

int	findRegisterDefOperandIdx (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const
	Returns the operand index that is a def of the specified register or -1 if it is not found.

MachineOperand *	findRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false)
	Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an index.

const MachineOperand *	findRegisterDefOperand (Register Reg, const TargetRegisterInfo *TRI, bool isDead=false, bool Overlap=false) const

int	findFirstPredOperandIdx () const
	Find the index of the first operand in the operand list that is used to represent the predicate.

int	findInlineAsmFlagIdx (unsigned OpIdx, unsigned *GroupNo=nullptr) const
	Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction.

const TargetRegisterClass *	getRegClassConstraint (unsigned OpIdx, const TargetInstrInfo TII, const TargetRegisterInfo TRI) const
	Compute the static register class constraint for operand OpIdx.

const TargetRegisterClass *	getRegClassConstraintEffectForVReg (Register Reg, const TargetRegisterClass CurRC, const TargetInstrInfo TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const
	Applies the constraints (def/use) implied by this MI on `Reg` to the given `CurRC`.

const TargetRegisterClass *	getRegClassConstraintEffect (unsigned OpIdx, const TargetRegisterClass CurRC, const TargetInstrInfo TII, const TargetRegisterInfo *TRI) const
	Applies the constraints (def/use) implied by the `OpIdx` operand to the given `CurRC`.

void	tieOperands (unsigned DefIdx, unsigned UseIdx)
	Add a tie between the register operands at DefIdx and UseIdx.

unsigned	findTiedOperandIdx (unsigned OpIdx) const
	Given the index of a tied register operand, find the operand it is tied to.

bool	isRegTiedToUseOperand (unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
	Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints.

bool	isRegTiedToDefOperand (unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
	Return true if the use operand of the specified index is tied to a def operand.

void	clearKillInfo ()
	Clears kill flags on all operands.

void	substituteRegister (Register FromReg, Register ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)
	Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary.

bool	addRegisterKilled (Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
	We have determined MI kills a register.

void	clearRegisterKills (Register Reg, const TargetRegisterInfo *RegInfo)
	Clear all kill flags affecting Reg.

bool	addRegisterDead (Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
	We have determined MI defined a register without a use.

void	clearRegisterDeads (Register Reg)
	Clear all dead flags on operands defining register `Reg`.

void	setRegisterDefReadUndef (Register Reg, bool IsUndef=true)
	Mark all subregister defs of register `Reg` with the undef flag.

void	addRegisterDefined (Register Reg, const TargetRegisterInfo *RegInfo=nullptr)
	We have determined MI defines a register.

void	setPhysRegsDeadExcept (ArrayRef< Register > UsedRegs, const TargetRegisterInfo &TRI)
	Mark every physreg used by this instruction as dead except those in the UsedRegs list.

bool	isSafeToMove (bool &SawStore) const
	Return true if it is safe to move this instruction.

bool	mayAlias (AAResults *AA, const MachineInstr &Other, bool UseTBAA) const
	Returns true if this instruction's memory access aliases the memory access of Other.

bool	hasOrderedMemoryRef () const
	Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available.

bool	isDereferenceableInvariantLoad () const
	Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function.

unsigned	isConstantValuePHI () const
	If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return 0.

bool	hasUnmodeledSideEffects () const
	Return true if this instruction has side effects that are not modeled by mayLoad / mayStore, etc.

bool	isLoadFoldBarrier () const
	Returns true if it is illegal to fold a load across this instruction.

bool	allDefsAreDead () const
	Return true if all the defs of this instruction are dead.

bool	allImplicitDefsAreDead () const
	Return true if all the implicit defs of this instruction are dead.

std::optional< LocationSize >	getSpillSize (const TargetInstrInfo *TII) const
	Return a valid size if the instruction is a spill instruction.

std::optional< LocationSize >	getFoldedSpillSize (const TargetInstrInfo *TII) const
	Return a valid size if the instruction is a folded spill instruction.

std::optional< LocationSize >	getRestoreSize (const TargetInstrInfo *TII) const
	Return a valid size if the instruction is a restore instruction.

std::optional< LocationSize >	getFoldedRestoreSize (const TargetInstrInfo *TII) const
	Return a valid size if the instruction is a folded restore instruction.

void	copyImplicitOps (MachineFunction &MF, const MachineInstr &MI)
	Copy implicit register operands from specified instruction to this instruction.

void	addOperand (MachineFunction &MF, const MachineOperand &Op)
	Add the specified operand to the instruction.

void	addOperand (const MachineOperand &Op)
	Add an operand without providing an MF reference.

void	insert (mop_iterator InsertBefore, ArrayRef< MachineOperand > Ops)
	Inserts Ops BEFORE It. Can untie/retie tied operands.

void	setDesc (const MCInstrDesc &TID)
	Replace the instruction descriptor (thus opcode) of the current instruction with a new one.

void	setDebugLoc (DebugLoc DL)
	Replace current source information with new such.

void	removeOperand (unsigned OpNo)
	Erase an operand from an instruction, leaving it with one fewer operand than it started with.

void	dropMemRefs (MachineFunction &MF)
	Clear this MachineInstr's memory reference descriptor list.

void	setMemRefs (MachineFunction &MF, ArrayRef< MachineMemOperand * > MemRefs)
	Assign this MachineInstr's memory reference descriptor list.

void	addMemOperand (MachineFunction &MF, MachineMemOperand *MO)
	Add a MachineMemOperand to the machine instruction.

void	cloneMemRefs (MachineFunction &MF, const MachineInstr &MI)
	Clone another MachineInstr's memory reference descriptor list and replace ours with it.

void	cloneMergedMemRefs (MachineFunction &MF, ArrayRef< const MachineInstr * > MIs)
	Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it.

void	setPreInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
	Set a symbol that will be emitted just prior to the instruction itself.

void	setPostInstrSymbol (MachineFunction &MF, MCSymbol *Symbol)
	Set a symbol that will be emitted just after the instruction itself.

void	cloneInstrSymbols (MachineFunction &MF, const MachineInstr &MI)
	Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.

void	setHeapAllocMarker (MachineFunction &MF, MDNode *MD)
	Set a marker on instructions that denotes where we should create and emit heap alloc site labels.

void	setPCSections (MachineFunction &MF, MDNode *MD)

void	setMMRAMetadata (MachineFunction &MF, MDNode *MMRAs)

void	setCFIType (MachineFunction &MF, uint32_t Type)
	Set the CFI type for the instruction.

uint32_t	mergeFlagsWith (const MachineInstr &Other) const
	Return the MIFlags which represent both MachineInstrs.

void	copyIRFlags (const Instruction &I)
	Copy all flags to MachineInst MIFlags.

void	untieRegOperand (unsigned OpIdx)
	Break any tie involving OpIdx.

void	addImplicitDefUseOperands (MachineFunction &MF)
	Add all implicit def and use operands to this instruction.

void	collectDebugValues (SmallVectorImpl< MachineInstr * > &DbgValues)
	Scan instructions immediately following MI and collect any matching DBG_VALUEs.

void	changeDebugValuesDefReg (Register Reg)
	Find all DBG_VALUEs that point to the register def in this instruction and point them to `Reg` instead.

void	setDebugValueUndef ()
	Sets all register debug operands in this debug value instruction to be undef.

std::tuple< Register, Register >	getFirst2Regs () const

std::tuple< Register, Register, Register >	getFirst3Regs () const

std::tuple< Register, Register, Register, Register >	getFirst4Regs () const

std::tuple< Register, Register, Register, Register, Register >	getFirst5Regs () const

std::tuple< LLT, LLT >	getFirst2LLTs () const

std::tuple< LLT, LLT, LLT >	getFirst3LLTs () const

std::tuple< LLT, LLT, LLT, LLT >	getFirst4LLTs () const

std::tuple< LLT, LLT, LLT, LLT, LLT >	getFirst5LLTs () const

std::tuple< Register, LLT, Register, LLT >	getFirst2RegLLTs () const

std::tuple< Register, LLT, Register, LLT, Register, LLT >	getFirst3RegLLTs () const

std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT >	getFirst4RegLLTs () const

std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT, Register, LLT >	getFirst5RegLLTs () const


LLT	getTypeToPrint (unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
	Debugging supportDetermine the generic type to be printed (if needed) on uses and defs.

bool	hasComplexRegisterTies () const
	Return true when an instruction has tied register that can't be determined by the instruction's descriptor.

void	print (raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
	Print this MI to `OS`.

void	print (raw_ostream &OS, ModuleSlotTracker &MST, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const

void	dump () const

void	dumpr (const MachineRegisterInfo &MRI, unsigned MaxDepth=UINT_MAX) const
	Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach `MaxDepth`.

Public Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
MachineInstr *	getPrevNode ()

const MachineInstr *	getPrevNode () const
	Get the previous node, or `nullptr` for the list head.

MachineInstr *	getNextNode ()
	Get the next node, or `nullptr` for the list tail.

const MachineInstr *	getNextNode () const
	Get the next node, or `nullptr` for the list tail.

Public Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >
self_iterator	getIterator ()

const_self_iterator	getIterator () const

reverse_self_iterator	getReverseIterator ()

const_reverse_self_iterator	getReverseIterator () const

bool	isSentinel () const
	Check whether this is the sentinel node.

Public Member Functions inherited from llvm::ilist_detail::node_parent_access< NodeTy, ParentTy >
const ParentTy *	getParent () const

ParentTy *	getParent ()

void	setParent (ParentTy *Parent)

Static Public Member Functions
template<typename Operand , typename Instruction >
static iterator_range< filter_iterator< Operand *, std::function< bool(Operand &Op)> > >	getDebugOperandsForReg (Instruction *MI, Register Reg)
	Returns a range of all of the operands that correspond to a debug use of `Reg`.

static uint32_t	copyFlagsFromInstruction (const Instruction &I)

Friends
struct	ilist_traits< MachineInstr >

struct	ilist_callback_traits< MachineBasicBlock >

class	MachineFunction

Additional Inherited Members
Protected Types inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >
using	self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, false, false >::type

using	const_self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, false, true >::type

using	reverse_self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, true, false >::type

using	const_reverse_self_iterator = typename ilist_select_iterator_type< OptionsT::has_iterator_bits, ilist_detail::compute_node_options< T, Options... >::type, true, true >::type

Protected Member Functions inherited from llvm::ilist_node_with_parent< MachineInstr, MachineBasicBlock, ilist_sentinel_tracking< true > >
	ilist_node_with_parent ()=default

Protected Member Functions inherited from llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >
	ilist_node_impl ()=default

Detailed Description

Representation of each machine instruction.

This class isn't a POD type, but it must have a trivial destructor. When a MachineFunction is deleted, all the contained MachineInstrs are deallocated without having their destructor called.

Definition at line 67 of file MachineInstr.h.

Member Typedef Documentation

◆ const_mop_iterator

using llvm::MachineInstr::const_mop_iterator = const MachineOperand *

Definition at line 677 of file MachineInstr.h.

◆ filtered_const_mop_iterator

using llvm::MachineInstr::filtered_const_mop_iterator = filter_iterator<const_mop_iterator, bool (*)(const MachineOperand &)>

Definition at line 751 of file MachineInstr.h.

◆ filtered_mop_iterator

using llvm::MachineInstr::filtered_mop_iterator = filter_iterator<mop_iterator, bool (*)(const MachineOperand &)>

Definition at line 749 of file MachineInstr.h.

◆ mmo_iterator

using llvm::MachineInstr::mmo_iterator = ArrayRef<MachineMemOperand *>::iterator

Definition at line 71 of file MachineInstr.h.

◆ mop_iterator

using llvm::MachineInstr::mop_iterator = MachineOperand *

iterator/begin/end - Iterate over all operands of a machine instruction.

Definition at line 676 of file MachineInstr.h.

Member Enumeration Documentation

◆ CommentFlag

enum llvm::MachineInstr::CommentFlag

Flags to specify different kinds of comments to output in assembly code.

These flags carry semantic information not otherwise easily derivable from the IR text.

Enumerator
ReloadReuse
NoSchedComment
TAsmComments

Definition at line 77 of file MachineInstr.h.

◆ MICheckType

enum llvm::MachineInstr::MICheckType

Enumerator
CheckDefs
CheckKillDead
IgnoreDefs
IgnoreVRegDefs

Definition at line 1271 of file MachineInstr.h.

◆ MIFlag

enum llvm::MachineInstr::MIFlag

Enumerator
NoFlags
FrameSetup
FrameDestroy
BundledPred
BundledSucc
FmNoNans
FmNoInfs
FmNsz
FmArcp
FmContract
FmAfn
FmReassoc
NoUWrap
NoSWrap
IsExact
NoFPExcept
NoMerge
Unpredictable
NoConvergent
NonNeg
Disjoint
NoUSWrap

Definition at line 83 of file MachineInstr.h.

◆ QueryType

enum llvm::MachineInstr::QueryType

API for querying MachineInstr properties.

They are the same as MCInstrDesc queries but they are bundle aware.

Enumerator
IgnoreBundle
AnyInBundle
AllInBundle

Definition at line 886 of file MachineInstr.h.

Constructor & Destructor Documentation

◆ MachineInstr()

llvm::MachineInstr::MachineInstr ( const MachineInstr & )

delete

◆ ~MachineInstr()

llvm::MachineInstr::~MachineInstr ( )

delete

Member Function Documentation

◆ addImplicitDefUseOperands()

void MachineInstr::addImplicitDefUseOperands ( MachineFunction & MF )

Add all implicit def and use operands to this instruction.

Definition at line 88 of file MachineInstr.cpp.

References addOperand(), llvm::MachineOperand::CreateReg(), llvm::MCInstrDesc::implicit_defs(), and llvm::MCInstrDesc::implicit_uses().

Referenced by ExpandMOVImmSExti8().

◆ addMemOperand()

void MachineInstr::addMemOperand	(	MachineFunction &	MF,
		MachineMemOperand *	MO
	)

Add a MachineMemOperand to the machine instruction.

This function should be used only occasionally. The setMemRefs function is the primary method for setting up a MachineInstr's MemRefs list.

Definition at line 381 of file MachineInstr.cpp.

References llvm::SmallVectorImpl< T >::append(), memoperands_begin(), memoperands_end(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), and setMemRefs().

Referenced by llvm::TargetLoweringBase::emitPatchPoint(), foldInlineAsmMemOperand(), and llvm::TargetInstrInfo::foldMemoryOperand().

◆ addOperand() [1/2]

void MachineInstr::addOperand ( const MachineOperand & Op )

Add an operand without providing an MF reference.

This only works for instructions that are inserted in a basic block.

MachineInstrBuilder and the two-argument addOperand(MF, MO) should be preferred.

Definition at line 181 of file MachineInstr.cpp.

References addOperand(), assert(), llvm::MachineBasicBlock::getParent(), getParent(), and MBB.

◆ addOperand() [2/2]

void MachineInstr::addOperand	(	MachineFunction &	MF,
		const MachineOperand &	Op
	)

Add the specified operand to the instruction.

addOperand - Add the specified operand to the instruction.

If it is an implicit operand, it is added to the end of the operand list. If it is an explicit operand it is added at the end of the explicit operand list (before the first implicit operand).

MF must be the machine function that was used to allocate this instruction.

MachineInstrBuilder provides a more convenient interface for creating instructions and adding operands.

If it is an implicit operand, it is added to the end of the operand list. If it is an explicit operand it is added at the end of the explicit operand list (before the first implicit operand).

Definition at line 204 of file MachineInstr.cpp.

References addOperand(), llvm::MachineFunction::allocateOperandArray(), assert(), llvm::MachineFunction::deallocateOperandArray(), llvm::MCOI::EARLY_CLOBBER, getNumOperands(), llvm::MCInstrDesc::getOperandConstraint(), isDebugInstr(), isInlineAsm(), llvm::MachineOperand::isReg(), isReg(), llvm::MachineOperand::isUse(), moveOperands(), MRI, llvm::MachineOperand::setIsDebug(), llvm::MachineOperand::setIsEarlyClobber(), llvm::MCOI::TIED_TO, and tieOperands().

Referenced by addConstantsToTrack(), addImplicitDefUseOperands(), addOperand(), addRegisterDead(), addRegisterDefined(), addRegisterKilled(), llvm::X86InstrInfo::commuteInstructionImpl(), llvm::SIInstrInfo::convertToThreeAddress(), copyImplicitOps(), llvm::XCoreFrameLowering::emitEpilogue(), llvm::HexagonFrameLowering::emitPrologue(), expandSGPRCopy(), insert(), LowerCallResults(), llvm::SIInstrInfo::moveToVALUImpl(), and llvm::X86InstrInfo::replaceBranchWithTailCall().

◆ addRegisterDead()

bool MachineInstr::addRegisterDead	(	Register	Reg,
		const TargetRegisterInfo *	RegInfo,
		bool	AddIfNotFound = `false`
	)

We have determined MI defined a register without a use.

Look for the operand that defines it and mark it as IsDead. If AddIfNotFound is true, add a implicit operand if it's not found. Returns true if the operand exists / is added.

Definition at line 2075 of file MachineInstr.cpp.

References addOperand(), llvm::SmallVectorTemplateCommon< T, typename >::back(), llvm::MachineOperand::CreateReg(), llvm::SmallVectorBase< Size_T >::empty(), findInlineAsmFlagIdx(), getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isDef(), isInlineAsm(), llvm::Register::isPhysical(), llvm::MachineOperand::isReg(), llvm::MCRegisterInfo::isSubRegister(), llvm::MCRegisterInfo::isSuperRegister(), llvm::MCRegAliasIterator::isValid(), llvm::SmallVectorTemplateBase< T, bool >::pop_back(), llvm::SmallVectorTemplateBase< T, bool >::push_back(), removeOperand(), and llvm::MachineOperand::setIsDead().

Referenced by llvm::Thumb1InstrInfo::copyPhysReg(), llvm::SIInstrInfo::expandPostRAPseudo(), and llvm::SystemZInstrInfo::foldMemoryOperandImpl().

◆ addRegisterDefined()

void MachineInstr::addRegisterDefined	(	Register	Reg,
		const TargetRegisterInfo *	RegInfo = `nullptr`
	)

We have determined MI defines a register.

Make sure there is an operand defining Reg.

Definition at line 2143 of file MachineInstr.cpp.

References addOperand(), llvm::MachineOperand::CreateReg(), findRegisterDefOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), and operands().

Referenced by llvm::ARMBaseInstrInfo::copyPhysReg(), llvm::SparcInstrInfo::copyPhysReg(), copyPhysSubRegs(), and setPhysRegsDeadExcept().

◆ addRegisterKilled()

bool MachineInstr::addRegisterKilled	(	Register	IncomingReg,
		const TargetRegisterInfo *	RegInfo,
		bool	AddIfNotFound = `false`
	)

We have determined MI kills a register.

Look for the operand that uses it and mark it as IsKill. If AddIfNotFound is true, add a implicit operand if it's not found. Returns true if the operand exists / is added.

Definition at line 1996 of file MachineInstr.cpp.

Referenced by llvm::ARMBaseInstrInfo::copyPhysReg(), llvm::SparcInstrInfo::copyPhysReg(), llvm::VEInstrInfo::copyPhysReg(), copyPhysSubRegs(), emitAlignedDPRCS2Restores(), emitAlignedDPRCS2Spills(), llvm::XCoreFrameLowering::emitPrologue(), and llvm::VEInstrInfo::expandPostRAPseudo().

◆ all_defs() [1/2]

iterator_range< filtered_mop_iterator > llvm::MachineInstr::all_defs ( )

inline

Returns an iterator range over all operands that are (explicit or implicit) register defs.

Definition at line 756 of file MachineInstr.h.

References llvm::make_filter_range(), and operands().

Referenced by llvm::GCNDownwardRPTracker::advanceToNext(), computeLiveOuts(), and llvm::MachineFunction::salvageCopySSAImpl().

◆ all_defs() [2/2]

iterator_range< filtered_const_mop_iterator > llvm::MachineInstr::all_defs ( ) const

inline

Returns an iterator range over all operands that are (explicit or implicit) register defs.

Definition at line 760 of file MachineInstr.h.

References llvm::make_filter_range(), and operands().

◆ all_uses() [1/2]

iterator_range< filtered_mop_iterator > llvm::MachineInstr::all_uses ( )

inline

Returns an iterator range over all operands that are (explicit or implicit) register uses.

Definition at line 766 of file MachineInstr.h.

References llvm::make_filter_range(), and uses().

Referenced by llvm::ScheduleDAGInstrs::addSchedBarrierDeps().

◆ all_uses() [2/2]

iterator_range< filtered_const_mop_iterator > llvm::MachineInstr::all_uses ( ) const

inline

Returns an iterator range over all operands that are (explicit or implicit) register uses.

Definition at line 770 of file MachineInstr.h.

References llvm::make_filter_range(), and uses().

◆ allDefsAreDead()

bool MachineInstr::allDefsAreDead ( ) const

Return true if all the defs of this instruction are dead.

allDefsAreDead - Return true if all the defs of this instruction are dead.

Definition at line 1551 of file MachineInstr.cpp.

References llvm::MachineOperand::isDead(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), and operands().

◆ allImplicitDefsAreDead()

bool MachineInstr::allImplicitDefsAreDead ( ) const

Return true if all the implicit defs of this instruction are dead.

Definition at line 1561 of file MachineInstr.cpp.

References implicit_operands(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::isUse().

◆ bundleWithPred()

void MachineInstr::bundleWithPred ( )

Bundle this instruction with its predecessor.

This can be an unbundled instruction, or it can be the first instruction in a bundle.

Definition at line 823 of file MachineInstr.cpp.

References assert(), BundledPred, BundledSucc, llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator(), isBundledWithPred(), and setFlag().

Referenced by llvm::MachineFunction::cloneMachineInstrBundle().

◆ bundleWithSucc()

void MachineInstr::bundleWithSucc ( )

Bundle this instruction with its successor.

This can be an unbundled instruction, or it can be the last instruction in a bundle.

Definition at line 832 of file MachineInstr.cpp.

References assert(), BundledPred, BundledSucc, llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator(), isBundledWithSucc(), and setFlag().

◆ canFoldAsLoad()

bool llvm::MachineInstr::canFoldAsLoad ( QueryType Type = IgnoreBundle ) const

inline

Return true for instructions that can be folded as memory operands in other instructions.

The most common use for this is instructions that are simple loads from memory that don't modify the loaded value in any way, but it can also be used for instructions that can be expressed as constant-pool loads, such as V_SETALLONES on x86, to allow them to be folded when it is beneficial. This should only be set on instructions that return a value in their only virtual register definition.

Definition at line 1082 of file MachineInstr.h.

References llvm::MCID::FoldableAsLoad, and hasProperty().

Referenced by llvm::TargetInstrInfo::foldMemoryOperand().

◆ changeDebugValuesDefReg()

void MachineInstr::changeDebugValuesDefReg ( Register Reg )

Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead.

Definition at line 2401 of file MachineInstr.cpp.

References getOperand(), llvm::MachineOperand::getParent(), llvm::MachineOperand::getReg(), isReg(), MRI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

◆ clearAsmPrinterFlag()

void llvm::MachineInstr::clearAsmPrinterFlag ( CommentFlag Flag )

inline

Clear specific AsmPrinter flags.

Definition at line 384 of file MachineInstr.h.

References assert().

◆ clearAsmPrinterFlags()

void llvm::MachineInstr::clearAsmPrinterFlags ( )

inline

Clear the AsmPrinter bitvector.

Definition at line 367 of file MachineInstr.h.

◆ clearFlag()

void llvm::MachineInstr::clearFlag ( MIFlag Flag )

inline

clearFlag - Clear a MI flag.

Definition at line 418 of file MachineInstr.h.

References assert().

Referenced by llvm::TargetInstrInfo::reassociateOps(), unbundleFromPred(), and unbundleFromSucc().

◆ clearFlags()

void llvm::MachineInstr::clearFlags ( unsigned flags )

inline

Definition at line 424 of file MachineInstr.h.

References assert().

Referenced by llvm::GenericMachineInstr::dropPoisonGeneratingFlags().

◆ clearKillInfo()

void MachineInstr::clearKillInfo ( )

Clears kill flags on all operands.

clearKillInfo - Clears kill flags on all operands.

Definition at line 1266 of file MachineInstr.cpp.

References llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), operands(), and llvm::MachineOperand::setIsKill().

Referenced by llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), and llvm::RISCVInstrInfo::optimizeSelect().

◆ clearRegisterDeads()

void MachineInstr::clearRegisterDeads ( Register Reg )

Clear all dead flags on operands defining register Reg.

Definition at line 2127 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), operands(), and llvm::MachineOperand::setIsDead().

Referenced by llvm::PPCInstrInfo::optimizeCmpPostRA().

◆ clearRegisterKills()

void MachineInstr::clearRegisterKills	(	Register	Reg,
		const TargetRegisterInfo *	RegInfo
	)

Clear all kill flags affecting Reg.

If RegInfo is provided, this includes all aliasing registers.

Definition at line 2062 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), operands(), llvm::TargetRegisterInfo::regsOverlap(), and llvm::MachineOperand::setIsKill().

◆ cloneInstrSymbols()

void MachineInstr::cloneInstrSymbols	(	MachineFunction &	MF,
		const MachineInstr &	MI
	)

Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.

Definition at line 545 of file MachineInstr.cpp.

References assert(), MI, setHeapAllocMarker(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

Referenced by llvm::TargetInstrInfo::foldMemoryOperand().

◆ cloneMemRefs()

void MachineInstr::cloneMemRefs	(	MachineFunction &	MF,
		const MachineInstr &	MI
	)

Clone another MachineInstr's memory reference descriptor list and replace ours with it.

Note that *this may be the incoming MI!

Prefer this API whenever possible as it can avoid allocations in common cases.

Definition at line 389 of file MachineInstr.cpp.

References assert(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), MI, and setMemRefs().

Referenced by llvm::CombinerHelper::applyCombineIndexedLoadStore(), and cloneMergedMemRefs().

◆ cloneMergedMemRefs()

void MachineInstr::cloneMergedMemRefs	(	MachineFunction &	MF,
		ArrayRef< const MachineInstr * >	MIs
	)

Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it.

Note that *this may be one of the incoming MIs!

Prefer this API whenever possible as it can avoid allocations in common cases.

Definition at line 425 of file MachineInstr.cpp.

References llvm::SmallVectorImpl< T >::append(), assert(), cloneMemRefs(), dropMemRefs(), llvm::ArrayRef< T >::empty(), getMF(), hasIdenticalMMOs(), llvm::make_pointee_range(), memoperands(), memoperands_begin(), memoperands_empty(), memoperands_end(), MI, setMemRefs(), llvm::ArrayRef< T >::size(), and llvm::ArrayRef< T >::slice().

◆ collectDebugValues()

void MachineInstr::collectDebugValues ( SmallVectorImpl< MachineInstr * > & DbgValues )

Scan instructions immediately following MI and collect any matching DBG_VALUEs.

Definition at line 2385 of file MachineInstr.cpp.

References MI, and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Referenced by emitSelectPseudo().

◆ copyFlagsFromInstruction()

uint32_t MachineInstr::copyFlagsFromInstruction ( const Instruction & I )

static

Definition at line 567 of file MachineInstr.cpp.

References Disjoint, FmAfn, FmArcp, FmContract, FmNoInfs, FmNoNans, FmNsz, FmReassoc, FP, GEP, I, IsExact, NonNeg, NoSWrap, NoUSWrap, NoUWrap, and Unpredictable.

Referenced by copyIRFlags().

◆ copyImplicitOps()

void MachineInstr::copyImplicitOps	(	MachineFunction &	MF,
		const MachineInstr &	MI
	)

Copy implicit register operands from specified instruction to this instruction.

copyImplicitOps - Copy implicit register operands from specified instruction to this instruction.

Definition at line 1573 of file MachineInstr.cpp.

References addOperand(), llvm::drop_begin(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), and MI.

◆ copyIRFlags()

void MachineInstr::copyIRFlags ( const Instruction & I )

Copy all flags to MachineInst MIFlags.

Definition at line 629 of file MachineInstr.cpp.

References copyFlagsFromInstruction(), and I.

◆ debug_operands() [1/2]

iterator_range< mop_iterator > llvm::MachineInstr::debug_operands ( )

inline

Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.

Definition at line 707 of file MachineInstr.h.

References assert(), isDebugValueLike(), isNonListDebugValue(), llvm::make_range(), operands_begin(), and operands_end().

Referenced by llvm::buildDbgValueForSpill(), getDebugOperand(), getDebugOperandIndex(), getNumDebugOperands(), handleNewDebugValue(), hasDebugOperandForReg(), isDebugOperand(), isUndefDebugValue(), and setDebugValueUndef().

◆ debug_operands() [2/2]

iterator_range< const_mop_iterator > llvm::MachineInstr::debug_operands ( ) const

inline

Returns a range over all operands that are used to determine the variable location for this DBG_VALUE instruction.

Definition at line 714 of file MachineInstr.h.

References assert(), isDebugValueLike(), isNonListDebugValue(), llvm::make_range(), operands_begin(), and operands_end().

◆ definesRegister()

bool llvm::MachineInstr::definesRegister	(	Register	Reg,
		const TargetRegisterInfo *	TRI
	)		const

inline

Return true if the MachineInstr fully defines the specified register.

If TargetRegisterInfo is non-null, then it also checks if there is a def of a super-register. NOTE: It's ignoring subreg indices on virtual registers.

Definition at line 1508 of file MachineInstr.h.

References findRegisterDefOperandIdx(), Reg, and TRI.

Referenced by checkAndUpdateCCRKill(), checkAndUpdateCPSRKill(), checkCCKill(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), isCCSelectPair(), llvm::PPCInstrInfo::optimizeCmpPostRA(), and llvm::AArch64InstrInfo::optimizeCompareInstr().

◆ defs() [1/2]

iterator_range< mop_iterator > llvm::MachineInstr::defs ( )

inline

Returns a range over all explicit operands that are register definitions.

Implicit definition are not included!

Definition at line 722 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), and operands_begin().

Referenced by findSingleRegDef(), getSalvageOpsForTrunc(), llvm::SPIRVGlobalRegistry::getSPIRVTypeID(), isSafeToMove(), LowerCallResults(), llvm::PeelSingleBlockLoop(), llvm::MipsInstrInfo::SafeInFPUDelaySlot(), and llvm::MipsInstrInfo::SafeInLoadDelaySlot().

◆ defs() [2/2]

iterator_range< const_mop_iterator > llvm::MachineInstr::defs ( ) const

inline

Returns a range over all explicit operands that are register definitions.

Implicit definition are not included!

Definition at line 727 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), and operands_begin().

◆ dropDebugNumber()

void llvm::MachineInstr::dropDebugNumber ( )

inline

Drop any variable location debugging information associated with this instruction.

Use when an instruction is modified in such a way that it no longer defines the value it used to. Variable locations using that value will be dropped.

Definition at line 555 of file MachineInstr.h.

Referenced by llvm::X86InstrInfo::optimizeCompareInstr().

◆ dropMemRefs()

void MachineInstr::dropMemRefs ( MachineFunction & MF )

Clear this MachineInstr's memory reference descriptor list.

This resets the memrefs to their most conservative state. This should be used only as a last resort since it greatly pessimizes our knowledge of the memory access performed by the instruction.

Definition at line 360 of file MachineInstr.cpp.

References getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands_empty().

Referenced by cloneMergedMemRefs(), and setMemRefs().

◆ dump()

LLVM_DUMP_METHOD void MachineInstr::dump ( ) const

Definition at line 1623 of file MachineInstr.cpp.

References llvm::dbgs(), and print().

Referenced by llvm::PPCInstrInfo::combineRLWINM(), llvm::ScheduleDAGInstrs::dumpNode(), llvm::PPCInstrInfo::foldFrameOffset(), llvm::SMSchedule::insert(), moveAndTeeForMultiUse(), MoveVPNOTBeforeFirstUser(), llvm::PPCInstrInfo::optimizeCmpPostRA(), rematerializeCheapDef(), and updateOperandRegConstraints().

◆ dumpr()

LLVM_DUMP_METHOD void MachineInstr::dumpr	(	const MachineRegisterInfo &	MRI,
		unsigned	MaxDepth = `UINT_MAX`
	)		const

Print on dbgs() the current instruction and the instructions defining its operands and so on until we reach MaxDepth.

Definition at line 1653 of file MachineInstr.cpp.

References MaxDepth, and MRI.

◆ emitError()

void MachineInstr::emitError ( StringRef Msg ) const

Emit an error referring to the source location of this instruction.

This should only be used for inline assembly that is somehow impossible to compile. Other errors should have been handled much earlier.

If this method returns, the caller should try to recover from the error.

Definition at line 2201 of file MachineInstr.cpp.

References llvm::LLVMContext::emitError(), llvm::Function::getContext(), llvm::MachineFunction::getFunction(), getNumOperands(), llvm::MDNode::getNumOperands(), getOperand(), llvm::MDNode::getOperand(), llvm::MachineBasicBlock::getParent(), getParent(), MBB, and llvm::report_fatal_error().

◆ eraseFromBundle()

void MachineInstr::eraseFromBundle ( )

Unlink 'this' from its basic block and delete it.

If the instruction is part of a bundle, the other instructions in the bundle remain bundled.

Definition at line 766 of file MachineInstr.cpp.

References assert(), llvm::MachineBasicBlock::erase_instr(), and getParent().

◆ eraseFromParent()

void MachineInstr::eraseFromParent ( )

Unlink 'this' from the containing basic block and delete it.

If this instruction is the header of a bundle, the whole bundle is erased. This function can not be used for instructions inside a bundle, use eraseFromBundle() to erase individual bundled instructions.

Definition at line 761 of file MachineInstr.cpp.

References assert(), llvm::MachineBasicBlock::erase(), and getParent().

◆ explicit_operands() [1/2]

iterator_range< mop_iterator > llvm::MachineInstr::explicit_operands ( )

inline

Definition at line 691 of file MachineInstr.h.

References getNumExplicitOperands(), llvm::make_range(), and operands_begin().

Referenced by implicit_operands(), llvm::SIInstrInfo::moveToVALUImpl(), and llvm::TargetInstrInfo::reassociateOps().

◆ explicit_operands() [2/2]

iterator_range< const_mop_iterator > llvm::MachineInstr::explicit_operands ( ) const

inline

Definition at line 695 of file MachineInstr.h.

References getNumExplicitOperands(), llvm::make_range(), and operands_begin().

◆ explicit_uses() [1/2]

iterator_range< mop_iterator > llvm::MachineInstr::explicit_uses ( )

inline

Definition at line 740 of file MachineInstr.h.

References getNumExplicitDefs(), getNumExplicitOperands(), llvm::make_range(), and operands_begin().

◆ explicit_uses() [2/2]

iterator_range< const_mop_iterator > llvm::MachineInstr::explicit_uses ( ) const

inline

Definition at line 744 of file MachineInstr.h.

References getNumExplicitDefs(), getNumExplicitOperands(), llvm::make_range(), and operands_begin().

◆ findFirstPredOperandIdx()

int MachineInstr::findFirstPredOperandIdx ( ) const

Find the index of the first operand in the operand list that is used to represent the predicate.

findFirstPredOperandIdx() - Find the index of the first operand in the operand list that is used to represent the predicate.

It returns -1 if none is found.

Definition at line 1132 of file MachineInstr.cpp.

References getDesc(), getNumOperands(), llvm::MCInstrDesc::isPredicable(), and llvm::MCInstrDesc::operands().

Referenced by llvm::ARMBaseInstrInfo::commuteInstructionImpl().

◆ findInlineAsmFlagIdx()

int MachineInstr::findInlineAsmFlagIdx	(	unsigned	OpIdx,
		unsigned *	GroupNo = `nullptr`
	)		const

Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instruction.

Returns -1 if getOperand(OpIdx) does not belong to an inline asm operand group.

If GroupNo is not NULL, it will receive the number of the operand group containing OpIdx.

Definition at line 874 of file MachineInstr.cpp.

References assert(), F, llvm::MachineOperand::getImm(), getNumOperands(), getOperand(), llvm::MachineOperand::isImm(), isInlineAsm(), and llvm::InlineAsm::MIOp_FirstOperand.

Referenced by addRegisterDead(), addRegisterKilled(), and getRegClassConstraint().

◆ findRegisterDefOperand() [1/2]

MachineOperand * llvm::MachineInstr::findRegisterDefOperand	(	Register	Reg,
		const TargetRegisterInfo *	TRI,
		bool	isDead = `false`,
		bool	Overlap = `false`
	)

inline

Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an index.

Definition at line 1564 of file MachineInstr.h.

References findRegisterDefOperandIdx(), getOperand(), Idx, Reg, and TRI.

Referenced by addRegisterDefined(), findRegisterDefOperand(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::X86InstrInfo::hasReassociableOperands(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::setSpecialOperandAttr(), and transferDeadCC().

◆ findRegisterDefOperand() [2/2]

const MachineOperand * llvm::MachineInstr::findRegisterDefOperand	(	Register	Reg,
		const TargetRegisterInfo *	TRI,
		bool	isDead = `false`,
		bool	Overlap = `false`
	)		const

inline

Definition at line 1572 of file MachineInstr.h.

References findRegisterDefOperand(), Reg, and TRI.

◆ findRegisterDefOperandIdx()

int MachineInstr::findRegisterDefOperandIdx	(	Register	Reg,
		const TargetRegisterInfo *	TRI,
		bool	isDead = `false`,
		bool	Overlap = `false`
	)		const

Returns the operand index that is a def of the specified register or -1 if it is not found.

findRegisterDefOperandIdx() - Returns the operand index that is a def of the specified register or -1 if it is not found.

If isDead is true, defs that are not dead are skipped. If Overlap is true, then it also looks for defs that merely overlap the specified register. If TargetRegisterInfo is non-null, then it also checks if there is a def of a super-register. This may also return a register mask operand when Overlap is true.

If isDead is true, defs that are not dead are skipped. If TargetRegisterInfo is non-null, then it also checks if there is a def of a super-register.

Definition at line 1103 of file MachineInstr.cpp.

References llvm::MachineOperand::clobbersPhysReg(), getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isDef(), llvm::Register::isPhysical(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), and TRI.

Referenced by canFoldIntoCSel(), definesRegister(), findRegisterDefOperand(), getMaddPatterns(), getMiscPatterns(), hasSameValue(), llvm::CombinerHelper::matchEqualDefs(), modifiesRegister(), llvm::SIInstrInfo::moveToVALUImpl(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), and registerDefIsDead().

◆ findRegisterUseOperand() [1/2]

MachineOperand * llvm::MachineInstr::findRegisterUseOperand	(	Register	Reg,
		const TargetRegisterInfo *	TRI,
		bool	isKill = `false`
	)

inline

Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an index.

Definition at line 1538 of file MachineInstr.h.

References findRegisterUseOperandIdx(), getOperand(), Idx, isKill(), Reg, and TRI.

Referenced by findRegisterUseOperand(), and llvm::CombinerHelper::matchFreezeOfSingleMaybePoisonOperand().

◆ findRegisterUseOperand() [2/2]

const MachineOperand * llvm::MachineInstr::findRegisterUseOperand	(	Register	Reg,
		const TargetRegisterInfo *	TRI,
		bool	isKill = `false`
	)		const

inline

Definition at line 1545 of file MachineInstr.h.

References findRegisterUseOperand(), isKill(), Reg, and TRI.

◆ findRegisterUseOperandIdx()

int MachineInstr::findRegisterUseOperandIdx	(	Register	Reg,
		const TargetRegisterInfo *	TRI,
		bool	isKill = `false`
	)		const

Returns the operand index that is a use of the specific register or -1 if it is not found.

findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of the specific register or -1 if it is not found.

It further tightens the search criteria to a use that kills the register if isKill is true.

Definition at line 1054 of file MachineInstr.cpp.

References getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), isKill(), llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), and TRI.

Referenced by findRegisterUseOperand(), killsRegister(), readsRegister(), and llvm::salvageDebugInfoForDbgValue().

◆ findTiedOperandIdx()

unsigned MachineInstr::findTiedOperandIdx ( unsigned OpIdx ) const

Given the index of a tied register operand, find the operand it is tied to.

Defs are tied to uses and vice versa. Returns the index of the tied operand which must exist.

Definition at line 1189 of file MachineInstr.cpp.

References assert(), F, llvm::StatepointOpers::getFirstGCPtrIdx(), llvm::MachineOperand::getImm(), llvm::StackMaps::getNextMetaArgIdx(), getNumDefs(), getNumOperands(), getOpcode(), getOperand(), llvm::MachineOperand::isImm(), isInlineAsm(), llvm::MachineOperand::isReg(), isReg(), llvm::MachineOperand::isTied(), llvm::MachineOperand::isUse(), llvm_unreachable, llvm::InlineAsm::MIOp_FirstOperand, llvm::SmallVectorTemplateBase< T, bool >::push_back(), llvm::SmallVectorBase< Size_T >::size(), and TiedMax.

Referenced by hasComplexRegisterTies(), insert(), isRegTiedToDefOperand(), isRegTiedToUseOperand(), print(), and untieRegOperand().

◆ getAsmPrinterFlag()

bool llvm::MachineInstr::getAsmPrinterFlag ( CommentFlag Flag ) const

inline

Return whether an AsmPrinter flag is set.

Definition at line 370 of file MachineInstr.h.

References assert().

◆ getAsmPrinterFlags()

uint8_t llvm::MachineInstr::getAsmPrinterFlags ( ) const

inline

Return the asm printer flags bitvector.

Definition at line 364 of file MachineInstr.h.

◆ getBundleSize()

unsigned MachineInstr::getBundleSize ( ) const

Return the number of instructions inside the MI bundle, excluding the bundle header.

Return the number of instructions inside the MI bundle, not counting the header instruction.

This is the number of instructions that MachineBasicBlock::iterator skips, 0 for unbundled instructions.

Definition at line 1031 of file MachineInstr.cpp.

References llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator(), I, and Size.

◆ getCFIType()

uint32_t llvm::MachineInstr::getCFIType ( ) const

inline

Helper to extract a CFI type hash if one has been added.

Definition at line 874 of file MachineInstr.h.

References Info.

Referenced by dropMemRefs(), isIdenticalTo(), print(), setCFIType(), setHeapAllocMarker(), setMemRefs(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getDebugExpression()

const DIExpression * MachineInstr::getDebugExpression ( ) const

Return the complex address expression referenced by this DBG_VALUE instruction.

Definition at line 936 of file MachineInstr.cpp.

References getDebugExpressionOp().

Referenced by handleNewDebugValue(), isDebugEntryValue(), isEquivalentDbgInstr(), and llvm::salvageDebugInfoForDbgValue().

◆ getDebugExpressionOp() [1/2]

MachineOperand & MachineInstr::getDebugExpressionOp ( )

Definition at line 930 of file MachineInstr.cpp.

References assert(), getOperand(), isDebugValueLike(), and isNonListDebugValue().

◆ getDebugExpressionOp() [2/2]

const MachineOperand & MachineInstr::getDebugExpressionOp ( ) const

Return the operand for the complex address expression referenced by this DBG_VALUE instruction.

Definition at line 924 of file MachineInstr.cpp.

References assert(), getOperand(), isDebugValueLike(), and isNonListDebugValue().

Referenced by getDebugExpression(), llvm::salvageDebugInfoForDbgValue(), and llvm::updateDbgValueForSpill().

◆ getDebugInstrNum() [1/2]

unsigned MachineInstr::getDebugInstrNum ( )

Fetch the instruction number of this MachineInstr.

If it does not have one already, a new and unique number will be assigned.

Definition at line 2481 of file MachineInstr.cpp.

References llvm::MachineFunction::getNewDebugInstrNum(), llvm::MachineBasicBlock::getParent(), and getParent().

Referenced by llvm::InstrEmitter::EmitDbgInstrRef(), and llvm::MachineFunction::salvageCopySSAImpl().

◆ getDebugInstrNum() [2/2]

unsigned MachineInstr::getDebugInstrNum ( MachineFunction & MF )

Fetch instruction number of this MachineInstr – but before it's inserted into MF.

Needed for transformations that create an instruction but don't immediately insert them.

Definition at line 2487 of file MachineInstr.cpp.

References llvm::MachineFunction::getNewDebugInstrNum().

◆ getDebugLabel()

const DILabel * MachineInstr::getDebugLabel ( ) const

Return the debug label referenced by this DBG_LABEL instruction.

Definition at line 903 of file MachineInstr.cpp.

References assert(), getOperand(), and isDebugLabel().

◆ getDebugLoc()

const DebugLoc & llvm::MachineInstr::getDebugLoc ( ) const

inline

Returns the debug location id of this MachineInstr.

Definition at line 498 of file MachineInstr.h.

Referenced by llvm::buildDbgValueForSpill(), llvm::WebAssemblyDebugValueManager::cloneSink(), CombineCVTAToLocal(), combineFPFusedMultiply(), llvm::constrainOperandRegClass(), llvm::ARCFrameLowering::eliminateCallFramePseudoInstr(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::Thumb1FrameLowering::eliminateCallFramePseudoInstr(), llvm::AArch64InstrInfo::emitLdStWithAddr(), llvm::RISCVInstrInfo::emitLdStWithAddr(), expandLoadStackGuard(), expandMOV32r1(), llvm::M68kInstrInfo::ExpandMOVEM(), ExpandMOVImmSExti8(), llvm::M68kInstrInfo::ExpandMOVSZX_RM(), llvm::M68kInstrInfo::ExpandMOVSZX_RR(), llvm::M68kInstrInfo::ExpandMOVX_RR(), llvm::X86InstrInfo::expandPostRAPseudo(), llvm::M68kInstrInfo::ExpandPUSH_POP(), INITIALIZE_PASS(), llvm::SystemZELFFrameLowering::inlineStackProbe(), llvm::SystemZXPLINKFrameLowering::inlineStackProbe(), insertPHI(), isEquivalentDbgInstr(), isIdenticalTo(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::moveToVALUImpl(), print(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::X86InstrInfo::reMaterialize(), llvm::WebAssemblyDebugValueManager::sink(), splitEdge(), and splitMBB().

◆ getDebugOffset() [1/2]

MachineOperand & llvm::MachineInstr::getDebugOffset ( )

inline

Definition at line 507 of file MachineInstr.h.

References assert(), getOperand(), and isNonListDebugValue().

◆ getDebugOffset() [2/2]

const MachineOperand & llvm::MachineInstr::getDebugOffset ( ) const

inline

Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will be an invalid register if this value is not indirect, and an immediate with value 0 otherwise.

Definition at line 503 of file MachineInstr.h.

References assert(), getOperand(), and isNonListDebugValue().

Referenced by isDebugOffsetImm(), and llvm::updateDbgValueForSpill().

◆ getDebugOperand() [1/2]

MachineOperand & llvm::MachineInstr::getDebugOperand ( unsigned Index )

inline

Definition at line 588 of file MachineInstr.h.

References assert(), debug_operands(), and getNumDebugOperands().

Referenced by isEquivalentDbgInstr(), and isIndirectDebugValue().

◆ getDebugOperand() [2/2]

const MachineOperand & llvm::MachineInstr::getDebugOperand ( unsigned Index ) const

inline

Definition at line 592 of file MachineInstr.h.

References assert(), debug_operands(), and getNumDebugOperands().

◆ getDebugOperandIndex()

unsigned llvm::MachineInstr::getDebugOperandIndex ( const MachineOperand * Op ) const

inline

Definition at line 632 of file MachineInstr.h.

References llvm::adl_begin(), assert(), debug_operands(), and isDebugOperand().

◆ getDebugOperandsForReg() [1/3]

template<typename Operand , typename Instruction >

static iterator_range< filter_iterator< Operand *, std::function< bool(Operand &Op)> > > llvm::MachineInstr::getDebugOperandsForReg	(	Instruction *	MI,
		Register	Reg
	)

inlinestatic

Returns a range of all of the operands that correspond to a debug use of Reg.

Definition at line 610 of file MachineInstr.h.

References llvm::make_filter_range(), MI, and Reg.

Referenced by attemptDebugCopyProp(), getDebugOperandsForReg(), and llvm::updateDbgValueForSpill().

◆ getDebugOperandsForReg() [2/3]

iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > > llvm::MachineInstr::getDebugOperandsForReg ( Register Reg )

inline

Definition at line 623 of file MachineInstr.h.

References Reg.

◆ getDebugOperandsForReg() [3/3]

iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > > llvm::MachineInstr::getDebugOperandsForReg ( Register Reg ) const

inline

Definition at line 617 of file MachineInstr.h.

References getDebugOperandsForReg(), and Reg.

◆ getDebugVariable()

const DILocalVariable * MachineInstr::getDebugVariable ( ) const

Return the debug variable referenced by this DBG_VALUE instruction.

Definition at line 920 of file MachineInstr.cpp.

References getDebugVariableOp().

Referenced by llvm::buildDbgValueForSpill(), isEquivalentDbgInstr(), and print().

◆ getDebugVariableOp() [1/2]

MachineOperand & MachineInstr::getDebugVariableOp ( )

Definition at line 914 of file MachineInstr.cpp.

References assert(), getOperand(), isDebugValueLike(), and isNonListDebugValue().

◆ getDebugVariableOp() [2/2]

const MachineOperand & MachineInstr::getDebugVariableOp ( ) const

Return the operand for the debug variable referenced by this DBG_VALUE instruction.

Definition at line 908 of file MachineInstr.cpp.

References assert(), getOperand(), isDebugValueLike(), and isNonListDebugValue().

Referenced by getDebugVariable(), and print().

◆ getDesc()

const MCInstrDesc & llvm::MachineInstr::getDesc ( ) const

inline

Returns the target instruction descriptor of this MachineInstr.

Definition at line 566 of file MachineInstr.h.

Referenced by llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::buildDbgValueForSpill(), llvm::HexagonPacketizerList::canPromoteToDotNew(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), llvm::ResourceManager::canReserveResources(), llvm::checkVOPDRegConstraints(), cloneInstr(), llvm::TargetSchedModel::computeOperandLatency(), findFirstPredOperandIdx(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::HexagonInstrInfo::genAllInsnTimingClasses(), llvm::X86InstrInfo::getAddrModeFromMemoryOp(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), llvm::ScheduleDAG::getInstrDesc(), llvm::ARMBaseInstrInfo::getOperandLatency(), getRegClassConstraint(), getTargetMBB(), getTypeToPrint(), hasComplexRegisterTies(), hasProperty(), llvm::HexagonInstrInfo::isDependent(), oneUseDominatesOtherUses(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::RISCVInstrInfo::optimizeSelect(), parseCondBranch(), llvm::ResourceManager::reserveResources(), tryChangeVGPRtoSGPRinCopy(), and updateOperandRegConstraints().

◆ getFirst2LLTs()

std::tuple< LLT, LLT > MachineInstr::getFirst2LLTs ( ) const

Definition at line 2493 of file MachineInstr.cpp.

References getOperand(), getReg(), and getType().

◆ getFirst2RegLLTs()

std::tuple< Register, LLT, Register, LLT > MachineInstr::getFirst2RegLLTs ( ) const

Definition at line 2520 of file MachineInstr.cpp.

References getOperand(), llvm::MachineOperand::getReg(), and getType().

◆ getFirst2Regs()

std::tuple< Register, Register > llvm::MachineInstr::getFirst2Regs ( ) const

inline

Definition at line 1980 of file MachineInstr.h.

References getOperand(), and getReg().

◆ getFirst3LLTs()

std::tuple< LLT, LLT, LLT > MachineInstr::getFirst3LLTs ( ) const

Definition at line 2498 of file MachineInstr.cpp.

References getOperand(), getReg(), and getType().

◆ getFirst3RegLLTs()

std::tuple< Register, LLT, Register, LLT, Register, LLT > MachineInstr::getFirst3RegLLTs ( ) const

Definition at line 2528 of file MachineInstr.cpp.

References getOperand(), llvm::MachineOperand::getReg(), and getType().

◆ getFirst3Regs()

std::tuple< Register, Register, Register > llvm::MachineInstr::getFirst3Regs ( ) const

inline

Definition at line 1984 of file MachineInstr.h.

References getOperand(), and getReg().

◆ getFirst4LLTs()

std::tuple< LLT, LLT, LLT, LLT > MachineInstr::getFirst4LLTs ( ) const

Definition at line 2504 of file MachineInstr.cpp.

References getOperand(), getReg(), and getType().

◆ getFirst4RegLLTs()

std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT > MachineInstr::getFirst4RegLLTs ( ) const

Definition at line 2538 of file MachineInstr.cpp.

References getOperand(), llvm::MachineOperand::getReg(), and getType().

◆ getFirst4Regs()

std::tuple< Register, Register, Register, Register > llvm::MachineInstr::getFirst4Regs ( ) const

inline

Definition at line 1989 of file MachineInstr.h.

References getOperand(), and getReg().

◆ getFirst5LLTs()

std::tuple< LLT, LLT, LLT, LLT, LLT > MachineInstr::getFirst5LLTs ( ) const

Definition at line 2511 of file MachineInstr.cpp.

References getOperand(), getReg(), and getType().

◆ getFirst5RegLLTs()

std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT, Register, LLT > MachineInstr::getFirst5RegLLTs ( ) const

Definition at line 2550 of file MachineInstr.cpp.

References getOperand(), llvm::MachineOperand::getReg(), and getType().

◆ getFirst5Regs()

std::tuple< Register, Register, Register, Register, Register > llvm::MachineInstr::getFirst5Regs ( ) const

inline

Definition at line 1995 of file MachineInstr.h.

References getOperand(), and getReg().

◆ getFlag()

bool llvm::MachineInstr::getFlag ( MIFlag Flag ) const

inline

◆ getFlags()

uint32_t llvm::MachineInstr::getFlags ( ) const

inline

Return the MI flags bitvector.

Definition at line 391 of file MachineInstr.h.

Referenced by combineFPFusedMultiply(), llvm::AArch64InstrInfo::emitLdStWithAddr(), llvm::RISCVInstrInfo::emitLdStWithAddr(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::GenericMachineInstr::hasPoisonGeneratingFlags(), llvm::CombinerHelper::matchSubOfVScale(), mergeFlagsWith(), llvm::SIInstrInfo::moveToVALUImpl(), and llvm::TargetInstrInfo::reassociateOps().

◆ getFoldedRestoreSize()

std::optional< LocationSize > MachineInstr::getFoldedRestoreSize ( const TargetInstrInfo * TII ) const

Return a valid size if the instruction is a folded restore instruction.

Definition at line 2474 of file MachineInstr.cpp.

References getMF(), getSpillSlotSize(), llvm::HexagonInstrInfo::hasLoadFromStackSlot(), and TII.

◆ getFoldedSpillSize()

std::optional< LocationSize > MachineInstr::getFoldedSpillSize ( const TargetInstrInfo * TII ) const

Return a valid size if the instruction is a folded spill instruction.

Definition at line 2455 of file MachineInstr.cpp.

References getMF(), getSpillSlotSize(), llvm::HexagonInstrInfo::hasStoreToStackSlot(), and TII.

◆ getHeapAllocMarker()

MDNode * llvm::MachineInstr::getHeapAllocMarker ( ) const

inline

Helper to extract a heap alloc marker if one has been added.

Definition at line 845 of file MachineInstr.h.

References Info.

Referenced by cloneMemRefs(), dropMemRefs(), print(), setCFIType(), setHeapAllocMarker(), setMemRefs(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getInlineAsmDialect()

InlineAsm::AsmDialect MachineInstr::getInlineAsmDialect ( ) const

Definition at line 868 of file MachineInstr.cpp.

References assert(), llvm::InlineAsm::Extra_AsmDialect, llvm::MachineOperand::getImm(), getOperand(), isInlineAsm(), and llvm::InlineAsm::MIOp_ExtraInfo.

Referenced by print(), printAsmMRegister(), and printAsmVRegister().

◆ getMF() [1/2]

MachineFunction * llvm::MachineInstr::getMF ( )

inline

Definition at line 358 of file MachineInstr.h.

References getMF().

◆ getMF() [2/2]

const MachineFunction * MachineInstr::getMF ( ) const

Return the function that contains the basic block that this instruction belongs to.

Note: this is undefined behaviour if the instruction does not have a parent.

Definition at line 747 of file MachineInstr.cpp.

References llvm::MachineBasicBlock::getParent(), and getParent().

Referenced by attemptDebugCopyProp(), canCombineFPFusedMultiply(), llvm::AArch64InstrInfo::canFoldIntoAddrMode(), llvm::checkVOPDRegConstraints(), cloneMergedMemRefs(), collectCallSiteParameters(), combineFPFusedMultiply(), llvm::TargetSchedModel::computeOutputLatency(), llvm::AArch64InstrInfo::emitLdStWithAddr(), llvm::GIMatchTableExecutor::executeMatchTable(), llvm::PPCInstrInfo::finalizeInsInstrs(), llvm::RISCVInstrInfo::finalizeInsInstrs(), foldInlineAsmMemOperand(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), llvm::RISCVInstrInfo::genAlternativeCodeSequence(), genAlternativeDpCodeSequence(), genIndexedMultiply(), genShXAddAddShift(), getFoldedRestoreSize(), getFoldedSpillSize(), getMF(), getRegClassConstraint(), getRestoreSize(), getSpillSize(), llvm::RISCVInstrInfo::hasReassociableSibling(), interpretValues(), llvm::isKnownNeverNaN(), mayAlias(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), performSink(), llvm::TargetInstrInfo::reassociateOps(), setDesc(), llvm::stableHashValue(), and UpdatePredRedefs().

◆ getMMRAMetadata()

MDNode * llvm::MachineInstr::getMMRAMetadata ( ) const

inline

Helper to extract mmra.op metadata.

Definition at line 865 of file MachineInstr.h.

References Info.

Referenced by cloneMemRefs(), dropMemRefs(), print(), setCFIType(), setHeapAllocMarker(), setMemRefs(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getNumDebugOperands()

unsigned llvm::MachineInstr::getNumDebugOperands ( ) const

inline

Returns the total number of operands which are debug locations.

Definition at line 575 of file MachineInstr.h.

References debug_operands().

Referenced by getDebugOperand(), and isEquivalentDbgInstr().

◆ getNumDefs()

unsigned llvm::MachineInstr::getNumDefs ( ) const

inline

Returns the total number of definitions.

Definition at line 638 of file MachineInstr.h.

References getNumExplicitDefs(), and llvm::MCInstrDesc::implicit_defs().

Referenced by findTiedOperandIdx(), llvm::X86InstrInfo::hasReassociableOperands(), and llvm::MIPatternMatch::BinaryOpc_match< LHS_P, RHS_P, Commutable >::match().

◆ getNumExplicitDefs()

unsigned MachineInstr::getNumExplicitDefs ( ) const

Returns the number of non-implicit definitions.

Definition at line 809 of file MachineInstr.cpp.

References llvm::MCInstrDesc::getNumDefs(), getNumOperands(), getOperand(), I, llvm::MachineOperand::isDef(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), and llvm::MCInstrDesc::isVariadic().

Referenced by defs(), explicit_uses(), llvm::GIntrinsic::getIntrinsicID(), getNumDefs(), llvm::X86InstrInfo::hasReassociableOperands(), isConstReg(), and uses().

◆ getNumExplicitOperands()

unsigned MachineInstr::getNumExplicitOperands ( ) const

Returns the number of non-implicit operands.

Definition at line 790 of file MachineInstr.cpp.

References getNumOperands(), llvm::MCInstrDesc::getNumOperands(), getOperand(), I, llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), and llvm::MCInstrDesc::isVariadic().

Referenced by llvm::HexagonInstrInfo::analyzeBranch(), explicit_operands(), explicit_uses(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsOffsetOperand(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), getNumImplicitOperands(), getTypeToPrint(), llvm::X86InstrInfo::hasReassociableOperands(), isLdStSafeToCluster(), and parseCondBranch().

◆ getNumImplicitOperands()

unsigned llvm::MachineInstr::getNumImplicitOperands ( ) const

inline

Returns the implicit operands number.

Definition at line 651 of file MachineInstr.h.

References getNumExplicitOperands(), and getNumOperands().

◆ getNumMemOperands()

unsigned llvm::MachineInstr::getNumMemOperands ( ) const

inline

Return the number of memory operands.

Definition at line 818 of file MachineInstr.h.

References memoperands().

Referenced by llvm::ARMBankConflictHazardRecognizer::getHazardType(), and mayAlias().

◆ getNumOperands()

unsigned llvm::MachineInstr::getNumOperands ( ) const

inline

Retuns the total number of operands.

Definition at line 572 of file MachineInstr.h.

Referenced by addOperand(), addRegisterDead(), addRegisterKilled(), llvm::HexagonSubtarget::adjustSchedDependency(), allPhiOperandsUndefined(), llvm::X86InstrInfo::analyzeBranchPredicate(), llvm::HexagonInstrInfo::canExecuteInBundle(), cloneInstr(), llvm::SIInstrInfo::convertToThreeAddress(), emitError(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::LegalizerHelper::fewerElementsVectorUnmergeValues(), findFirstPredOperandIdx(), findInlineAsmFlagIdx(), findLoopComponents(), findRegisterDefOperandIdx(), findRegisterUseOperandIdx(), findTiedOperandIdx(), foldPatchpoint(), llvm::LanaiInstrInfo::getMemOperandWithOffsetWidth(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::GUnmerge::getNumDefs(), getNumExplicitDefs(), getNumExplicitOperands(), getNumImplicitOperands(), llvm::GPhi::getNumIncomingValues(), llvm::GMergeLikeInstr::getNumSources(), getOperand(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), hasComplexRegisterTies(), INITIALIZE_PASS(), insert(), interpretNextInstr(), isConstantValuePHI(), isIdenticalTo(), llvm::HexagonInstrInfo::isToBeScheduledASAP(), llvm::InlineAsmLowering::lowerInlineAsm(), llvm::MIPatternMatch::BinaryOp_match< LHS_P, RHS_P, Opcode, Commutable >::match(), llvm::MIPatternMatch::BinaryOpc_match< LHS_P, RHS_P, Commutable >::match(), llvm::MIPatternMatch::UnaryOp_match< SrcTy, Opcode >::match(), llvm::MIPatternMatch::TernaryOp_match< Src0Ty, Src1Ty, Src2Ty, Opcode >::match(), llvm::CombinerHelper::matchCombineInsertVecElts(), llvm::SIInstrInfo::moveToVALUImpl(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), print(), llvm::ARMBaseInstrInfo::produceSameValue(), readsWritesVirtualRegister(), removeOperand(), llvm::MachineFunction::substituteDebugValuesForInst(), llvm::LegalizationArtifactCombiner::tryCombineExtract(), llvm::LegalizationArtifactCombiner::tryCombineUnmergeValues(), updateOperandRegConstraints(), validateFunCallMachineDef(), and validateGroupAsyncCopyPtr().

◆ getOpcode()

unsigned llvm::MachineInstr::getOpcode ( ) const

inline

Returns the opcode of this MachineInstr.

Definition at line 569 of file MachineInstr.h.

◆ getOperand() [1/2]

MachineOperand & llvm::MachineInstr::getOperand ( unsigned i )

inline

Definition at line 583 of file MachineInstr.h.

References assert(), getNumOperands(), and Operands.

◆ getOperand() [2/2]

const MachineOperand & llvm::MachineInstr::getOperand ( unsigned i ) const

inline

Definition at line 579 of file MachineInstr.h.

References assert(), getNumOperands(), and Operands.

◆ getOperandNo()

unsigned llvm::MachineInstr::getOperandNo ( const_mop_iterator I ) const

inline

Returns the number of the operand iterator I points to.

Definition at line 775 of file MachineInstr.h.

References I, and operands_begin().

Referenced by llvm::MachineOperand::getOperandNo(), and insert().

◆ getParent() [1/2]

MachineBasicBlock * llvm::MachineInstr::getParent ( )

inline

Definition at line 347 of file MachineInstr.h.

◆ getParent() [2/2]

const MachineBasicBlock * llvm::MachineInstr::getParent ( ) const

inline

Definition at line 346 of file MachineInstr.h.

Referenced by addOperand(), llvm::LiveIntervals::addSegmentToEndOfBlock(), llvm::GCNSubtarget::adjustSchedDependency(), BlockSplitInfo::allInstrsInSameMBB(), analyzeCompressibleUses(), canCombineFPFusedMultiply(), llvm::checkVOPDRegConstraints(), llvm::WebAssemblyDebugValueManager::cloneSink(), collectCallSiteParameters(), CombineCVTAToLocal(), llvm::constrainOperandRegClass(), emitError(), llvm::AArch64InstrInfo::emitLdStWithAddr(), llvm::RISCVInstrInfo::emitLdStWithAddr(), llvm::DebugHandlerBase::endInstruction(), eraseFromBundle(), eraseFromParent(), llvm::examineCFlagsUse(), expandLoadStackGuard(), expandMOV32r1(), llvm::M68kInstrInfo::ExpandMOVEM(), ExpandMOVImmSExti8(), llvm::M68kInstrInfo::ExpandMOVSZX_RM(), llvm::M68kInstrInfo::ExpandMOVSZX_RR(), llvm::X86InstrInfo::expandPostRAPseudo(), llvm::M68kInstrInfo::ExpandPUSH_POP(), expandXorFP(), llvm::findCMPToFoldIntoCBZ(), findRedundantFlagInstr(), findRenameRegForSameLdStRegPair(), findSingleRegUse(), llvm::ARMBlockPlacement::fixBackwardsWLS(), llvm::SIInstrInfo::foldImmediate(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::TargetInstrInfo::genAlternativeCodeSequence(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::rdf::Liveness::getAllReachingDefs(), getDebugInstrNum(), getFMAPatterns(), llvm::PPCInstrInfo::getFMAPatterns(), getFMULPatterns(), getFNEGPatterns(), getFoldableImm(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), getLoadStoreOffsetSizeInBits(), getMaddPatterns(), getMF(), getMiscPatterns(), llvm::PPCInstrInfo::getOperandLatency(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), getRegClassConstraint(), getSHXADDPatterns(), GetSymbolRef(), handleADRP(), llvm::LiveVariables::HandleVirtRegUse(), hasAllNBitUsers(), llvm::TargetInstrInfo::hasReassociableOperands(), llvm::RISCVInstrInfo::hasReassociableOperands(), llvm::TargetInstrInfo::hasReassociableSibling(), hoistAndMergeSGPRInits(), INITIALIZE_PASS(), insertPHI(), llvm::AArch64InstrInfo::isAssociativeAndCommutative(), isCombineInstrCandidateFP(), isCVTAToLocalCombinationCandidate(), isDereferenceableInvariantLoad(), llvm::SIInstrInfo::isLegalRegOperand(), llvm::GIMatchTableExecutor::isObviouslySafeToFold(), isReachable(), llvm::TargetInstrInfo::isReassociationCandidate(), isSafeToMove(), llvm::SIInstrInfo::isSafeToSink(), jumpTableFollowsTB(), llvm::CombinerHelper::matchCombineExtractedVectorLoad(), llvm::CombinerHelper::matchFreezeOfSingleMaybePoisonOperand(), moveBefore(), llvm::SIInstrInfo::moveToVALUImpl(), llvm::PPCInstrInfo::optimizeCmpPostRA(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::SIInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::LanaiInstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::LanaiInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::RISCVInstrInfo::optimizeSelect(), llvm::ARMBaseInstrInfo::produceSameValue(), reinsertVectorIndexAdd(), removeFromBundle(), removeFromParent(), rescheduleCanonically(), llvm::MachineSSAUpdater::RewriteUse(), llvm::salvageDebugInfoForDbgValue(), setDesc(), llvm::AArch64InstrInfo::shouldClusterMemOps(), llvm::SystemZRegisterInfo::shouldCoalesce(), llvm::WebAssemblyDebugValueManager::sink(), splitBlock(), splitMBB(), llvm::TailDuplicator::tailDuplicateAndUpdate(), tryChangeVGPRtoSGPRinCopy(), updatePHIs(), validateFunCall(), validateFunCallMachineDef(), validatePtrTypes(), validThroughout(), and verifyCFIntrinsic().

◆ getPCSections()

MDNode * llvm::MachineInstr::getPCSections ( ) const

inline

Helper to extract PCSections metadata target sections.

Definition at line 855 of file MachineInstr.h.

References Info.

Referenced by cloneMemRefs(), dropMemRefs(), print(), setCFIType(), setHeapAllocMarker(), setMemRefs(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getPostInstrSymbol()

MCSymbol * llvm::MachineInstr::getPostInstrSymbol ( ) const

inline

Helper to extract a post-instruction symbol if one has been added.

Definition at line 833 of file MachineInstr.h.

References Info.

Referenced by cloneMemRefs(), dropMemRefs(), isIdenticalTo(), isNotDuplicable(), print(), setCFIType(), setHeapAllocMarker(), setMemRefs(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getPreInstrSymbol()

MCSymbol * llvm::MachineInstr::getPreInstrSymbol ( ) const

inline

Helper to extract a pre-instruction symbol if one has been added.

Definition at line 821 of file MachineInstr.h.

References Info.

Referenced by cloneMemRefs(), dropMemRefs(), isIdenticalTo(), isNotDuplicable(), print(), setCFIType(), setHeapAllocMarker(), setMemRefs(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ getRegClassConstraint()

const TargetRegisterClass * MachineInstr::getRegClassConstraint	(	unsigned	OpIdx,
		const TargetInstrInfo *	TII,
		const TargetRegisterInfo *	TRI
	)		const

Compute the static register class constraint for operand OpIdx.

For normal instructions, this is derived from the MCInstrDesc. For inline assembly it is derived from the flag words.

Returns NULL if the static register class constraint cannot be determined.

Definition at line 945 of file MachineInstr.cpp.

References assert(), F, findInlineAsmFlagIdx(), getDesc(), getMF(), getOperand(), getParent(), isInlineAsm(), isReg(), isRegTiedToDefOperand(), TII, and TRI.

Referenced by getRegClassConstraintEffect(), and llvm::TargetInstrInfo::reassociateOps().

◆ getRegClassConstraintEffect()

const TargetRegisterClass * MachineInstr::getRegClassConstraintEffect	(	unsigned	OpIdx,
		const TargetRegisterClass *	CurRC,
		const TargetInstrInfo *	TII,
		const TargetRegisterInfo *	TRI
	)		const

Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.

Returns the register class that satisfies both CurRC and the constraints set by OpIdx MI. Returns NULL if such a register class does not exist.

Precondition: CurRC must not be NULL.; The operand at OpIdx must be a register.

Definition at line 1011 of file MachineInstr.cpp.

References assert(), getOperand(), getRegClassConstraint(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::isReg(), TII, and TRI.

◆ getRegClassConstraintEffectForVReg()

const TargetRegisterClass * MachineInstr::getRegClassConstraintEffectForVReg	(	Register	Reg,
		const TargetRegisterClass *	CurRC,
		const TargetInstrInfo *	TII,
		const TargetRegisterInfo *	TRI,
		bool	ExploreBundle = `false`
	)		const

Applies the constraints (def/use) implied by this MI on Reg to the given CurRC.

If ExploreBundle is set and MI is part of a bundle, all the instructions inside the bundle will be taken into account. In other words, this method accumulates all the constraints of the operand of this MI and the related bundle if MI is a bundle or inside a bundle.

Returns the register class that satisfies both CurRC and the constraints set by MI. Returns NULL if such a register class does not exist.

Precondition: CurRC must not be NULL.

Definition at line 982 of file MachineInstr.cpp.

References llvm::MIBundleOperandIteratorBase< ValueT >::isValid(), TII, and TRI.

◆ getRestoreSize()

std::optional< LocationSize > MachineInstr::getRestoreSize ( const TargetInstrInfo * TII ) const

Return a valid size if the instruction is a restore instruction.

Definition at line 2463 of file MachineInstr.cpp.

References llvm::MachineFunction::getFrameInfo(), getMF(), llvm::MachineFrameInfo::isSpillSlotObjectIndex(), memoperands_begin(), and TII.

◆ getSpillSize()

std::optional< LocationSize > MachineInstr::getSpillSize ( const TargetInstrInfo * TII ) const

Return a valid size if the instruction is a spill instruction.

Definition at line 2444 of file MachineInstr.cpp.

References llvm::MachineFunction::getFrameInfo(), getMF(), llvm::MachineFrameInfo::isSpillSlotObjectIndex(), memoperands_begin(), and TII.

◆ getTypeToPrint()

LLT MachineInstr::getTypeToPrint	(	unsigned	OpIdx,
		SmallBitVector &	PrintedTypes,
		const MachineRegisterInfo &	MRI
	)		const

Debugging supportDetermine the generic type to be printed (if needed) on uses and defs.

Definition at line 1598 of file MachineInstr.cpp.

References getDesc(), getNumExplicitOperands(), getOperand(), llvm::LLT::isValid(), isVariadic(), MRI, llvm::MCInstrDesc::operands(), and llvm::SmallBitVector::set().

Referenced by print().

◆ hasComplexRegisterTies()

bool MachineInstr::hasComplexRegisterTies ( ) const

Return true when an instruction has tied register that can't be determined by the instruction's descriptor.

This is useful for MIR printing, to determine whether we need to print the ties or not.

Definition at line 1581 of file MachineInstr.cpp.

References findTiedOperandIdx(), getDesc(), getNumOperands(), getOperand(), llvm::MCInstrDesc::getOperandConstraint(), I, llvm::MCInstrDesc::Opcode, and llvm::MCOI::TIED_TO.

Referenced by print().

◆ hasDebugOperandForReg()

bool llvm::MachineInstr::hasDebugOperandForReg ( Register Reg ) const

inline

Returns whether this debug value has at least one debug operand with the register Reg.

Definition at line 599 of file MachineInstr.h.

References llvm::any_of(), debug_operands(), and Reg.

Referenced by performSink(), and llvm::salvageDebugInfoForDbgValue().

◆ hasDelaySlot()

bool llvm::MachineInstr::hasDelaySlot ( QueryType Type = AnyInBundle ) const

inline

Returns true if the specified instruction has a delay slot which must be filled by the code generator.

Definition at line 1070 of file MachineInstr.h.

References llvm::MCID::DelaySlot, and hasProperty().

Referenced by collectCallSiteParameters().

◆ hasExtraDefRegAllocReq()

bool llvm::MachineInstr::hasExtraDefRegAllocReq ( QueryType Type = AnyInBundle ) const

inline

Returns true if this instruction def operands have special register allocation requirements that are not captured by the operand register classes.

e.g. ARM::LDRD's two def registers must be an even / odd pair, ARM::LDM registers have to be in ascending order. Post-register allocation passes should not attempt to change allocations for definitions of instructions with this flag.

Definition at line 1267 of file MachineInstr.h.

References llvm::MCID::ExtraDefRegAllocReq, and hasProperty().

◆ hasExtraSrcRegAllocReq()

bool llvm::MachineInstr::hasExtraSrcRegAllocReq ( QueryType Type = AnyInBundle ) const

inline

Returns true if this instruction source operands have special register allocation requirements that are not captured by the operand register classes.

e.g. ARM::STRD's two source registers must be an even / odd pair, ARM::STM registers have to be in ascending order. Post-register allocation passes should not attempt to change allocations for sources of instructions with this flag.

Definition at line 1257 of file MachineInstr.h.

References llvm::MCID::ExtraSrcRegAllocReq, and hasProperty().

◆ hasImplicitDef()

bool llvm::MachineInstr::hasImplicitDef ( ) const

inline

Returns true if the instruction has implicit definition.

Definition at line 643 of file MachineInstr.h.

References implicit_operands().

Referenced by llvm::PPCInstrInfo::combineRLWINM(), and llvm::PPCInstrInfo::optimizeCmpPostRA().

◆ hasOneMemOperand()

bool llvm::MachineInstr::hasOneMemOperand ( ) const

inline

Return true if this instruction has exactly one MachineMemOperand.

Definition at line 815 of file MachineInstr.h.

References memoperands().

Referenced by llvm::SystemZInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), and memOpsHaveSameBasePtr().

◆ hasOptionalDef()

bool llvm::MachineInstr::hasOptionalDef ( QueryType Type = IgnoreBundle ) const

inline

Set if this instruction has an optional definition, e.g.

ARM instructions which can set condition code if 's' bit is set.

Definition at line 924 of file MachineInstr.h.

References llvm::MCID::HasOptionalDef, and hasProperty().

Referenced by llvm::ARMBaseInstrInfo::optimizeSelect().

◆ hasOrderedMemoryRef()

bool MachineInstr::hasOrderedMemoryRef ( ) const

Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available.

hasOrderedMemoryRef - Return true if this instruction may have an ordered or volatile memory reference, or if the information describing the memory reference is not available.

Return false if it is known to have no ordered or volatile memory references.

Return false if it is known to have no ordered memory references.

Definition at line 1458 of file MachineInstr.cpp.

References llvm::any_of(), hasUnmodeledSideEffects(), isCall(), llvm::MachineMemOperand::isUnordered(), mayLoad(), mayStore(), memoperands(), and memoperands_empty().

Referenced by areCandidatesToMergeOrPair(), llvm::AArch64InstrInfo::areMemAccessesTriviallyDisjoint(), llvm::SIInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::LanaiInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::PPCInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::RISCVInstrInfo::areMemAccessesTriviallyDisjoint(), isLdStSafeToCluster(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), and isSafeToMove().

◆ hasPostISelHook()

bool llvm::MachineInstr::hasPostISelHook ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction requires adjustment after instruction selection by calling a target hook.

For example, this can be used to fill in ARM 's' optional operand depending on whether the conditional flag register is used.

Definition at line 1226 of file MachineInstr.h.

References llvm::MCID::HasPostISelHook, and hasProperty().

◆ hasProperty()

bool llvm::MachineInstr::hasProperty	(	unsigned	MCFlag,
		QueryType	Type = `AnyInBundle`
	)		const

inline

Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has the specified property.

The first argument is the property being queried. The second argument indicates whether the query should look inside instruction bundles.

Definition at line 897 of file MachineInstr.h.

References assert(), getDesc(), llvm::MCInstrDesc::getFlags(), IgnoreBundle, isBundled(), and isBundledWithPred().

Referenced by canFoldAsLoad(), hasDelaySlot(), hasExtraDefRegAllocReq(), hasExtraSrcRegAllocReq(), hasOptionalDef(), hasPostISelHook(), hasUnmodeledSideEffects(), isAsCheapAsAMove(), isBarrier(), isBitcast(), isBranch(), isCall(), isCommutable(), isCompare(), isConvergent(), isConvertibleTo3Addr(), isEHScopeReturn(), isExtractSubregLike(), isIndirectBranch(), isInsertSubregLike(), isMetaInstruction(), isMoveImmediate(), isMoveReg(), isNotDuplicable(), isPredicable(), isPreISelOpcode(), isPseudo(), isRegSequenceLike(), isRematerializable(), isReturn(), isSelect(), isTerminator(), isVariadic(), mayLoad(), mayRaiseFPException(), mayStore(), and usesCustomInsertionHook().

◆ hasRegisterImplicitUseOperand()

bool MachineInstr::hasRegisterImplicitUseOperand ( Register Reg ) const

Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not considering sub/super-registers).

Definition at line 1043 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isImplicit(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUse(), and operands().

◆ hasUnmodeledSideEffects()

bool MachineInstr::hasUnmodeledSideEffects ( ) const

Return true if this instruction has side effects that are not modeled by mayLoad / mayStore, etc.

For all instructions, the property is encoded in MCInstrDesc::Flags (see MCInstrDesc::hasUnmodeledSideEffects(). The only exception is INLINEASM instruction, in which case the side effect property is encoded in one of its operands (see InlineAsm::Extra_HasSideEffect).

Definition at line 1532 of file MachineInstr.cpp.

References llvm::InlineAsm::Extra_HasSideEffects, llvm::MachineOperand::getImm(), getOperand(), hasProperty(), isInlineAsm(), llvm::InlineAsm::MIOp_ExtraInfo, and llvm::MCID::UnmodeledSideEffects.

Referenced by llvm::AArch64InstrInfo::areMemAccessesTriviallyDisjoint(), llvm::SIInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::LanaiInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::PPCInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::RISCVInstrInfo::areMemAccessesTriviallyDisjoint(), hasOrderedMemoryRef(), hasSameValue(), isLoadFoldBarrier(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), and isSafeToMove().

◆ implicit_operands() [1/2]

iterator_range< mop_iterator > llvm::MachineInstr::implicit_operands ( )

inline

Definition at line 699 of file MachineInstr.h.

References explicit_operands(), llvm::make_range(), and operands_end().

Referenced by allImplicitDefsAreDead(), hasImplicitDef(), and llvm::SIInstrInfo::moveToVALUImpl().

◆ implicit_operands() [2/2]

iterator_range< const_mop_iterator > llvm::MachineInstr::implicit_operands ( ) const

inline

Definition at line 702 of file MachineInstr.h.

References explicit_operands(), llvm::make_range(), and operands_end().

◆ insert()

void MachineInstr::insert	(	mop_iterator	InsertBefore,
		ArrayRef< MachineOperand >	Ops
	)

Inserts Ops BEFORE It. Can untie/retie tied operands.

Definition at line 2562 of file MachineInstr.cpp.

References addOperand(), assert(), llvm::SmallVectorImpl< T >::emplace_back(), llvm::ArrayRef< T >::empty(), findTiedOperandIdx(), getNumOperands(), getOperand(), getOperandNo(), llvm::MachineOperand::getParent(), I, llvm::MachineOperand::isReg(), llvm::MachineOperand::isTied(), operands(), removeOperand(), llvm::SmallVectorImpl< T >::reserve(), llvm::ArrayRef< T >::size(), tieOperands(), and untieRegOperand().

Referenced by llvm::RegBankSelect::repairReg().

◆ isAnnotationLabel()

bool llvm::MachineInstr::isAnnotationLabel ( ) const

inline

Definition at line 1322 of file MachineInstr.h.

References getOpcode().

Referenced by isLabel().

◆ isAsCheapAsAMove()

bool llvm::MachineInstr::isAsCheapAsAMove ( QueryType Type = AllInBundle ) const

inline

Returns true if this instruction has the same cost (or less) than a move instruction.

This is useful during certain types of optimizations (e.g., remat during two-address conversion or machine licm) where we would like to remat or hoist the instruction, but not if it costs more than moving the instruction into the appropriate register. Note, we are not marking copies from and to the same register class with this flag.

Definition at line 1246 of file MachineInstr.h.

References llvm::MCID::CheapAsAMove, and hasProperty().

◆ isBarrier()

bool llvm::MachineInstr::isBarrier ( QueryType Type = AnyInBundle ) const

inline

Returns true if the specified instruction stops control flow from executing the instruction immediately following it.

Examples include unconditional branches and return instructions.

Definition at line 965 of file MachineInstr.h.

References llvm::MCID::Barrier, and hasProperty().

Referenced by llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), cannotCoexistAsymm(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), llvm::HexagonPacketizerList::hasControlDependence(), isConditionalBranch(), isUnconditionalBranch(), and ProfitableToMerge().

◆ isBitcast()

bool llvm::MachineInstr::isBitcast ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction is a bitcast instruction.

Definition at line 1036 of file MachineInstr.h.

References llvm::MCID::Bitcast, and hasProperty().

◆ isBranch()

bool llvm::MachineInstr::isBranch ( QueryType Type = AnyInBundle ) const

inline

Returns true if this is a conditional, unconditional, or indirect branch.

Predicates below can be used to discriminate between these cases, and the TargetInstrInfo::analyzeBranch method can be used to get more information.

Definition at line 982 of file MachineInstr.h.

References llvm::MCID::Branch, and hasProperty().

Referenced by cannotCoexistAsymm(), llvm::HexagonPacketizerList::hasControlDependence(), isConditionalBranch(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), isUnconditionalBranch(), and splitBlock().

◆ isBundle()

bool llvm::MachineInstr::isBundle ( ) const

inline

Definition at line 1422 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::GCNSubtarget::adjustSchedDependency(), llvm::GCNHazardRecognizer::AdvanceCycle(), llvm::HexagonInstrInfo::getBundleNoShuf(), interpretNextInstr(), isIdenticalTo(), and shouldUpdateCallSiteInfo().

◆ isBundled()

bool llvm::MachineInstr::isBundled ( ) const

inline

Return true if this instruction part of a bundle.

This is true if either itself or its following instruction is marked "InsideBundle".

Definition at line 471 of file MachineInstr.h.

References isBundledWithPred(), and isBundledWithSucc().

Referenced by hasProperty(), and isCopyOfBundle().

◆ isBundledWithPred()

bool llvm::MachineInstr::isBundledWithPred ( ) const

inline

Return true if this instruction is part of a bundle, and it is not the first instruction in the bundle.

Definition at line 477 of file MachineInstr.h.

References BundledPred, and getFlag().

Referenced by bundleWithPred(), hasProperty(), isBundled(), isCopyOfBundle(), and unbundleFromPred().

◆ isBundledWithSucc()

bool llvm::MachineInstr::isBundledWithSucc ( ) const

inline

Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle.

Definition at line 481 of file MachineInstr.h.

References BundledSucc, and getFlag().

Referenced by bundleWithSucc(), isBundled(), isCopyOfBundle(), moveInstrOut(), and unbundleFromSucc().

◆ isCall()

bool llvm::MachineInstr::isCall ( QueryType Type = AnyInBundle ) const

inline

◆ isCandidateForCallSiteEntry()

bool MachineInstr::isCandidateForCallSiteEntry ( QueryType Type = IgnoreBundle ) const

Return true if this is a call instruction that may have an associated call site entry in the debug info.

Definition at line 771 of file MachineInstr.cpp.

References getOpcode(), and isCall().

Referenced by llvm::MachineFunction::addCallSiteInfo(), and shouldUpdateCallSiteInfo().

◆ isCFIInstruction()

bool llvm::MachineInstr::isCFIInstruction ( ) const

inline

Definition at line 1331 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::TargetInstrInfo::duplicate(), isPosition(), and print().

◆ isCommutable()

bool llvm::MachineInstr::isCommutable ( QueryType Type = IgnoreBundle ) const

inline

Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z, ..."), which produces the same result if Y and Z are exchanged.

If this flag is set, then the TargetInstrInfo::commuteInstruction method may be used to hack on the instruction.

Note that this flag may be set on instructions that are only commutable sometimes. In these cases, the call to commuteInstruction will fail. Also note that some instructions require non-trivial modification to commute them.

Definition at line 1188 of file MachineInstr.h.

References llvm::MCID::Commutable, and hasProperty().

◆ isCompare()

bool llvm::MachineInstr::isCompare ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction is a comparison.

Definition at line 1019 of file MachineInstr.h.

References llvm::MCID::Compare, and hasProperty().

◆ isConditionalBranch()

bool llvm::MachineInstr::isConditionalBranch ( QueryType Type = AnyInBundle ) const

inline

Return true if this is a branch which may fall through to the next instruction or may transfer control flow to some other block.

The TargetInstrInfo::analyzeBranch method can be used to get more information about this branch.

Definition at line 996 of file MachineInstr.h.

References isBarrier(), isBranch(), and isIndirectBranch().

◆ isConstantValuePHI()

unsigned MachineInstr::isConstantValuePHI ( ) const

If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return 0.

isConstantValuePHI - If the specified instruction is a PHI that always merges together the same virtual register, return the register, otherwise return 0.

Definition at line 1519 of file MachineInstr.cpp.

References assert(), getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), getReg(), and isPHI().

Referenced by llvm::MachineSSAUpdater::GetValueInMiddleOfBlock().

◆ isConvergent()

bool llvm::MachineInstr::isConvergent ( QueryType Type = AnyInBundle ) const

inline

Return true if this instruction is convergent.

Convergent instructions can not be made control-dependent on any additional values.

Definition at line 1057 of file MachineInstr.h.

References llvm::MCID::Convergent, llvm::InlineAsm::Extra_IsConvergent, getFlag(), llvm::MachineOperand::getImm(), getOperand(), hasProperty(), isInlineAsm(), llvm::InlineAsm::MIOp_ExtraInfo, and NoConvergent.

◆ isConvertibleTo3Addr()

bool llvm::MachineInstr::isConvertibleTo3Addr ( QueryType Type = IgnoreBundle ) const

inline

Return true if this is a 2-address instruction which can be changed into a 3-address instruction if needed.

Doing this transformation can be profitable in the register allocator, because it means that the instruction can use a 2-address form if possible, but degrade into a less efficient form if the source and dest register cannot be assigned to the same register. For example, this allows the x86 backend to turn a "shl reg, 3" instruction into an LEA instruction, which is the same speed as the shift but has bigger code size.

If this returns true, then the target must implement the TargetInstrInfo::convertToThreeAddress method for this instruction, which is allowed to fail if the transformation isn't valid for this specific instruction (e.g. shl reg, 4 on x86).

Definition at line 1206 of file MachineInstr.h.

References llvm::MCID::ConvertibleTo3Addr, and hasProperty().

◆ isCopy()

bool llvm::MachineInstr::isCopy ( ) const

inline

Definition at line 1426 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::HexagonSubtarget::adjustSchedDependency(), llvm::createLibcall(), llvm::createMemLibcall(), foldVGPRCopyIntoRegSequence(), isAGPRCopy(), isCopyLike(), isFullCopy(), isIdentityCopy(), llvm::SIInstrInfo::moveToVALUImpl(), and llvm::AArch64InstrInfo::optimizeCondBranch().

◆ isCopyLike()

bool llvm::MachineInstr::isCopyLike ( ) const

inline

Return true if the instruction behaves like a copy.

This does not include native copy instructions.

Definition at line 1440 of file MachineInstr.h.

References isCopy(), and isSubregToReg().

Referenced by llvm::InstrEmitter::EmitDbgInstrRef(), llvm::ARMBaseInstrInfo::getOperandLatency(), and llvm::MachineFunction::salvageCopySSAImpl().

◆ isDebugEntryValue()

bool MachineInstr::isDebugEntryValue ( ) const

A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.

Definition at line 940 of file MachineInstr.cpp.

References getDebugExpression(), isDebugValue(), and llvm::DIExpression::isEntryValue().

Referenced by handleNewDebugValue().

◆ isDebugInstr()

bool llvm::MachineInstr::isDebugInstr ( ) const

inline

Definition at line 1355 of file MachineInstr.h.

References isDebugLabel(), isDebugPHI(), isDebugRef(), and isDebugValue().

Referenced by addOperand(), llvm::createLibcall(), llvm::createMemLibcall(), llvm::SlotIndexes::getInstructionIndex(), isDebugOrPseudoInstr(), isIdenticalTo(), and isSafeToMove().

◆ isDebugLabel()

bool llvm::MachineInstr::isDebugLabel ( ) const

inline

Definition at line 1351 of file MachineInstr.h.

References getOpcode().

Referenced by getDebugLabel(), isDebugInstr(), and print().

◆ isDebugOffsetImm()

bool llvm::MachineInstr::isDebugOffsetImm ( ) const

inline

Definition at line 1362 of file MachineInstr.h.

References getDebugOffset(), llvm::MachineOperand::isImm(), and isNonListDebugValue().

Referenced by isIndirectDebugValue().

◆ isDebugOperand()

bool llvm::MachineInstr::isDebugOperand ( const MachineOperand * Op ) const

inline

Definition at line 628 of file MachineInstr.h.

References llvm::adl_begin(), llvm::adl_end(), and debug_operands().

Referenced by getDebugOperandIndex().

◆ isDebugOrPseudoInstr()

bool llvm::MachineInstr::isDebugOrPseudoInstr ( ) const

inline

Definition at line 1358 of file MachineInstr.h.

References isDebugInstr(), and isPseudoProbe().

◆ isDebugPHI()

bool llvm::MachineInstr::isDebugPHI ( ) const

inline

Definition at line 1354 of file MachineInstr.h.

References getOpcode().

Referenced by isDebugInstr().

◆ isDebugRef()

bool llvm::MachineInstr::isDebugRef ( ) const

inline

Definition at line 1352 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::buildDbgValueForSpill(), isDebugInstr(), isDebugValueLike(), and print().

◆ isDebugValue()

bool llvm::MachineInstr::isDebugValue ( ) const

inline

Definition at line 1348 of file MachineInstr.h.

References isDebugValueList(), and isNonListDebugValue().

Referenced by isDebugEntryValue(), isDebugInstr(), isDebugValueLike(), isUndefDebugValue(), setDebugValueUndef(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

◆ isDebugValueLike()

bool llvm::MachineInstr::isDebugValueLike ( ) const

inline

Definition at line 1353 of file MachineInstr.h.

References isDebugRef(), and isDebugValue().

Referenced by debug_operands(), getDebugExpressionOp(), getDebugVariableOp(), isEquivalentDbgInstr(), and print().

◆ isDebugValueList()

bool llvm::MachineInstr::isDebugValueList ( ) const

inline

Definition at line 1345 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::buildDbgValueForSpill(), isDebugValue(), and print().

◆ isDereferenceableInvariantLoad()

bool MachineInstr::isDereferenceableInvariantLoad ( ) const

Return true if this load instruction never traps and points to a memory location whose value doesn't change during the execution of this function.

isDereferenceableInvariantLoad - Return true if this instruction will never trap and is loading from a location whose value is invariant across a run of this function.

Examples include loading a value from the constant pool or from the argument area of a function (if it does not change). If the instruction does multiple loads, this returns true only if all of the loads are dereferenceable and invariant.

Definition at line 1480 of file MachineInstr.cpp.

References llvm::MachineFunction::getFrameInfo(), llvm::MachineBasicBlock::getParent(), getParent(), mayLoad(), memoperands(), and memoperands_empty().

Referenced by hasSameValue(), isSafeToMove(), and llvm::CombinerHelper::matchEqualDefs().

◆ isEHLabel()

bool llvm::MachineInstr::isEHLabel ( ) const

inline

Definition at line 1320 of file MachineInstr.h.

References getOpcode().

Referenced by isLabel().

◆ isEHScopeReturn()

bool llvm::MachineInstr::isEHScopeReturn ( QueryType Type = AnyInBundle ) const

inline

Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanuppad instruction.

Definition at line 946 of file MachineInstr.h.

References llvm::MCID::EHScopeReturn, and hasProperty().

Referenced by llvm::MachineBasicBlock::isEHScopeReturnBlock().

◆ isEquivalentDbgInstr()

bool MachineInstr::isEquivalentDbgInstr ( const MachineInstr & Other ) const

Returns true if this instruction is a debug instruction that represents an identical debug value to Other.

This function considers these debug instructions equivalent if they have identical variables, debug locations, and debug operands, and if the DIExpressions combined with the directness flags are equivalent.

Definition at line 728 of file MachineInstr.cpp.

References getDebugExpression(), getDebugLoc(), getDebugOperand(), getDebugVariable(), getNumDebugOperands(), isDebugValueLike(), llvm::DIExpression::isEqualExpression(), llvm::MachineOperand::isIdenticalTo(), isIndirectDebugValue(), and llvm::Other.

◆ isExtractSubreg()

bool llvm::MachineInstr::isExtractSubreg ( ) const

inline

Definition at line 1434 of file MachineInstr.h.

References getOpcode().

Referenced by isOperandSubregIdx().

◆ isExtractSubregLike()

bool llvm::MachineInstr::isExtractSubregLike ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions.

E.g., on ARM, rX, rY VMOVRRD dZ is equivalent to two EXTRACT_SUBREG: rX = EXTRACT_SUBREG dZ, ssub_0 rY = EXTRACT_SUBREG dZ, ssub_1

Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getExtractSubregLikeInputs has to be override accordingly.

Definition at line 1111 of file MachineInstr.h.

References llvm::MCID::ExtractSubreg, and hasProperty().

◆ isFullCopy()

bool llvm::MachineInstr::isFullCopy ( ) const

inline

Definition at line 1430 of file MachineInstr.h.

References getOperand(), llvm::MachineOperand::getSubReg(), and isCopy().

Referenced by removeCopies().

◆ isGCLabel()

bool llvm::MachineInstr::isGCLabel ( ) const

inline

Definition at line 1321 of file MachineInstr.h.

References getOpcode().

Referenced by isLabel().

◆ isIdenticalTo()

bool MachineInstr::isIdenticalTo	(	const MachineInstr &	Other,
		MICheckType	Check = `CheckDefs`
	)		const

Return true if this instruction is identical to Other.

Two instructions are identical if they have the same opcode and all their operands are identical (with respect to MachineOperand::isIdenticalTo()). Note that this means liveness related flags (dead, undef, kill) do not affect the notion of identical.

Definition at line 649 of file MachineInstr.cpp.

References assert(), Check, CheckKillDead, getCFIType(), getDebugLoc(), llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator(), getNumOperands(), getOpcode(), getOperand(), getPostInstrSymbol(), getPreInstrSymbol(), llvm::MachineOperand::getReg(), IgnoreDefs, IgnoreVRegDefs, isBundle(), isCall(), llvm::MachineOperand::isDead(), isDebugInstr(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isIdenticalTo(), llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), llvm::Register::isVirtual(), and llvm::Other.

Referenced by llvm::SwingSchedulerDAG::isLoopCarriedDep(), llvm::ARMBaseInstrInfo::produceSameValue(), and llvm::TargetInstrInfo::produceSameValue().

◆ isIdentityCopy()

bool llvm::MachineInstr::isIdentityCopy ( ) const

inline

Return true is the instruction is an identity copy.

Definition at line 1445 of file MachineInstr.h.

References getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), and isCopy().

◆ isImplicitDef()

bool llvm::MachineInstr::isImplicitDef ( ) const

inline

Definition at line 1397 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::HexagonPacketizerList::canPromoteToDotNew(), llvm::ARMBaseInstrInfo::getOperandLatency(), and shouldPreventUndefRegUpdateMemFold().

◆ isIndirectBranch()

bool llvm::MachineInstr::isIndirectBranch ( QueryType Type = AnyInBundle ) const

inline

Return true if this is an indirect branch, such as a branch through a register.

Definition at line 988 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::IndirectBranch.

Referenced by llvm::MipsInstrInfo::analyzeBranch(), blockEndsInUnreachable(), isConditionalBranch(), llvm::HexagonInstrInfo::isHVXMemWithAIndirect(), isUnconditionalBranch(), and llvm::TailDuplicator::shouldTailDuplicate().

◆ isIndirectDebugValue()

bool llvm::MachineInstr::isIndirectDebugValue ( ) const

inline

A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate.

Definition at line 1368 of file MachineInstr.h.

References getDebugOperand(), isDebugOffsetImm(), and llvm::MachineOperand::isReg().

Referenced by isEquivalentDbgInstr(), print(), and llvm::salvageDebugInfoForDbgValue().

◆ isInlineAsm()

bool llvm::MachineInstr::isInlineAsm ( ) const

inline

◆ isInsertSubreg()

bool llvm::MachineInstr::isInsertSubreg ( ) const

inline

Definition at line 1410 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::ARMBaseInstrInfo::getOperandLatency(), and isOperandSubregIdx().

◆ isInsertSubregLike()

bool llvm::MachineInstr::isInsertSubregLike ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions.

E.g., on ARM, dX = VSETLNi32 dY, rZ, Imm is equivalent to a INSERT_SUBREG: dX = INSERT_SUBREG dY, rZ, translateImmToSubIdx(Imm)

Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getInsertSubregLikeInputs has to be override accordingly.

Definition at line 1125 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::InsertSubreg.

◆ isInsideBundle()

bool llvm::MachineInstr::isInsideBundle ( ) const

inline

Return true if MI is in a bundle (but not the first MI in a bundle).

A bundle looks like this before it's finalized:

| MI |

|

| MI * |

|

| MI * |

In this case, the first MI starts a bundle but is not inside a bundle, the next 2 MIs are considered "inside" the bundle.

After a bundle is finalized, it looks like this:

| Bundle |

|

| MI * |

|

| MI * |

|

| MI * |

The first instruction has the special opcode "BUNDLE". It's not "inside" a bundle, but the next three MIs are.

Definition at line 465 of file MachineInstr.h.

References BundledPred, and getFlag().

◆ isJumpTableDebugInfo()

bool llvm::MachineInstr::isJumpTableDebugInfo ( ) const

inline

Definition at line 1388 of file MachineInstr.h.

References getOpcode().

Referenced by isSafeToMove().

◆ isKill()

bool llvm::MachineInstr::isKill ( ) const

inline

Definition at line 1396 of file MachineInstr.h.

References getOpcode().

Referenced by findRegisterUseOperand(), and findRegisterUseOperandIdx().

◆ isLabel()

bool llvm::MachineInstr::isLabel ( ) const

inline

Returns true if the MachineInstr represents a label.

Definition at line 1327 of file MachineInstr.h.

References isAnnotationLabel(), isEHLabel(), and isGCLabel().

Referenced by isPosition().

◆ isLoadFoldBarrier()

bool MachineInstr::isLoadFoldBarrier ( ) const

Returns true if it is illegal to fold a load across this instruction.

Definition at line 1544 of file MachineInstr.cpp.

References hasUnmodeledSideEffects(), isCall(), isPseudoProbe(), and mayStore().

◆ isMetaInstruction()

bool llvm::MachineInstr::isMetaInstruction ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction doesn't produce any output in the form of executable instructions.

Definition at line 936 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Meta.

Referenced by llvm::DebugHandlerBase::endInstruction(), and isTransient().

◆ isMoveImmediate()

bool llvm::MachineInstr::isMoveImmediate ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction is a move immediate (including conditional moves) instruction.

Definition at line 1025 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::MoveImm.

◆ isMoveReg()

bool llvm::MachineInstr::isMoveReg ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction is a register move.

(including moving values from subreg to reg)

Definition at line 1031 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::MoveReg.

◆ isNonListDebugValue()

bool llvm::MachineInstr::isNonListDebugValue ( ) const

inline

Definition at line 1342 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::buildDbgValueForSpill(), debug_operands(), getDebugExpressionOp(), getDebugOffset(), getDebugVariableOp(), isDebugOffsetImm(), isDebugValue(), print(), and llvm::updateDbgValueForSpill().

◆ isNotDuplicable()

bool llvm::MachineInstr::isNotDuplicable ( QueryType Type = AnyInBundle ) const

inline

Return true if this instruction cannot be safely duplicated.

For example, if the instruction has a unique labels attached to it, duplicating it would cause multiple definition errors.

Definition at line 1048 of file MachineInstr.h.

References getPostInstrSymbol(), getPreInstrSymbol(), hasProperty(), and llvm::MCID::NotDuplicable.

Referenced by llvm::TargetInstrInfo::duplicate().

◆ isOperandSubregIdx()

bool llvm::MachineInstr::isOperandSubregIdx ( unsigned OpIdx ) const

inline

Return true if operand OpIdx is a subregister index.

Definition at line 656 of file MachineInstr.h.

References assert(), getOperand(), isExtractSubreg(), isImm(), isInsertSubreg(), isRegSequence(), and isSubregToReg().

Referenced by print().

◆ isPHI()

bool llvm::MachineInstr::isPHI ( ) const

inline

Definition at line 1392 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::SMSchedule::computeStart(), llvm::SMSchedule::computeUnpipelineableNodes(), llvm::PeelingModuloScheduleExpander::getPhiCanonicalReg(), llvm::SwingSchedulerDAG::isBackedge(), isConstantValuePHI(), llvm::SMSchedule::isLoopCarried(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), isSafeToMove(), llvm::CombinerHelper::matchFreezeOfSingleMaybePoisonOperand(), multipleIterations(), llvm::PeelingModuloScheduleExpander::peelPrologAndEpilogs(), llvm::PeelSingleBlockLoop(), llvm::SMSchedule::reorderInstructions(), llvm::MachineSSAUpdater::RewriteUse(), and llvm::TailDuplicator::tailDuplicateAndUpdate().

◆ isPosition()

bool llvm::MachineInstr::isPosition ( ) const

inline

Definition at line 1340 of file MachineInstr.h.

References isCFIInstruction(), and isLabel().

Referenced by isSafeToMove().

◆ isPredicable()

bool llvm::MachineInstr::isPredicable ( QueryType Type = AllInBundle ) const

inline

Return true if this instruction has a predicate operand that controls execution.

It may be set to 'always', or may be set to other values. There are various methods in TargetInstrInfo that can be used to control and modify the predicate in this instruction.

Definition at line 1012 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Predicable.

◆ isPreISelOpcode()

bool llvm::MachineInstr::isPreISelOpcode ( QueryType Type = IgnoreBundle ) const

inline

Return true if this is an instruction that should go through the usual legalization steps.

Definition at line 910 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::PreISelOpcode.

◆ isPseudo()

bool llvm::MachineInstr::isPseudo ( QueryType Type = IgnoreBundle ) const

inline

Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.

Definition at line 930 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Pseudo.

Referenced by canRenameUntilSecondLoad(), llvm::ResourceManager::canReserveResources(), llvm::ResourceManager::reserveResources(), and llvm::ConvergingVLIWScheduler::SchedulingCost().

◆ isPseudoProbe()

bool llvm::MachineInstr::isPseudoProbe ( ) const

inline

Definition at line 1335 of file MachineInstr.h.

References getOpcode().

Referenced by isDebugOrPseudoInstr(), and isLoadFoldBarrier().

◆ isRegSequence()

bool llvm::MachineInstr::isRegSequence ( ) const

inline

Definition at line 1418 of file MachineInstr.h.

References getOpcode().

Referenced by llvm::HexagonSubtarget::adjustSchedDependency(), llvm::ARMBaseInstrInfo::getOperandLatency(), and isOperandSubregIdx().

◆ isRegSequenceLike()

bool llvm::MachineInstr::isRegSequenceLike ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.

E.g., on ARM, dX VMOVDRR rY, rZ is equivalent to dX = REG_SEQUENCE rY, ssub_0, rZ, ssub_1.

Note that for the optimizers to be able to take advantage of this property, TargetInstrInfo::getRegSequenceLikeInputs has to be override accordingly.

Definition at line 1096 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::RegSequence.

◆ isRegTiedToDefOperand()

bool llvm::MachineInstr::isRegTiedToDefOperand	(	unsigned	UseOpIdx,
		unsigned *	DefOpIdx = `nullptr`
	)		const

inline

Return true if the use operand of the specified index is tied to a def operand.

It also returns the def operand index by reference if DefOpIdx is not null.

Definition at line 1665 of file MachineInstr.h.

References findTiedOperandIdx(), getOperand(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isTied(), and llvm::MachineOperand::isUse().

Referenced by addRegisterKilled(), llvm::AnalyzeVirtRegInBundle(), and getRegClassConstraint().

◆ isRegTiedToUseOperand()

bool llvm::MachineInstr::isRegTiedToUseOperand	(	unsigned	DefOpIdx,
		unsigned *	UseOpIdx = `nullptr`
	)		const

inline

Given the index of a register def operand, check if the register def is tied to a source operand, due to either two-address elimination or inline assembly constraints.

Returns the first tied use operand index by reference if UseOpIdx is not null.

Definition at line 1652 of file MachineInstr.h.

References findTiedOperandIdx(), getOperand(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::isTied().

◆ isRematerializable()

bool llvm::MachineInstr::isRematerializable ( QueryType Type = AllInBundle ) const

inline

Returns true if this instruction is a candidate for remat.

This flag is deprecated, please don't use it anymore. If this flag is set, the isReallyTriviallyReMaterializable() method is called to verify the instruction is really rematerializable.

Definition at line 1234 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Rematerializable.

◆ isReturn()

bool llvm::MachineInstr::isReturn ( QueryType Type = AnyInBundle ) const

inline

Definition at line 940 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Return.

Referenced by blockEndsInUnreachable(), llvm::createLibcall(), llvm::createMemLibcall(), llvm::MachineBasicBlock::isReturnBlock(), and llvm::TargetInstrInfo::isTailCall().

◆ isSafeToMove()

bool MachineInstr::isSafeToMove ( bool & SawStore ) const

Return true if it is safe to move this instruction.

isSafeToMove - Return true if it is safe to move this instruction.

If SawStore is set to true, it means that there is a store (or call) between the instruction's location and its intended destination.

Definition at line 1296 of file MachineInstr.cpp.

References hasOrderedMemoryRef(), hasUnmodeledSideEffects(), isCall(), isDebugInstr(), isDereferenceableInvariantLoad(), isJumpTableDebugInfo(), isPHI(), isPosition(), isTerminator(), mayLoad(), mayRaiseFPException(), and mayStore().

Referenced by llvm::SystemZInstrInfo::optimizeLoadInstr(), and llvm::X86InstrInfo::optimizeLoadInstr().

◆ isSelect()

bool llvm::MachineInstr::isSelect ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction is a select instruction.

Definition at line 1041 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Select.

◆ isStackAligningInlineAsm()

bool MachineInstr::isStackAligningInlineAsm ( ) const

Definition at line 859 of file MachineInstr.cpp.

References llvm::InlineAsm::Extra_IsAlignStack, llvm::MachineOperand::getImm(), getOperand(), isInlineAsm(), and llvm::InlineAsm::MIOp_ExtraInfo.

◆ isSubregToReg()

bool llvm::MachineInstr::isSubregToReg ( ) const

inline

Definition at line 1414 of file MachineInstr.h.

References getOpcode().

Referenced by isCopyLike(), and isOperandSubregIdx().

◆ isTerminator()

bool llvm::MachineInstr::isTerminator ( QueryType Type = AnyInBundle ) const

inline

Returns true if this instruction part of the terminator for a basic block.

Typically this is things like return and branch instructions.

Various passes use this to insert code into the bottom of a basic block, but before control flow occurs.

Definition at line 974 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Terminator.

Referenced by cannotCoexistAsymm(), and isSafeToMove().

◆ isTransient()

bool llvm::MachineInstr::isTransient ( ) const

inline

Return true if this is a transient instruction that is either very likely to be eliminated during register allocation (such as copy-like instructions), or if this instruction doesn't have an execution-time cost.

Definition at line 1453 of file MachineInstr.h.

References getOpcode(), and isMetaInstruction().

Referenced by llvm::TargetSchedModel::computeOperandLatency(), llvm::SchedDFSImpl::visitPostorderNode(), and llvm::SchedDFSImpl::visitPreorder().

◆ isUnconditionalBranch()

bool llvm::MachineInstr::isUnconditionalBranch ( QueryType Type = AnyInBundle ) const

inline

Return true if this is a branch which always transfers control flow to some other block.

The TargetInstrInfo::analyzeBranch method can be used to get more information about this branch.

Definition at line 1004 of file MachineInstr.h.

References isBarrier(), isBranch(), and isIndirectBranch().

Referenced by llvm::MipsInstrInfo::analyzeBranch(), and llvm::RegBankSelect::tryAvoidingSplit().

◆ isUndefDebugValue()

bool llvm::MachineInstr::isUndefDebugValue ( ) const

inline

Return true if the instruction is a debug value which describes a part of a variable as unavailable.

Definition at line 1378 of file MachineInstr.h.

References debug_operands(), and isDebugValue().

◆ isVariadic()

bool llvm::MachineInstr::isVariadic ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction can have a variable number of operands.

In this case, the variable operands will be after the normal operands but before the implicit definitions and uses (if any are present).

Definition at line 918 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::Variadic.

Referenced by getTypeToPrint().

◆ killsRegister()

bool llvm::MachineInstr::killsRegister	(	Register	Reg,
		const TargetRegisterInfo *	TRI
	)		const

inline

Return true if the MachineInstr kills the specified register.

If TargetRegisterInfo is non-null, then it also checks if there is a kill of a super-register.

Definition at line 1500 of file MachineInstr.h.

References findRegisterUseOperandIdx(), Reg, and TRI.

◆ mayAlias()

bool MachineInstr::mayAlias	(	AAResults *	AA,
		const MachineInstr &	Other,
		bool	UseTBAA
	)		const

Returns true if this instruction's memory access aliases the memory access of Other.

Assumes any physical registers used to compute addresses have the same value for both instructions. Returns false if neither instruction writes to memory.

Parameters

AA	Optional alias analysis, used to compare memory operands.
Other	MachineInstr to check aliasing against.
UseTBAA	Whether to pass TBAA information to alias analysis.

Definition at line 1410 of file MachineInstr.cpp.

References llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::MachineFunction::getFrameInfo(), llvm::TargetSubtargetInfo::getInstrInfo(), getMF(), getNumMemOperands(), llvm::MachineFunction::getSubtarget(), isCall(), mayLoadOrStore(), mayStore(), memoperands(), memoperands_empty(), MemOperandsHaveAlias(), llvm::Other, TII, and UseTBAA.

Referenced by llvm::ScheduleDAGInstrs::addChainDependency(), and mayAlias().

◆ mayFoldInlineAsmRegOp()

bool MachineInstr::mayFoldInlineAsmRegOp ( unsigned OpId ) const

Returns true if the register operand can be folded with a load or store into a frame index.

Does so by checking the InlineAsm::Flag immediate operand at OpId - 1.

Definition at line 2607 of file MachineInstr.cpp.

References assert(), F, llvm::MachineOperand::getImm(), getOperand(), llvm::MachineOperand::isImm(), isInlineAsm(), and isReg().

◆ mayLoad()

bool llvm::MachineInstr::mayLoad ( QueryType Type = AnyInBundle ) const

inline

Return true if this instruction could possibly read memory.

Instructions with this flag set are not necessarily simple load instructions, they may load a value and modify it, for example.

Definition at line 1136 of file MachineInstr.h.

References llvm::InlineAsm::Extra_MayLoad, llvm::MachineOperand::getImm(), getOperand(), hasProperty(), isInlineAsm(), llvm::MCID::MayLoad, and llvm::InlineAsm::MIOp_ExtraInfo.

Referenced by llvm::SUnit::addPredBarrier(), llvm::HexagonSubtarget::HVXMemLatencyMutation::apply(), llvm::HexagonSubtarget::BankConflictMutation::apply(), llvm::HexagonInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), llvm::AArch64InstrInfo::emitLdStWithAddr(), llvm::RISCVInstrInfo::emitLdStWithAddr(), llvm::TargetLoweringBase::emitPatchPoint(), findRenameRegForSameLdStRegPair(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::ARMBankConflictHazardRecognizer::getHazardType(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), hasOrderedMemoryRef(), isDereferenceableInvariantLoad(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), isSafeToMove(), mayLoadOrStore(), and llvm::HexagonHazardRecognizer::ShouldPreferAnother().

◆ mayLoadOrStore()

bool llvm::MachineInstr::mayLoadOrStore ( QueryType Type = AnyInBundle ) const

inline

Return true if this instruction could possibly read or modify memory.

Definition at line 1159 of file MachineInstr.h.

References mayLoad(), and mayStore().

Referenced by llvm::TargetInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::AArch64InstrInfo::areMemAccessesTriviallyDisjoint(), llvm::SIInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::LanaiInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::PPCInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::RISCVInstrInfo::areMemAccessesTriviallyDisjoint(), llvm::ARMHazardRecognizerFPMLx::getHazardType(), llvm::AArch64InstrInfo::getMemOpBaseRegImmOfsOffsetOperand(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandsWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandsWithOffsetWidth(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), llvm::AArch64InstrInfo::getMemOperandWithOffsetWidth(), hasSameValue(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), llvm::CombinerHelper::matchEqualDefs(), and mayAlias().

◆ mayRaiseFPException()

bool llvm::MachineInstr::mayRaiseFPException ( ) const

inline

Return true if this instruction could possibly raise a floating-point exception.

This is the case if the instruction is a floating-point instruction that can in principle raise an exception, as indicated by the MCID::MayRaiseFPException property, and at the same time, the instruction is used in a context where we expect floating-point exceptions are not disabled, as indicated by the NoFPExcept MI flag.

Definition at line 1169 of file MachineInstr.h.

References getFlag(), hasProperty(), llvm::MCID::MayRaiseFPException, and NoFPExcept.

Referenced by llvm::SwingSchedulerDAG::isLoopCarriedDep(), and isSafeToMove().

◆ mayStore()

bool llvm::MachineInstr::mayStore ( QueryType Type = AnyInBundle ) const

inline

Return true if this instruction could possibly modify memory.

Instructions with this flag set are not necessarily simple store instructions, they may store a modified value based on their operands, or may not actually modify anything, for example.

Definition at line 1149 of file MachineInstr.h.

References llvm::InlineAsm::Extra_MayStore, llvm::MachineOperand::getImm(), getOperand(), hasProperty(), isInlineAsm(), llvm::MCID::MayStore, and llvm::InlineAsm::MIOp_ExtraInfo.

Referenced by llvm::SUnit::addPredBarrier(), llvm::HexagonSubtarget::HVXMemLatencyMutation::apply(), llvm::HexagonSubtarget::BankConflictMutation::apply(), llvm::HexagonInstrInfo::canExecuteInBundle(), cannotCoexistAsymm(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), canRenameUpToDef(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::ARMBankConflictHazardRecognizer::getHazardType(), llvm::SIInstrInfo::getMemOperandsWithOffsetWidth(), llvm::HexagonPacketizerList::hasDualStoreDependence(), hasOrderedMemoryRef(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), isLoadFoldBarrier(), isSafeToMove(), mayAlias(), and mayLoadOrStore().

◆ memoperands()

ArrayRef< MachineMemOperand * > llvm::MachineInstr::memoperands ( ) const

inline

Access to memory operands of the instruction.

If there are none, that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Definition at line 782 of file MachineInstr.h.

References Info.

Referenced by llvm::VLIWPacketizerList::alias(), cloneMergedMemRefs(), llvm::AArch64InstrInfo::emitLdStWithAddr(), llvm::RISCVInstrInfo::emitLdStWithAddr(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::ARMBankConflictHazardRecognizer::getHazardType(), getNumMemOperands(), hasOneMemOperand(), hasOrderedMemoryRef(), isDereferenceableInvariantLoad(), mayAlias(), memoperands_begin(), memoperands_empty(), memoperands_end(), print(), llvm::SIInstrInfo::reMaterialize(), setCFIType(), setHeapAllocMarker(), setMMRAMetadata(), setPCSections(), setPostInstrSymbol(), and setPreInstrSymbol().

◆ memoperands_begin()

mmo_iterator llvm::MachineInstr::memoperands_begin ( ) const

inline

Access to memory operands of the instruction.

If memoperands_begin() == memoperands_end(), that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Definition at line 800 of file MachineInstr.h.

References memoperands().

Referenced by addMemOperand(), llvm::SystemZInstrInfo::areMemAccessesTriviallyDisjoint(), cloneMergedMemRefs(), expandLoadStackGuard(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::X86InstrInfo::foldMemoryOperandImpl(), llvm::PPCInstrInfo::getMemOperandWithOffsetWidth(), llvm::RISCVInstrInfo::getMemOperandWithOffsetWidth(), llvm::GMemOperation::getMMO(), getRestoreSize(), getSpillSize(), llvm::SwingSchedulerDAG::isLoopCarriedDep(), llvm::LegalizerHelper::lowerStore(), and memOpsHaveSameBasePtr().

◆ memoperands_empty()

bool llvm::MachineInstr::memoperands_empty ( ) const

inline

Return true if we don't have any memory operands which described the memory access done by this instruction.

If this is true, calling code must be conservative.

Definition at line 812 of file MachineInstr.h.

References memoperands().

Referenced by llvm::VLIWPacketizerList::alias(), cloneMergedMemRefs(), dropMemRefs(), hasOrderedMemoryRef(), isDereferenceableInvariantLoad(), mayAlias(), and print().

◆ memoperands_end()

mmo_iterator llvm::MachineInstr::memoperands_end ( ) const

inline

Access to memory operands of the instruction.

If memoperands_begin() == memoperands_end(), that does not imply anything about whether the function accesses memory. Instead, the caller must behave conservatively.

Definition at line 807 of file MachineInstr.h.

References memoperands().

Referenced by addMemOperand(), cloneMergedMemRefs(), and llvm::TargetInstrInfo::foldMemoryOperand().

◆ mergeFlagsWith()

uint32_t MachineInstr::mergeFlagsWith ( const MachineInstr & Other ) const

Return the MIFlags which represent both MachineInstrs.

This should be used when merging two MachineInstrs into one. This routine does not modify the MIFlags of this MachineInstr.

Definition at line 561 of file MachineInstr.cpp.

References getFlags(), and llvm::Other.

Referenced by llvm::AArch64InstrInfo::genAlternativeCodeSequence(), and genSubAdd2SubSub().

◆ modifiesRegister()

bool llvm::MachineInstr::modifiesRegister	(	Register	Reg,
		const TargetRegisterInfo *	TRI
	)		const

inline

Return true if the MachineInstr modifies (fully define or partially define) the specified register.

NOTE: It's ignoring subreg indices on virtual registers.

Definition at line 1515 of file MachineInstr.h.

References findRegisterDefOperandIdx(), Reg, and TRI.

Referenced by llvm::HexagonPacketizerList::canPromoteToNewValueStore(), llvm::checkVOPDRegConstraints(), isLdStSafeToCluster(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), and llvm::X86InstrInfo::reMaterialize().

◆ moveBefore()

void MachineInstr::moveBefore ( MachineInstr * MovePos )

Move the instruction before MovePos.

Definition at line 150 of file MachineInstr.cpp.

References llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator(), getParent(), and llvm::MachineBasicBlock::splice().

◆ operands() [1/2]

iterator_range< mop_iterator > llvm::MachineInstr::operands ( )

inline

Definition at line 685 of file MachineInstr.h.

References llvm::make_range(), operands_begin(), and operands_end().

Referenced by addRegisterDefined(), llvm::GCNDownwardRPTracker::advanceBeforeNext(), all_defs(), allDefsAreDead(), llvm::LiveRangeEdit::allUsesAvailableAt(), llvm::HexagonPacketizerList::canPromoteToNewValueStore(), canRenameUpToDef(), canUsePressureDiffs(), clearKillInfo(), clearRegisterDeads(), clearRegisterKills(), llvm::PPCInstrInfo::convertToImmediateForm(), llvm::SIFrameLowering::determineCalleeSaves(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::InstrEmitter::EmitDbgInstrRef(), llvm::GIMatchTableExecutor::executeMatchTable(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::LiveIntervals::handleMoveIntoNewBundle(), llvm::HexagonPacketizerList::hasDeadDependence(), hasRegisterImplicitUseOperand(), llvm::HexagonPacketizerList::hasRegMaskDependence(), hasWriteToReadDep(), insert(), isSafeToMove(), scavengeFrameVirtualRegsInBlock(), setPhysRegsDeadExcept(), setRegisterDefReadUndef(), substituteRegister(), and updatePhysDepsDownwards().

◆ operands() [2/2]

iterator_range< const_mop_iterator > llvm::MachineInstr::operands ( ) const

inline

Definition at line 688 of file MachineInstr.h.

References llvm::make_range(), operands_begin(), and operands_end().

◆ operands_begin() [1/2]

mop_iterator llvm::MachineInstr::operands_begin ( )

inline

Definition at line 679 of file MachineInstr.h.

References Operands.

Referenced by debug_operands(), defs(), explicit_operands(), explicit_uses(), llvm::X86InstrInfo::foldMemoryOperandImpl(), getOperandNo(), operands(), llvm::R600SchedStrategy::schedNode(), and uses().

◆ operands_begin() [2/2]

const_mop_iterator llvm::MachineInstr::operands_begin ( ) const

inline

Definition at line 682 of file MachineInstr.h.

References Operands.

◆ operands_end() [1/2]

mop_iterator llvm::MachineInstr::operands_end ( )

inline

Definition at line 680 of file MachineInstr.h.

References Operands.

Referenced by debug_operands(), implicit_operands(), operands(), llvm::R600SchedStrategy::schedNode(), and uses().

◆ operands_end() [2/2]

const_mop_iterator llvm::MachineInstr::operands_end ( ) const

inline

Definition at line 683 of file MachineInstr.h.

References Operands.

◆ operator=()

MachineInstr & llvm::MachineInstr::operator= ( const MachineInstr & )

delete

◆ peekDebugInstrNum()

unsigned llvm::MachineInstr::peekDebugInstrNum ( ) const

inline

Examine the instruction number of this MachineInstr.

May be zero if it hasn't been assigned a number yet.

Definition at line 545 of file MachineInstr.h.

Referenced by llvm::TargetInstrInfo::reassociateOps(), and llvm::MachineFunction::substituteDebugValuesForInst().

◆ print() [1/2]

void MachineInstr::print	(	raw_ostream &	OS,
		bool	IsStandalone = `true`,
		bool	SkipOpers = `false`,
		bool	SkipDebugLoc = `false`,
		bool	AddNewLine = `true`,
		const TargetInstrInfo *	TII = `nullptr`
	)		const

Print this MI to OS.

Don't print information that can be inferred from other instructions if IsStandalone is false. It is usually true when only a fragment of the function is printed. Only print the defs and the opcode if SkipOpers is true. Otherwise, also print operands if SkipDebugLoc is true. Otherwise, also print the debug loc, with a terminating newline. TII is used to print the opcode name. If it's not present, but the MI is in a function, the opcode will be printed using the function's TII.

Definition at line 1660 of file MachineInstr.cpp.

References F, llvm::MachineFunction::getFunction(), llvm::TargetSubtargetInfo::getInstrInfo(), getMFIfAvailable(), llvm::MachineFunction::getSubtarget(), llvm::ModuleSlotTracker::incorporateFunction(), OS, print(), and TII.

Referenced by dump(), llvm::ScheduleDAGInstrs::getGraphNodeLabel(), llvm::SMSchedule::print(), print(), false::Chain::str(), and llvm::DbgValueHistoryMap::trimLocationRanges().

◆ print() [2/2]

void MachineInstr::print	(	raw_ostream &	OS,
		ModuleSlotTracker &	MST,
		bool	IsStandalone = `true`,
		bool	SkipOpers = `false`,
		bool	SkipDebugLoc = `false`,
		bool	AddNewLine = `true`,
		const TargetInstrInfo *	TII = `nullptr`
	)		const

Definition at line 1678 of file MachineInstr.cpp.

◆ readsRegister()

bool llvm::MachineInstr::readsRegister	(	Register	Reg,
		const TargetRegisterInfo *	TRI
	)		const

inline

Return true if the MachineInstr reads the specified register.

If TargetRegisterInfo is non-null, then it also checks if there is a read of a super-register. This does not count partial redefines of virtual registers as reads: reg1024:6 = OP.

Definition at line 1480 of file MachineInstr.h.

References findRegisterUseOperandIdx(), Reg, and TRI.

Referenced by checkAndUpdateCCRKill(), checkAndUpdateCPSRKill(), checkCCKill(), llvm::TargetSchedModel::computeOutputLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::HexagonInstrInfo::getCompoundOpcode(), hasWriteToReadDep(), llvm::HexagonPacketizerList::isLegalToPacketizeTogether(), and llvm::RegBankSelect::tryAvoidingSplit().

◆ readsVirtualRegister()

bool llvm::MachineInstr::readsVirtualRegister ( Register Reg ) const

inline

Return true if the MachineInstr reads the specified virtual register.

Take into account that a partial define is a read-modify-write operation.

Definition at line 1487 of file MachineInstr.h.

References readsWritesVirtualRegister(), and Reg.

◆ readsWritesVirtualRegister()

std::pair< bool, bool > MachineInstr::readsWritesVirtualRegister	(	Register	Reg,
		SmallVectorImpl< unsigned > *	Ops = `nullptr`
	)		const

Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.

readsWritesVirtualRegister - Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.

This also considers partial defines. If Ops is not null, all operand indices for Reg are added.

This also considers partial defines.

Definition at line 1075 of file MachineInstr.cpp.

References getNumOperands(), getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isUndef(), llvm::MachineOperand::isUse(), and llvm::SmallVectorTemplateBase< T, bool >::push_back().

Referenced by readsVirtualRegister(), and llvm::MipsInstrInfo::SafeInFPUDelaySlot().

◆ registerDefIsDead()

bool llvm::MachineInstr::registerDefIsDead	(	Register	Reg,
		const TargetRegisterInfo *	TRI
	)		const

inline

Returns true if the register is dead in this machine instruction.

If TargetRegisterInfo is non-null, then it also checks if there is a dead def of a super-register.

Definition at line 1522 of file MachineInstr.h.

References findRegisterDefOperandIdx(), Reg, and TRI.

Referenced by transferDeadCC().

◆ removeFromBundle()

MachineInstr * MachineInstr::removeFromBundle ( )

Unlink this instruction from its basic block and return it without deleting it.

If the instruction is part of a bundle, the other instructions in the bundle remain bundled.

Definition at line 756 of file MachineInstr.cpp.

References assert(), getParent(), and llvm::MachineBasicBlock::remove_instr().

◆ removeFromParent()

MachineInstr * MachineInstr::removeFromParent ( )

Unlink 'this' from the containing basic block, and return it without deleting it.

This function can not be used on bundled instructions, use removeFromBundle() to remove individual instructions from a bundle.

Definition at line 751 of file MachineInstr.cpp.

References assert(), getParent(), and llvm::MachineBasicBlock::remove().

Referenced by llvm::WebAssemblyDebugValueManager::removeDef(), and llvm::ARMBlockPlacement::revertWhileToDoLoop().

◆ removeOperand()

void MachineInstr::removeOperand ( unsigned OpNo )

Erase an operand from an instruction, leaving it with one fewer operand than it started with.

Definition at line 294 of file MachineInstr.cpp.

References assert(), getNumOperands(), isReg(), moveOperands(), MRI, N, and untieRegOperand().

Referenced by addRegisterDead(), addRegisterKilled(), llvm::X86InstrInfo::commuteInstructionImpl(), llvm::SIInstrInfo::convertToThreeAddress(), ExpandMOVImmSExti8(), expandSHXDROT(), genAlternativeDpCodeSequence(), llvm::MipsInstrInfo::genInstrWithNewOpc(), insert(), LowerCallResults(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::SIInstrInfo::moveToVALUImpl(), llvm::AArch64InstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().

◆ setAsmPrinterFlag()

void llvm::MachineInstr::setAsmPrinterFlag ( uint8_t Flag )

inline

Set a flag for the AsmPrinter.

Definition at line 377 of file MachineInstr.h.

References assert().

Referenced by llvm::addNumImm(), llvm::SIRegisterInfo::buildSpillLoadStore(), and spillVGPRtoAGPR().

◆ setCFIType()

void MachineInstr::setCFIType	(	MachineFunction &	MF,
		uint32_t	Type
	)

Set the CFI type for the instruction.

Definition at line 527 of file MachineInstr.cpp.

References getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands().

◆ setDebugInstrNum()

void llvm::MachineInstr::setDebugInstrNum ( unsigned Num )

inline

Set instruction number of this MachineInstr.

Avoid using unless you're deserializing this information.

Definition at line 549 of file MachineInstr.h.

Referenced by llvm::TargetInstrInfo::reassociateOps().

◆ setDebugLoc()

void llvm::MachineInstr::setDebugLoc ( DebugLoc DL )

inline

Replace current source information with new such.

Avoid using this, the constructor argument is preferable.

Definition at line 1860 of file MachineInstr.h.

References assert(), and DL.

Referenced by llvm::WebAssemblyDebugValueManager::cloneSink(), expandLoadStackGuard(), and llvm::WebAssemblyDebugValueManager::sink().

◆ setDebugValueUndef()

void llvm::MachineInstr::setDebugValueUndef ( )

inline

Sets all register debug operands in this debug value instruction to be undef.

Definition at line 1970 of file MachineInstr.h.

References assert(), debug_operands(), and isDebugValue().

Referenced by performSink(), and llvm::WebAssemblyDebugValueManager::removeDef().

◆ setDesc()

void MachineInstr::setDesc ( const MCInstrDesc & TID )

Replace the instruction descriptor (thus opcode) of the current instruction with a new one.

Definition at line 143 of file MachineInstr.cpp.

References getMF(), getParent(), llvm::MachineFunction::handleChangeDesc(), and llvm::MCInstrDesc::Opcode.

Referenced by addConstantsToTrack(), llvm::X86InstrInfo::commuteInstructionImpl(), llvm::SIInstrInfo::commuteInstructionImpl(), llvm::SIInstrInfo::convertToThreeAddress(), Expand2AddrKreg(), Expand2AddrUndef(), llvm::M68kInstrInfo::ExpandCCR(), expandLoadStackGuard(), expandMOV32r1(), llvm::M68kInstrInfo::ExpandMOVI(), ExpandMOVImmSExti8(), llvm::M68kInstrInfo::ExpandMOVSZX_RM(), llvm::M68kInstrInfo::ExpandMOVX_RR(), expandNOVLXLoad(), expandNOVLXStore(), llvm::X86InstrInfo::expandPostRAPseudo(), expandSHXDROT(), expandXorFP(), genAlternativeDpCodeSequence(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::SIInstrInfo::moveToVALUImpl(), llvm::PPCInstrInfo::optimizeCmpPostRA(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::CombinerHelper::replaceOpcodeWith(), selectMergeValues(), selectUnmergeValues(), llvm::HexagonPacketizerList::shouldAddToPacket(), and llvm::X86InstrInfo::unfoldMemoryOperand().

◆ setFlag()

void llvm::MachineInstr::setFlag ( MIFlag Flag )

inline

Set a MI flag.

Definition at line 403 of file MachineInstr.h.

References assert().

Referenced by bundleWithPred(), bundleWithSucc(), emitFROUND(), emitQuietFCMP(), fuseInst(), and transferMIFlag().

◆ setFlags()

void llvm::MachineInstr::setFlags ( unsigned flags )

inline

Definition at line 409 of file MachineInstr.h.

References assert(), BundledPred, and BundledSucc.

Referenced by llvm::TargetInstrInfo::reassociateOps().

◆ setHeapAllocMarker()

void MachineInstr::setHeapAllocMarker	(	MachineFunction &	MF,
		MDNode *	MD
	)

Set a marker on instructions that denotes where we should create and emit heap alloc site labels.

This waits until after instruction selection and optimizations to create the label, so it should still work if the instruction is removed or duplicated.

Definition at line 508 of file MachineInstr.cpp.

References getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands().

Referenced by cloneInstrSymbols(), and llvm::FastISel::lowerCallTo().

◆ setMemRefs()

void MachineInstr::setMemRefs	(	MachineFunction &	MF,
		ArrayRef< MachineMemOperand * >	MemRefs
	)

Assign this MachineInstr's memory reference descriptor list.

Unlike other methods, this will allocate them into a new array associated with the provided MachineFunction.

Definition at line 369 of file MachineInstr.cpp.

References dropMemRefs(), llvm::ArrayRef< T >::empty(), getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), and getPreInstrSymbol().

Referenced by addMemOperand(), cloneMemRefs(), cloneMergedMemRefs(), and llvm::TargetInstrInfo::foldMemoryOperand().

◆ setMMRAMetadata()

void MachineInstr::setMMRAMetadata	(	MachineFunction &	MF,
		MDNode *	MMRAs
	)

Definition at line 536 of file MachineInstr.cpp.

References getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands().

Referenced by cloneInstrSymbols().

◆ setPCSections()

void MachineInstr::setPCSections	(	MachineFunction &	MF,
		MDNode *	MD
	)

Definition at line 517 of file MachineInstr.cpp.

References getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands().

Referenced by cloneInstrSymbols().

◆ setPhysRegsDeadExcept()

void MachineInstr::setPhysRegsDeadExcept	(	ArrayRef< Register >	UsedRegs,
		const TargetRegisterInfo &	TRI
	)

Mark every physreg used by this instruction as dead except those in the UsedRegs list.

On instructions with register mask operands, also add implicit-def operands for all registers in UsedRegs.

Definition at line 2161 of file MachineInstr.cpp.

References addRegisterDefined(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), llvm::MachineOperand::isRegMask(), llvm::none_of(), operands(), llvm::MachineOperand::setIsDead(), and TRI.

Referenced by llvm::FastISel::lowerCallTo(), and llvm::FastISel::selectPatchpoint().

◆ setPostInstrSymbol()

void MachineInstr::setPostInstrSymbol	(	MachineFunction &	MF,
		MCSymbol *	Symbol
	)

Set a symbol that will be emitted just after the instruction itself.

Setting this to a null pointer will remove any such symbol.

FIXME: This is not fully implemented yet.

Definition at line 492 of file MachineInstr.cpp.

References getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands().

Referenced by cloneInstrSymbols(), and llvm::SIInstrInfo::insertIndirectBranch().

◆ setPreInstrSymbol()

void MachineInstr::setPreInstrSymbol	(	MachineFunction &	MF,
		MCSymbol *	Symbol
	)

Set a symbol that will be emitted just prior to the instruction itself.

Setting this to a null pointer will remove any such symbol.

FIXME: This is not fully implemented yet.

Definition at line 476 of file MachineInstr.cpp.

References getCFIType(), getHeapAllocMarker(), getMMRAMetadata(), getPCSections(), getPostInstrSymbol(), getPreInstrSymbol(), and memoperands().

Referenced by cloneInstrSymbols().

◆ setRegisterDefReadUndef()

void MachineInstr::setRegisterDefReadUndef	(	Register	Reg,
		bool	IsUndef = `true`
	)

Mark all subregister defs of register Reg with the undef flag.

This function is used when we determined to have a subregister def in an otherwise undefined super register.

Definition at line 2135 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::getSubReg(), llvm::MachineOperand::isDef(), llvm::MachineOperand::isReg(), operands(), and llvm::MachineOperand::setIsUndef().

Referenced by llvm::RegisterOperands::adjustLaneLiveness().

◆ shouldUpdateCallSiteInfo()

bool MachineInstr::shouldUpdateCallSiteInfo ( ) const

Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see copyCallSiteInfo, moveCallSiteInfo, eraseCallSiteInfo).

Definition at line 784 of file MachineInstr.cpp.

References AnyInBundle, isBundle(), and isCandidateForCallSiteEntry().

Referenced by llvm::MachineFunction::cloneMachineInstrBundle(), llvm::MachineFunction::copyCallSiteInfo(), and llvm::MachineFunction::moveCallSiteInfo().

◆ substituteRegister()

void MachineInstr::substituteRegister	(	Register	FromReg,
		Register	ToReg,
		unsigned	SubIdx,
		const TargetRegisterInfo &	RegInfo
	)

Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessary.

Definition at line 1273 of file MachineInstr.cpp.

References llvm::MachineOperand::getReg(), llvm::TargetRegisterInfo::getSubReg(), llvm::Register::isPhysical(), llvm::MachineOperand::isReg(), operands(), llvm::MachineOperand::substPhysReg(), and llvm::MachineOperand::substVirtReg().

Referenced by llvm::X86InstrInfo::reMaterialize().

◆ tieOperands()

void MachineInstr::tieOperands	(	unsigned	DefIdx,
		unsigned	UseIdx
	)

Add a tie between the register operands at DefIdx and UseIdx.

tieOperands - Mark operands at DefIdx and UseIdx as tied to each other.

The tie will cause the register allocator to ensure that the two operands are assigned the same physical register.

Tied operands are managed automatically for explicit operands in the MCInstrDesc. This method is for exceptional cases like inline asm.

Use and def operands can be tied together, indicated by a non-zero TiedTo field. TiedTo can have these values:

0: Operand is not tied to anything. 1 to TiedMax-1: Tied to getOperand(TiedTo-1). TiedMax: Tied to an operand >= TiedMax-1.

The tied def must be one of the first TiedMax operands on a normal instruction. INLINEASM instructions allow more tied defs.

Definition at line 1162 of file MachineInstr.cpp.

References assert(), getOpcode(), getOperand(), llvm::MachineOperand::isDef(), isInlineAsm(), llvm::MachineOperand::isTied(), llvm::MachineOperand::isUse(), and TiedMax.

Referenced by addOperand(), llvm::SIInstrInfo::copyPhysReg(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::SIInstrInfo::expandPostRAPseudo(), foldPatchpoint(), insert(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), llvm::LanaiInstrInfo::optimizeSelect(), and llvm::ARMBaseInstrInfo::optimizeSelect().

◆ unbundleFromPred()

void MachineInstr::unbundleFromPred ( )

Break bundle above this instruction.

Definition at line 841 of file MachineInstr.cpp.

References assert(), BundledPred, BundledSucc, clearFlag(), llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator(), and isBundledWithPred().

Referenced by moveInstrOut().

◆ unbundleFromSucc()

void MachineInstr::unbundleFromSucc ( )

Break bundle below this instruction.

Definition at line 850 of file MachineInstr.cpp.

References assert(), BundledPred, BundledSucc, clearFlag(), llvm::ilist_node_impl< ilist_detail::compute_node_options< T, Options... >::type >::getIterator(), and isBundledWithSucc().

◆ untieRegOperand()

void llvm::MachineInstr::untieRegOperand ( unsigned OpIdx )

inline

Break any tie involving OpIdx.

Definition at line 1949 of file MachineInstr.h.

References findTiedOperandIdx(), getOperand(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::isTied().

Referenced by genAlternativeDpCodeSequence(), insert(), llvm::SIInstrInfo::moveFlatAddrToVGPR(), and removeOperand().

◆ uses() [1/2]

iterator_range< mop_iterator > llvm::MachineInstr::uses ( )

inline

Returns a range that includes all operands that are register uses.

This may include unrelated operands which are not register uses.

Definition at line 733 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), operands_begin(), and operands_end().

Referenced by all_uses(), llvm::checkVOPDRegConstraints(), collectCallSiteParameters(), llvm::PPCInstrInfo::getConstantFromConstantPool(), llvm::SPIRVGlobalRegistry::getSPIRVTypeID(), hasSameValue(), llvm::StatepointOpers::isFoldableReg(), isGuaranteedNotToBeUndefOrPoison(), llvm::isKnownNeverNaN(), LowerCallResults(), and llvm::CombinerHelper::matchFreezeOfSingleMaybePoisonOperand().

◆ uses() [2/2]

iterator_range< const_mop_iterator > llvm::MachineInstr::uses ( ) const

inline

Returns a range that includes all operands that are register uses.

This may include unrelated operands which are not register uses.

Definition at line 737 of file MachineInstr.h.

References getNumExplicitDefs(), llvm::make_range(), operands_begin(), and operands_end().

◆ usesCustomInsertionHook()

bool llvm::MachineInstr::usesCustomInsertionHook ( QueryType Type = IgnoreBundle ) const

inline

Return true if this instruction requires custom insertion support when the DAG scheduler is inserting it into a machine basic block.

If this is true for the instruction, it basically means that it is a pseudo instruction used at SelectionDAG time that is expanded out into magic code by the target when MachineInstrs are formed.

If this is true, the TargetLoweringInfo::InsertAtEndOfBasicBlock method is used to insert this into the MachineBasicBlock.

Definition at line 1218 of file MachineInstr.h.

References hasProperty(), and llvm::MCID::UsesCustomInserter.

Friends And Related Function Documentation

◆ ilist_callback_traits< MachineBasicBlock >

friend struct ilist_callback_traits< MachineBasicBlock >

friend

Definition at line 308 of file MachineInstr.h.

◆ ilist_traits< MachineInstr >

friend struct ilist_traits< MachineInstr >

friend

Definition at line 308 of file MachineInstr.h.

◆ MachineFunction

friend class MachineFunction

friend

Definition at line 326 of file MachineInstr.h.

The documentation for this class was generated from the following files:

include/llvm/CodeGen/MachineInstr.h
lib/CodeGen/MachineInstr.cpp

Public Types

Public Member Functions

Static Public Member Functions

Friends

Additional Inherited Members

Detailed Description

Member Typedef Documentation

◆ const_mop_iterator

◆ filtered_const_mop_iterator

◆ filtered_mop_iterator

◆ mmo_iterator

◆ mop_iterator

Member Enumeration Documentation

◆ CommentFlag

◆ MICheckType

◆ MIFlag

◆ QueryType

Constructor & Destructor Documentation

◆ MachineInstr()

◆ ~MachineInstr()

Member Function Documentation

◆ addImplicitDefUseOperands()

◆ addMemOperand()

◆ addOperand() [1/2]

◆ addOperand() [2/2]

◆ addRegisterDead()

◆ addRegisterDefined()

◆ addRegisterKilled()

◆ all_defs() [1/2]

◆ all_defs() [2/2]

◆ all_uses() [1/2]

◆ all_uses() [2/2]

◆ allDefsAreDead()

◆ allImplicitDefsAreDead()

◆ bundleWithPred()

◆ bundleWithSucc()

◆ canFoldAsLoad()

◆ changeDebugValuesDefReg()

◆ clearAsmPrinterFlag()

◆ clearAsmPrinterFlags()

◆ clearFlag()

◆ clearFlags()

◆ clearKillInfo()

◆ clearRegisterDeads()

◆ clearRegisterKills()

◆ cloneInstrSymbols()

◆ cloneMemRefs()

◆ cloneMergedMemRefs()

◆ collectDebugValues()

◆ copyFlagsFromInstruction()

◆ copyImplicitOps()

◆ copyIRFlags()

◆ debug_operands() [1/2]

◆ debug_operands() [2/2]

◆ definesRegister()

◆ defs() [1/2]

◆ defs() [2/2]

◆ dropDebugNumber()

◆ dropMemRefs()

◆ dump()

◆ dumpr()

◆ emitError()

◆ eraseFromBundle()

◆ eraseFromParent()

◆ explicit_operands() [1/2]

◆ explicit_operands() [2/2]

◆ explicit_uses() [1/2]

◆ explicit_uses() [2/2]

◆ findFirstPredOperandIdx()

◆ findInlineAsmFlagIdx()

◆ findRegisterDefOperand() [1/2]

◆ findRegisterDefOperand() [2/2]

◆ findRegisterDefOperandIdx()

◆ findRegisterUseOperand() [1/2]

◆ findRegisterUseOperand() [2/2]

◆ findRegisterUseOperandIdx()

◆ findTiedOperandIdx()

◆ getAsmPrinterFlag()

◆ getAsmPrinterFlags()

◆ getBundleSize()