15#ifndef LLVM_CODEGEN_MACHINEINSTR_H
16#define LLVM_CODEGEN_MACHINEINSTR_H
48class MachineBasicBlock;
50class MachineRegisterInfo;
51class ModuleSlotTracker;
53template <
typename T>
class SmallVectorImpl;
57class TargetRegisterClass;
58class TargetRegisterInfo;
69 ilist_sentinel_tracking<true>> {
129#define LLVM_MI_NUMOPERANDS_BITS 24
130#define LLVM_MI_FLAGS_BITS 24
131#define LLVM_MI_ASMPRINTERFLAGS_BITS 8
138 using OperandCapacity = ArrayRecycler<MachineOperand>::Capacity;
139 OperandCapacity CapOperands;
155 class ExtraInfo final : TrailingObjects<ExtraInfo, MachineMemOperand *,
156 MCSymbol *, MDNode *, uint32_t> {
159 ArrayRef<MachineMemOperand *> MMOs,
160 MCSymbol *PreInstrSymbol =
nullptr,
161 MCSymbol *PostInstrSymbol =
nullptr,
162 MDNode *HeapAllocMarker =
nullptr,
163 MDNode *PCSections =
nullptr,
165 bool HasPreInstrSymbol = PreInstrSymbol !=
nullptr;
166 bool HasPostInstrSymbol = PostInstrSymbol !=
nullptr;
167 bool HasHeapAllocMarker = HeapAllocMarker !=
nullptr;
168 bool HasCFIType = CFIType != 0;
169 bool HasPCSections = PCSections !=
nullptr;
171 totalSizeToAlloc<MachineMemOperand *, MCSymbol *, MDNode *, uint32_t>(
172 MMOs.size(), HasPreInstrSymbol + HasPostInstrSymbol,
173 HasHeapAllocMarker + HasPCSections, HasCFIType),
175 ExtraInfo(MMOs.size(), HasPreInstrSymbol, HasPostInstrSymbol,
176 HasHeapAllocMarker, HasPCSections, HasCFIType);
179 std::copy(MMOs.begin(), MMOs.end(),
180 Result->getTrailingObjects<MachineMemOperand *>());
182 if (HasPreInstrSymbol)
183 Result->getTrailingObjects<MCSymbol *>()[0] = PreInstrSymbol;
184 if (HasPostInstrSymbol)
185 Result->getTrailingObjects<MCSymbol *>()[HasPreInstrSymbol] =
187 if (HasHeapAllocMarker)
188 Result->getTrailingObjects<MDNode *>()[0] = HeapAllocMarker;
190 Result->getTrailingObjects<MDNode *>()[HasHeapAllocMarker] =
193 Result->getTrailingObjects<
uint32_t>()[0] = CFIType;
198 ArrayRef<MachineMemOperand *> getMMOs()
const {
199 return ArrayRef(getTrailingObjects<MachineMemOperand *>(), NumMMOs);
202 MCSymbol *getPreInstrSymbol()
const {
203 return HasPreInstrSymbol ? getTrailingObjects<MCSymbol *>()[0] :
nullptr;
206 MCSymbol *getPostInstrSymbol()
const {
207 return HasPostInstrSymbol
208 ? getTrailingObjects<MCSymbol *>()[HasPreInstrSymbol]
212 MDNode *getHeapAllocMarker()
const {
213 return HasHeapAllocMarker ? getTrailingObjects<MDNode *>()[0] :
nullptr;
216 MDNode *getPCSections()
const {
218 ? getTrailingObjects<MDNode *>()[HasHeapAllocMarker]
223 return HasCFIType ? getTrailingObjects<uint32_t>()[0] : 0;
227 friend TrailingObjects;
235 const bool HasPreInstrSymbol;
236 const bool HasPostInstrSymbol;
237 const bool HasHeapAllocMarker;
238 const bool HasPCSections;
239 const bool HasCFIType;
242 size_t numTrailingObjects(OverloadToken<MachineMemOperand *>)
const {
245 size_t numTrailingObjects(OverloadToken<MCSymbol *>)
const {
246 return HasPreInstrSymbol + HasPostInstrSymbol;
248 size_t numTrailingObjects(OverloadToken<MDNode *>)
const {
249 return HasHeapAllocMarker + HasPCSections;
251 size_t numTrailingObjects(OverloadToken<uint32_t>)
const {
257 ExtraInfo(
int NumMMOs,
bool HasPreInstrSymbol,
bool HasPostInstrSymbol,
258 bool HasHeapAllocMarker,
bool HasPCSections,
bool HasCFIType)
259 : NumMMOs(NumMMOs), HasPreInstrSymbol(HasPreInstrSymbol),
260 HasPostInstrSymbol(HasPostInstrSymbol),
261 HasHeapAllocMarker(HasHeapAllocMarker), HasPCSections(HasPCSections),
262 HasCFIType(HasCFIType) {}
268 enum ExtraInfoInlineKinds {
271 EIIK_PostInstrSymbol,
280 PointerSumType<ExtraInfoInlineKinds,
281 PointerSumTypeMember<EIIK_MMO, MachineMemOperand *>,
282 PointerSumTypeMember<EIIK_PreInstrSymbol, MCSymbol *>,
283 PointerSumTypeMember<EIIK_PostInstrSymbol, MCSymbol *>,
284 PointerSumTypeMember<EIIK_OutOfLine, ExtraInfo *>>
291 unsigned DebugInstrNum;
316 return Op.isReg() &&
Op.isDef();
320 return Op.isReg() &&
Op.isUse();
354 assert(isUInt<LLVM_MI_ASMPRINTERFLAGS_BITS>(
unsigned(Flag)) &&
355 "Flag is out of range for the AsmPrinterFlags field");
356 return AsmPrinterFlags & Flag;
361 assert(isUInt<LLVM_MI_ASMPRINTERFLAGS_BITS>(
unsigned(Flag)) &&
362 "Flag is out of range for the AsmPrinterFlags field");
363 AsmPrinterFlags |= Flag;
368 assert(isUInt<LLVM_MI_ASMPRINTERFLAGS_BITS>(
unsigned(Flag)) &&
369 "Flag is out of range for the AsmPrinterFlags field");
370 AsmPrinterFlags &= ~Flag;
380 assert(isUInt<LLVM_MI_FLAGS_BITS>(
unsigned(Flag)) &&
381 "Flag is out of range for the Flags field");
387 assert(isUInt<LLVM_MI_FLAGS_BITS>(
unsigned(Flag)) &&
388 "Flag is out of range for the Flags field");
393 assert(isUInt<LLVM_MI_FLAGS_BITS>(flags) &&
394 "flags to be set are out of range for the Flags field");
397 Flags = (Flags & Mask) | (flags & ~Mask);
402 assert(isUInt<LLVM_MI_FLAGS_BITS>(
unsigned(Flag)) &&
403 "Flag to clear is out of range for the Flags field");
578 return Op.isReg() &&
Op.getReg() ==
Reg;
584 template <
typename Operand,
typename Instruction>
588 std::function<
bool(Operand &
Op)> OpUsesReg(
589 [
Reg](Operand &
Op) {
return Op.isReg() &&
Op.getReg() ==
Reg; });
601 return MachineInstr::getDebugOperandsForReg<MachineOperand, MachineInstr>(
622 if (MO.isDef() && MO.isImplicit())
763 if (
Info.is<EIIK_MMO>())
766 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
767 return EI->getMMOs();
803 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
804 return EI->getPreInstrSymbol();
815 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
816 return EI->getPostInstrSymbol();
825 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
826 return EI->getHeapAllocMarker();
835 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
836 return EI->getPCSections();
845 if (ExtraInfo *EI =
Info.get<EIIK_OutOfLine>())
846 return EI->getCFIType();
867 "MCFlag out of range for bit mask in getFlags/hasPropertyInBundle.");
873 return hasPropertyInBundle(1ULL << MCFlag,
Type);
1291 return getOpcode() == TargetOpcode::ANNOTATION_LABEL;
1300 return getOpcode() == TargetOpcode::CFI_INSTRUCTION;
1304 return getOpcode() == TargetOpcode::PSEUDO_PROBE;
1311 return getOpcode() == TargetOpcode::DBG_VALUE;
1314 return getOpcode() == TargetOpcode::DBG_VALUE_LIST;
1351 if (
Op.isReg() && !
Op.getReg().isValid())
1357 return getOpcode() == TargetOpcode::JUMP_TABLE_DEBUG_INFO;
1361 return getOpcode() == TargetOpcode::PHI ||
1367 return getOpcode() == TargetOpcode::INLINEASM ||
1368 getOpcode() == TargetOpcode::INLINEASM_BR;
1379 return getOpcode() == TargetOpcode::INSERT_SUBREG;
1383 return getOpcode() == TargetOpcode::SUBREG_TO_REG;
1387 return getOpcode() == TargetOpcode::REG_SEQUENCE;
1391 return getOpcode() == TargetOpcode::BUNDLE;
1395 return getOpcode() == TargetOpcode::COPY;
1403 return getOpcode() == TargetOpcode::EXTRACT_SUBREG;
1426 case TargetOpcode::PHI:
1427 case TargetOpcode::G_PHI:
1428 case TargetOpcode::COPY:
1429 case TargetOpcode::INSERT_SUBREG:
1430 case TargetOpcode::SUBREG_TO_REG:
1431 case TargetOpcode::REG_SEQUENCE:
1531 bool isDead =
false,
bool Overlap =
false,
1538 bool Overlap =
false,
1546 bool Overlap =
false,
1549 Reg, isDead, Overlap,
TRI);
1591 bool ExploreBundle =
false)
const;
1613 void tieOperands(
unsigned DefIdx,
unsigned UseIdx);
1625 unsigned *UseOpIdx =
nullptr)
const {
1638 unsigned *DefOpIdx =
nullptr)
const {
1661 bool AddIfNotFound =
false);
1672 bool AddIfNotFound =
false);
1753 std::optional<LocationSize>
1760 std::optional<LocationSize>
1788 bool SkipDebugLoc =
false,
bool AddNewLine =
true,
1791 bool SkipOpers =
false,
bool SkipDebugLoc =
false,
1792 bool AddNewLine =
true,
1798 unsigned MaxDepth = UINT_MAX)
const;
1833 DbgLoc = std::move(
DL);
1834 assert(DbgLoc.hasTrivialDestructor() &&
"Expected trivial destructor");
1964 std::tuple<Register, Register, Register, Register, Register>
1977 std::tuple<Register, LLT, Register, LLT, Register, LLT>
1979 std::tuple<Register, LLT, Register, LLT, Register, LLT, Register, LLT>
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Analysis containing CSE Info
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
This file defines DenseMapInfo traits for DenseMap.
const HexagonInstrInfo * TII
static const unsigned MaxDepth
mir Rename Register Operands
#define LLVM_MI_ASMPRINTERFLAGS_BITS
#define LLVM_MI_FLAGS_BITS
#define LLVM_MI_NUMOPERANDS_BITS
unsigned const TargetRegisterInfo * TRI
Promote Memory to Register
This file provides utility analysis objects describing memory locations.
static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isImm(const MachineOperand &MO, MachineRegisterInfo *MRI)
static cl::opt< bool > UseTBAA("use-tbaa-in-sched-mi", cl::Hidden, cl::init(true), cl::desc("Enable use of TBAA during MI DAG construction"))
This header defines support for implementing classes that have some trailing object (or arrays of obj...
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
This class represents an Operation in the Expression.
Describe properties that are true of each instruction in the target description file.
uint64_t getFlags() const
Return flags of this instruction.
ArrayRef< MCPhysReg > implicit_defs() const
Return a list of registers that are potentially written by any instance of this machine instruction.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Representation of each machine instruction.
int findRegisterUseOperandIdx(Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
Returns the operand index that is a use of the specific register or -1 if it is not found.
mop_iterator operands_begin()
bool mayRaiseFPException() const
Return true if this instruction could possibly raise a floating-point exception.
bool killsRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr kills the specified register.
std::tuple< Register, Register, Register, Register, Register > getFirst5Regs() const
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
unsigned getNumImplicitOperands() const
Returns the implicit operands number.
bool isReturn(QueryType Type=AnyInBundle) const
void setRegisterDefReadUndef(Register Reg, bool IsUndef=true)
Mark all subregister defs of register Reg with the undef flag.
static iterator_range< filter_iterator< Operand *, std::function< bool(Operand &Op)> > > getDebugOperandsForReg(Instruction *MI, Register Reg)
Returns a range of all of the operands that correspond to a debug use of Reg.
bool hasDebugOperandForReg(Register Reg) const
Returns whether this debug value has at least one debug operand with the register Reg.
bool isDebugValueList() const
iterator_range< mop_iterator > explicit_uses()
void bundleWithPred()
Bundle this instruction with its predecessor.
CommentFlag
Flags to specify different kinds of comments to output in assembly code.
void setDebugValueUndef()
Sets all register debug operands in this debug value instruction to be undef.
bool isSafeToMove(AAResults *AA, bool &SawStore) const
Return true if it is safe to move this instruction.
bool isTerminator(QueryType Type=AnyInBundle) const
Returns true if this instruction part of the terminator for a basic block.
bool hasExtraDefRegAllocReq(QueryType Type=AnyInBundle) const
Returns true if this instruction def operands have special register allocation requirements that are ...
std::tuple< Register, Register, Register, Register > getFirst4Regs() const
bool isImplicitDef() const
std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT, Register, LLT > getFirst5RegLLTs() const
iterator_range< const_mop_iterator > uses() const
Returns a range that includes all operands that are register uses.
bool mayLoadOrStore(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read or modify memory.
void setCFIType(MachineFunction &MF, uint32_t Type)
Set the CFI type for the instruction.
MachineInstr * removeFromParent()
Unlink 'this' from the containing basic block, and return it without deleting it.
void clearAsmPrinterFlags()
Clear the AsmPrinter bitvector.
iterator_range< mop_iterator > debug_operands()
Returns a range over all operands that are used to determine the variable location for this DBG_VALUE...
const MachineBasicBlock * getParent() const
bool isCopyLike() const
Return true if the instruction behaves like a copy.
void dropDebugNumber()
Drop any variable location debugging information associated with this instruction.
void bundleWithSucc()
Bundle this instruction with its successor.
uint32_t getCFIType() const
Helper to extract a CFI type hash if one has been added.
int findRegisterDefOperandIdx(Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const
Returns the operand index that is a def of the specified register or -1 if it is not found.
bool isDebugLabel() const
void setPreInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just prior to the instruction itself.
bool isDebugOffsetImm() const
bool hasProperty(unsigned MCFlag, QueryType Type=AnyInBundle) const
Return true if the instruction (or in the case of a bundle, the instructions inside the bundle) has t...
bool isDereferenceableInvariantLoad() const
Return true if this load instruction never traps and points to a memory location whose value doesn't ...
void setFlags(unsigned flags)
MachineFunction * getMF()
QueryType
API for querying MachineInstr properties.
bool isPredicable(QueryType Type=AllInBundle) const
Return true if this instruction has a predicate operand that controls execution.
void addImplicitDefUseOperands(MachineFunction &MF)
Add all implicit def and use operands to this instruction.
bool isBarrier(QueryType Type=AnyInBundle) const
Returns true if the specified instruction stops control flow from executing the instruction immediate...
std::tuple< LLT, LLT, LLT, LLT, LLT > getFirst5LLTs() const
MachineBasicBlock * getParent()
bool isSelect(QueryType Type=IgnoreBundle) const
Return true if this instruction is a select instruction.
bool isCall(QueryType Type=AnyInBundle) const
std::tuple< Register, LLT, Register, LLT, Register, LLT > getFirst3RegLLTs() const
bool usesCustomInsertionHook(QueryType Type=IgnoreBundle) const
Return true if this instruction requires custom insertion support when the DAG scheduler is inserting...
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
void clearAsmPrinterFlag(CommentFlag Flag)
Clear specific AsmPrinter flags.
uint32_t mergeFlagsWith(const MachineInstr &Other) const
Return the MIFlags which represent both MachineInstrs.
const MachineOperand & getDebugExpressionOp() const
Return the operand for the complex address expression referenced by this DBG_VALUE instruction.
std::pair< bool, bool > readsWritesVirtualRegister(Register Reg, SmallVectorImpl< unsigned > *Ops=nullptr) const
Return a pair of bools (reads, writes) indicating if this instruction reads or writes Reg.
bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx=nullptr) const
Return true if the use operand of the specified index is tied to a def operand.
iterator_range< mop_iterator > uses()
Returns a range that includes all operands that are register uses.
bool allImplicitDefsAreDead() const
Return true if all the implicit defs of this instruction are dead.
void cloneMemRefs(MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr's memory reference descriptor list and replace ours with it.
iterator_range< const_mop_iterator > explicit_uses() const
const TargetRegisterClass * getRegClassConstraintEffectForVReg(Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, bool ExploreBundle=false) const
Applies the constraints (def/use) implied by this MI on Reg to the given CurRC.
iterator_range< filtered_mop_iterator > all_uses()
Returns an iterator range over all operands that are (explicit or implicit) register uses.
bool isDebugInstr() const
unsigned getNumDebugOperands() const
Returns the total number of operands which are debug locations.
unsigned getNumOperands() const
Retuns the total number of operands.
void setDebugInstrNum(unsigned Num)
Set instruction number of this MachineInstr.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
iterator_range< const_mop_iterator > explicit_operands() const
MachineInstr * removeFromBundle()
Unlink this instruction from its basic block and return it without deleting it.
const MachineOperand * const_mop_iterator
void dumpr(const MachineRegisterInfo &MRI, unsigned MaxDepth=UINT_MAX) const
Print on dbgs() the current instruction and the instructions defining its operands and so on until we...
bool getAsmPrinterFlag(CommentFlag Flag) const
Return whether an AsmPrinter flag is set.
void copyIRFlags(const Instruction &I)
Copy all flags to MachineInst MIFlags.
bool isDebugValueLike() const
bool memoperands_empty() const
Return true if we don't have any memory operands which described the memory access done by this instr...
mmo_iterator memoperands_end() const
Access to memory operands of the instruction.
bool isAnnotationLabel() const
void collectDebugValues(SmallVectorImpl< MachineInstr * > &DbgValues)
Scan instructions immediately following MI and collect any matching DBG_VALUEs.
bool modifiesRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr modifies (fully define or partially define) the specified register.
MachineOperand & getDebugOffset()
iterator_range< mop_iterator > explicit_operands()
unsigned peekDebugInstrNum() const
Examine the instruction number of this MachineInstr.
iterator_range< const_mop_iterator > defs() const
Returns a range over all explicit operands that are register definitions.
bool registerDefIsDead(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Returns true if the register is dead in this machine instruction.
std::optional< LocationSize > getRestoreSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a restore instruction.
unsigned getOperandNo(const_mop_iterator I) const
Returns the number of the operand iterator I points to.
bool mayAlias(AAResults *AA, const MachineInstr &Other, bool UseTBAA) const
Returns true if this instruction's memory access aliases the memory access of Other.
unsigned getNumExplicitOperands() const
Returns the number of non-implicit operands.
bool isSubregToReg() const
bool isCompare(QueryType Type=IgnoreBundle) const
Return true if this instruction is a comparison.
bool hasImplicitDef() const
Returns true if the instruction has implicit definition.
bool isBranch(QueryType Type=AnyInBundle) const
Returns true if this is a conditional, unconditional, or indirect branch.
void setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand * > MemRefs)
Assign this MachineInstr's memory reference descriptor list.
bool isBundledWithPred() const
Return true if this instruction is part of a bundle, and it is not the first instruction in the bundl...
MachineOperand & getOperand(unsigned i)
std::tuple< LLT, LLT > getFirst2LLTs() const
std::optional< LocationSize > getFoldedSpillSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a folded spill instruction.
const_mop_iterator operands_end() const
void unbundleFromPred()
Break bundle above this instruction.
void copyImplicitOps(MachineFunction &MF, const MachineInstr &MI)
Copy implicit register operands from specified instruction to this instruction.
bool hasPostISelHook(QueryType Type=IgnoreBundle) const
Return true if this instruction requires adjustment after instruction selection by calling a target h...
bool mayLoad(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly read memory.
void setAsmPrinterFlag(uint8_t Flag)
Set a flag for the AsmPrinter.
bool isDebugOrPseudoInstr() const
bool isStackAligningInlineAsm() const
bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx=nullptr) const
Given the index of a register def operand, check if the register def is tied to a source operand,...
void dropMemRefs(MachineFunction &MF)
Clear this MachineInstr's memory reference descriptor list.
mop_iterator operands_end()
bool shouldUpdateCallSiteInfo() const
Return true if copying, moving, or erasing this instruction requires updating Call Site Info (see cop...
MDNode * getPCSections() const
Helper to extract PCSections metadata target sections.
bool isCFIInstruction() const
int findFirstPredOperandIdx() const
Find the index of the first operand in the operand list that is used to represent the predicate.
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
unsigned getBundleSize() const
Return the number of instructions inside the MI bundle, excluding the bundle header.
bool hasExtraSrcRegAllocReq(QueryType Type=AnyInBundle) const
Returns true if this instruction source operands have special register allocation requirements that a...
iterator_range< filtered_const_mop_iterator > all_uses() const
Returns an iterator range over all operands that are (explicit or implicit) register uses.
bool isCommutable(QueryType Type=IgnoreBundle) const
Return true if this may be a 2- or 3-address instruction (of the form "X = op Y, Z,...
MachineInstr & operator=(const MachineInstr &)=delete
void cloneMergedMemRefs(MachineFunction &MF, ArrayRef< const MachineInstr * > MIs)
Clone the merge of multiple MachineInstrs' memory reference descriptors list and replace ours with it...
bool isConditionalBranch(QueryType Type=AnyInBundle) const
Return true if this is a branch which may fall through to the next instruction or may transfer contro...
iterator_range< const_mop_iterator > debug_operands() const
Returns a range over all operands that are used to determine the variable location for this DBG_VALUE...
bool isNotDuplicable(QueryType Type=AnyInBundle) const
Return true if this instruction cannot be safely duplicated.
std::tuple< Register, LLT, Register, LLT, Register, LLT, Register, LLT > getFirst4RegLLTs() const
std::tuple< Register, LLT, Register, LLT > getFirst2RegLLTs() const
unsigned getNumMemOperands() const
Return the number of memory operands.
void clearFlag(MIFlag Flag)
clearFlag - Clear a MI flag.
std::optional< LocationSize > getFoldedRestoreSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a folded restore instruction.
unsigned isConstantValuePHI() const
If the specified instruction is a PHI that always merges together the same virtual register,...
uint8_t getAsmPrinterFlags() const
Return the asm printer flags bitvector.
const TargetRegisterClass * getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Applies the constraints (def/use) implied by the OpIdx operand to the given CurRC.
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
InlineAsm::AsmDialect getInlineAsmDialect() const
bool hasUnmodeledSideEffects() const
Return true if this instruction has side effects that are not modeled by mayLoad / mayStore,...
bool isEquivalentDbgInstr(const MachineInstr &Other) const
Returns true if this instruction is a debug instruction that represents an identical debug value to O...
bool isRegSequence() const
bool isExtractSubregLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic EXTRACT_SUBREG instructions.
const DILabel * getDebugLabel() const
Return the debug label referenced by this DBG_LABEL instruction.
void untieRegOperand(unsigned OpIdx)
Break any tie involving OpIdx.
const_mop_iterator operands_begin() const
static uint32_t copyFlagsFromInstruction(const Instruction &I)
void insert(mop_iterator InsertBefore, ArrayRef< MachineOperand > Ops)
Inserts Ops BEFORE It. Can untie/retie tied operands.
void setDesc(const MCInstrDesc &TID)
Replace the instruction descriptor (thus opcode) of the current instruction with a new one.
bool isUnconditionalBranch(QueryType Type=AnyInBundle) const
Return true if this is a branch which always transfers control flow to some other block.
bool isJumpTableDebugInfo() const
std::tuple< Register, Register, Register > getFirst3Regs() const
unsigned getNumExplicitDefs() const
Returns the number of non-implicit definitions.
void eraseFromBundle()
Unlink 'this' from its basic block and delete it.
bool hasDelaySlot(QueryType Type=AnyInBundle) const
Returns true if the specified instruction has a delay slot which must be filled by the code generator...
bool hasOneMemOperand() const
Return true if this instruction has exactly one MachineMemOperand.
iterator_range< mop_iterator > operands()
void setHeapAllocMarker(MachineFunction &MF, MDNode *MD)
Set a marker on instructions that denotes where we should create and emit heap alloc site labels.
bool isMoveReg(QueryType Type=IgnoreBundle) const
Return true if this instruction is a register move.
const DILocalVariable * getDebugVariable() const
Return the debug variable referenced by this DBG_VALUE instruction.
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can't be determined by the instruction's descr...
const MachineOperand * findRegisterDefOperand(Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr) const
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs.
bool isInsertSubreg() const
iterator_range< filtered_const_mop_iterator > all_defs() const
Returns an iterator range over all operands that are (explicit or implicit) register defs.
void substituteRegister(Register FromReg, Register ToReg, unsigned SubIdx, const TargetRegisterInfo &RegInfo)
Replace all occurrences of FromReg with ToReg:SubIdx, properly composing subreg indices where necessa...
iterator_range< filter_iterator< MachineOperand *, std::function< bool(MachineOperand &Op)> > > getDebugOperandsForReg(Register Reg)
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.
iterator_range< mop_iterator > defs()
Returns a range over all explicit operands that are register definitions.
bool isConvertibleTo3Addr(QueryType Type=IgnoreBundle) const
Return true if this is a 2-address instruction which can be changed into a 3-address instruction if n...
mmo_iterator memoperands_begin() const
Access to memory operands of the instruction.
void cloneInstrSymbols(MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr's pre- and post- instruction symbols and replace ours with it.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
void changeDebugValuesDefReg(Register Reg)
Find all DBG_VALUEs that point to the register def in this instruction and point them to Reg instead.
bool isIdenticalTo(const MachineInstr &Other, MICheckType Check=CheckDefs) const
Return true if this instruction is identical to Other.
bool hasOrderedMemoryRef() const
Return true if this instruction may have an ordered or volatile memory reference, or if the informati...
bool definesRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr fully defines the specified register.
bool isConvergent(QueryType Type=AnyInBundle) const
Return true if this instruction is convergent.
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
iterator_range< const_mop_iterator > operands() const
const DIExpression * getDebugExpression() const
Return the complex address expression referenced by this DBG_VALUE instruction.
ArrayRef< MachineMemOperand * > memoperands() const
Access to memory operands of the instruction.
bool isLabel() const
Returns true if the MachineInstr represents a label.
void print(raw_ostream &OS, bool IsStandalone=true, bool SkipOpers=false, bool SkipDebugLoc=false, bool AddNewLine=true, const TargetInstrInfo *TII=nullptr) const
Print this MI to OS.
bool isExtractSubreg() const
bool isNonListDebugValue() const
MachineOperand * mop_iterator
iterator/begin/end - Iterate over all operands of a machine instruction.
bool isLoadFoldBarrier() const
Returns true if it is illegal to fold a load across this instruction.
bool mayStore(QueryType Type=AnyInBundle) const
Return true if this instruction could possibly modify memory.
void setFlag(MIFlag Flag)
Set a MI flag.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
bool readsRegister(Register Reg, const TargetRegisterInfo *TRI=nullptr) const
Return true if the MachineInstr reads the specified register.
std::tuple< LLT, LLT, LLT > getFirst3LLTs() const
bool isMoveImmediate(QueryType Type=IgnoreBundle) const
Return true if this instruction is a move immediate (including conditional moves) instruction.
bool isPreISelOpcode(QueryType Type=IgnoreBundle) const
Return true if this is an instruction that should go through the usual legalization steps.
bool isEHScopeReturn(QueryType Type=AnyInBundle) const
Return true if this is an instruction that marks the end of an EH scope, i.e., a catchpad or a cleanu...
bool isPseudo(QueryType Type=IgnoreBundle) const
Return true if this is a pseudo instruction that doesn't correspond to a real machine instruction.
const MachineOperand & getDebugVariableOp() const
Return the operand for the debug variable referenced by this DBG_VALUE instruction.
iterator_range< const_mop_iterator > implicit_operands() const
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
void setPhysRegsDeadExcept(ArrayRef< Register > UsedRegs, const TargetRegisterInfo &TRI)
Mark every physreg used by this instruction as dead except those in the UsedRegs list.
bool isCandidateForCallSiteEntry(QueryType Type=IgnoreBundle) const
Return true if this is a call instruction that may have an associated call site entry in the debug in...
void removeOperand(unsigned OpNo)
Erase an operand from an instruction, leaving it with one fewer operand than it started with.
MCSymbol * getPreInstrSymbol() const
Helper to extract a pre-instruction symbol if one has been added.
bool addRegisterKilled(Register IncomingReg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI kills a register.
bool readsVirtualRegister(Register Reg) const
Return true if the MachineInstr reads the specified virtual register.
void setPostInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just after the instruction itself.
bool isBitcast(QueryType Type=IgnoreBundle) const
Return true if this instruction is a bitcast instruction.
bool hasOptionalDef(QueryType Type=IgnoreBundle) const
Set if this instruction has an optional definition, e.g.
bool isTransient() const
Return true if this is a transient instruction that is either very likely to be eliminated during reg...
bool isDebugValue() const
unsigned getDebugOperandIndex(const MachineOperand *Op) const
const MachineOperand & getDebugOffset() const
Return the operand containing the offset to be used if this DBG_VALUE instruction is indirect; will b...
MachineOperand & getDebugOperand(unsigned Index)
std::optional< LocationSize > getSpillSize(const TargetInstrInfo *TII) const
Return a valid size if the instruction is a spill instruction.
iterator_range< mop_iterator > implicit_operands()
bool isBundledWithSucc() const
Return true if this instruction is part of a bundle, and it is not the last instruction in the bundle...
void addRegisterDefined(Register Reg, const TargetRegisterInfo *RegInfo=nullptr)
We have determined MI defines a register.
MDNode * getHeapAllocMarker() const
Helper to extract a heap alloc marker if one has been added.
bool isInsertSubregLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic INSERT_SUBREG instructions.
unsigned getDebugInstrNum()
Fetch the instruction number of this MachineInstr.
bool isDebugOperand(const MachineOperand *Op) const
std::tuple< LLT, LLT, LLT, LLT > getFirst4LLTs() const
void clearRegisterDeads(Register Reg)
Clear all dead flags on operands defining register Reg.
void clearRegisterKills(Register Reg, const TargetRegisterInfo *RegInfo)
Clear all kill flags affecting Reg.
const MachineOperand & getOperand(unsigned i) const
uint32_t getFlags() const
Return the MI flags bitvector.
bool isPseudoProbe() const
bool hasRegisterImplicitUseOperand(Register Reg) const
Returns true if the MachineInstr has an implicit-use operand of exactly the given register (not consi...
MachineOperand * findRegisterUseOperand(Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr)
Wrapper for findRegisterUseOperandIdx, it returns a pointer to the MachineOperand rather than an inde...
bool isUndefDebugValue() const
Return true if the instruction is a debug value which describes a part of a variable as unavailable.
bool isIdentityCopy() const
Return true is the instruction is an identity copy.
MCSymbol * getPostInstrSymbol() const
Helper to extract a post-instruction symbol if one has been added.
void unbundleFromSucc()
Break bundle below this instruction.
iterator_range< filtered_mop_iterator > all_defs()
Returns an iterator range over all operands that are (explicit or implicit) register defs.
const MachineOperand & getDebugOperand(unsigned Index) const
void clearKillInfo()
Clears kill flags on all operands.
bool isDebugEntryValue() const
A DBG_VALUE is an entry value iff its debug expression contains the DW_OP_LLVM_entry_value operation.
bool isIndirectDebugValue() const
A DBG_VALUE is indirect iff the location operand is a register and the offset operand is an immediate...
unsigned getNumDefs() const
Returns the total number of definitions.
void emitError(StringRef Msg) const
Emit an error referring to the source location of this instruction.
void setPCSections(MachineFunction &MF, MDNode *MD)
MachineInstr(const MachineInstr &)=delete
MachineOperand * findRegisterDefOperand(Register Reg, bool isDead=false, bool Overlap=false, const TargetRegisterInfo *TRI=nullptr)
Wrapper for findRegisterDefOperandIdx, it returns a pointer to the MachineOperand rather than an inde...
bool isMetaInstruction(QueryType Type=IgnoreBundle) const
Return true if this instruction doesn't produce any output in the form of executable instructions.
iterator_range< filter_iterator< const MachineOperand *, std::function< bool(const MachineOperand &Op)> > > getDebugOperandsForReg(Register Reg) const
bool canFoldAsLoad(QueryType Type=IgnoreBundle) const
Return true for instructions that can be folded as memory operands in other instructions.
void setDebugLoc(DebugLoc DL)
Replace current source information with new such.
bool isIndirectBranch(QueryType Type=AnyInBundle) const
Return true if this is an indirect branch, such as a branch through a register.
bool isVariadic(QueryType Type=IgnoreBundle) const
Return true if this instruction can have a variable number of operands.
const MachineOperand * findRegisterUseOperand(Register Reg, bool isKill=false, const TargetRegisterInfo *TRI=nullptr) const
int findInlineAsmFlagIdx(unsigned OpIdx, unsigned *GroupNo=nullptr) const
Find the index of the flag word operand that corresponds to operand OpIdx on an inline asm instructio...
bool allDefsAreDead() const
Return true if all the defs of this instruction are dead.
bool isRegSequenceLike(QueryType Type=IgnoreBundle) const
Return true if this instruction behaves the same way as the generic REG_SEQUENCE instructions.
const TargetRegisterClass * getRegClassConstraint(unsigned OpIdx, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI) const
Compute the static register class constraint for operand OpIdx.
bool isAsCheapAsAMove(QueryType Type=AllInBundle) const
Returns true if this instruction has the same cost (or less) than a move instruction.
void moveBefore(MachineInstr *MovePos)
Move the instruction before MovePos.
void addMemOperand(MachineFunction &MF, MachineMemOperand *MO)
Add a MachineMemOperand to the machine instruction.
bool isBundled() const
Return true if this instruction part of a bundle.
bool isRematerializable(QueryType Type=AllInBundle) const
Returns true if this instruction is a candidate for remat.
bool addRegisterDead(Register Reg, const TargetRegisterInfo *RegInfo, bool AddIfNotFound=false)
We have determined MI defined a register without a use.
bool mayFoldInlineAsmRegOp(unsigned OpId) const
Returns true if the register operand can be folded with a load or store into a frame index.
std::tuple< Register, Register > getFirst2Regs() const
A description of a memory reference used in the backend.
MachineOperand class - Representation of each machine instruction operand.
unsigned getSubReg() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Manage lifetime of a slot tracker for printing IR.
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
Wrapper class representing virtual and physical registers.
This is a 'bitvector' (really, a variable-sized bit array), optimized for the case when the array is ...
A templated base class for SmallPtrSet which provides the typesafe interface that is common across al...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
StringRef - Represent a constant reference to a string, i.e.
TargetInstrInfo - Interface to description of machine instruction set.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
The instances of the Type class are immutable: once they are created, they are never changed.
Specialization of filter_iterator_base for forward iteration only.
An ilist node that can access its parent list.
A range adaptor for a pair of iterators.
This class implements an extremely fast bulk output stream that can only output to a stream.
This file defines classes to implement an intrusive doubly linked list class (i.e.
This file defines the ilist_node class template, which is a convenient base class for creating classe...
This provides a very simple, boring adaptor for a begin and end iterator into a range type.
This is an optimization pass for GlobalISel generic memory operations.
constexpr auto adl_begin(RangeT &&range) -> decltype(adl_detail::begin_impl(std::forward< RangeT >(range)))
Returns the begin iterator to range using std::begin and function found through Argument-Dependent Lo...
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
constexpr auto adl_end(RangeT &&range) -> decltype(adl_detail::end_impl(std::forward< RangeT >(range)))
Returns the end iterator to range using std::end and functions found through Argument-Dependent Looku...
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
iterator_range< filter_iterator< detail::IterOfRange< RangeT >, PredicateT > > make_filter_range(RangeT &&Range, PredicateT Pred)
Convenience function that takes a range of elements and a predicate, and return a new filter_iterator...
BumpPtrAllocatorImpl BumpPtrAllocator
The standard BumpPtrAllocator which just uses the default template parameters.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
ArrayRef(const T &OneElt) -> ArrayRef< T >
An information struct used to provide DenseMap with the various necessary components for a given valu...
Special DenseMapInfo traits to compare MachineInstr* by value of the instruction rather than by point...
static MachineInstr * getEmptyKey()
static unsigned getHashValue(const MachineInstr *const &MI)
static MachineInstr * getTombstoneKey()
static bool isEqual(const MachineInstr *const &LHS, const MachineInstr *const &RHS)
Callbacks do nothing by default in iplist and ilist.
Template traits for intrusive list.