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llvm::MachineRegisterInfo Class Reference

#include <MachineRegisterInfo.h>

List of all members.

Classes

class  defusechain_iterator

Public Types

typedef defusechain_iterator
< true, true, false
reg_iterator
typedef defusechain_iterator
< true, true, true
reg_nodbg_iterator
typedef defusechain_iterator
< false, true, false
def_iterator
 def_iterator/def_begin/def_end - Walk all defs of the specified register.
typedef defusechain_iterator
< true, false, false
use_iterator
 use_iterator/use_begin/use_end - Walk all uses of the specified register.
typedef defusechain_iterator
< true, false, true
use_nodbg_iterator
typedef std::vector< std::pair
< unsigned, unsigned >
>::const_iterator 
livein_iterator

Public Member Functions

 MachineRegisterInfo (const TargetRegisterInfo &TRI)
 ~MachineRegisterInfo ()
bool isSSA () const
void leaveSSA ()
bool tracksLiveness () const
void invalidateLiveness ()
void addRegOperandToUseList (MachineOperand *MO)
 Add MO to the linked list of operands for its register.
void removeRegOperandFromUseList (MachineOperand *MO)
 Remove MO from its use-def list.
void moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)
void verifyUseList (unsigned Reg) const
 Verify the sanity of the use list for Reg.
void verifyUseLists () const
 Verify the use list of all registers.
reg_iterator reg_begin (unsigned RegNo) const
bool reg_empty (unsigned RegNo) const
reg_nodbg_iterator reg_nodbg_begin (unsigned RegNo) const
bool reg_nodbg_empty (unsigned RegNo) const
def_iterator def_begin (unsigned RegNo) const
bool def_empty (unsigned RegNo) const
bool hasOneDef (unsigned RegNo) const
use_iterator use_begin (unsigned RegNo) const
bool use_empty (unsigned RegNo) const
bool hasOneUse (unsigned RegNo) const
use_nodbg_iterator use_nodbg_begin (unsigned RegNo) const
bool use_nodbg_empty (unsigned RegNo) const
bool hasOneNonDBGUse (unsigned RegNo) const
void replaceRegWith (unsigned FromReg, unsigned ToReg)
MachineInstrgetVRegDef (unsigned Reg) const
MachineInstrgetUniqueVRegDef (unsigned Reg) const
void clearKillFlags (unsigned Reg) const
void dumpUses (unsigned RegNo) const
bool isConstantPhysReg (unsigned PhysReg, const MachineFunction &MF) const
const TargetRegisterClassgetRegClass (unsigned Reg) const
void setRegClass (unsigned Reg, const TargetRegisterClass *RC)
const TargetRegisterClassconstrainRegClass (unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
bool recomputeRegClass (unsigned Reg, const TargetMachine &)
unsigned createVirtualRegister (const TargetRegisterClass *RegClass)
unsigned getNumVirtRegs () const
void clearVirtRegs ()
 clearVirtRegs - Remove all virtual registers (after physreg assignment).
void setRegAllocationHint (unsigned Reg, unsigned Type, unsigned PrefReg)
std::pair< unsigned, unsignedgetRegAllocationHint (unsigned Reg) const
unsigned getSimpleHint (unsigned Reg) const
bool isPhysRegUsed (unsigned Reg) const
void setRegUnitUsed (unsigned RegUnit)
void setPhysRegUsed (unsigned Reg)
void addPhysRegsUsedFromRegMask (const uint32_t *RegMask)
void setPhysRegUnused (unsigned Reg)
void freezeReservedRegs (const MachineFunction &)
bool reservedRegsFrozen () const
bool canReserveReg (unsigned PhysReg) const
const BitVectorgetReservedRegs () const
bool isReserved (unsigned PhysReg) const
bool isAllocatable (unsigned PhysReg) const
void addLiveIn (unsigned Reg, unsigned vreg=0)
livein_iterator livein_begin () const
livein_iterator livein_end () const
bool livein_empty () const
bool isLiveIn (unsigned Reg) const
unsigned getLiveInPhysReg (unsigned VReg) const
unsigned getLiveInVirtReg (unsigned PReg) const
void EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)

Static Public Member Functions

static reg_iterator reg_end ()
static reg_nodbg_iterator reg_nodbg_end ()
static def_iterator def_end ()
static use_iterator use_end ()
static use_nodbg_iterator use_nodbg_end ()

Friends

class defusechain_iterator

Detailed Description

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Definition at line 28 of file MachineRegisterInfo.h.


Member Typedef Documentation

def_iterator/def_begin/def_end - Walk all defs of the specified register.

Definition at line 202 of file MachineRegisterInfo.h.

typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator llvm::MachineRegisterInfo::livein_iterator

Definition at line 485 of file MachineRegisterInfo.h.

reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.

Definition at line 177 of file MachineRegisterInfo.h.

reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.

Definition at line 189 of file MachineRegisterInfo.h.

use_iterator/use_begin/use_end - Walk all uses of the specified register.

Definition at line 222 of file MachineRegisterInfo.h.

use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.

Definition at line 243 of file MachineRegisterInfo.h.


Constructor & Destructor Documentation

MachineRegisterInfo::MachineRegisterInfo ( const TargetRegisterInfo TRI) [explicit]
MachineRegisterInfo::~MachineRegisterInfo ( )

Definition at line 34 of file MachineRegisterInfo.cpp.

Referenced by llvm::MachineFunction::~MachineFunction().


Member Function Documentation

void llvm::MachineRegisterInfo::addLiveIn ( unsigned  Reg,
unsigned  vreg = 0 
) [inline]
void llvm::MachineRegisterInfo::addPhysRegsUsedFromRegMask ( const uint32_t *  RegMask) [inline]

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. This corresponds to the bit mask attached to register mask operands.

Definition at line 401 of file MachineRegisterInfo.h.

References llvm::BitVector::setBitsNotInMask().

void MachineRegisterInfo::addRegOperandToUseList ( MachineOperand MO)
bool llvm::MachineRegisterInfo::canReserveReg ( unsigned  PhysReg) const [inline]

canReserveReg - Returns true if PhysReg can be used as a reserved register. Any register can be reserved before freezeReservedRegs() is called.

Definition at line 439 of file MachineRegisterInfo.h.

References reservedRegsFrozen(), and llvm::BitVector::test().

Referenced by llvm::X86RegisterInfo::canRealignStack(), and llvm::ARMBaseRegisterInfo::canRealignStack().

void MachineRegisterInfo::clearKillFlags ( unsigned  Reg) const

clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.

Definition at line 323 of file MachineRegisterInfo.cpp.

References use_begin(), and use_end().

Referenced by llvm::HexagonInstrInfo::PredicateInstruction().

void MachineRegisterInfo::clearVirtRegs ( )

clearVirtRegs - Remove all virtual registers (after physreg assignment).

Definition at line 109 of file MachineRegisterInfo.cpp.

References llvm::IndexedMap< T, ToIndexT >::clear(), getNumVirtRegs(), llvm::TargetRegisterInfo::index2VirtReg(), llvm_unreachable, and verifyUseList().

const TargetRegisterClass * MachineRegisterInfo::constrainRegClass ( unsigned  Reg,
const TargetRegisterClass RC,
unsigned  MinNumRegs = 0 
)

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Definition at line 47 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterClass::getNumRegs(), getRegClass(), and setRegClass().

Referenced by llvm::X86InstrInfo::convertToThreeAddress(), llvm::AArch64TargetLowering::emitAtomicBinary(), llvm::AArch64TargetLowering::emitAtomicBinaryMinMax(), llvm::AArch64TargetLowering::emitAtomicCmpSwap(), llvm::FastISel::FastEmitInst_extractsubreg(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), and llvm::Thumb2InstrInfo::storeRegToStackSlot().

unsigned MachineRegisterInfo::createVirtualRegister ( const TargetRegisterClass RegClass)

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Definition at line 95 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), llvm::IndexedMap< T, ToIndexT >::grow(), llvm::TargetRegisterInfo::index2VirtReg(), and llvm::TargetRegisterClass::isAllocatable().

Referenced by llvm::MachineFunction::addLiveIn(), addLiveIn(), llvm::LiveRangeEdit::createFrom(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), llvm::HexagonInstrInfo::createVR(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::AArch64TargetLowering::emitAtomicBinary(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::AArch64TargetLowering::emitAtomicBinaryMinMax(), llvm::AArch64TargetLowering::emitAtomicCmpSwap(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::MBlazeInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), llvm::MipsFunctionInfo::getMips16SPAliasReg(), GetRegistersForValue(), InsertNewDef(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), lowerDSPIntr(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), and llvm::PPCRegisterInfo::lowerVRSAVESpilling().

def_iterator llvm::MachineRegisterInfo::def_begin ( unsigned  RegNo) const [inline]
bool llvm::MachineRegisterInfo::def_empty ( unsigned  RegNo) const [inline]

def_empty - Return true if there are no instructions defining the specified register (it may be live-in).

Definition at line 210 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::PBQPBuilder::build(), getUniqueVRegDef(), and isConstantPhysReg().

static def_iterator llvm::MachineRegisterInfo::def_end ( ) [inline, static]
void MachineRegisterInfo::dumpUses ( unsigned  RegNo) const

Definition at line 386 of file MachineRegisterInfo.cpp.

References I, use_begin(), and use_end().

void MachineRegisterInfo::EmitLiveInCopies ( MachineBasicBlock EntryMBB,
const TargetRegisterInfo TRI,
const TargetInstrInfo TII 
)

EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.

Definition at line 356 of file MachineRegisterInfo.cpp.

References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), llvm::TargetOpcode::COPY, llvm::MCInstrInfo::get(), and use_empty().

Referenced by llvm::SelectionDAGISel::runOnMachineFunction().

void MachineRegisterInfo::freezeReservedRegs ( const MachineFunction MF)

freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins.

Definition at line 392 of file MachineRegisterInfo.cpp.

References llvm::MCRegisterInfo::getNumRegs(), llvm::TargetRegisterInfo::getReservedRegs(), and llvm::BitVector::size().

Referenced by llvm::RegAllocBase::init(), and llvm::SelectionDAGISel::runOnMachineFunction().

unsigned MachineRegisterInfo::getLiveInPhysReg ( unsigned  VReg) const

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Definition at line 337 of file MachineRegisterInfo.cpp.

References I, livein_begin(), and livein_end().

unsigned MachineRegisterInfo::getLiveInVirtReg ( unsigned  PReg) const

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.

Definition at line 346 of file MachineRegisterInfo.cpp.

References I, livein_begin(), and livein_end().

Referenced by llvm::MachineFunction::addLiveIn(), and llvm::AMDGPUTargetLowering::CreateLiveInRegister().

unsigned llvm::MachineRegisterInfo::getNumVirtRegs ( ) const [inline]
std::pair<unsigned, unsigned> llvm::MachineRegisterInfo::getRegAllocationHint ( unsigned  Reg) const [inline]
const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClass ( unsigned  Reg) const [inline]
const BitVector& llvm::MachineRegisterInfo::getReservedRegs ( ) const [inline]

getReservedRegs - Returns a reference to the frozen set of reserved registers. This method should always be preferred to calling TRI::getReservedRegs() when possible.

Definition at line 446 of file MachineRegisterInfo.h.

References reservedRegsFrozen().

Referenced by llvm::RegScavenger::getRegsUsed(), isReserved(), and llvm::RegisterClassInfo::runOnMachineFunction().

unsigned llvm::MachineRegisterInfo::getSimpleHint ( unsigned  Reg) const [inline]

getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set.

Definition at line 360 of file MachineRegisterInfo.h.

References getRegAllocationHint().

Referenced by llvm::VirtRegMap::hasPreferredPhys().

MachineInstr * MachineRegisterInfo::getUniqueVRegDef ( unsigned  Reg) const

getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. If there are multiple definitions or no definition, return null.

Definition at line 304 of file MachineRegisterInfo.cpp.

References def_begin(), def_empty(), def_end(), I, and llvm::next().

Referenced by llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), and llvm::X86InstrInfo::optimizeCompareInstr().

MachineInstr * MachineRegisterInfo::getVRegDef ( unsigned  Reg) const
bool llvm::MachineRegisterInfo::hasOneDef ( unsigned  RegNo) const [inline]

hasOneDef - Return true if there is exactly one instruction defining the specified register.

Definition at line 214 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::ScheduleDAGInstrs::addVRegDefDeps().

bool MachineRegisterInfo::hasOneNonDBGUse ( unsigned  RegNo) const

hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register.

Definition at line 312 of file MachineRegisterInfo.cpp.

References use_nodbg_begin(), and use_nodbg_end().

Referenced by canFoldIntoMOVCC(), llvm::LiveRangeEdit::eliminateDeadDefs(), findOnlyInterestingUse(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), and isOperandKill().

bool llvm::MachineRegisterInfo::hasOneUse ( unsigned  RegNo) const [inline]

hasOneUse - Return true if there is exactly one instruction using the specified register.

Definition at line 234 of file MachineRegisterInfo.h.

References use_begin(), and use_end().

Referenced by isKilled(), and llvm::FastISel::tryToFoldLoad().

void llvm::MachineRegisterInfo::invalidateLiveness ( ) [inline]

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.

This should be called by late passes that invalidate the liveness information.

Definition at line 145 of file MachineRegisterInfo.h.

Referenced by llvm::BranchFolder::OptimizeFunction().

bool llvm::MachineRegisterInfo::isAllocatable ( unsigned  PhysReg) const [inline]

isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.

Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.

Definition at line 468 of file MachineRegisterInfo.h.

References llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().

Referenced by llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::PBQPBuilderWithCoalescing::build(), llvm::VirtRegAuxInfo::CalculateWeightAndHint(), and isConstantPhysReg().

bool MachineRegisterInfo::isConstantPhysReg ( unsigned  PhysReg,
const MachineFunction MF 
) const

isConstantPhysReg - Returns true if PhysReg is unallocatable and constant throughout the function. It is safe to move instructions that read such a physreg.

Definition at line 398 of file MachineRegisterInfo.cpp.

References def_empty(), isAllocatable(), llvm::TargetRegisterInfo::isPhysicalRegister(), and llvm::MCRegisterInfo::DiffListIterator::isValid().

bool MachineRegisterInfo::isLiveIn ( unsigned  Reg) const
bool llvm::MachineRegisterInfo::isPhysRegUsed ( unsigned  Reg) const [inline]

isPhysRegUsed - Return true if the specified register is used in this function. Also check for clobbered aliases and registers clobbered by function calls with register mask operands.

This only works after register allocation. It is primarily used by PrologEpilogInserter to determine which callee-saved registers need spilling.

Definition at line 377 of file MachineRegisterInfo.h.

References llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::test().

Referenced by checkNumAlignedDPRCS2Regs(), llvm::Thumb1FrameLowering::emitEpilogue(), llvm::ARMFrameLowering::emitEpilogue(), HandleVRSaveUpdate(), interruptFrameLayout(), llvm::SystemZFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::PPCFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::XCoreFrameLowering::processFunctionBeforeCalleeSavedScan(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::AArch64FrameLowering::processFunctionBeforeCalleeSavedScan().

bool llvm::MachineRegisterInfo::isReserved ( unsigned  PhysReg) const [inline]

isReserved - Returns true when PhysReg is a reserved register.

Reserved registers may belong to an allocatable register class, but the target has explicitly requested that they are not used.

Definition at line 458 of file MachineRegisterInfo.h.

References getReservedRegs(), and llvm::BitVector::test().

Referenced by llvm::PBQPBuilder::build(), llvm::LiveRangeEdit::eliminateDeadDefs(), llvm::ARMBaseRegisterInfo::getRegAllocationHints(), llvm::TargetRegisterInfo::getRegAllocationHints(), isAllocatable(), llvm::ARMFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::LiveVariables::runOnMachineFunction().

bool llvm::MachineRegisterInfo::isSSA ( ) const [inline]
void llvm::MachineRegisterInfo::leaveSSA ( ) [inline]

Definition at line 128 of file MachineRegisterInfo.h.

livein_iterator llvm::MachineRegisterInfo::livein_begin ( ) const [inline]
bool llvm::MachineRegisterInfo::livein_empty ( ) const [inline]
livein_iterator llvm::MachineRegisterInfo::livein_end ( ) const [inline]
void MachineRegisterInfo::moveOperands ( MachineOperand Dst,
MachineOperand Src,
unsigned  NumOps 
)

Move NumOps operands from Src to Dst, updating use-def lists as needed.

The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).

The Src and Dst ranges may overlap.

Definition at line 233 of file MachineRegisterInfo.cpp.

References llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::Reg.

bool MachineRegisterInfo::recomputeRegClass ( unsigned  Reg,
const TargetMachine TM 
)

recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. Returns true if Reg was upgraded.

This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.

Definition at line 63 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetMachine::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::TargetRegisterInfo::getMatchingSuperRegClass(), getRegClass(), llvm::TargetRegisterInfo::getSubClassWithSubReg(), I, reg_nodbg_begin(), reg_nodbg_end(), setRegClass(), and TII.

Referenced by llvm::LiveRangeEdit::calculateRegClassAndHint().

reg_iterator llvm::MachineRegisterInfo::reg_begin ( unsigned  RegNo) const [inline]
bool llvm::MachineRegisterInfo::reg_empty ( unsigned  RegNo) const [inline]

reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).

Definition at line 185 of file MachineRegisterInfo.h.

References reg_begin(), and reg_end().

static reg_iterator llvm::MachineRegisterInfo::reg_end ( ) [inline, static]
reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_begin ( unsigned  RegNo) const [inline]
bool llvm::MachineRegisterInfo::reg_nodbg_empty ( unsigned  RegNo) const [inline]

reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.

Definition at line 197 of file MachineRegisterInfo.h.

References reg_nodbg_begin(), and reg_nodbg_end().

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::RegAllocBase::allocatePhysRegs(), and llvm::LiveRangeEdit::eliminateDeadDefs().

static reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_end ( ) [inline, static]
void MachineRegisterInfo::removeRegOperandFromUseList ( MachineOperand MO)
void MachineRegisterInfo::replaceRegWith ( unsigned  FromReg,
unsigned  ToReg 
)

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Note that it is usually necessary to first constrain ToReg's register class to match the FromReg constraints using:

constrainRegClass(ToReg, getRegClass(FromReg))

That function will return NULL if the virtual registers have incompatible constraints.

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Definition at line 278 of file MachineRegisterInfo.cpp.

References I, reg_begin(), reg_end(), and llvm::MachineOperand::setReg().

Referenced by llvm::SelectionDAGISel::runOnMachineFunction().

bool llvm::MachineRegisterInfo::reservedRegsFrozen ( ) const [inline]

reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.

Definition at line 432 of file MachineRegisterInfo.h.

References llvm::BitVector::empty().

Referenced by canReserveReg(), and getReservedRegs().

void llvm::MachineRegisterInfo::setPhysRegUnused ( unsigned  Reg) [inline]

setPhysRegUnused - Mark the specified register unused in this function. This should only be called during and after register allocation.

Definition at line 407 of file MachineRegisterInfo.h.

References llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::BitVector::reset().

Referenced by llvm::PPCFrameLowering::processFunctionBeforeCalleeSavedScan(), and llvm::XCoreFrameLowering::processFunctionBeforeCalleeSavedScan().

void llvm::MachineRegisterInfo::setPhysRegUsed ( unsigned  Reg) [inline]
void llvm::MachineRegisterInfo::setRegAllocationHint ( unsigned  Reg,
unsigned  Type,
unsigned  PrefReg 
) [inline]

setRegAllocationHint - Specify a register allocation hint for the specified virtual register.

Definition at line 346 of file MachineRegisterInfo.h.

References Type.

Referenced by llvm::VirtRegAuxInfo::CalculateWeightAndHint(), and llvm::ARMBaseRegisterInfo::UpdateRegAllocHint().

void MachineRegisterInfo::setRegClass ( unsigned  Reg,
const TargetRegisterClass RC 
)

setRegClass - Set the register class of the specified virtual register.

Definition at line 41 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterClass::isAllocatable().

Referenced by llvm::SITargetLowering::AdjustInstrPostInstrSelection(), constrainRegClass(), llvm::AMDGPUInstrInfo::convertToISA(), and recomputeRegClass().

void llvm::MachineRegisterInfo::setRegUnitUsed ( unsigned  RegUnit) [inline]

Mark the specified register unit as used in this function. This should only be called during and after register allocation.

Definition at line 388 of file MachineRegisterInfo.h.

References llvm::BitVector::set().

bool llvm::MachineRegisterInfo::tracksLiveness ( ) const [inline]

tracksLiveness - Returns true when tracking register liveness accurately.

While this flag is true, register liveness information in basic block live-in lists and machine instruction operands is accurate. This means it can be used to change the code in ways that affect the values in registers, for example by the register scavenger.

When this flag is false, liveness is no longer reliable.

Definition at line 138 of file MachineRegisterInfo.h.

Referenced by llvm::RegScavenger::enterBasicBlock(), llvm::BranchFolder::OptimizeFunction(), and llvm::MachineFunction::print().

use_iterator llvm::MachineRegisterInfo::use_begin ( unsigned  RegNo) const [inline]
bool llvm::MachineRegisterInfo::use_empty ( unsigned  RegNo) const [inline]

use_empty - Return true if there are no instructions using the specified register.

Definition at line 230 of file MachineRegisterInfo.h.

References use_begin(), and use_end().

Referenced by EmitLiveInCopies(), and llvm::MachineInstr::print().

static use_iterator llvm::MachineRegisterInfo::use_end ( ) [inline, static]
use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_begin ( unsigned  RegNo) const [inline]
bool llvm::MachineRegisterInfo::use_nodbg_empty ( unsigned  RegNo) const [inline]

use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register.

Definition at line 251 of file MachineRegisterInfo.h.

References use_nodbg_begin(), and use_nodbg_end().

Referenced by llvm::X86InstrInfo::optimizeCompareInstr().

static use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_end ( ) [inline, static]

Definition at line 247 of file MachineRegisterInfo.h.

Referenced by findUseBetween(), hasOneNonDBGUse(), and use_nodbg_empty().

void MachineRegisterInfo::verifyUseList ( unsigned  Reg) const
void MachineRegisterInfo::verifyUseLists ( ) const

Verify the use list of all registers.

Definition at line 155 of file MachineRegisterInfo.cpp.

References llvm::MCRegisterInfo::getNumRegs(), getNumVirtRegs(), llvm::TargetRegisterInfo::index2VirtReg(), and verifyUseList().


Friends And Related Function Documentation

friend class defusechain_iterator [friend]

Definition at line 170 of file MachineRegisterInfo.h.


The documentation for this class was generated from the following files: