LLVM 19.0.0git
SystemZSubtarget.h
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1//===-- SystemZSubtarget.h - SystemZ subtarget information -----*- C++ -*--===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the SystemZ specific subclass of TargetSubtargetInfo.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
14#define LLVM_LIB_TARGET_SYSTEMZ_SYSTEMZSUBTARGET_H
15
17#include "SystemZISelLowering.h"
18#include "SystemZInstrInfo.h"
19#include "SystemZRegisterInfo.h"
22#include "llvm/IR/DataLayout.h"
24#include <string>
25
26#define GET_SUBTARGETINFO_HEADER
27#include "SystemZGenSubtargetInfo.inc"
28
29namespace llvm {
30class GlobalValue;
31class StringRef;
32
34 virtual void anchor();
35protected:
36// Bool members corresponding to the SubtargetFeatures defined in tablegen.
37#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
38 bool ATTRIBUTE = DEFAULT;
39#include "SystemZGenSubtargetInfo.inc"
40
41private:
42 Triple TargetTriple;
43 std::unique_ptr<SystemZCallingConventionRegisters> SpecialRegisters;
44 SystemZInstrInfo InstrInfo;
47 std::unique_ptr<const SystemZFrameLowering> FrameLowering;
48
49 SystemZSubtarget &initializeSubtargetDependencies(StringRef CPU,
50 StringRef TuneCPU,
51 StringRef FS);
52 SystemZCallingConventionRegisters *initializeSpecialRegisters();
53
54public:
55 SystemZSubtarget(const Triple &TT, const std::string &CPU,
56 const std::string &TuneCPU, const std::string &FS,
57 const TargetMachine &TM);
58
60 assert(SpecialRegisters && "Unsupported SystemZ calling convention");
61 return SpecialRegisters.get();
62 }
63
64 template <class SR> SR &getSpecialRegisters() const {
65 return *static_cast<SR *>(getSpecialRegisters());
66 }
67
68 const TargetFrameLowering *getFrameLowering() const override {
69 return FrameLowering.get();
70 }
71
72 template <class TFL> const TFL *getFrameLowering() const {
73 return static_cast<const TFL *>(getFrameLowering());
74 }
75
76 const SystemZInstrInfo *getInstrInfo() const override { return &InstrInfo; }
77 const SystemZRegisterInfo *getRegisterInfo() const override {
78 return &InstrInfo.getRegisterInfo();
79 }
80 const SystemZTargetLowering *getTargetLowering() const override {
81 return &TLInfo;
82 }
84 return &TSInfo;
85 }
86
87 // True if the subtarget should run MachineScheduler after aggressive
88 // coalescing. This currently replaces the SelectionDAG scheduler with the
89 // "source" order scheduler.
90 bool enableMachineScheduler() const override { return true; }
91
92 // This is important for reducing register pressure in vector code.
93 bool useAA() const override { return true; }
94
95 // Always enable the early if-conversion pass.
96 bool enableEarlyIfConversion() const override { return true; }
97
98 // Enable tracking of subregister liveness in register allocator.
99 bool enableSubRegLiveness() const override;
100
101 // Automatically generated by tblgen.
103
104// Getters for SubtargetFeatures defined in tablegen.
105#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
106 bool GETTER() const { return ATTRIBUTE; }
107#include "SystemZGenSubtargetInfo.inc"
108
109 bool isAddressedViaADA(const GlobalValue *GV) const;
110
111 // Return true if GV can be accessed using LARL for reloc model RM
112 // and code model CM.
113 bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const;
114
115 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
116
117 // Returns TRUE if we are generating GOFF object code
118 bool isTargetGOFF() const { return TargetTriple.isOSBinFormatGOFF(); }
119
120 // Returns TRUE if we are using XPLINK64 linkage convention
121 bool isTargetXPLINK64() const { return (isTargetGOFF() && isTargetzOS()); }
122
123 // Returns TRUE if we are generating code for a s390x machine running zOS
124 bool isTargetzOS() const { return TargetTriple.isOSzOS(); }
125};
126} // end namespace llvm
127
128#endif
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Targets can subclass this to parameterize the SelectionDAG lowering and instruction selection process...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
A SystemZ-specific class detailing special use registers particular for calling conventions.
const SystemZRegisterInfo & getRegisterInfo() const
const SystemZInstrInfo * getInstrInfo() const override
bool isPC32DBLSymbol(const GlobalValue *GV, CodeModel::Model CM) const
SR & getSpecialRegisters() const
const TargetFrameLowering * getFrameLowering() const override
const SystemZTargetLowering * getTargetLowering() const override
bool enableMachineScheduler() const override
SystemZCallingConventionRegisters * getSpecialRegisters() const
bool enableSubRegLiveness() const override
bool isAddressedViaADA(const GlobalValue *GV) const
bool enableEarlyIfConversion() const override
const SystemZRegisterInfo * getRegisterInfo() const override
const SelectionDAGTargetInfo * getSelectionDAGInfo() const override
const TFL * getFrameLowering() const
void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS)
bool useAA() const override
Information about stack frame layout on the target.
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:76
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
bool isOSBinFormatGOFF() const
Tests whether the OS uses the GOFF binary format.
Definition: Triple.h:713
bool isOSzOS() const
Definition: Triple.h:539
bool isOSBinFormatELF() const
Tests whether the OS uses the ELF binary format.
Definition: Triple.h:703
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18