LLVM 22.0.0git
Classes | Namespaces | Enumerations | Functions | Variables
AMDGPU.h File Reference
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include "llvm/Support/AMDGPUAddrSpace.h"
#include "llvm/Support/CodeGen.h"

Go to the source code of this file.

Classes

struct  llvm::AMDGPUSimplifyLibCallsPass
struct  llvm::AMDGPUImageIntrinsicOptimizerPass
struct  llvm::AMDGPUUseNativeCallsPass
class  llvm::SILowerI1CopiesPass
struct  llvm::AMDGPUPromoteKernelArgumentsPass
struct  llvm::AMDGPULowerKernelAttributesPass
struct  llvm::AMDGPULowerModuleLDSPass
struct  llvm::AMDGPULowerBufferFatPointersPass
struct  llvm::AMDGPULowerIntrinsicsPass
struct  llvm::AMDGPUPromoteAllocaPass
struct  llvm::AMDGPUPromoteAllocaToVectorPass
struct  llvm::AMDGPUAtomicOptimizerPass
struct  llvm::AMDGPUInsertDelayAluPass
struct  llvm::AMDGPUAlwaysInlinePass
struct  llvm::AMDGPUSwLowerLDSPass
class  llvm::AMDGPUCodeGenPreparePass
class  llvm::AMDGPULateCodeGenPreparePass
class  llvm::AMDGPULowerKernelArgumentsPass
struct  llvm::AMDGPUAttributorOptions
class  llvm::AMDGPUAttributorPass
class  llvm::AMDGPUPreloadKernelArgumentsPass
class  llvm::AMDGPUAnnotateUniformValuesPass
class  llvm::SIModeRegisterPass
class  llvm::SIMemoryLegalizerPass
class  llvm::GCNCreateVOPDPass
class  llvm::AMDGPUMarkLastScratchLoadPass
class  llvm::SIInsertWaitcntsPass
class  llvm::SIInsertHardClausesPass
class  llvm::SILateBranchLoweringPass
class  llvm::SIPreEmitPeepholePass
class  llvm::AMDGPUSetWavePriorityPass
struct  llvm::AMDGPUPrintfRuntimeBindingPass
class  llvm::AMDGPURewriteUndefForPHIPass
class  llvm::SIAnnotateControlFlowPass
class  llvm::AMDGPURewriteAGPRCopyMFMAPass
struct  llvm::AMDGPUUniformIntrinsicCombinePass

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
namespace  llvm::AMDGPU

Enumerations

enum class  llvm::ScanOptions { llvm::DPP , llvm::Iterative , llvm::None }
enum  llvm::AMDGPU::TargetIndex {
  llvm::AMDGPU::TI_CONSTDATA_START , llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD0 , llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD1 , llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD2 ,
  llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD3
}

Functions

void llvm::initializeAMDGPUPreLegalizerCombinerPass (PassRegistry &)
FunctionPass * llvm::createAMDGPUPreLegalizeCombiner (bool IsOptNone)
void llvm::initializeAMDGPUPostLegalizerCombinerPass (PassRegistry &)
FunctionPass * llvm::createAMDGPUPostLegalizeCombiner (bool IsOptNone)
FunctionPass * llvm::createAMDGPURegBankCombiner (bool IsOptNone)
void llvm::initializeAMDGPURegBankCombinerPass (PassRegistry &)
FunctionPass * llvm::createAMDGPUGlobalISelDivergenceLoweringPass ()
FunctionPass * llvm::createAMDGPURegBankSelectPass ()
FunctionPass * llvm::createAMDGPURegBankLegalizePass ()
FunctionPass * llvm::createGCNDPPCombinePass ()
FunctionPass * llvm::createSIAnnotateControlFlowLegacyPass ()
 Create the annotation pass.
FunctionPass * llvm::createSIFoldOperandsLegacyPass ()
FunctionPass * llvm::createSIPeepholeSDWALegacyPass ()
FunctionPass * llvm::createSILowerI1CopiesLegacyPass ()
FunctionPass * llvm::createSIShrinkInstructionsLegacyPass ()
FunctionPass * llvm::createSILoadStoreOptimizerLegacyPass ()
FunctionPass * llvm::createSIWholeQuadModeLegacyPass ()
FunctionPass * llvm::createSIFixControlFlowLiveIntervalsPass ()
FunctionPass * llvm::createSIOptimizeExecMaskingPreRAPass ()
FunctionPass * llvm::createSIOptimizeVGPRLiveRangeLegacyPass ()
FunctionPass * llvm::createSIFixSGPRCopiesLegacyPass ()
FunctionPass * llvm::createLowerWWMCopiesPass ()
FunctionPass * llvm::createSIMemoryLegalizerPass ()
FunctionPass * llvm::createSIInsertWaitcntsPass ()
FunctionPass * llvm::createSIPreAllocateWWMRegsLegacyPass ()
FunctionPass * llvm::createSIFormMemoryClausesLegacyPass ()
FunctionPass * llvm::createSIPostRABundlerPass ()
FunctionPass * llvm::createAMDGPUImageIntrinsicOptimizerPass (const TargetMachine *)
ModulePass * llvm::createAMDGPURemoveIncompatibleFunctionsPass (const TargetMachine *)
FunctionPass * llvm::createAMDGPUCodeGenPreparePass ()
FunctionPass * llvm::createAMDGPULateCodeGenPrepareLegacyPass ()
FunctionPass * llvm::createAMDGPUReserveWWMRegsPass ()
FunctionPass * llvm::createAMDGPURewriteOutArgumentsPass ()
ModulePass * llvm::createAMDGPULowerModuleLDSLegacyPass (const AMDGPUTargetMachine *TM=nullptr)
ModulePass * llvm::createAMDGPULowerBufferFatPointersPass ()
ModulePass * llvm::createAMDGPULowerIntrinsicsLegacyPass ()
FunctionPass * llvm::createSIModeRegisterPass ()
FunctionPass * llvm::createGCNPreRAOptimizationsLegacyPass ()
FunctionPass * llvm::createAMDGPUPreloadKernArgPrologLegacyPass ()
ModulePass * llvm::createAMDGPUPreloadKernelArgumentsLegacyPass (const TargetMachine *)
void llvm::initializeAMDGPUDAGToDAGISelLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUAlwaysInlinePass (PassRegistry &)
void llvm::initializeAMDGPUAsmPrinterPass (PassRegistry &)
FunctionPass * llvm::createAMDGPUAtomicOptimizerPass (ScanOptions ScanStrategy)
void llvm::initializeAMDGPUAtomicOptimizerPass (PassRegistry &)
ModulePass * llvm::createAMDGPUCtorDtorLoweringLegacyPass ()
void llvm::initializeAMDGPUCtorDtorLoweringLegacyPass (PassRegistry &)
FunctionPass * llvm::createAMDGPULowerKernelArgumentsPass ()
void llvm::initializeAMDGPULowerKernelArgumentsPass (PassRegistry &)
FunctionPass * llvm::createAMDGPUPromoteKernelArgumentsPass ()
void llvm::initializeAMDGPUPromoteKernelArgumentsPass (PassRegistry &)
ModulePass * llvm::createAMDGPULowerKernelAttributesPass ()
void llvm::initializeAMDGPULowerKernelAttributesPass (PassRegistry &)
void llvm::initializeAMDGPULowerModuleLDSLegacyPass (PassRegistry &)
void llvm::initializeAMDGPULowerBufferFatPointersPass (PassRegistry &)
void llvm::initializeAMDGPULowerIntrinsicsLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUPrepareAGPRAllocLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUReserveWWMRegsLegacyPass (PassRegistry &)
void llvm::initializeAMDGPURewriteOutArgumentsPass (PassRegistry &)
void llvm::initializeGCNDPPCombineLegacyPass (PassRegistry &)
void llvm::initializeSIFoldOperandsLegacyPass (PassRegistry &)
void llvm::initializeSIPeepholeSDWALegacyPass (PassRegistry &)
void llvm::initializeSIShrinkInstructionsLegacyPass (PassRegistry &)
void llvm::initializeSIFixSGPRCopiesLegacyPass (PassRegistry &)
void llvm::initializeSIFixVGPRCopiesLegacyPass (PassRegistry &)
void llvm::initializeSILowerWWMCopiesLegacyPass (PassRegistry &)
void llvm::initializeSILowerI1CopiesLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUGlobalISelDivergenceLoweringPass (PassRegistry &)
void llvm::initializeAMDGPURegBankSelectPass (PassRegistry &)
void llvm::initializeAMDGPURegBankLegalizePass (PassRegistry &)
void llvm::initializeAMDGPUMarkLastScratchLoadLegacyPass (PassRegistry &)
void llvm::initializeSILowerSGPRSpillsLegacyPass (PassRegistry &)
void llvm::initializeSILoadStoreOptimizerLegacyPass (PassRegistry &)
void llvm::initializeSIWholeQuadModeLegacyPass (PassRegistry &)
void llvm::initializeSILowerControlFlowLegacyPass (PassRegistry &)
void llvm::initializeSIPreEmitPeepholeLegacyPass (PassRegistry &)
void llvm::initializeSILateBranchLoweringLegacyPass (PassRegistry &)
void llvm::initializeSIOptimizeExecMaskingLegacyPass (PassRegistry &)
void llvm::initializeSIPreAllocateWWMRegsLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUImageIntrinsicOptimizerPass (PassRegistry &)
void llvm::initializeAMDGPUPerfHintAnalysisLegacyPass (PassRegistry &)
void llvm::initializeGCNRegPressurePrinterPass (PassRegistry &)
void llvm::initializeAMDGPUPreloadKernArgPrologLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUPreloadKernelArgumentsLegacyPass (PassRegistry &)
FunctionPass * llvm::createAMDGPUPromoteAlloca ()
void llvm::initializeAMDGPUPromoteAllocaPass (PassRegistry &)
Pass * llvm::createAMDGPUStructurizeCFGPass ()
FunctionPass * llvm::createAMDGPUISelDag (TargetMachine &TM, CodeGenOptLevel OptLevel)
 This pass converts a legalized DAG into a AMDGPU-specific.
ModulePass * llvm::createAMDGPUAlwaysInlinePass (bool GlobalOpt=true)
void llvm::initializeAMDGPUSwLowerLDSLegacyPass (PassRegistry &)
ModulePass * llvm::createAMDGPUSwLowerLDSLegacyPass (const AMDGPUTargetMachine *TM=nullptr)
FunctionPass * llvm::createAMDGPUAnnotateUniformValuesLegacy ()
ModulePass * llvm::createAMDGPUPrintfRuntimeBinding ()
void llvm::initializeAMDGPUPrintfRuntimeBindingPass (PassRegistry &)
void llvm::initializeAMDGPUResourceUsageAnalysisWrapperPassPass (PassRegistry &)
void llvm::initializeSIOptimizeExecMaskingPreRALegacyPass (PassRegistry &)
void llvm::initializeSIOptimizeVGPRLiveRangeLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUAnnotateUniformValuesLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUCodeGenPreparePass (PassRegistry &)
void llvm::initializeAMDGPURemoveIncompatibleFunctionsLegacyPass (PassRegistry &)
void llvm::initializeAMDGPULateCodeGenPrepareLegacyPass (PassRegistry &)
FunctionPass * llvm::createAMDGPURewriteUndefForPHILegacyPass ()
void llvm::initializeAMDGPURewriteUndefForPHILegacyPass (PassRegistry &)
void llvm::initializeSIAnnotateControlFlowLegacyPass (PassRegistry &)
void llvm::initializeSIMemoryLegalizerLegacyPass (PassRegistry &)
void llvm::initializeSIModeRegisterLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUInsertDelayAluLegacyPass (PassRegistry &)
void llvm::initializeAMDGPULowerVGPREncodingLegacyPass (PassRegistry &)
void llvm::initializeSIInsertHardClausesLegacyPass (PassRegistry &)
void llvm::initializeSIInsertWaitcntsLegacyPass (PassRegistry &)
void llvm::initializeSIFormMemoryClausesLegacyPass (PassRegistry &)
void llvm::initializeSIPostRABundlerLegacyPass (PassRegistry &)
void llvm::initializeGCNCreateVOPDLegacyPass (PassRegistry &)
void llvm::initializeAMDGPUUnifyDivergentExitNodesPass (PassRegistry &)
ImmutablePass * llvm::createAMDGPUAAWrapperPass ()
void llvm::initializeAMDGPUAAWrapperPassPass (PassRegistry &)
ImmutablePass * llvm::createAMDGPUExternalAAWrapperPass ()
void llvm::initializeAMDGPUExternalAAWrapperPass (PassRegistry &)
void llvm::initializeAMDGPUArgumentUsageInfoPass (PassRegistry &)
ModulePass * llvm::createAMDGPUExportKernelRuntimeHandlesLegacyPass ()
void llvm::initializeAMDGPUExportKernelRuntimeHandlesLegacyPass (PassRegistry &)
void llvm::initializeGCNNSAReassignLegacyPass (PassRegistry &)
void llvm::initializeGCNPreRALongBranchRegLegacyPass (PassRegistry &)
void llvm::initializeGCNPreRAOptimizationsLegacyPass (PassRegistry &)
FunctionPass * llvm::createAMDGPUSetWavePriorityPass ()
void llvm::initializeAMDGPUSetWavePriorityLegacyPass (PassRegistry &)
void llvm::initializeGCNRewritePartialRegUsesLegacyPass (llvm::PassRegistry &)
void llvm::initializeAMDGPUWaitSGPRHazardsLegacyPass (PassRegistry &)
void llvm::initializeAMDGPURewriteAGPRCopyMFMALegacyPass (PassRegistry &)
static bool llvm::AMDGPU::addrspacesMayAlias (unsigned AS1, unsigned AS2)

Variables

char & llvm::AMDGPUAtomicOptimizerID = AMDGPUAtomicOptimizer::ID
char & llvm::AMDGPUCtorDtorLoweringLegacyPassID
char & llvm::AMDGPULowerKernelArgumentsID
char & llvm::AMDGPUPromoteKernelArgumentsID
char & llvm::AMDGPULowerKernelAttributesID
char & llvm::AMDGPULowerModuleLDSLegacyPassID = AMDGPULowerModuleLDSLegacy::ID
char & llvm::AMDGPULowerBufferFatPointersID = AMDGPULowerBufferFatPointers::ID
char & llvm::AMDGPUPrepareAGPRAllocLegacyID = AMDGPUPrepareAGPRAllocLegacy::ID
char & llvm::AMDGPUReserveWWMRegsLegacyID
char & llvm::AMDGPURewriteOutArgumentsID
char & llvm::GCNDPPCombineLegacyID
char & llvm::SIFoldOperandsLegacyID
char & llvm::SIPeepholeSDWALegacyID
char & llvm::SIShrinkInstructionsLegacyID
char & llvm::SIFixSGPRCopiesLegacyID = SIFixSGPRCopiesLegacy::ID
char & llvm::SIFixVGPRCopiesID
char & llvm::SILowerWWMCopiesLegacyID = SILowerWWMCopiesLegacy::ID
char & llvm::SILowerI1CopiesLegacyID = SILowerI1CopiesLegacy::ID
char & llvm::AMDGPUGlobalISelDivergenceLoweringID
char & llvm::AMDGPURegBankSelectID = AMDGPURegBankSelect::ID
char & llvm::AMDGPURegBankLegalizeID = AMDGPURegBankLegalize::ID
char & llvm::AMDGPUMarkLastScratchLoadID = AMDGPUMarkLastScratchLoadLegacy::ID
char & llvm::SILowerSGPRSpillsLegacyID = SILowerSGPRSpillsLegacy::ID
char & llvm::SILoadStoreOptimizerLegacyID = SILoadStoreOptimizerLegacy::ID
char & llvm::SIWholeQuadModeID = SIWholeQuadModeLegacy::ID
char & llvm::SILowerControlFlowLegacyID = SILowerControlFlowLegacy::ID
char & llvm::SIPreEmitPeepholeID
char & llvm::SILateBranchLoweringPassID = SILateBranchLoweringLegacy::ID
char & llvm::SIOptimizeExecMaskingLegacyID = SIOptimizeExecMaskingLegacy::ID
char & llvm::SIPreAllocateWWMRegsLegacyID = SIPreAllocateWWMRegsLegacy::ID
char & llvm::AMDGPUImageIntrinsicOptimizerID
char & llvm::AMDGPUPerfHintAnalysisLegacyID = AMDGPUPerfHintAnalysisLegacy::ID
char & llvm::GCNRegPressurePrinterID = GCNRegPressurePrinter::ID
char & llvm::AMDGPUPreloadKernArgPrologLegacyID
char & llvm::AMDGPUPreloadKernelArgumentsLegacyID
char & llvm::AMDGPUPromoteAllocaID = AMDGPUPromoteAlloca::ID
char & llvm::AMDGPUSwLowerLDSLegacyPassID = AMDGPUSwLowerLDSLegacy::ID
char & llvm::AMDGPUPrintfRuntimeBindingID = AMDGPUPrintfRuntimeBinding::ID
char & llvm::AMDGPUResourceUsageAnalysisID
char & llvm::SIOptimizeExecMaskingPreRAID = SIOptimizeExecMaskingPreRALegacy::ID
char & llvm::SIOptimizeVGPRLiveRangeLegacyID = SIOptimizeVGPRLiveRangeLegacy::ID
char & llvm::AMDGPUAnnotateUniformValuesLegacyPassID
char & llvm::AMDGPUCodeGenPrepareID
char & llvm::AMDGPURemoveIncompatibleFunctionsID
char & llvm::AMDGPULateCodeGenPrepareLegacyID
char & llvm::AMDGPURewriteUndefForPHILegacyPassID
char & llvm::SIAnnotateControlFlowLegacyPassID
char & llvm::SIMemoryLegalizerID = SIMemoryLegalizerLegacy::ID
char & llvm::SIModeRegisterID
char & llvm::AMDGPUInsertDelayAluID = AMDGPUInsertDelayAluLegacy::ID
char & llvm::AMDGPULowerVGPREncodingLegacyID = AMDGPULowerVGPREncodingLegacy::ID
char & llvm::SIInsertHardClausesID = SIInsertHardClausesLegacy::ID
char & llvm::SIInsertWaitcntsID = SIInsertWaitcntsLegacy::ID
char & llvm::SIFormMemoryClausesID = SIFormMemoryClausesLegacy::ID
char & llvm::SIPostRABundlerLegacyID
char & llvm::GCNCreateVOPDID = GCNCreateVOPDLegacy::ID
char & llvm::AMDGPUUnifyDivergentExitNodesID = AMDGPUUnifyDivergentExitNodes::ID
char & llvm::AMDGPUExportKernelRuntimeHandlesLegacyID
char & llvm::GCNNSAReassignID = GCNNSAReassignLegacy::ID
char & llvm::GCNPreRALongBranchRegID
char & llvm::GCNPreRAOptimizationsID = GCNPreRAOptimizationsLegacy::ID
char & llvm::GCNRewritePartialRegUsesID = GCNRewritePartialRegUsesLegacy::ID
char & llvm::AMDGPUWaitSGPRHazardsLegacyID = AMDGPUWaitSGPRHazardsLegacy::ID
char & llvm::AMDGPURewriteAGPRCopyMFMALegacyID
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