LLVM 22.0.0git
Macros | Functions | Variables
HexagonTargetMachine.cpp File Reference
#include "HexagonTargetMachine.h"
#include "Hexagon.h"
#include "HexagonISelLowering.h"
#include "HexagonLoopIdiomRecognition.h"
#include "HexagonMachineFunctionInfo.h"
#include "HexagonMachineScheduler.h"
#include "HexagonTargetObjectFile.h"
#include "HexagonTargetTransformInfo.h"
#include "HexagonVectorLoopCarriedReuse.h"
#include "TargetInfo/HexagonTargetInfo.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/CodeGen/VLIWMachineScheduler.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Transforms/Scalar.h"
#include <optional>
#include "llvm/Passes/TargetPassRegistry.inc"

Go to the source code of this file.

Macros

#define GET_PASS_REGISTRY   "HexagonPassRegistry.def"
#define ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)
#define ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS(NAME, CLASS)
#define MODULE_ANALYSIS(NAME, CREATE_PASS)
#define MODULE_PASS(NAME, CREATE_PASS)
#define MODULE_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define FUNCTION_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_ALIAS_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_PASS(NAME, CREATE_PASS)
#define FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define LOOP_ANALYSIS(NAME, CREATE_PASS)
#define LOOP_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_ANALYSIS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define ADD_PASS(NAME, CREATE_PASS)
#define ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)
#define MODULE_PASS(NAME, CREATE_PASS)
#define MODULE_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define FUNCTION_PASS(NAME, CREATE_PASS)
#define FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define LOOP_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, PARAMS)
#define MODULE_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_ANALYSIS(NAME, CREATE_PASS)
#define FUNCTION_ALIAS_ANALYSIS(NAME, CREATE_PASS)
#define LOOP_ANALYSIS(NAME, CREATE_PASS)
#define MACHINE_FUNCTION_ANALYSIS(NAME, CREATE_PASS)

Functions

static ScheduleDAGInstrs * createVLIWMachineSched (MachineSchedContext *C)
static Reloc::Model getEffectiveRelocModel (std::optional< Reloc::Model > RM)
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTarget ()

Variables

static cl::opt< bool > EnableCExtOpt ("hexagon-cext", cl::Hidden, cl::init(true), cl::desc("Enable Hexagon constant-extender optimization"))
static cl::opt< bool > EnableRDFOpt ("rdf-opt", cl::Hidden, cl::init(true), cl::desc("Enable RDF-based optimizations"))
cl::opt< unsigned > RDFFuncBlockLimit ("rdf-bb-limit", cl::Hidden, cl::init(1000), cl::desc("Basic block limit for a function for RDF optimizations"))
static cl::opt< bool > DisableHardwareLoops ("disable-hexagon-hwloops", cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target"))
static cl::opt< bool > DisableAModeOpt ("disable-hexagon-amodeopt", cl::Hidden, cl::desc("Disable Hexagon Addressing Mode Optimization"))
static cl::opt< bool > DisableHexagonCFGOpt ("disable-hexagon-cfgopt", cl::Hidden, cl::desc("Disable Hexagon CFG Optimization"))
static cl::opt< bool > DisableHCP ("disable-hcp", cl::Hidden, cl::desc("Disable Hexagon constant propagation"))
static cl::opt< bool > DisableHexagonMask ("disable-mask", cl::Hidden, cl::desc("Disable Hexagon specific Mask generation pass"))
static cl::opt< bool > DisableStoreWidening ("disable-store-widen", cl::Hidden, cl::init(false), cl::desc("Disable store widening"))
static cl::opt< bool > DisableLoadWidening ("disable-load-widen", cl::Hidden, cl::desc("Disable load widening"))
static cl::opt< bool > EnableExpandCondsets ("hexagon-expand-condsets", cl::init(true), cl::Hidden, cl::desc("Early expansion of MUX"))
static cl::opt< bool > EnableTfrCleanup ("hexagon-tfr-cleanup", cl::init(true), cl::Hidden, cl::desc("Cleanup of TFRs/COPYs"))
static cl::opt< bool > EnableEarlyIf ("hexagon-eif", cl::init(true), cl::Hidden, cl::desc("Enable early if-conversion"))
static cl::opt< bool > EnableCopyHoist ("hexagon-copy-hoist", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable Hexagon copy hoisting"))
static cl::opt< bool > EnableGenInsert ("hexagon-insert", cl::init(true), cl::Hidden, cl::desc("Generate \"insert\" instructions"))
static cl::opt< bool > EnableCommGEP ("hexagon-commgep", cl::init(true), cl::Hidden, cl::desc("Enable commoning of GEP instructions"))
static cl::opt< bool > EnableGenExtract ("hexagon-extract", cl::init(true), cl::Hidden, cl::desc("Generate \"extract\" instructions"))
static cl::opt< bool > EnableGenMux ("hexagon-mux", cl::init(true), cl::Hidden, cl::desc("Enable converting conditional transfers into MUX instructions"))
static cl::opt< bool > EnableGenPred ("hexagon-gen-pred", cl::init(true), cl::Hidden, cl::desc("Enable conversion of arithmetic operations to " "predicate instructions"))
static cl::opt< bool > EnableLoopPrefetch ("hexagon-loop-prefetch", cl::Hidden, cl::desc("Enable loop data prefetch on Hexagon"))
static cl::opt< bool > DisableHSDR ("disable-hsdr", cl::init(false), cl::Hidden, cl::desc("Disable splitting double registers"))
static cl::opt< bool > EnableGenMemAbs ("hexagon-mem-abs", cl::init(true), cl::Hidden, cl::desc("Generate absolute set instructions"))
static cl::opt< bool > EnableBitSimplify ("hexagon-bit", cl::init(true), cl::Hidden, cl::desc("Bit simplification"))
static cl::opt< bool > EnableLoopResched ("hexagon-loop-resched", cl::init(true), cl::Hidden, cl::desc("Loop rescheduling"))
static cl::opt< bool > HexagonNoOpt ("hexagon-noopt", cl::init(false), cl::Hidden, cl::desc("Disable backend optimizations"))
static cl::opt< bool > EnableVectorPrint ("enable-hexagon-vector-print", cl::Hidden, cl::desc("Enable Hexagon Vector print instr pass"))
static cl::opt< bool > EnableVExtractOpt ("hexagon-opt-vextract", cl::Hidden, cl::init(true), cl::desc("Enable vextract optimization"))
static cl::opt< bool > EnableVectorCombine ("hexagon-vector-combine", cl::Hidden, cl::init(true), cl::desc("Enable HVX vector combining"))
static cl::opt< bool > EnableInitialCFGCleanup ("hexagon-initial-cfg-cleanup", cl::Hidden, cl::init(true), cl::desc("Simplify the CFG after atomic expansion pass"))
static cl::opt< bool > EnableInstSimplify ("hexagon-instsimplify", cl::Hidden, cl::init(true), cl::desc("Enable instsimplify"))
int HexagonTargetMachineModule = 0
 HexagonTargetMachineModule - Note that this is used on hosts that cannot link in a library unless there are references into the library.
static MachineSchedRegistry SchedCustomRegistry ("hexagon", "Run Hexagon's custom scheduler", createVLIWMachineSched)

Macro Definition Documentation

◆ ADD_CLASS_PASS_TO_PASS_NAME

#define ADD_CLASS_PASS_TO_PASS_NAME ( NAME,
CREATE_PASS )
Value:
PIC->addClassToPassName(decltype(CREATE_PASS)::name(), NAME);
PIC
PassInstrumentationCallbacks PIC
Definition PassBuilderBindings.cpp:57
name
static const char * name
Definition SMEABIPass.cpp:52

◆ ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS

#define ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS ( NAME,
CLASS )
Value:
PIC->addClassToPassName(CLASS, NAME);

◆ ADD_PASS

#define ADD_PASS ( NAME,
CREATE_PASS )
Value:
if (Name == NAME) { \
PM.addPass(CREATE_PASS); \
return true; \
}

◆ ADD_PASS_WITH_PARAMS

#define ADD_PASS_WITH_PARAMS ( NAME,
CREATE_PASS,
PARSER )
Value:
if (PassBuilder::checkParametrizedPassName(Name, NAME)) { \
auto Params = PassBuilder::parsePassParameters(PARSER, Name, NAME); \
if (!Params) { \
errs() << NAME ": " << toString(Params.takeError()) << '\n'; \
return false; \
} \
PM.addPass(CREATE_PASS(Params.get())); \
return true; \
}
llvm::PassBuilder::checkParametrizedPassName
static bool checkParametrizedPassName(StringRef Name, StringRef PassName)
Definition PassBuilder.h:683
llvm::PassBuilder::parsePassParameters
static auto parsePassParameters(ParametersParseCallableT &&Parser, StringRef Name, StringRef PassName) -> decltype(Parser(StringRef{}))
This performs customized parsing of pass name with parameters.
Definition PassBuilder.h:708
llvm::toString
std::string toString(const APInt &I, unsigned Radix, bool Signed, bool formatAsCLiteral=false, bool UpperCase=true, bool InsertSeparators=false)
Definition StringExtras.h:344

◆ FUNCTION_ALIAS_ANALYSIS [1/2]

#define FUNCTION_ALIAS_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)
ADD_CLASS_PASS_TO_PASS_NAME
#define ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ FUNCTION_ALIAS_ANALYSIS [2/2]

#define FUNCTION_ALIAS_ANALYSIS ( NAME,
CREATE_PASS )
Value:
if (Name == NAME) { \
AM.registerFunctionAnalysis< \
std::remove_reference_t<decltype(CREATE_PASS)>>(); \
return true; \
}

◆ FUNCTION_ANALYSIS [1/2]

#define FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ FUNCTION_ANALYSIS [2/2]

#define FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ FUNCTION_PASS [1/2]

#define FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ FUNCTION_PASS [2/2]

#define FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)
ADD_PASS
#define ADD_PASS(NAME, CREATE_PASS)

◆ FUNCTION_PASS_WITH_PARAMS [1/2]

#define FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS(NAME, CLASS)
ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS
#define ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS(NAME, CLASS)

◆ FUNCTION_PASS_WITH_PARAMS [2/2]

#define FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)
ADD_PASS_WITH_PARAMS
#define ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)

◆ GET_PASS_REGISTRY

#define GET_PASS_REGISTRY   "HexagonPassRegistry.def"

◆ LOOP_ANALYSIS [1/2]

#define LOOP_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ LOOP_ANALYSIS [2/2]

#define LOOP_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ LOOP_PASS [1/2]

#define LOOP_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ LOOP_PASS [2/2]

#define LOOP_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_ANALYSIS [1/2]

#define MACHINE_FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_ANALYSIS [2/2]

#define MACHINE_FUNCTION_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ MACHINE_FUNCTION_PASS [1/2]

#define MACHINE_FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_PASS [2/2]

#define MACHINE_FUNCTION_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)

◆ MACHINE_FUNCTION_PASS_WITH_PARAMS [1/2]

#define MACHINE_FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS(NAME, CLASS)

◆ MACHINE_FUNCTION_PASS_WITH_PARAMS [2/2]

#define MACHINE_FUNCTION_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)

◆ MODULE_ANALYSIS [1/2]

#define MODULE_ANALYSIS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MODULE_ANALYSIS [2/2]

#define MODULE_ANALYSIS ( NAME,
CREATE_PASS )
Value:
AM.registerPass([&] { return CREATE_PASS; });

◆ MODULE_PASS [1/2]

#define MODULE_PASS ( NAME,
CREATE_PASS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME(NAME, CREATE_PASS)

◆ MODULE_PASS [2/2]

#define MODULE_PASS ( NAME,
CREATE_PASS )
Value:
ADD_PASS(NAME, CREATE_PASS)

◆ MODULE_PASS_WITH_PARAMS [1/2]

#define MODULE_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_CLASS_PASS_TO_PASS_NAME_WITH_PARAMS(NAME, CLASS)

◆ MODULE_PASS_WITH_PARAMS [2/2]

#define MODULE_PASS_WITH_PARAMS ( NAME,
CLASS,
CREATE_PASS,
PARSER,
PARAMS )
Value:
ADD_PASS_WITH_PARAMS(NAME, CREATE_PASS, PARSER)

Function Documentation

◆ createVLIWMachineSched()

ScheduleDAGInstrs * createVLIWMachineSched ( MachineSchedContext * C)
static

Definition at line 160 of file HexagonTargetMachine.cpp.

References llvm::ScheduleDAGMI::addMutation(), llvm::CallingConv::C, llvm::createCopyConstrainDAGMutation(), llvm::ScheduleDAG::TII, and llvm::ScheduleDAG::TRI.

Referenced by llvm::HexagonTargetMachine::createMachineScheduler().

◆ getEffectiveRelocModel()

Reloc::Model getEffectiveRelocModel ( std::optional< Reloc::Model > RM)
static

Definition at line 174 of file HexagonTargetMachine.cpp.

References llvm::Reloc::Static.

◆ LLVMInitializeHexagonTarget()

LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTarget ( )

Definition at line 179 of file HexagonTargetMachine.cpp.

References llvm::PassRegistry::getPassRegistry(), llvm::getTheHexagonTarget(), llvm::initializeHexagonAsmPrinterPass(), llvm::initializeHexagonBitSimplifyPass(), llvm::initializeHexagonBranchRelaxationPass(), llvm::initializeHexagonCallFrameInformationPass(), llvm::initializeHexagonCFGOptimizerPass(), llvm::initializeHexagonCommonGEPPass(), llvm::initializeHexagonConstExtendersPass(), llvm::initializeHexagonConstPropagationPass(), llvm::initializeHexagonCopyHoistingPass(), llvm::initializeHexagonCopyToCombinePass(), llvm::initializeHexagonDAGToDAGISelLegacyPass(), llvm::initializeHexagonEarlyIfConversionPass(), llvm::initializeHexagonExpandCondsetsPass(), llvm::initializeHexagonFixupHwLoopsPass(), llvm::initializeHexagonGenExtractPass(), llvm::initializeHexagonGenInsertPass(), llvm::initializeHexagonGenMemAbsolutePass(), llvm::initializeHexagonGenMuxPass(), llvm::initializeHexagonGenPredicatePass(), llvm::initializeHexagonHardwareLoopsPass(), llvm::initializeHexagonLoadWideningPass(), llvm::initializeHexagonLoopAlignPass(), llvm::initializeHexagonLoopIdiomRecognizeLegacyPassPass(), llvm::initializeHexagonLoopReschedulingPass(), llvm::initializeHexagonMaskPass(), llvm::initializeHexagonNewValueJumpPass(), llvm::initializeHexagonOptAddrModePass(), llvm::initializeHexagonOptimizeSZextendsPass(), llvm::initializeHexagonPacketizerPass(), llvm::initializeHexagonPeepholePass(), llvm::initializeHexagonRDFOptPass(), llvm::initializeHexagonSplitConst32AndConst64Pass(), llvm::initializeHexagonSplitDoubleRegsPass(), llvm::initializeHexagonStoreWideningPass(), llvm::initializeHexagonTfrCleanupPass(), llvm::initializeHexagonVectorCombineLegacyPass(), llvm::initializeHexagonVectorLoopCarriedReuseLegacyPassPass(), llvm::initializeHexagonVectorPrintPass(), llvm::initializeHexagonVExtractPass(), and X.

Variable Documentation

◆ DisableAModeOpt

cl::opt< bool > DisableAModeOpt("disable-hexagon-amodeopt", cl::Hidden, cl::desc("Disable Hexagon Addressing Mode Optimization")) ( "disable-hexagon-amodeopt" ,
cl::Hidden ,
cl::desc("Disable Hexagon Addressing Mode Optimization")  )
static

◆ DisableHardwareLoops

cl::opt< bool > DisableHardwareLoops("disable-hexagon-hwloops", cl::Hidden, cl::desc("Disable Hardware Loops for Hexagon target")) ( "disable-hexagon-hwloops" ,
cl::Hidden ,
cl::desc("Disable Hardware Loops for Hexagon target")  )
static

◆ DisableHCP

cl::opt< bool > DisableHCP("disable-hcp", cl::Hidden, cl::desc("Disable Hexagon constant propagation")) ( "disable-hcp" ,
cl::Hidden ,
cl::desc("Disable Hexagon constant propagation")  )
static

◆ DisableHexagonCFGOpt

cl::opt< bool > DisableHexagonCFGOpt("disable-hexagon-cfgopt", cl::Hidden, cl::desc("Disable Hexagon CFG Optimization")) ( "disable-hexagon-cfgopt" ,
cl::Hidden ,
cl::desc("Disable Hexagon CFG Optimization")  )
static

◆ DisableHexagonMask

cl::opt< bool > DisableHexagonMask("disable-mask", cl::Hidden, cl::desc("Disable Hexagon specific Mask generation pass")) ( "disable-mask" ,
cl::Hidden ,
cl::desc("Disable Hexagon specific Mask generation pass")  )
static

◆ DisableHSDR

cl::opt< bool > DisableHSDR("disable-hsdr", cl::init(false), cl::Hidden, cl::desc("Disable splitting double registers")) ( "disable-hsdr" ,
cl::init(false) ,
cl::Hidden ,
cl::desc("Disable splitting double registers")  )
static

◆ DisableLoadWidening

cl::opt< bool > DisableLoadWidening("disable-load-widen", cl::Hidden, cl::desc("Disable load widening")) ( "disable-load-widen" ,
cl::Hidden ,
cl::desc("Disable load widening")  )
static

◆ DisableStoreWidening

cl::opt< bool > DisableStoreWidening("disable-store-widen", cl::Hidden, cl::init(false), cl::desc("Disable store widening")) ( "disable-store-widen" ,
cl::Hidden ,
cl::init(false) ,
cl::desc("Disable store widening")  )
static

◆ EnableBitSimplify

cl::opt< bool > EnableBitSimplify("hexagon-bit", cl::init(true), cl::Hidden, cl::desc("Bit simplification")) ( "hexagon-bit" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Bit simplification")  )
static

◆ EnableCExtOpt

cl::opt< bool > EnableCExtOpt("hexagon-cext", cl::Hidden, cl::init(true), cl::desc("Enable Hexagon constant-extender optimization")) ( "hexagon-cext" ,
cl::Hidden ,
cl::init(true) ,
cl::desc("Enable Hexagon constant-extender optimization")  )
static

◆ EnableCommGEP

cl::opt< bool > EnableCommGEP("hexagon-commgep", cl::init(true), cl::Hidden, cl::desc("Enable commoning of GEP instructions")) ( "hexagon-commgep" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Enable commoning of GEP instructions")  )
static

◆ EnableCopyHoist

cl::opt< bool > EnableCopyHoist("hexagon-copy-hoist", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable Hexagon copy hoisting")) ( "hexagon-copy-hoist" ,
cl::init(true) ,
cl::Hidden ,
cl::ZeroOrMore ,
cl::desc("Enable Hexagon copy hoisting")  )
static

◆ EnableEarlyIf

cl::opt< bool > EnableEarlyIf("hexagon-eif", cl::init(true), cl::Hidden, cl::desc("Enable early if-conversion")) ( "hexagon-eif" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Enable early if-conversion")  )
static

◆ EnableExpandCondsets

cl::opt< bool > EnableExpandCondsets("hexagon-expand-condsets", cl::init(true), cl::Hidden, cl::desc("Early expansion of MUX")) ( "hexagon-expand-condsets" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Early expansion of MUX")  )
static

◆ EnableGenExtract

cl::opt< bool > EnableGenExtract("hexagon-extract", cl::init(true), cl::Hidden, cl::desc("Generate \"extract\" instructions")) ( "hexagon-extract" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Generate \"extract\" instructions")  )
static

◆ EnableGenInsert

cl::opt< bool > EnableGenInsert("hexagon-insert", cl::init(true), cl::Hidden, cl::desc("Generate \"insert\" instructions")) ( "hexagon-insert" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Generate \"insert\" instructions")  )
static

◆ EnableGenMemAbs

cl::opt< bool > EnableGenMemAbs("hexagon-mem-abs", cl::init(true), cl::Hidden, cl::desc("Generate absolute set instructions")) ( "hexagon-mem-abs" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Generate absolute set instructions")  )
static

◆ EnableGenMux

cl::opt< bool > EnableGenMux("hexagon-mux", cl::init(true), cl::Hidden, cl::desc("Enable converting conditional transfers into MUX instructions")) ( "hexagon-mux" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Enable converting conditional transfers into MUX instructions")  )
static

◆ EnableGenPred

cl::opt< bool > EnableGenPred("hexagon-gen-pred", cl::init(true), cl::Hidden, cl::desc("Enable conversion of arithmetic operations to " "predicate instructions")) ( "hexagon-gen-pred" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Enable conversion of arithmetic operations to " "predicate instructions")  )
static

◆ EnableInitialCFGCleanup

cl::opt< bool > EnableInitialCFGCleanup("hexagon-initial-cfg-cleanup", cl::Hidden, cl::init(true), cl::desc("Simplify the CFG after atomic expansion pass")) ( "hexagon-initial-cfg-cleanup" ,
cl::Hidden ,
cl::init(true) ,
cl::desc("Simplify the CFG after atomic expansion pass")  )
static

◆ EnableInstSimplify

cl::opt< bool > EnableInstSimplify("hexagon-instsimplify", cl::Hidden, cl::init(true), cl::desc("Enable instsimplify")) ( "hexagon-instsimplify" ,
cl::Hidden ,
cl::init(true) ,
cl::desc("Enable instsimplify")  )
static

◆ EnableLoopPrefetch

cl::opt< bool > EnableLoopPrefetch("hexagon-loop-prefetch", cl::Hidden, cl::desc("Enable loop data prefetch on Hexagon")) ( "hexagon-loop-prefetch" ,
cl::Hidden ,
cl::desc("Enable loop data prefetch on Hexagon")  )
static

◆ EnableLoopResched

cl::opt< bool > EnableLoopResched("hexagon-loop-resched", cl::init(true), cl::Hidden, cl::desc("Loop rescheduling")) ( "hexagon-loop-resched" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Loop rescheduling")  )
static

◆ EnableRDFOpt

cl::opt< bool > EnableRDFOpt("rdf-opt", cl::Hidden, cl::init(true), cl::desc("Enable RDF-based optimizations")) ( "rdf-opt" ,
cl::Hidden ,
cl::init(true) ,
cl::desc("Enable RDF-based optimizations")  )
static

◆ EnableTfrCleanup

cl::opt< bool > EnableTfrCleanup("hexagon-tfr-cleanup", cl::init(true), cl::Hidden, cl::desc("Cleanup of TFRs/COPYs")) ( "hexagon-tfr-cleanup" ,
cl::init(true) ,
cl::Hidden ,
cl::desc("Cleanup of TFRs/COPYs")  )
static

◆ EnableVectorCombine

cl::opt< bool > EnableVectorCombine("hexagon-vector-combine", cl::Hidden, cl::init(true), cl::desc("Enable HVX vector combining")) ( "hexagon-vector-combine" ,
cl::Hidden ,
cl::init(true) ,
cl::desc("Enable HVX vector combining")  )
static

◆ EnableVectorPrint

cl::opt< bool > EnableVectorPrint("enable-hexagon-vector-print", cl::Hidden, cl::desc("Enable Hexagon Vector print instr pass")) ( "enable-hexagon-vector-print" ,
cl::Hidden ,
cl::desc("Enable Hexagon Vector print instr pass")  )
static

◆ EnableVExtractOpt

cl::opt< bool > EnableVExtractOpt("hexagon-opt-vextract", cl::Hidden, cl::init(true), cl::desc("Enable vextract optimization")) ( "hexagon-opt-vextract" ,
cl::Hidden ,
cl::init(true) ,
cl::desc("Enable vextract optimization")  )
static

◆ HexagonNoOpt

cl::opt< bool > HexagonNoOpt("hexagon-noopt", cl::init(false), cl::Hidden, cl::desc("Disable backend optimizations")) ( "hexagon-noopt" ,
cl::init(false) ,
cl::Hidden ,
cl::desc("Disable backend optimizations")  )
static

Referenced by llvm::HexagonTargetMachine::HexagonTargetMachine().

◆ HexagonTargetMachineModule

int HexagonTargetMachineModule = 0

HexagonTargetMachineModule - Note that this is used on hosts that cannot link in a library unless there are references into the library.

In particular, it seems that it is not possible to get things to work on Win32 without this. Though it is unused, do not remove it.

Definition at line 157 of file HexagonTargetMachine.cpp.

◆ RDFFuncBlockLimit

cl::opt< unsigned > RDFFuncBlockLimit("rdf-bb-limit", cl::Hidden, cl::init(1000), cl::desc("Basic block limit for a function for RDF optimizations")) ( "rdf-bb-limit" ,
cl::Hidden ,
cl::init(1000) ,
cl::desc("Basic block limit for a function for RDF optimizations")  )

◆ SchedCustomRegistry

MachineSchedRegistry SchedCustomRegistry("hexagon", "Run Hexagon's custom scheduler", createVLIWMachineSched) ( "hexagon" ,
"Run Hexagon's custom scheduler" ,
createVLIWMachineSched  )
static
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