LLVM 20.0.0git
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#include "AArch64TargetMachine.h"
#include "AArch64.h"
#include "AArch64MachineFunctionInfo.h"
#include "AArch64MachineScheduler.h"
#include "AArch64MacroFusion.h"
#include "AArch64Subtarget.h"
#include "AArch64TargetObjectFile.h"
#include "AArch64TargetTransformInfo.h"
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "TargetInfo/AArch64TargetInfo.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/Analysis/ValueTracking.h"
#include "llvm/CodeGen/CFIFixup.h"
#include "llvm/CodeGen/CSEConfigBase.h"
#include "llvm/CodeGen/GlobalISel/CSEInfo.h"
#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
#include "llvm/CodeGen/GlobalISel/Legalizer.h"
#include "llvm/CodeGen/GlobalISel/LoadStoreOpt.h"
#include "llvm/CodeGen/GlobalISel/Localizer.h"
#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/MIRParser/MIParser.h"
#include "llvm/CodeGen/MachineScheduler.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Function.h"
#include "llvm/InitializePasses.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCTargetOptions.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Pass.h"
#include "llvm/Passes/PassBuilder.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/TargetParser/Triple.h"
#include "llvm/Transforms/CFGuard.h"
#include "llvm/Transforms/Scalar.h"
#include "llvm/Transforms/Vectorize/LoopIdiomVectorize.h"
#include <memory>
#include <optional>
#include <string>
Go to the source code of this file.
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LLVM_EXTERNAL_VISIBILITY void | LLVMInitializeAArch64Target () |
static std::unique_ptr< TargetLoweringObjectFile > | createTLOF (const Triple &TT) |
static std::string | computeDataLayout (const Triple &TT, const MCTargetOptions &Options, bool LittleEndian) |
static StringRef | computeDefaultCPU (const Triple &TT, StringRef CPU) |
static Reloc::Model | getEffectiveRelocModel (const Triple &TT, std::optional< Reloc::Model > RM) |
static CodeModel::Model | getEffectiveAArch64CodeModel (const Triple &TT, std::optional< CodeModel::Model > CM, bool JIT) |
Variables | |
static cl::opt< bool > | EnableCCMP ("aarch64-enable-ccmp", cl::desc("Enable the CCMP formation pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableCondBrTuning ("aarch64-enable-cond-br-tune", cl::desc("Enable the conditional branch tuning pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableAArch64CopyPropagation ("aarch64-enable-copy-propagation", cl::desc("Enable the copy propagation with AArch64 copy instr"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableMCR ("aarch64-enable-mcr", cl::desc("Enable the machine combiner pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableStPairSuppress ("aarch64-enable-stp-suppress", cl::desc("Suppress STP for AArch64"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableAdvSIMDScalar ("aarch64-enable-simd-scalar", cl::desc("Enable use of AdvSIMD scalar integer instructions"), cl::init(false), cl::Hidden) |
static cl::opt< bool > | EnablePromoteConstant ("aarch64-enable-promote-const", cl::desc("Enable the promote constant pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableCollectLOH ("aarch64-enable-collect-loh", cl::desc("Enable the pass that emits the linker optimization hints (LOH)"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableDeadRegisterElimination ("aarch64-enable-dead-defs", cl::Hidden, cl::desc("Enable the pass that removes dead" " definitons and replaces stores to" " them with stores to the zero" " register"), cl::init(true)) |
static cl::opt< bool > | EnableRedundantCopyElimination ("aarch64-enable-copyelim", cl::desc("Enable the redundant copy elimination pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableLoadStoreOpt ("aarch64-enable-ldst-opt", cl::desc("Enable the load/store pair" " optimization pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableAtomicTidy ("aarch64-enable-atomic-cfg-tidy", cl::Hidden, cl::desc("Run SimplifyCFG after expanding atomic operations" " to make use of cmpxchg flow-based information"), cl::init(true)) |
static cl::opt< bool > | EnableEarlyIfConversion ("aarch64-enable-early-ifcvt", cl::Hidden, cl::desc("Run early if-conversion"), cl::init(true)) |
static cl::opt< bool > | EnableCondOpt ("aarch64-enable-condopt", cl::desc("Enable the condition optimizer pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableGEPOpt ("aarch64-enable-gep-opt", cl::Hidden, cl::desc("Enable optimizations on complex GEPs"), cl::init(false)) |
static cl::opt< bool > | EnableSelectOpt ("aarch64-select-opt", cl::Hidden, cl::desc("Enable select to branch optimizations"), cl::init(true)) |
static cl::opt< bool > | BranchRelaxation ("aarch64-enable-branch-relax", cl::Hidden, cl::init(true), cl::desc("Relax out of range conditional branches")) |
static cl::opt< bool > | EnableCompressJumpTables ("aarch64-enable-compress-jump-tables", cl::Hidden, cl::init(true), cl::desc("Use smallest entry possible for jump tables")) |
static cl::opt< cl::boolOrDefault > | EnableGlobalMerge ("aarch64-enable-global-merge", cl::Hidden, cl::desc("Enable the global merge pass")) |
static cl::opt< bool > | EnableLoopDataPrefetch ("aarch64-enable-loop-data-prefetch", cl::Hidden, cl::desc("Enable the loop data prefetch pass"), cl::init(true)) |
static cl::opt< int > | EnableGlobalISelAtO ("aarch64-enable-global-isel-at-O", cl::Hidden, cl::desc("Enable GlobalISel at or below an opt level (-1 to disable)"), cl::init(0)) |
static cl::opt< bool > | EnableSVEIntrinsicOpts ("aarch64-enable-sve-intrinsic-opts", cl::Hidden, cl::desc("Enable SVE intrinsic opts"), cl::init(true)) |
static cl::opt< bool > | EnableSMEPeepholeOpt ("enable-aarch64-sme-peephole-opt", cl::init(true), cl::Hidden, cl::desc("Perform SME peephole optimization")) |
static cl::opt< bool > | EnableFalkorHWPFFix ("aarch64-enable-falkor-hwpf-fix", cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableBranchTargets ("aarch64-enable-branch-targets", cl::Hidden, cl::desc("Enable the AArch64 branch target pass"), cl::init(true)) |
static cl::opt< unsigned > | SVEVectorBitsMaxOpt ("aarch64-sve-vector-bits-max", cl::desc("Assume SVE vector registers are at most this big, " "with zero meaning no maximum size is assumed."), cl::init(0), cl::Hidden) |
static cl::opt< unsigned > | SVEVectorBitsMinOpt ("aarch64-sve-vector-bits-min", cl::desc("Assume SVE vector registers are at least this big, " "with zero meaning no minimum size is assumed."), cl::init(0), cl::Hidden) |
static cl::opt< bool > | ForceStreaming ("force-streaming", cl::desc("Force the use of streaming code for all functions"), cl::init(false), cl::Hidden) |
static cl::opt< bool > | ForceStreamingCompatible ("force-streaming-compatible", cl::desc("Force the use of streaming-compatible code for all functions"), cl::init(false), cl::Hidden) |
cl::opt< bool > | EnableHomogeneousPrologEpilog |
static cl::opt< bool > | EnableGISelLoadStoreOptPreLegal ("aarch64-enable-gisel-ldst-prelegal", cl::desc("Enable GlobalISel's pre-legalizer load/store optimization pass"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableGISelLoadStoreOptPostLegal ("aarch64-enable-gisel-ldst-postlegal", cl::desc("Enable GlobalISel's post-legalizer load/store optimization pass"), cl::init(false), cl::Hidden) |
static cl::opt< bool > | EnableSinkFold ("aarch64-enable-sink-fold", cl::desc("Enable sinking and folding of instruction copies"), cl::init(true), cl::Hidden) |
static cl::opt< bool > | EnableMachinePipeliner ("aarch64-enable-pipeliner", cl::desc("Enable Machine Pipeliner for AArch64"), cl::init(false), cl::Hidden) |
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Definition at line 288 of file AArch64TargetMachine.cpp.
References llvm::Triple::aarch64_32, Endian, and llvm::Triple::GNUILP32.
Definition at line 304 of file AArch64TargetMachine.cpp.
References llvm::StringRef::empty().
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Definition at line 278 of file AArch64TargetMachine.cpp.
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Definition at line 324 of file AArch64TargetMachine.cpp.
References llvm::CodeModel::Large, llvm::report_fatal_error(), llvm::CodeModel::Small, and llvm::CodeModel::Tiny.
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Definition at line 310 of file AArch64TargetMachine.cpp.
References llvm::Reloc::DynamicNoPIC, llvm::Reloc::PIC_, and llvm::Reloc::Static.
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target | ( | ) |
Definition at line 227 of file AArch64TargetMachine.cpp.
References llvm::PassRegistry::getPassRegistry(), llvm::getTheAArch64_32Target(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64_32Target(), llvm::getTheARM64Target(), llvm::initializeAArch64A53Fix835769Pass(), llvm::initializeAArch64A57FPLoadBalancingPass(), llvm::initializeAArch64AdvSIMDScalarPass(), llvm::initializeAArch64BranchTargetsPass(), llvm::initializeAArch64CollectLOHPass(), llvm::initializeAArch64CompressJumpTablesPass(), llvm::initializeAArch64ConditionalComparesPass(), llvm::initializeAArch64ConditionOptimizerPass(), llvm::initializeAArch64DAGToDAGISelLegacyPass(), llvm::initializeAArch64DeadRegisterDefinitionsPass(), llvm::initializeAArch64ExpandPseudoPass(), llvm::initializeAArch64GlobalsTaggingPass(), llvm::initializeAArch64LoadStoreOptPass(), llvm::initializeAArch64LowerHomogeneousPrologEpilogPass(), llvm::initializeAArch64MIPeepholeOptPass(), llvm::initializeAArch64O0PreLegalizerCombinerPass(), llvm::initializeAArch64PointerAuthPass(), llvm::initializeAArch64PostCoalescerPass(), llvm::initializeAArch64PostLegalizerCombinerPass(), llvm::initializeAArch64PostLegalizerLoweringPass(), llvm::initializeAArch64PostSelectOptimizePass(), llvm::initializeAArch64PreLegalizerCombinerPass(), llvm::initializeAArch64PromoteConstantPass(), llvm::initializeAArch64RedundantCopyEliminationPass(), llvm::initializeAArch64SIMDInstrOptPass(), llvm::initializeAArch64SLSHardeningPass(), llvm::initializeAArch64SpeculationHardeningPass(), llvm::initializeAArch64StackTaggingPass(), llvm::initializeAArch64StackTaggingPreRAPass(), llvm::initializeAArch64StorePairSuppressPass(), llvm::initializeFalkorHWPFFixPass(), llvm::initializeFalkorMarkStridedAccessesLegacyPass(), llvm::initializeGlobalISel(), llvm::initializeKCFIPass(), llvm::initializeLDTLSCleanupPass(), llvm::initializeSMEABIPass(), llvm::initializeSMEPeepholeOptPass(), llvm::initializeSVEIntrinsicOptsPass(), X, and Y.
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Referenced by llvm::AArch64TargetMachine::AArch64TargetMachine().
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Referenced by llvm::PPCSubtarget::enableMachinePipeliner().
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Referenced by llvm::AArch64TargetMachine::getSubtargetImpl().
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Referenced by llvm::AArch64TargetMachine::getSubtargetImpl().
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Referenced by llvm::AArch64TargetMachine::getSubtargetImpl().
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Referenced by llvm::AArch64TargetMachine::getSubtargetImpl().