LLVM 23.0.0git
AArch64TargetMachine.h
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1//==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the AArch64 specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
14#define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
15
16#include "AArch64InstrInfo.h"
17#include "AArch64Subtarget.h"
19#include "llvm/IR/DataLayout.h"
20#include <optional>
21
22namespace llvm {
23
25protected:
26 std::unique_ptr<TargetLoweringObjectFile> TLOF;
28
29 /// Reset internal state.
30 void reset() override;
31
32public:
33 AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
35 std::optional<Reloc::Model> RM,
36 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
37 bool JIT, bool IsLittleEndian);
38
40 const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;
41 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
42 // subtargets are per-function entities based on the target-specific
43 // attributes of each function.
44 const AArch64Subtarget *getSubtargetImpl() const = delete;
45
46 // Pass Pipeline Configuration
48
50
52
54 return TLOF.get();
55 }
56
59 const TargetSubtargetInfo *STI) const override;
60
63 convertFuncInfoToYAML(const MachineFunction &MF) const override;
67 SMRange &SourceRange) const override;
68
69 /// Returns true if a cast between SrcAS and DestAS is a noop.
70 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
71 return getPointerSize(SrcAS) == getPointerSize(DestAS);
72 }
75
78
80 const SmallPtrSetImpl<MachineInstr *> &MIs) const override;
81
82 /// Returns the optimisation level that enables GlobalISel.
83 unsigned getEnableGlobalISelAtO() const;
84
85private:
86 bool isLittle;
87};
88
89// AArch64 little endian target machine.
90//
92 virtual void anchor();
93
94public:
95 AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
97 std::optional<Reloc::Model> RM,
98 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
99 bool JIT);
100};
101
102// AArch64 big endian target machine.
103//
105 virtual void anchor();
106
107public:
108 AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
110 std::optional<Reloc::Model> RM,
111 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
112 bool JIT);
113};
114
115} // end namespace llvm
116
117#endif
#define F(x, y, z)
Definition MD5.cpp:54
#define T
PassBuilder PB(Machine, PassOpts->PTO, std::nullopt, &PIC)
Basic Register Allocator
size_t clearLinkerOptimizationHints(const SmallPtrSetImpl< MachineInstr * > &MIs) const override
Remove all Linker Optimization Hints (LOH) associated with instructions in MIs and.
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override
Returns true if a cast between SrcAS and DestAS is a noop.
StringMap< std::unique_ptr< AArch64Subtarget > > SubtargetMap
MachineFunctionInfo * createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, const TargetSubtargetInfo *STI) const override
Create the target's instance of MachineFunctionInfo.
void registerPassBuilderCallbacks(PassBuilder &PB) override
Allow the target to modify the pass pipeline.
const AArch64Subtarget * getSubtargetImpl() const =delete
yaml::MachineFunctionInfo * createDefaultFuncInfoYAML() const override
Allocate and return a default initialized instance of the YAML representation for the MachineFunction...
ScheduleDAGInstrs * createPostMachineScheduler(MachineSchedContext *C) const override
Similar to createMachineScheduler but used when postRA machine scheduling is enabled.
unsigned getEnableGlobalISelAtO() const
Returns the optimisation level that enables GlobalISel.
std::unique_ptr< TargetLoweringObjectFile > TLOF
yaml::MachineFunctionInfo * convertFuncInfoToYAML(const MachineFunction &MF) const override
Allocate and initialize an instance of the YAML representation of the MachineFunctionInfo.
bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, PerFunctionMIParsingState &PFS, SMDiagnostic &Error, SMRange &SourceRange) const override
Parse out the target's MachineFunctionInfo from the YAML reprsentation.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
void reset() override
Reset internal state.
AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT, bool IsLittleEndian)
Create an AArch64 architecture model.
ScheduleDAGInstrs * createMachineScheduler(MachineSchedContext *C) const override
Create an instance of ScheduleDAGInstrs to be run within the standard MachineScheduler pass for this ...
TargetLoweringObjectFile * getObjFileLowering() const override
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
Return a TargetTransformInfo for a given function.
AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOptLevel OL, bool JIT)
CodeGenTargetMachineImpl(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOptLevel OL)
Lightweight error class with error context and mandatory checking.
Definition Error.h:159
This class provides access to building LLVM's passes.
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition SourceMgr.h:297
Represents a range in source code.
Definition SMLoc.h:47
A ScheduleDAG for scheduling lists of MachineInstr.
A templated base class for SmallPtrSet which provides the typesafe interface that is common across al...
StringMap - This is an unconventional map that is specialized for handling keys that are "strings",...
Definition StringMap.h:133
StringRef - Represent a constant reference to a string, i.e.
Definition StringRef.h:55
unsigned getPointerSize(unsigned AS) const
Get the pointer size for this target.
std::unique_ptr< const MCSubtargetInfo > STI
TargetOptions Options
Target-Independent Code Generator Pass Configuration Options.
TargetSubtargetInfo - Generic base class for all target subtargets.
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:47
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
@ C
The default llvm calling convention, compatible with C.
Definition CallingConv.h:34
This is an optimization pass for GlobalISel generic memory operations.
CodeGenOptLevel
Code generation optimization level.
Definition CodeGen.h:82
BumpPtrAllocatorImpl<> BumpPtrAllocator
The standard BumpPtrAllocator which just uses the default template parameters.
Definition Allocator.h:383
MachineFunctionInfo - This class can be derived from and used by targets to hold private target-speci...
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
Targets should override this in a way that mirrors the implementation of llvm::MachineFunctionInfo.