InstrEmitter.cpp File Reference

#include "InstrEmitter.h"
#include "SDNodeDbgValue.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/StackMaps.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/PseudoProbe.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetMachine.h"

Go to the source code of this file.

Macros
#define	DEBUG_TYPE   "instr-emitter"

Functions
static unsigned	countOperands (SDNode *Node, unsigned NumExpUses, unsigned &NumImpUses)
	countOperands - The inputs to target nodes have any actual inputs first, followed by an optional chain operand, then an optional glue operand.
static bool	isConvergenceCtrlMachineOp (SDValue Op)
MachineOperand	GetMOForConstDbgOp (const SDDbgOperand &Op)

Variables
const unsigned	MinRCSize = 4
	MinRCSize - Smallest register class we allow when constraining virtual registers.

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "instr-emitter"

Definition at line 32 of file InstrEmitter.cpp.

Function Documentation

countOperands()

static unsigned countOperands ( SDNode *  Node, unsigned  NumExpUses, unsigned &  NumImpUses  )

static

countOperands - The inputs to target nodes have any actual inputs first, followed by an optional chain operand, then an optional glue operand.

Compute the number of actual operands that will go into the resulting MachineInstr.

Also count physreg RegisterSDNode and RegisterMaskSDNode operands preceding the chain and glue. These operands may be implicit on the machine instr.

Definition at line 59 of file InstrEmitter.cpp.

References I, and N.

GetMOForConstDbgOp()

MachineOperand GetMOForConstDbgOp

(

const SDDbgOperand &

Op

)

Definition at line 735 of file InstrEmitter.cpp.

References llvm::MachineOperand::CreateCImm(), llvm::MachineOperand::CreateFPImm(), llvm::MachineOperand::CreateImm(), and llvm::MachineOperand::CreateReg().

Referenced by llvm::InstrEmitter::AddDbgValueLocationOps(), and llvm::InstrEmitter::EmitDbgInstrRef().

isConvergenceCtrlMachineOp()

static bool isConvergenceCtrlMachineOp ( SDValue  Op )

static

Definition at line 288 of file InstrEmitter.cpp.

References llvm::ISD::CONVERGENCECTRL_ANCHOR, llvm::ISD::CONVERGENCECTRL_ENTRY, llvm::ISD::CONVERGENCECTRL_GLUE, llvm::ISD::CONVERGENCECTRL_LOOP, and llvm_unreachable.

Variable Documentation

MinRCSize

const unsigned MinRCSize = 4

MinRCSize - Smallest register class we allow when constraining virtual registers.

If satisfying all register class constraints would require using a smaller register class, emit a COPY to a new virtual register instead.

Definition at line 38 of file InstrEmitter.cpp.