26#define DEBUG_TYPE "systemz-postrewrite"
27STATISTIC(MemFoldCopies,
"Number of copies inserted before folded mem ops.");
28STATISTIC(LOCRMuxJumps,
"Number of LOCRMux jump-sequences (lower is better)");
60char SystemZPostRewrite::ID = 0;
65 "SystemZ Post Rewrite pass",
false,
false)
69 return new SystemZPostRewrite();
80 unsigned HighOpcode) {
86 if (!DestIsHigh && !SrcIsHigh)
87 MBBI->setDesc(
TII->get(LowOpcode));
88 else if (DestIsHigh && SrcIsHigh)
89 MBBI->setDesc(
TII->get(HighOpcode));
91 expandCondMove(
MBB,
MBBI, NextMBBI);
101 unsigned HighOpcode) {
118 if (Src1Reg == Src2Reg) {
120 TII->get(SystemZ::COPY), DestReg)
130 if (DestReg != Src1Reg && DestReg != Src2Reg) {
131 if (DestIsHigh != Src1IsHigh) {
133 TII->get(SystemZ::COPY), DestReg)
137 Src1IsHigh = DestIsHigh;
138 }
else if (DestIsHigh != Src2IsHigh) {
140 TII->get(SystemZ::COPY), DestReg)
144 Src2IsHigh = DestIsHigh;
152 if (DestReg != Src1Reg && DestReg == Src2Reg) {
153 TII->commuteInstruction(*
MBBI,
false, 1, 2);
158 if (!DestIsHigh && !Src1IsHigh && !Src2IsHigh)
159 MBBI->setDesc(
TII->get(LowOpcode));
160 else if (DestIsHigh && Src1IsHigh && Src2IsHigh)
161 MBBI->setDesc(
TII->get(HighOpcode));
164 expandCondMove(
MBB,
MBBI, NextMBBI);
179 unsigned CCValid =
MI.getOperand(3).getImm();
180 unsigned CCMask =
MI.getOperand(4).getImm();
181 assert(DestReg ==
MI.getOperand(1).getReg() &&
182 "Expected destination and first source operand to be the same.");
185 LiveRegs.addLiveOuts(
MBB);
187 LiveRegs.stepBackward(*
I);
214 BuildMI(*MoveMBB, MoveMBB->
end(),
DL,
TII->get(SystemZ::COPY), DestReg)
221 MI.eraseFromParent();
232 unsigned Opcode =
MI.getOpcode();
238 if (TargetMemOpcode != -1) {
239 MI.setDesc(
TII->get(TargetMemOpcode));
240 MI.tieOperands(0, 1);
243 if (DstReg != SrcMO.
getReg()) {
253 case SystemZ::LOCRMux:
254 selectLOCRMux(
MBB,
MBBI, NextMBBI, SystemZ::LOCR, SystemZ::LOCFHR);
256 case SystemZ::SELRMux:
257 selectSELRMux(
MBB,
MBBI, NextMBBI, SystemZ::SELR, SystemZ::SELFHR);
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
const HexagonInstrInfo * TII
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
LLVM Basic Block Representation.
FunctionPass class - This class is used to implement most global optimizations.
A set of physical registers with utility functions to track liveness when walking backward/forward th...
LLVM_ABI void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
LLVM_ABI void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
void substituteDebugValuesForInst(const MachineInstr &Old, MachineInstr &New, unsigned MaxOperand=UINT_MAX)
Create substitutions for any tracked values in Old, to point at New.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
Representation of each machine instruction.
MachineOperand class - Representation of each machine instruction operand.
LLVM_ABI void setReg(Register Reg)
Change the register this operand corresponds to.
Register getReg() const
getReg - Returns the register number.
Wrapper class representing virtual and physical registers.
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
int getTargetMemOpcode(uint16_t Opcode)
bool isHighReg(unsigned int Reg)
This is an optimization pass for GlobalISel generic memory operations.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getRegState(const MachineOperand &RegOp)
Get all register state flags from machine operand RegOp.
FunctionPass * createSystemZPostRewritePass(SystemZTargetMachine &TM)
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.