#include "MCTargetDesc/XtensaMCTargetDesc.h"
#include "TargetInfo/XtensaTargetInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Endian.h"
#include "XtensaGenDisassemblerTables.inc"

Macros
#define	DEBUG_TYPE "Xtensa-disassembler"

Typedefs
using	DecodeStatus = MCDisassembler::DecodeStatus

Functions
static MCDisassembler *	createXtensaDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)

LLVM_EXTERNAL_VISIBILITY void	LLVMInitializeXtensaDisassembler ()

static DecodeStatus	DecodeARRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static DecodeStatus	DecodeSRRegisterClass (MCInst &Inst, uint64_t RegNo, uint64_t Address, const void *Decoder)

static bool	tryAddingSymbolicOperand (int64_t Value, bool isBranch, uint64_t Address, uint64_t Offset, uint64_t InstSize, MCInst &MI, const void *Decoder)

static DecodeStatus	decodeCallOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeJumpOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeBranchOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeL32ROperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeImm8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeImm8_sh8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeImm12Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeUimm4Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeUimm5Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeImm1_16Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeImm1n_15Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeImm32n_95Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeShimm1_31Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeB4constOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeB4constuOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeMem8Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeMem16Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeMem32Operand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	decodeMem32nOperand (MCInst &Inst, uint64_t Imm, int64_t Address, const void *Decoder)

static DecodeStatus	readInstruction16 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint64_t &Insn, bool IsLittleEndian)
	Read two bytes from the ArrayRef and return 16 bit data sorted according to the given endianness.

static DecodeStatus	readInstruction24 (ArrayRef< uint8_t > Bytes, uint64_t Address, uint64_t &Size, uint64_t &Insn, bool IsLittleEndian)
	Read three bytes from the ArrayRef and return 24 bit data.

Variables
static const unsigned	ARDecoderTable []

static const unsigned	SRDecoderTable [] = {Xtensa::SAR, 3}

static int64_t	TableB4const [16]

static int64_t	TableB4constu [16]

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE "Xtensa-disassembler"

Definition at line 28 of file XtensaDisassembler.cpp.

Typedef Documentation

◆ DecodeStatus

using DecodeStatus = MCDisassembler::DecodeStatus

Definition at line 30 of file XtensaDisassembler.cpp.

Function Documentation

◆ createXtensaDisassembler()

static MCDisassembler * createXtensaDisassembler	(	const Target &	T,
		const MCSubtargetInfo &	STI,
		MCContext &	Ctx
	)

static

Definition at line 49 of file XtensaDisassembler.cpp.

Referenced by LLVMInitializeXtensaDisassembler().

◆ DecodeARRegisterClass()

static DecodeStatus DecodeARRegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 65 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), ARDecoderTable, llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, and llvm::MCDisassembler::Success.

Referenced by decodeMem16Operand(), decodeMem32nOperand(), decodeMem32Operand(), and decodeMem8Operand().

◆ decodeB4constOperand()

static DecodeStatus decodeB4constOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 223 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and TableB4const.

◆ decodeB4constuOperand()

static DecodeStatus decodeB4constuOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 233 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), llvm::MCDisassembler::Success, and TableB4constu.

◆ decodeBranchOperand()

static DecodeStatus decodeBranchOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 118 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), llvm::MCDisassembler::Success, and tryAddingSymbolicOperand().

◆ decodeCallOperand()

static DecodeStatus decodeCallOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 104 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeImm12Operand()

static DecodeStatus decodeImm12Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 163 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeImm1_16Operand()

static DecodeStatus decodeImm1_16Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 184 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeImm1n_15Operand()

static DecodeStatus decodeImm1n_15Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 191 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeImm32n_95Operand()

static DecodeStatus decodeImm32n_95Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 202 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeImm8_sh8Operand()

static DecodeStatus decodeImm8_sh8Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 155 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeImm8Operand()

static DecodeStatus decodeImm8Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 148 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeJumpOperand()

static DecodeStatus decodeJumpOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 111 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeL32ROperand()

static DecodeStatus decodeL32ROperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 139 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeMem16Operand()

static DecodeStatus decodeMem16Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 250 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.

◆ decodeMem32nOperand()

static DecodeStatus decodeMem32nOperand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 266 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.

◆ decodeMem32Operand()

static DecodeStatus decodeMem32Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 258 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.

◆ decodeMem8Operand()

static DecodeStatus decodeMem8Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 242 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), Address, assert(), llvm::MCOperand::createImm(), DecodeARRegisterClass(), and llvm::MCDisassembler::Success.

◆ decodeShimm1_31Operand()

static DecodeStatus decodeShimm1_31Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 213 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ DecodeSRRegisterClass()

static DecodeStatus DecodeSRRegisterClass	(	MCInst &	Inst,
		uint64_t	RegNo,
		uint64_t	Address,
		const void *	Decoder
	)

static

Definition at line 78 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), llvm::MCDisassembler::Fail, SRDecoderTable, and llvm::MCDisassembler::Success.

◆ decodeUimm4Operand()

static DecodeStatus decodeUimm4Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 170 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ decodeUimm5Operand()

static DecodeStatus decodeUimm5Operand	(	MCInst &	Inst,
		uint64_t	Imm,
		int64_t	Address,
		const void *	Decoder
	)

static

Definition at line 177 of file XtensaDisassembler.cpp.

References llvm::MCInst::addOperand(), assert(), llvm::MCOperand::createImm(), and llvm::MCDisassembler::Success.

◆ LLVMInitializeXtensaDisassembler()

LLVM_EXTERNAL_VISIBILITY void LLVMInitializeXtensaDisassembler ( )

Definition at line 55 of file XtensaDisassembler.cpp.

References createXtensaDisassembler(), llvm::getTheXtensaTarget(), and llvm::TargetRegistry::RegisterMCDisassembler().

◆ readInstruction16()

static DecodeStatus readInstruction16	(	ArrayRef< uint8_t >	Bytes,
		uint64_t	Address,
		uint64_t &	Size,
		uint64_t &	Insn,
		bool	IsLittleEndian
	)

static

Read two bytes from the ArrayRef and return 16 bit data sorted according to the given endianness.

Definition at line 276 of file XtensaDisassembler.cpp.

References llvm::MCDisassembler::Fail, Insn, llvm::report_fatal_error(), llvm::ArrayRef< T >::size(), Size, and llvm::MCDisassembler::Success.

◆ readInstruction24()

static DecodeStatus readInstruction24	(	ArrayRef< uint8_t >	Bytes,
		uint64_t	Address,
		uint64_t &	Size,
		uint64_t &	Insn,
		bool	IsLittleEndian
	)

static

Read three bytes from the ArrayRef and return 24 bit data.

Definition at line 295 of file XtensaDisassembler.cpp.

References llvm::MCDisassembler::Fail, Insn, llvm::report_fatal_error(), llvm::ArrayRef< T >::size(), Size, and llvm::MCDisassembler::Success.

◆ tryAddingSymbolicOperand()

static bool tryAddingSymbolicOperand	(	int64_t	Value,
		bool	isBranch,
		uint64_t	Address,
		uint64_t	Offset,
		uint64_t	InstSize,
		MCInst &	MI,
		const void *	Decoder
	)

static

Definition at line 95 of file XtensaDisassembler.cpp.

References Address, isBranch(), MI, llvm::Offset, and llvm::MCDisassembler::tryAddingSymbolicOperand().

Referenced by decodeBranchOperand().

Variable Documentation

◆ ARDecoderTable

const unsigned ARDecoderTable[]

static

Initial value:

= {
    Xtensa::A0,  Xtensa::SP,  Xtensa::A2,  Xtensa::A3, Xtensa::A4,  Xtensa::A5,
    Xtensa::A6,  Xtensa::A7,  Xtensa::A8,  Xtensa::A9, Xtensa::A10, Xtensa::A11,
    Xtensa::A12, Xtensa::A13, Xtensa::A14, Xtensa::A15}

Definition at line 60 of file XtensaDisassembler.cpp.

Referenced by DecodeARRegisterClass().

◆ SRDecoderTable

const unsigned SRDecoderTable[] = {Xtensa::SAR, 3}

static

Definition at line 76 of file XtensaDisassembler.cpp.

Referenced by DecodeSRRegisterClass().

◆ TableB4const

int64_t TableB4const[16]

static

Initial value:

= {-1, 1, 2, 3, 4, 5, 6, 7,

8, 10, 12, 16, 32, 64, 128, 256}

Definition at line 221 of file XtensaDisassembler.cpp.

Referenced by decodeB4constOperand().

◆ TableB4constu

int64_t TableB4constu[16]

static

Initial value:

= {32768, 65536, 2, 3, 4, 5, 6, 7,

8, 10, 12, 16, 32, 64, 128, 256}

Definition at line 231 of file XtensaDisassembler.cpp.

Referenced by decodeB4constuOperand().

Macros

Typedefs

Functions

Variables

Macro Definition Documentation

◆ DEBUG_TYPE

Typedef Documentation

◆ DecodeStatus

Function Documentation

◆ createXtensaDisassembler()

◆ DecodeARRegisterClass()

◆ decodeB4constOperand()

◆ decodeB4constuOperand()

◆ decodeBranchOperand()

◆ decodeCallOperand()

◆ decodeImm12Operand()

◆ decodeImm1_16Operand()

◆ decodeImm1n_15Operand()

◆ decodeImm32n_95Operand()

◆ decodeImm8_sh8Operand()

◆ decodeImm8Operand()

◆ decodeJumpOperand()

◆ decodeL32ROperand()

◆ decodeMem16Operand()

◆ decodeMem32nOperand()

◆ decodeMem32Operand()

◆ decodeMem8Operand()

◆ decodeShimm1_31Operand()

◆ DecodeSRRegisterClass()

◆ decodeUimm4Operand()

◆ decodeUimm5Operand()

◆ LLVMInitializeXtensaDisassembler()

◆ readInstruction16()

◆ readInstruction24()

◆ tryAddingSymbolicOperand()

Variable Documentation

◆ ARDecoderTable

◆ SRDecoderTable

◆ TableB4const

◆ TableB4constu