15#ifndef LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
16#define LLVM_LIB_TARGET_XTENSA_MCTARGETDESC_XTENSAMCTARGETDESC_H
26class MCObjectTargetWriter;
41 const MCSubtargetInfo &STI,
42 const MCRegisterInfo &
MRI,
43 const MCTargetOptions &
Options);
44std::unique_ptr<MCObjectTargetWriter>
50#define GET_REGINFO_ENUM
51#include "XtensaGenRegisterInfo.inc"
54#define GET_INSTRINFO_ENUM
55#include "XtensaGenInstrInfo.inc"
57#define GET_SUBTARGETINFO_ENUM
58#include "XtensaGenSubtargetInfo.inc"
unsigned const MachineRegisterInfo * MRI
This is an optimization pass for GlobalISel generic memory operations.
std::unique_ptr< MCObjectTargetWriter > createXtensaObjectWriter(uint8_t OSABI, bool IsLittleEndian)
MCCodeEmitter * createXtensaMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
MCAsmBackend * createXtensaMCAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)