LLVM  6.0.0svn
BPFAsmBackend.cpp
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1 //===-- BPFAsmBackend.cpp - BPF Assembler Backend -------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCFixup.h"
14 #include "llvm/MC/MCObjectWriter.h"
15 #include <cassert>
16 #include <cstdint>
17 
18 using namespace llvm;
19 
20 namespace {
21 
22 class BPFAsmBackend : public MCAsmBackend {
23 public:
24  bool IsLittleEndian;
25 
26  BPFAsmBackend(bool IsLittleEndian)
27  : MCAsmBackend(), IsLittleEndian(IsLittleEndian) {}
28  ~BPFAsmBackend() override = default;
29 
30  void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
32  uint64_t Value, bool IsResolved) const override;
33 
34  std::unique_ptr<MCObjectWriter>
35  createObjectWriter(raw_pwrite_stream &OS) const override;
36 
37  // No instruction requires relaxation
38  bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
39  const MCRelaxableFragment *DF,
40  const MCAsmLayout &Layout) const override {
41  return false;
42  }
43 
44  unsigned getNumFixupKinds() const override { return 1; }
45 
46  bool mayNeedRelaxation(const MCInst &Inst) const override { return false; }
47 
48  void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
49  MCInst &Res) const override {}
50 
51  bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
52 };
53 
54 } // end anonymous namespace
55 
56 bool BPFAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
57  if ((Count % 8) != 0)
58  return false;
59 
60  for (uint64_t i = 0; i < Count; i += 8)
61  OW->write64(0x15000000);
62 
63  return true;
64 }
65 
66 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
67  const MCValue &Target,
69  bool IsResolved) const {
70  if (Fixup.getKind() == FK_SecRel_4 || Fixup.getKind() == FK_SecRel_8) {
71  assert(Value == 0);
72  } else if (Fixup.getKind() == FK_Data_4 || Fixup.getKind() == FK_Data_8) {
73  unsigned Size = Fixup.getKind() == FK_Data_4 ? 4 : 8;
74 
75  for (unsigned i = 0; i != Size; ++i) {
76  unsigned Idx = IsLittleEndian ? i : Size - i - 1;
77  Data[Fixup.getOffset() + Idx] = uint8_t(Value >> (i * 8));
78  }
79  } else {
80  assert(Fixup.getKind() == FK_PCRel_2);
81  Value = (uint16_t)((Value - 8) / 8);
82  if (IsLittleEndian) {
83  Data[Fixup.getOffset() + 2] = Value & 0xFF;
84  Data[Fixup.getOffset() + 3] = Value >> 8;
85  } else {
86  Data[Fixup.getOffset() + 2] = Value >> 8;
87  Data[Fixup.getOffset() + 3] = Value & 0xFF;
88  }
89  }
90 }
91 
92 std::unique_ptr<MCObjectWriter>
93 BPFAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
94  return createBPFELFObjectWriter(OS, 0, IsLittleEndian);
95 }
96 
98  const MCRegisterInfo &MRI,
99  const Triple &TT, StringRef CPU,
100  const MCTargetOptions&) {
101  return new BPFAsmBackend(/*IsLittleEndian=*/true);
102 }
103 
105  const MCRegisterInfo &MRI,
106  const Triple &TT, StringRef CPU,
107  const MCTargetOptions&) {
108  return new BPFAsmBackend(/*IsLittleEndian=*/false);
109 }
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void write64(uint64_t Value)
This represents an "assembler immediate".
Definition: MCValue.h:40
Defines the object file and target independent interfaces used by the assembler backend to write nati...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:66
Encapsulates the layout of an assembly file at a particular point in time.
Definition: MCAsmLayout.h:29
MCAsmBackend * createBPFAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
A four-byte section relative fixup.
Definition: MCFixup.h:42
A four-byte fixup.
Definition: MCFixup.h:26
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
A relaxable fragment holds on to its MCInst, since it may need to be relaxed during the assembler lay...
Definition: MCFragment.h:255
unsigned const MachineRegisterInfo * MRI
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:291
uint32_t getOffset() const
Definition: MCFixup.h:95
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
MCAsmBackend * createBPFbeAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
A two-byte pc relative fixup.
Definition: MCFixup.h:29
std::unique_ptr< MCObjectWriter > createBPFELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian)
Target - Wrapper for Target specific information.
A eight-byte section relative fixup.
Definition: MCFixup.h:43
MCSubtargetInfo - Generic base class for all target subtargets.
A eight-byte fixup.
Definition: MCFixup.h:27
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:337
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Definition: Value.h:73
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:35
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
MCFixupKind getKind() const
Definition: MCFixup.h:93