LLVM  8.0.0svn
PPCTLSDynamicCall.cpp
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1 //===---------- PPCTLSDynamicCall.cpp - TLS Dynamic Call Fixup ------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This pass expands ADDItls{ld,gd}LADDR[32] machine instructions into
11 // separate ADDItls[gd]L[32] and GETtlsADDR[32] instructions, both of
12 // which define GPR3. A copy is added from GPR3 to the target virtual
13 // register of the original instruction. The GETtlsADDR[32] is really
14 // a call instruction, so its target register is constrained to be GPR3.
15 // This is not true of ADDItls[gd]L[32], but there is a legacy linker
16 // optimization bug that requires the target register of the addi of
17 // a local- or general-dynamic TLS access sequence to be GPR3.
18 //
19 // This is done in a late pass so that TLS variable accesses can be
20 // fully commoned by MachineCSE.
21 //
22 //===----------------------------------------------------------------------===//
23 
24 #include "PPC.h"
25 #include "PPCInstrBuilder.h"
26 #include "PPCInstrInfo.h"
27 #include "PPCTargetMachine.h"
31 #include "llvm/Support/Debug.h"
33 
34 using namespace llvm;
35 
36 #define DEBUG_TYPE "ppc-tls-dynamic-call"
37 
38 namespace llvm {
40 }
41 
42 namespace {
43  struct PPCTLSDynamicCall : public MachineFunctionPass {
44  static char ID;
45  PPCTLSDynamicCall() : MachineFunctionPass(ID) {
47  }
48 
49  const PPCInstrInfo *TII;
50  LiveIntervals *LIS;
51 
52 protected:
53  bool processBlock(MachineBasicBlock &MBB) {
54  bool Changed = false;
55  bool NeedFence = true;
56  bool Is64Bit = MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64();
57 
58  for (MachineBasicBlock::iterator I = MBB.begin(), IE = MBB.end();
59  I != IE;) {
60  MachineInstr &MI = *I;
61 
62  if (MI.getOpcode() != PPC::ADDItlsgdLADDR &&
63  MI.getOpcode() != PPC::ADDItlsldLADDR &&
64  MI.getOpcode() != PPC::ADDItlsgdLADDR32 &&
65  MI.getOpcode() != PPC::ADDItlsldLADDR32) {
66 
67  // Although we create ADJCALLSTACKDOWN and ADJCALLSTACKUP
68  // as scheduling fences, we skip creating fences if we already
69  // have existing ADJCALLSTACKDOWN/UP to avoid nesting,
70  // which causes verification error with -verify-machineinstrs.
71  if (MI.getOpcode() == PPC::ADJCALLSTACKDOWN)
72  NeedFence = false;
73  else if (MI.getOpcode() == PPC::ADJCALLSTACKUP)
74  NeedFence = true;
75 
76  ++I;
77  continue;
78  }
79 
80  LLVM_DEBUG(dbgs() << "TLS Dynamic Call Fixup:\n " << MI);
81 
82  unsigned OutReg = MI.getOperand(0).getReg();
83  unsigned InReg = MI.getOperand(1).getReg();
84  DebugLoc DL = MI.getDebugLoc();
85  unsigned GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
86  unsigned Opc1, Opc2;
87  const unsigned OrigRegs[] = {OutReg, InReg, GPR3};
88 
89  switch (MI.getOpcode()) {
90  default:
91  llvm_unreachable("Opcode inconsistency error");
92  case PPC::ADDItlsgdLADDR:
93  Opc1 = PPC::ADDItlsgdL;
94  Opc2 = PPC::GETtlsADDR;
95  break;
96  case PPC::ADDItlsldLADDR:
97  Opc1 = PPC::ADDItlsldL;
98  Opc2 = PPC::GETtlsldADDR;
99  break;
100  case PPC::ADDItlsgdLADDR32:
101  Opc1 = PPC::ADDItlsgdL32;
102  Opc2 = PPC::GETtlsADDR32;
103  break;
104  case PPC::ADDItlsldLADDR32:
105  Opc1 = PPC::ADDItlsldL32;
106  Opc2 = PPC::GETtlsldADDR32;
107  break;
108  }
109 
110  // We create ADJCALLSTACKUP and ADJCALLSTACKDOWN around _tls_get_addr
111  // as scheduling fence to avoid it is scheduled before
112  // mflr in the prologue and the address in LR is clobbered (PR25839).
113  // We don't really need to save data to the stack - the clobbered
114  // registers are already saved when the SDNode (e.g. PPCaddiTlsgdLAddr)
115  // gets translated to the pseudo instruction (e.g. ADDItlsgdLADDR).
116  if (NeedFence)
117  BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKDOWN)).addImm(0)
118  .addImm(0);
119 
120  // Expand into two ops built prior to the existing instruction.
121  MachineInstr *Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3)
122  .addReg(InReg);
123  Addi->addOperand(MI.getOperand(2));
124 
125  // The ADDItls* instruction is the first instruction in the
126  // repair range.
128  --First;
129 
130  MachineInstr *Call = (BuildMI(MBB, I, DL, TII->get(Opc2), GPR3)
131  .addReg(GPR3));
132  Call->addOperand(MI.getOperand(3));
133 
134  if (NeedFence)
135  BuildMI(MBB, I, DL, TII->get(PPC::ADJCALLSTACKUP)).addImm(0).addImm(0);
136 
137  BuildMI(MBB, I, DL, TII->get(TargetOpcode::COPY), OutReg)
138  .addReg(GPR3);
139 
140  // The COPY is the last instruction in the repair range.
142  --Last;
143 
144  // Move past the original instruction and remove it.
145  ++I;
146  MI.removeFromParent();
147 
148  // Repair the live intervals.
149  LIS->repairIntervalsInRange(&MBB, First, Last, OrigRegs);
150  Changed = true;
151  }
152 
153  return Changed;
154  }
155 
156 public:
157  bool runOnMachineFunction(MachineFunction &MF) override {
158  TII = MF.getSubtarget<PPCSubtarget>().getInstrInfo();
159  LIS = &getAnalysis<LiveIntervals>();
160 
161  bool Changed = false;
162 
163  for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
164  MachineBasicBlock &B = *I++;
165  if (processBlock(B))
166  Changed = true;
167  }
168 
169  return Changed;
170  }
171 
172  void getAnalysisUsage(AnalysisUsage &AU) const override {
175  AU.addRequired<SlotIndexes>();
178  }
179  };
180 }
181 
182 INITIALIZE_PASS_BEGIN(PPCTLSDynamicCall, DEBUG_TYPE,
183  "PowerPC TLS Dynamic Call Fixup", false, false)
186 INITIALIZE_PASS_END(PPCTLSDynamicCall, DEBUG_TYPE,
187  "PowerPC TLS Dynamic Call Fixup", false, false)
188 
189 char PPCTLSDynamicCall::ID = 0;
191 llvm::createPPCTLSDynamicCallPass() { return new PPCTLSDynamicCall(); }
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
This class represents lattice values for constants.
Definition: AllocatorList.h:24
void initializePPCTLSDynamicCallPass(PassRegistry &)
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:383
unsigned getReg() const
getReg - Returns the register number.
A debug info location.
Definition: DebugLoc.h:34
FunctionPass * createPPCTLSDynamicCallPass()
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:51
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:409
INITIALIZE_PASS_BEGIN(PPCTLSDynamicCall, DEBUG_TYPE, "PowerPC TLS Dynamic Call Fixup", false, false) INITIALIZE_PASS_END(PPCTLSDynamicCall
SlotIndexes pass.
Definition: SlotIndexes.h:331
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Represent the analysis usage information of a pass.
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:285
void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< unsigned > OrigRegs)
Update live intervals for instructions in a range of iterators.
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Iterator for intrusive lists based on ilist_node.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
#define DEBUG_TYPE
Representation of each machine instruction.
Definition: MachineInstr.h:64
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
#define I(x, y, z)
Definition: MD5.cpp:58
MachineInstr * removeFromParent()
Unlink &#39;this&#39; from the containing basic block, and return it without deleting it. ...
IRTranslator LLVM IR MI
PassRegistry - This class manages the registration and intitialization of the pass subsystem as appli...
Definition: PassRegistry.h:39
#define LLVM_DEBUG(X)
Definition: Debug.h:123
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:414