LLVM  10.0.0svn
MachineInstrBuilder.h
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1 //===- CodeGen/MachineInstrBuilder.h - Simplify creation of MIs --*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file exposes a function named BuildMI, which is useful for dramatically
10 // simplifying how MachineInstr's are created. It allows use of code like this:
11 //
12 // M = BuildMI(MBB, MI, DL, TII.get(X86::ADD8rr), Dst)
13 // .addReg(argVal1)
14 // .addReg(argVal2);
15 //
16 //===----------------------------------------------------------------------===//
17 
18 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
19 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
20 
21 #include "llvm/ADT/ArrayRef.h"
29 #include "llvm/IR/InstrTypes.h"
30 #include "llvm/IR/Intrinsics.h"
32 #include <cassert>
33 #include <cstdint>
34 #include <utility>
35 
36 namespace llvm {
37 
38 class MCInstrDesc;
39 class MDNode;
40 
41 namespace RegState {
42 
43  enum {
44  Define = 0x2,
45  Implicit = 0x4,
46  Kill = 0x8,
47  Dead = 0x10,
48  Undef = 0x20,
49  EarlyClobber = 0x40,
50  Debug = 0x80,
51  InternalRead = 0x100,
52  Renamable = 0x200,
56  };
57 
58 } // end namespace RegState
59 
61  MachineFunction *MF = nullptr;
62  MachineInstr *MI = nullptr;
63 
64 public:
65  MachineInstrBuilder() = default;
66 
67  /// Create a MachineInstrBuilder for manipulating an existing instruction.
68  /// F must be the machine function that was used to allocate I.
71  : MF(&F), MI(&*I) {}
72 
73  /// Allow automatic conversion to the machine instruction we are working on.
74  operator MachineInstr*() const { return MI; }
75  MachineInstr *operator->() const { return MI; }
76  operator MachineBasicBlock::iterator() const { return MI; }
77 
78  /// If conversion operators fail, use this method to get the MachineInstr
79  /// explicitly.
80  MachineInstr *getInstr() const { return MI; }
81 
82  /// Get the register for the operand index.
83  /// The operand at the index should be a register (asserted by
84  /// MachineOperand).
85  Register getReg(unsigned Idx) const { return MI->getOperand(Idx).getReg(); }
86 
87  /// Add a new virtual register operand.
88  const MachineInstrBuilder &addReg(Register RegNo, unsigned flags = 0,
89  unsigned SubReg = 0) const {
90  assert((flags & 0x1) == 0 &&
91  "Passing in 'true' to addReg is forbidden! Use enums instead.");
93  flags & RegState::Define,
94  flags & RegState::Implicit,
95  flags & RegState::Kill,
96  flags & RegState::Dead,
97  flags & RegState::Undef,
98  flags & RegState::EarlyClobber,
99  SubReg,
100  flags & RegState::Debug,
101  flags & RegState::InternalRead,
102  flags & RegState::Renamable));
103  return *this;
104  }
105 
106  /// Add a virtual register definition operand.
107  const MachineInstrBuilder &addDef(Register RegNo, unsigned Flags = 0,
108  unsigned SubReg = 0) const {
109  return addReg(RegNo, Flags | RegState::Define, SubReg);
110  }
111 
112  /// Add a virtual register use operand. It is an error for Flags to contain
113  /// `RegState::Define` when calling this function.
114  const MachineInstrBuilder &addUse(Register RegNo, unsigned Flags = 0,
115  unsigned SubReg = 0) const {
116  assert(!(Flags & RegState::Define) &&
117  "Misleading addUse defines register, use addReg instead.");
118  return addReg(RegNo, Flags, SubReg);
119  }
120 
121  /// Add a new immediate operand.
122  const MachineInstrBuilder &addImm(int64_t Val) const {
123  MI->addOperand(*MF, MachineOperand::CreateImm(Val));
124  return *this;
125  }
126 
127  const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
128  MI->addOperand(*MF, MachineOperand::CreateCImm(Val));
129  return *this;
130  }
131 
132  const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
134  return *this;
135  }
136 
138  unsigned TargetFlags = 0) const {
139  MI->addOperand(*MF, MachineOperand::CreateMBB(MBB, TargetFlags));
140  return *this;
141  }
142 
143  const MachineInstrBuilder &addFrameIndex(int Idx) const {
144  MI->addOperand(*MF, MachineOperand::CreateFI(Idx));
145  return *this;
146  }
147 
148  const MachineInstrBuilder &
149  addConstantPoolIndex(unsigned Idx, int Offset = 0,
150  unsigned TargetFlags = 0) const {
151  MI->addOperand(*MF, MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
152  return *this;
153  }
154 
155  const MachineInstrBuilder &addTargetIndex(unsigned Idx, int64_t Offset = 0,
156  unsigned TargetFlags = 0) const {
158  TargetFlags));
159  return *this;
160  }
161 
163  unsigned TargetFlags = 0) const {
164  MI->addOperand(*MF, MachineOperand::CreateJTI(Idx, TargetFlags));
165  return *this;
166  }
167 
169  int64_t Offset = 0,
170  unsigned TargetFlags = 0) const {
171  MI->addOperand(*MF, MachineOperand::CreateGA(GV, Offset, TargetFlags));
172  return *this;
173  }
174 
175  const MachineInstrBuilder &addExternalSymbol(const char *FnName,
176  unsigned TargetFlags = 0) const {
177  MI->addOperand(*MF, MachineOperand::CreateES(FnName, TargetFlags));
178  return *this;
179  }
180 
182  int64_t Offset = 0,
183  unsigned TargetFlags = 0) const {
184  MI->addOperand(*MF, MachineOperand::CreateBA(BA, Offset, TargetFlags));
185  return *this;
186  }
187 
190  return *this;
191  }
192 
194  MI->addMemOperand(*MF, MMO);
195  return *this;
196  }
197 
198  const MachineInstrBuilder &
200  MI->setMemRefs(*MF, MMOs);
201  return *this;
202  }
203 
204  const MachineInstrBuilder &cloneMemRefs(const MachineInstr &OtherMI) const {
205  MI->cloneMemRefs(*MF, OtherMI);
206  return *this;
207  }
208 
209  const MachineInstrBuilder &
211  MI->cloneMergedMemRefs(*MF, OtherMIs);
212  return *this;
213  }
214 
215  const MachineInstrBuilder &add(const MachineOperand &MO) const {
216  MI->addOperand(*MF, MO);
217  return *this;
218  }
219 
221  for (const MachineOperand &MO : MOs) {
222  MI->addOperand(*MF, MO);
223  }
224  return *this;
225  }
226 
227  const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
229  assert((MI->isDebugValue() ? static_cast<bool>(MI->getDebugVariable())
230  : true) &&
231  "first MDNode argument of a DBG_VALUE not a variable");
232  assert((MI->isDebugLabel() ? static_cast<bool>(MI->getDebugLabel())
233  : true) &&
234  "first MDNode argument of a DBG_LABEL not a label");
235  return *this;
236  }
237 
238  const MachineInstrBuilder &addCFIIndex(unsigned CFIIndex) const {
239  MI->addOperand(*MF, MachineOperand::CreateCFIIndex(CFIIndex));
240  return *this;
241  }
242 
245  return *this;
246  }
247 
250  return *this;
251  }
252 
253  const MachineInstrBuilder &addShuffleMask(const Constant *Val) const {
255  return *this;
256  }
257 
259  unsigned char TargetFlags = 0) const {
260  MI->addOperand(*MF, MachineOperand::CreateMCSymbol(Sym, TargetFlags));
261  return *this;
262  }
263 
264  const MachineInstrBuilder &setMIFlags(unsigned Flags) const {
265  MI->setFlags(Flags);
266  return *this;
267  }
268 
270  MI->setFlag(Flag);
271  return *this;
272  }
273 
274  // Add a displacement from an existing MachineOperand with an added offset.
275  const MachineInstrBuilder &addDisp(const MachineOperand &Disp, int64_t off,
276  unsigned char TargetFlags = 0) const {
277  // If caller specifies new TargetFlags then use it, otherwise the
278  // default behavior is to copy the target flags from the existing
279  // MachineOperand. This means if the caller wants to clear the
280  // target flags it needs to do so explicitly.
281  if (0 == TargetFlags)
282  TargetFlags = Disp.getTargetFlags();
283 
284  switch (Disp.getType()) {
285  default:
286  llvm_unreachable("Unhandled operand type in addDisp()");
288  return addImm(Disp.getImm() + off);
290  return addConstantPoolIndex(Disp.getIndex(), Disp.getOffset() + off,
291  TargetFlags);
293  return addGlobalAddress(Disp.getGlobal(), Disp.getOffset() + off,
294  TargetFlags);
296  return addBlockAddress(Disp.getBlockAddress(), Disp.getOffset() + off,
297  TargetFlags);
298  }
299  }
300 
301  /// Copy all the implicit operands from OtherMI onto this one.
302  const MachineInstrBuilder &
303  copyImplicitOps(const MachineInstr &OtherMI) const {
304  MI->copyImplicitOps(*MF, OtherMI);
305  return *this;
306  }
307 
309  const TargetRegisterInfo &TRI,
310  const RegisterBankInfo &RBI) const {
311  return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI);
312  }
313 };
314 
315 /// Builder interface. Specify how to create the initial instruction itself.
317  const MCInstrDesc &MCID) {
318  return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL));
319 }
320 
321 /// This version of the builder sets up the first operand as a
322 /// destination virtual register.
324  const MCInstrDesc &MCID, Register DestReg) {
325  return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL))
326  .addReg(DestReg, RegState::Define);
327 }
328 
329 /// This version of the builder inserts the newly-built instruction before
330 /// the given position in the given MachineBasicBlock, and sets up the first
331 /// operand as a destination virtual register.
334  const DebugLoc &DL, const MCInstrDesc &MCID,
335  Register DestReg) {
336  MachineFunction &MF = *BB.getParent();
337  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
338  BB.insert(I, MI);
339  return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
340 }
341 
342 /// This version of the builder inserts the newly-built instruction before
343 /// the given position in the given MachineBasicBlock, and sets up the first
344 /// operand as a destination virtual register.
345 ///
346 /// If \c I is inside a bundle, then the newly inserted \a MachineInstr is
347 /// added to the same bundle.
350  const DebugLoc &DL, const MCInstrDesc &MCID,
351  Register DestReg) {
352  MachineFunction &MF = *BB.getParent();
353  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
354  BB.insert(I, MI);
355  return MachineInstrBuilder(MF, MI).addReg(DestReg, RegState::Define);
356 }
357 
359  const DebugLoc &DL, const MCInstrDesc &MCID,
360  Register DestReg) {
361  // Calling the overload for instr_iterator is always correct. However, the
362  // definition is not available in headers, so inline the check.
363  if (I.isInsideBundle())
364  return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg);
365  return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID, DestReg);
366 }
367 
369  const DebugLoc &DL, const MCInstrDesc &MCID,
370  Register DestReg) {
371  return BuildMI(BB, *I, DL, MCID, DestReg);
372 }
373 
374 /// This version of the builder inserts the newly-built instruction before the
375 /// given position in the given MachineBasicBlock, and does NOT take a
376 /// destination register.
379  const DebugLoc &DL,
380  const MCInstrDesc &MCID) {
381  MachineFunction &MF = *BB.getParent();
382  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
383  BB.insert(I, MI);
384  return MachineInstrBuilder(MF, MI);
385 }
386 
389  const DebugLoc &DL,
390  const MCInstrDesc &MCID) {
391  MachineFunction &MF = *BB.getParent();
392  MachineInstr *MI = MF.CreateMachineInstr(MCID, DL);
393  BB.insert(I, MI);
394  return MachineInstrBuilder(MF, MI);
395 }
396 
398  const DebugLoc &DL,
399  const MCInstrDesc &MCID) {
400  // Calling the overload for instr_iterator is always correct. However, the
401  // definition is not available in headers, so inline the check.
402  if (I.isInsideBundle())
403  return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID);
404  return BuildMI(BB, MachineBasicBlock::iterator(I), DL, MCID);
405 }
406 
408  const DebugLoc &DL,
409  const MCInstrDesc &MCID) {
410  return BuildMI(BB, *I, DL, MCID);
411 }
412 
413 /// This version of the builder inserts the newly-built instruction at the end
414 /// of the given MachineBasicBlock, and does NOT take a destination register.
416  const MCInstrDesc &MCID) {
417  return BuildMI(*BB, BB->end(), DL, MCID);
418 }
419 
420 /// This version of the builder inserts the newly-built instruction at the
421 /// end of the given MachineBasicBlock, and sets up the first operand as a
422 /// destination virtual register.
424  const MCInstrDesc &MCID, Register DestReg) {
425  return BuildMI(*BB, BB->end(), DL, MCID, DestReg);
426 }
427 
428 /// This version of the builder builds a DBG_VALUE intrinsic
429 /// for either a value in a register or a register-indirect
430 /// address. The convention is that a DBG_VALUE is indirect iff the
431 /// second operand is an immediate.
433  const MCInstrDesc &MCID, bool IsIndirect,
434  Register Reg, const MDNode *Variable,
435  const MDNode *Expr);
436 
437 /// This version of the builder builds a DBG_VALUE intrinsic
438 /// for a MachineOperand.
440  const MCInstrDesc &MCID, bool IsIndirect,
441  MachineOperand &MO, const MDNode *Variable,
442  const MDNode *Expr);
443 
444 /// This version of the builder builds a DBG_VALUE intrinsic
445 /// for either a value in a register or a register-indirect
446 /// address and inserts it at position I.
449  const MCInstrDesc &MCID, bool IsIndirect,
450  Register Reg, const MDNode *Variable,
451  const MDNode *Expr);
452 
453 /// This version of the builder builds a DBG_VALUE intrinsic
454 /// for a machine operand and inserts it at position I.
457  const MCInstrDesc &MCID, bool IsIndirect,
458  MachineOperand &MO, const MDNode *Variable,
459  const MDNode *Expr);
460 
461 /// Clone a DBG_VALUE whose value has been spilled to FrameIndex.
464  const MachineInstr &Orig, int FrameIndex);
465 
466 /// Update a DBG_VALUE whose value has been spilled to FrameIndex. Useful when
467 /// modifying an instruction in place while iterating over a basic block.
468 void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex);
469 
470 inline unsigned getDefRegState(bool B) {
471  return B ? RegState::Define : 0;
472 }
473 inline unsigned getImplRegState(bool B) {
474  return B ? RegState::Implicit : 0;
475 }
476 inline unsigned getKillRegState(bool B) {
477  return B ? RegState::Kill : 0;
478 }
479 inline unsigned getDeadRegState(bool B) {
480  return B ? RegState::Dead : 0;
481 }
482 inline unsigned getUndefRegState(bool B) {
483  return B ? RegState::Undef : 0;
484 }
485 inline unsigned getInternalReadRegState(bool B) {
486  return B ? RegState::InternalRead : 0;
487 }
488 inline unsigned getDebugRegState(bool B) {
489  return B ? RegState::Debug : 0;
490 }
491 inline unsigned getRenamableRegState(bool B) {
492  return B ? RegState::Renamable : 0;
493 }
494 
495 /// Get all register state flags from machine operand \p RegOp.
496 inline unsigned getRegState(const MachineOperand &RegOp) {
497  assert(RegOp.isReg() && "Not a register operand");
498  return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) |
499  getKillRegState(RegOp.isKill()) | getDeadRegState(RegOp.isDead()) |
500  getUndefRegState(RegOp.isUndef()) |
502  getDebugRegState(RegOp.isDebug()) |
504  RegOp.isRenamable());
505 }
506 
507 /// Helper class for constructing bundles of MachineInstrs.
508 ///
509 /// MIBundleBuilder can create a bundle from scratch by inserting new
510 /// MachineInstrs one at a time, or it can create a bundle from a sequence of
511 /// existing MachineInstrs in a basic block.
513  MachineBasicBlock &MBB;
516 
517 public:
518  /// Create an MIBundleBuilder that inserts instructions into a new bundle in
519  /// BB above the bundle or instruction at Pos.
521  : MBB(BB), Begin(Pos.getInstrIterator()), End(Begin) {}
522 
523  /// Create a bundle from the sequence of instructions between B and E.
526  : MBB(BB), Begin(B.getInstrIterator()), End(E.getInstrIterator()) {
527  assert(B != E && "No instructions to bundle");
528  ++B;
529  while (B != E) {
530  MachineInstr &MI = *B;
531  ++B;
532  MI.bundleWithPred();
533  }
534  }
535 
536  /// Create an MIBundleBuilder representing an existing instruction or bundle
537  /// that has MI as its head.
539  : MBB(*MI->getParent()), Begin(MI),
540  End(getBundleEnd(MI->getIterator())) {}
541 
542  /// Return a reference to the basic block containing this bundle.
543  MachineBasicBlock &getMBB() const { return MBB; }
544 
545  /// Return true if no instructions have been inserted in this bundle yet.
546  /// Empty bundles aren't representable in a MachineBasicBlock.
547  bool empty() const { return Begin == End; }
548 
549  /// Return an iterator to the first bundled instruction.
550  MachineBasicBlock::instr_iterator begin() const { return Begin; }
551 
552  /// Return an iterator beyond the last bundled instruction.
553  MachineBasicBlock::instr_iterator end() const { return End; }
554 
555  /// Insert MI into this bundle before I which must point to an instruction in
556  /// the bundle, or end().
558  MachineInstr *MI) {
559  MBB.insert(I, MI);
560  if (I == Begin) {
561  if (!empty())
562  MI->bundleWithSucc();
563  Begin = MI->getIterator();
564  return *this;
565  }
566  if (I == End) {
567  MI->bundleWithPred();
568  return *this;
569  }
570  // MI was inserted in the middle of the bundle, so its neighbors' flags are
571  // already fine. Update MI's bundle flags manually.
574  return *this;
575  }
576 
577  /// Insert MI into MBB by prepending it to the instructions in the bundle.
578  /// MI will become the first instruction in the bundle.
580  return insert(begin(), MI);
581  }
582 
583  /// Insert MI into MBB by appending it to the instructions in the bundle.
584  /// MI will become the last instruction in the bundle.
586  return insert(end(), MI);
587  }
588 };
589 
590 } // end namespace llvm
591 
592 #endif // LLVM_CODEGEN_MACHINEINSTRBUILDER_H
unsigned getTargetFlags() const
MachineBasicBlock & getMBB() const
Return a reference to the basic block containing this bundle.
const MachineInstrBuilder & setMemRefs(ArrayRef< MachineMemOperand *> MMOs) const
void bundleWithPred()
Bundle this instruction with its predecessor.
const MachineInstrBuilder & addMetadata(const MDNode *MD) const
const MachineInstrBuilder & add(const MachineOperand &MO) const
const_iterator end(StringRef path)
Get end iterator over path.
Definition: Path.cpp:233
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator Pos)
Create an MIBundleBuilder that inserts instructions into a new bundle in BB above the bundle or instr...
bool isDebugLabel() const
static MachineOperand CreateCImm(const ConstantInt *CI)
const_iterator begin(StringRef path, Style style=Style::native)
Get begin iterator over path.
Definition: Path.cpp:224
unsigned getRegState(const MachineOperand &RegOp)
Get all register state flags from machine operand RegOp.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
Register getReg(unsigned Idx) const
Get the register for the operand index.
const MachineInstrBuilder & addIntrinsicID(Intrinsic::ID ID) const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
Definition: Register.h:63
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:178
const MachineInstrBuilder & addShuffleMask(const Constant *Val) const
unsigned Reg
const MachineInstrBuilder & addJumpTableIndex(unsigned Idx, unsigned TargetFlags=0) const
const MachineInstrBuilder & addPredicate(CmpInst::Predicate Pred) const
unsigned getInternalReadRegState(bool B)
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
Metadata node.
Definition: Metadata.h:863
F(f)
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp=false)
CreateMachineInstr - Allocate a new MachineInstr.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
bool isInternalRead() const
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
MIBundleBuilder(MachineBasicBlock &BB, MachineBasicBlock::iterator B, MachineBasicBlock::iterator E)
Create a bundle from the sequence of instructions between B and E.
The address of a basic block.
Definition: Constants.h:839
Holds all the information related to register banks.
A description of a memory reference used in the backend.
MachineInstr * buildDbgValueForSpill(MachineBasicBlock &BB, MachineBasicBlock::iterator I, const MachineInstr &Orig, int FrameIndex)
Clone a DBG_VALUE whose value has been spilled to FrameIndex.
MachineInstrBuilder(MachineFunction &F, MachineInstr *I)
Create a MachineInstrBuilder for manipulating an existing instruction.
const HexagonInstrInfo * TII
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned TargetFlags=0)
unsigned SubReg
void bundleWithSucc()
Bundle this instruction with its successor.
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
const MachineInstrBuilder & addDef(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned TargetFlags=0)
const MachineInstrBuilder & addConstantPoolIndex(unsigned Idx, int Offset=0, unsigned TargetFlags=0) const
void copyImplicitOps(MachineFunction &MF, const MachineInstr &MI)
Copy implicit register operands from specified instruction to this instruction.
MIBundleBuilder & prepend(MachineInstr *MI)
Insert MI into MBB by prepending it to the instructions in the bundle.
const MachineInstrBuilder & addFPImm(const ConstantFP *Val) const
const MachineInstrBuilder & addGlobalAddress(const GlobalValue *GV, int64_t Offset=0, unsigned TargetFlags=0) const
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
void addMemOperand(MachineFunction &MF, MachineMemOperand *MO)
Add a MachineMemOperand to the machine instruction.
static MachineOperand CreatePredicate(unsigned Pred)
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:352
unsigned getUndefRegState(bool B)
unsigned getKillRegState(bool B)
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:131
unsigned getDebugRegState(bool B)
TargetInstrInfo - Interface to description of machine instruction set.
unsigned getDeadRegState(bool B)
unsigned getDefRegState(bool B)
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Address of a global value.
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
MachineInstrBundleIterator< MachineInstr > iterator
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
const MachineInstrBuilder & addCImm(const ConstantInt *Val) const
static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags=0)
static MachineOperand CreateFPImm(const ConstantFP *CFP)
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:41
const GlobalValue * getGlobal() const
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:263
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned TargetFlags=0)
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:302
Address of a basic block.
MachineBasicBlock::instr_iterator begin() const
Return an iterator to the first bundled instruction.
const MachineInstrBuilder & addRegMask(const uint32_t *Mask) const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:732
const DILabel * getDebugLabel() const
Return the debug label referenced by this DBG_LABEL instruction.
self_iterator getIterator()
Definition: ilist_node.h:81
const MachineInstrBuilder & addSym(MCSymbol *Sym, unsigned char TargetFlags=0) const
const MachineInstrBuilder & addFrameIndex(int Idx) const
static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineInstrBuilder & add(ArrayRef< MachineOperand > MOs) const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static MachineOperand CreateES(const char *SymName, unsigned TargetFlags=0)
constexpr bool empty(const T &RangeOrContainer)
Test whether RangeOrContainer is empty. Similar to C++17 std::empty.
Definition: STLExtras.h:197
void cloneMemRefs(MachineFunction &MF, const MachineInstr &MI)
Clone another MachineInstr&#39;s memory reference descriptor list and replace ours with it...
static MachineOperand CreateMetadata(const MDNode *Meta)
This is the shared class of boolean and integer constants.
Definition: Constants.h:83
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
unsigned getRenamableRegState(bool B)
MachineBasicBlock::instr_iterator end() const
Return an iterator beyond the last bundled instruction.
void setFlags(unsigned flags)
Definition: MachineInstr.h:306
MachineInstr * operator->() const
bool isDebugValue() const
MachineOperand class - Representation of each machine instruction operand.
bool empty() const
Return true if no instructions have been inserted in this bundle yet.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
const MachineInstrBuilder & addDisp(const MachineOperand &Disp, int64_t off, unsigned char TargetFlags=0) const
void updateDbgValueForSpill(MachineInstr &Orig, int FrameIndex)
Update a DBG_VALUE whose value has been spilled to FrameIndex.
bool constrainSelectedInstRegOperands(MachineInstr &I, const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI)
Mutate the newly-selected instruction I to constrain its (possibly generic) virtual register operands...
Definition: Utils.cpp:111
MachineInstr * getInstr() const
If conversion operators fail, use this method to get the MachineInstr explicitly. ...
MIBundleBuilder & insert(MachineBasicBlock::instr_iterator I, MachineInstr *MI)
Insert MI into this bundle before I which must point to an instruction in the bundle, or end().
int64_t getImm() const
bool isRenamable() const
isRenamable - Returns true if this register may be renamed, i.e.
const MachineInstrBuilder & copyImplicitOps(const MachineInstr &OtherMI) const
Copy all the implicit operands from OtherMI onto this one.
Representation of each machine instruction.
Definition: MachineInstr.h:64
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & setMIFlags(unsigned Flags) const
void cloneMergedMemRefs(MachineFunction &MF, ArrayRef< const MachineInstr *> MIs)
Clone the merge of multiple MachineInstrs&#39; memory reference descriptors list and replace ours with it...
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
int64_t getOffset() const
Return the offset from the symbol in this operand.
const BlockAddress * getBlockAddress() const
static MachineOperand CreateImm(int64_t Val)
#define I(x, y, z)
Definition: MD5.cpp:58
unsigned getImplRegState(bool B)
const MachineInstrBuilder & cloneMemRefs(const MachineInstr &OtherMI) const
const MachineInstrBuilder & cloneMergedMemRefs(ArrayRef< const MachineInstr *> OtherMIs) const
static MachineOperand CreateShuffleMask(const Constant *C)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
Instructions::iterator instr_iterator
MIBundleBuilder & append(MachineInstr *MI)
Insert MI into MBB by appending it to the instructions in the bundle.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand *> MemRefs)
Assign this MachineInstr&#39;s memory reference descriptor list.
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0)
const DILocalVariable * getDebugVariable() const
Return the debug variable referenced by this DBG_VALUE instruction.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
static const Function * getParent(const Value *V)
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned TargetFlags=0)
IRTranslator LLVM IR MI
Address of indexed Constant in Constant Pool.
Register getReg() const
getReg - Returns the register number.
MachineBasicBlock::instr_iterator getBundleEnd(MachineBasicBlock::instr_iterator I)
Returns an iterator pointing beyond the bundle containing I.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:416
const MachineInstrBuilder & addTargetIndex(unsigned Idx, int64_t Offset=0, unsigned TargetFlags=0) const
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
static MachineOperand CreateFI(int Idx)
MachineInstrBuilder(MachineFunction &F, MachineBasicBlock::iterator I)
MIBundleBuilder(MachineInstr *MI)
Create an MIBundleBuilder representing an existing instruction or bundle that has MI as its head...
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
bool constrainAllUses(const TargetInstrInfo &TII, const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI) const
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned TargetFlags=0)
Helper class for constructing bundles of MachineInstrs.
bool isImplicit() const
const MachineInstrBuilder & addBlockAddress(const BlockAddress *BA, int64_t Offset=0, unsigned TargetFlags=0) const