30#include "llvm/Config/llvm-config.h"
43#define DEBUG_TYPE "codegen"
47 cl::desc(
"When printing machine IR, annotate instructions and blocks with "
48 "SlotIndexes when available"),
52 : BB(
B),
Number(-1), xParent(&MF) {
55 IrrLoopHeaderWeight =
B->getIrrLoopHeaderWeight();
58MachineBasicBlock::~MachineBasicBlock() =
default;
62 if (!CachedMCSymbol) {
89 return CachedMCSymbol;
93 if (!CachedEHCatchretMCSymbol) {
100 return CachedEHCatchretMCSymbol;
104 if (!CachedEndMCSymbol) {
112 return CachedEndMCSymbol;
139 MI.addRegOperandsToUseLists(RegInfo);
144 N->getParent()->removeFromMBBNumbering(
N->Number);
151 assert(!
N->getParent() &&
"machine instruction already in a basic block");
152 N->setParent(Parent);
158 MF->handleInsertion(*
N);
164 assert(
N->getParent() &&
"machine instruction not in a basic block");
168 MF->handleRemoval(*
N);
169 N->removeRegOperandsFromUseLists(MF->
getRegInfo());
172 N->setParent(
nullptr);
178 instr_iterator
First,
179 instr_iterator
Last) {
180 assert(Parent->getParent() == FromList.Parent->getParent() &&
181 "cannot transfer MachineInstrs between MachineFunctions");
184 if (
this == &FromList)
187 assert(Parent != FromList.Parent &&
"Two lists have the same parent?");
192 First->setParent(Parent);
196 assert(!
MI->getParent() &&
"MI is still in a block!");
197 Parent->getParent()->deleteMachineInstr(
MI);
202 while (
I != E &&
I->isPHI())
204 assert((
I == E || !
I->isInsideBundle()) &&
205 "First non-phi MI cannot be inside a bundle!");
214 while (
I != E && (
I->isPHI() ||
I->isPosition() ||
215 TII->isBasicBlockPrologue(*
I)))
219 assert((
I == E || !
I->isInsideBundle()) &&
220 "First non-phi / non-label instruction is inside a bundle!");
230 while (
I != E && (
I->isPHI() ||
I->isPosition() ||
I->isDebugInstr() ||
231 (SkipPseudoOp &&
I->isPseudoProbe()) ||
232 TII->isBasicBlockPrologue(*
I, Reg)))
236 assert((
I == E || !
I->isInsideBundle()) &&
237 "First non-phi / non-label / non-debug "
238 "instruction is inside a bundle!");
244 while (
I !=
B && ((--
I)->isTerminator() ||
I->isDebugInstr()))
246 while (
I != E && !
I->isTerminator())
253 while (
I !=
B && ((--
I)->isTerminator() ||
I->isDebugInstr()))
255 while (
I != E && !
I->isTerminator())
261 return find_if(
instrs(), [](
auto &II) {
return II.isTerminator(); });
277 if (
I->isDebugInstr() ||
I->isInsideBundle())
279 if (SkipPseudoOp &&
I->isPseudoProbe())
298#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
306 if (Succ->isInlineAsmBrIndirectTarget())
320 return LBB->getName();
338 bool IsStandalone)
const {
341 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
346 const Module *M =
F.getParent();
349 print(
OS, MST, Indexes, IsStandalone);
354 bool IsStandalone)
const {
357 OS <<
"Can't print out MachineBasicBlock because parent MachineFunction"
371 bool HasLineAttributes =
false;
375 if (Indexes)
OS <<
'\t';
377 OS <<
"; predecessors: ";
382 HasLineAttributes =
true;
386 if (Indexes)
OS <<
'\t';
397 if (!Probs.empty() && IsStandalone) {
413 HasLineAttributes =
true;
417 if (Indexes)
OS <<
'\t';
421 for (
const auto &LI :
liveins()) {
423 if (!LI.LaneMask.all())
426 HasLineAttributes =
true;
429 if (HasLineAttributes)
432 bool IsInBundle =
false;
440 if (IsInBundle && !
MI.isInsideBundle()) {
446 MI.
print(
OS, MST, IsStandalone,
false,
false,
459 if (IrrLoopHeaderWeight && IsStandalone) {
460 if (Indexes)
OS <<
'\t';
461 OS.
indent(2) <<
"; Irreducible loop header weight: " << *IrrLoopHeaderWeight
485 bool hasAttributes =
false;
494 if (moduleSlotTracker) {
496 }
else if (bb->getParent()) {
503 os <<
"<ir-block badref>";
512 os <<
'.' << bb->getName();
514 hasAttributes =
true;
523 os << (hasAttributes ?
", " :
" (");
524 os <<
"machine-block-address-taken";
525 hasAttributes =
true;
528 os << (hasAttributes ?
", " :
" (");
529 os <<
"ir-block-address-taken ";
531 hasAttributes =
true;
534 os << (hasAttributes ?
", " :
" (");
536 hasAttributes =
true;
539 os << (hasAttributes ?
", " :
" (");
540 os <<
"inlineasm-br-indirect-target";
541 hasAttributes =
true;
544 os << (hasAttributes ?
", " :
" (");
545 os <<
"ehfunclet-entry";
546 hasAttributes =
true;
549 os << (hasAttributes ?
", " :
" (");
551 hasAttributes =
true;
554 os << (hasAttributes ?
", " :
" (");
566 hasAttributes =
true;
569 os << (hasAttributes ?
", " :
" (");
570 os <<
"bb_id " <<
getBBID()->BaseID;
572 os <<
" " <<
getBBID()->CloneID;
573 hasAttributes =
true;
575 if (CallFrameSize != 0) {
576 os << (hasAttributes ?
", " :
" (");
577 os <<
"call-frame-size " << CallFrameSize;
578 hasAttributes =
true;
595 if (
I == LiveIns.end())
598 I->LaneMask &= ~LaneMask;
599 if (
I->LaneMask.none())
606 LiveInVector::iterator LI = LiveIns.begin() + (
I - LiveIns.begin());
607 return LiveIns.erase(LI);
613 return I !=
livein_end() && (
I->LaneMask & LaneMask).any();
622 LiveInVector::const_iterator
I = LiveIns.begin();
623 LiveInVector::const_iterator J;
624 LiveInVector::iterator Out = LiveIns.begin();
625 for (;
I != LiveIns.end(); ++Out,
I = J) {
628 for (J = std::next(
I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
629 LaneMask |= J->LaneMask;
630 Out->PhysReg = PhysReg;
631 Out->LaneMask = LaneMask;
633 LiveIns.erase(Out, LiveIns.end());
640 assert(RC &&
"Register class is required");
642 "Only the entry block and landing pads can have physreg live ins");
651 for (;
I != E &&
I->isCopy(); ++
I)
652 if (
I->getOperand(1).getReg() == PhysReg) {
653 Register VirtReg =
I->getOperand(0).getReg();
654 if (!
MRI.constrainRegClass(VirtReg, RC))
678 if (TerminatorI ==
MBB.
end())
682 return TII->getJumpTableIndex(Terminator);
700 assert(!
B &&
"UpdateTerminators requires analyzable predecessors!");
715 if (!PreviousLayoutSuccessor || !
isSuccessor(PreviousLayoutSuccessor) ||
716 PreviousLayoutSuccessor->
isEHPad())
744 assert(PreviousLayoutSuccessor);
748 if (PreviousLayoutSuccessor ==
TBB) {
779 for (
auto Prob : Probs)
780 Sum += Prob.getNumerator();
786 "The sum of successors's probabilities exceeds one.");
794 if (!(Probs.empty() && !Successors.empty()))
795 Probs.push_back(Prob);
796 Successors.push_back(Succ);
797 Succ->addPredecessor(
this);
805 Successors.push_back(Succ);
806 Succ->addPredecessor(
this);
811 bool NormalizeSuccProbs) {
813 assert(OldI !=
succ_end() &&
"Old is not a successor of this block!");
815 "New is already a successor of this block!");
823 : *getProbabilityIterator(OldI));
824 if (NormalizeSuccProbs)
829 bool NormalizeSuccProbs) {
836 assert(
I != Successors.end() &&
"Not a current successor!");
840 if (!Probs.empty()) {
841 probability_iterator WI = getProbabilityIterator(
I);
843 if (NormalizeSuccProbs)
847 (*I)->removePredecessor(
this);
848 return Successors.erase(
I);
871 assert(OldI != E &&
"Old is not a successor of this block");
875 Old->removePredecessor(
this);
876 New->addPredecessor(
this);
883 if (!Probs.empty()) {
884 auto ProbIter = getProbabilityIterator(NewI);
885 if (!ProbIter->isUnknown())
886 *ProbIter += *getProbabilityIterator(OldI);
893 if (!Orig->Probs.empty())
900 Predecessors.push_back(Pred);
905 assert(
I != Predecessors.end() &&
"Pred is not a predecessor of this block!");
906 Predecessors.erase(
I);
918 if (!FromMBB->Probs.empty()) {
919 auto Prob = *FromMBB->Probs.begin();
935 if (!FromMBB->Probs.empty()) {
936 auto Prob = *FromMBB->Probs.begin();
962 return Successors.size() == 1 ? Successors[0] :
nullptr;
966 return Predecessors.size() == 1 ? Predecessors[0] :
nullptr;
996 if (!
TBB)
return &*Fallthrough;
1002 return &*Fallthrough;
1006 if (
Cond.empty())
return nullptr;
1010 return (FBB ==
nullptr) ? &*Fallthrough :
nullptr;
1023 if (SplitPoint ==
end()) {
1031 if (UpdateLiveIns) {
1062 int JumpTableIndex) {
1063 assert(JumpTableIndex >= 0 &&
"need valid index");
1080 if (Pred == &IgnoreMBB)
1092 if (PredJTI == JumpTableIndex)
1110 : MF(MF), Indexes(Indexes) {
1116 for (
auto MI : Insertions)
1127 if (Indexes && !Insertions.
remove(&
MI))
1145 bool ChangedIndirectJump =
false;
1150 ChangedIndirectJump =
true;
1163 Indexes->insertMBBInMaps(NMBB);
1176 if (MO.getReg() == 0 || !MO.isKill() || MO.isUndef())
1180 KilledRegs.push_back(Reg);
1182 MO.setIsKill(
false);
1192 if (!MO.isReg() || MO.getReg() == 0)
1206 if (Succ == PrevFallthrough)
1207 PrevFallthrough = NMBB;
1209 if (!ChangedIndirectJump) {
1236 for (
const auto &LI : Succ->
liveins())
1243 while (!KilledRegs.empty()) {
1244 Register Reg = KilledRegs.pop_back_val();
1246 if (!(--
I)->addRegisterKilled(Reg,
TRI,
false))
1248 if (Reg.isVirtual())
1255 if (LiveInSets !=
nullptr)
1272 SlotIndex StartIndex = Indexes->getMBBEndIdx(
this);
1274 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
1280 I != E &&
I->isPHI(); ++
I) {
1281 for (
unsigned ni = 1, ne =
I->getNumOperands(); ni != ne; ni += 2) {
1282 if (
I->getOperand(ni+1).getMBB() == NMBB) {
1292 "PHI sources should be live out of their predecessors.");
1301 for (
unsigned i = 0, e =
MRI->getNumVirtRegs(); i != e; ++i) {
1307 if (!LI.
liveAt(PrevIndex))
1313 assert(VNI &&
"LiveInterval should have VNInfo where it is live.");
1317 VNInfo *VNI = SR.getVNInfoAt(PrevIndex);
1324 SR.removeSegment(StartIndex, EndIndex);
1335 MDT->recordSplitCriticalEdge(
this, Succ, NMBB);
1341 if (
MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
1342 if (TIL == DestLoop) {
1344 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1345 }
else if (TIL->contains(DestLoop)) {
1347 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
1348 }
else if (DestLoop->contains(TIL)) {
1350 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
1356 assert(DestLoop->getHeader() == Succ &&
1357 "Should not create irreducible loops!");
1359 P->addBasicBlockToLoop(NMBB, MLI->getBase());
1405 LLVM_DEBUG(
dbgs() <<
"Won't split critical edge after degenerate "
1416 if (
MI->isBundledWithSucc() && !
MI->isBundledWithPred())
1417 MI->unbundleFromSucc();
1419 if (
MI->isBundledWithPred() && !
MI->isBundledWithSucc())
1420 MI->unbundleFromPred();
1440 assert(!
MI->isBundledWithPred() && !
MI->isBundledWithSucc() &&
1441 "Cannot insert instruction with bundle flags");
1468 assert(Old != New &&
"Cannot replace self with self!");
1473 if (!
I->isTerminator())
break;
1477 for (
unsigned i = 0, e =
I->getNumOperands(); i != e; ++i)
1478 if (
I->getOperand(i).isMBB() &&
1479 I->getOperand(i).getMBB() == Old)
1480 I->getOperand(i).setMBB(New);
1490 for (
unsigned i = 2, e =
MI.getNumOperands() + 1; i != e; i += 2) {
1504 return MBBI->getDebugLoc();
1513 if (!
MBBI->isDebugInstr())
1514 return MBBI->getDebugLoc();
1525 if (!
MBBI->isDebugInstr())
1526 return MBBI->getDebugLoc();
1536 return MBBI->getDebugLoc();
1546 while (TI !=
end() && !TI->isBranch())
1550 DL = TI->getDebugLoc();
1551 for (++TI ; TI !=
end() ; ++TI)
1564 const auto &Prob = *getProbabilityIterator(Succ);
1565 if (Prob.isUnknown()) {
1568 unsigned KnownProbNum = 0;
1570 for (
const auto &
P : Probs) {
1571 if (!
P.isUnknown()) {
1576 return Sum.getCompl() / (Probs.size() - KnownProbNum);
1587 *getProbabilityIterator(
I) = Prob;
1591MachineBasicBlock::const_probability_iterator
1592MachineBasicBlock::getProbabilityIterator(
1594 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1595 const size_t index = std::distance(Successors.begin(),
I);
1596 assert(index < Probs.size() &&
"Not a current successor!");
1597 return Probs.begin() + index;
1601MachineBasicBlock::probability_iterator
1603 assert(Probs.size() == Successors.size() &&
"Async probability list!");
1604 const size_t index = std::distance(Successors.begin(),
I);
1605 assert(index < Probs.size() &&
"Not a current successor!");
1606 return Probs.begin() + index;
1618 unsigned Neighborhood)
const {
1619 unsigned N = Neighborhood;
1623 for (;
I !=
end() &&
N > 0; ++
I) {
1624 if (
I->isDebugOrPseudoInstr())
1635 if (
Info.FullyDefined ||
Info.Clobbered)
1644 if (
TRI->regsOverlap(LI.PhysReg, Reg))
1662 if (
I->isDebugOrPseudoInstr())
1676 if (!
Info.PartialDeadDef)
1691 }
while (
I !=
begin() &&
N > 0);
1696 while (
I !=
begin() && std::prev(
I)->isDebugOrPseudoInstr())
1703 if (
TRI->regsOverlap(LI.PhysReg, Reg))
1732 std::vector<RegisterMaskPair> &OldLiveIns) {
1733 assert(OldLiveIns.empty() &&
"Vector must be empty");
1740 "Liveness information is accurate");
1741 return LiveIns.begin();
1748 "Liveness information is accurate");
1751 MCPhysReg ExceptionPointer = 0, ExceptionSelector = 0;
1758 return liveout_iterator(*
this, ExceptionPointer, ExceptionSelector,
false);
1764 for (
auto I = R.begin(), E = R.end();
I != E; ++
I) {
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
Analysis containing CSE Info
#define LLVM_DUMP_METHOD
Mark debug helper function definitions like dump() that should not be stripped from debug builds.
const HexagonInstrInfo * TII
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
static bool jumpTableHasOtherUses(const MachineFunction &MF, const MachineBasicBlock &IgnoreMBB, int JumpTableIndex)
static void unbundleSingleMI(MachineInstr *MI)
Prepare MI to be removed from its bundle.
static int findJumpTableIndex(const MachineBasicBlock &MBB)
static cl::opt< bool > PrintSlotIndexes("print-slotindexes", cl::desc("When printing machine IR, annotate instructions and blocks with " "SlotIndexes when available"), cl::init(true), cl::Hidden)
unsigned const TargetRegisterInfo * TRI
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isLiveOut(const MachineBasicBlock &MBB, unsigned Reg)
This file describes how to lower LLVM code to machine code.
SlotIndexUpdateDelegate(MachineFunction &MF, SlotIndexes *Indexes)
~SlotIndexUpdateDelegate()
void MF_HandleRemoval(MachineInstr &MI) override
Callback before a removal. This should not modify the MI directly.
void MF_HandleInsertion(MachineInstr &MI) override
Callback after an insertion. This should not modify the MI directly.
LLVM Basic Block Representation.
static uint32_t getDenominator()
static BranchProbability getUnknown()
uint32_t getNumerator() const
static BranchProbability getZero()
static DILocation * getMergedLocation(DILocation *LocA, DILocation *LocB)
When two instructions are combined into a single instruction we also need to combine the original loc...
bool hasPersonalityFn() const
Check whether this function has a personality function.
Constant * getPersonalityFn() const
Get the personality function associated with this function.
unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const override
Remove the branching code at the end of the specific MBB.
bool isPredicated(const MachineInstr &MI) const override
Returns true if the instruction is already predicated.
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const override
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e....
bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const override
Reverses the branch condition of the specified condition list, returning false on success and true if...
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override
Insert branch code into the end of the specified MachineBasicBlock.
LiveInterval - This class represents the liveness of a register, or stack slot.
iterator_range< subrange_iterator > subranges()
void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)
Update live intervals for instructions in a range of iterators.
bool hasInterval(Register Reg) const
SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const
Return the first index in the given basic block.
void insertMBBInMaps(MachineBasicBlock *MBB)
LiveInterval & getInterval(Register Reg)
A set of physical registers with utility functions to track liveness when walking backward/forward th...
void stepBackward(const MachineInstr &MI)
Simulates liveness when stepping backwards over an instruction(bundle).
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
void addLiveOuts(const MachineBasicBlock &MBB)
Adds all live-out registers of basic block MBB.
iterator addSegment(Segment S)
Add the specified Segment to this range, merging segments as appropriate.
bool liveAt(SlotIndex index) const
void removeSegment(SlotIndex Start, SlotIndex End, bool RemoveDeadValNo=false)
Remove the specified interval from this live range.
VNInfo * getVNInfoAt(SlotIndex Idx) const
getVNInfoAt - Return the VNInfo that is live at Idx, or NULL.
VarInfo & getVarInfo(Register Reg)
getVarInfo - Return the VarInfo structure for the specified VIRTUAL register.
void addNewBlock(MachineBasicBlock *BB, MachineBasicBlock *DomBB, MachineBasicBlock *SuccBB)
addNewBlock - Add a new basic block BB between DomBB and SuccBB.
StringRef getPrivateLabelPrefix() const
Context object for machine code objects.
const MCAsmInfo * getAsmInfo() const
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Wrapper class representing physical registers. Should be passed by value.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
bool isInlineAsmBrIndirectTarget() const
Returns true if this is the indirect dest of an INLINEASM_BR.
DebugLoc rfindPrevDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findPrevDebugLoc (it also searches towards the beginning of this MBB) exce...
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
bool hasEHPadSuccessor() const
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
livein_iterator livein_end() const
iterator getFirstTerminatorForward()
Finds the first terminator in a block by scanning forward.
bool isEHPad() const
Returns true if the block is a landing pad.
void replacePhiUsesWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Update all phi nodes in this basic block to refer to basic block New instead of basic block Old.
MachineInstr * remove_instr(MachineInstr *I)
Remove the possibly bundled instruction from the instruction list without deleting it.
instr_iterator instr_begin()
MachineInstrBundleIterator< const MachineInstr > const_iterator
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
MCSymbol * getEHCatchretSymbol() const
Return the EHCatchret Symbol for this basic block.
void moveBefore(MachineBasicBlock *NewAfter)
Move 'this' block before or after the specified block.
void replaceSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New)
Replace successor OLD with NEW and update probability info.
MachineBasicBlock * getFallThrough(bool JumpToFallThrough=true)
Return the fallthrough block if the block can implicitly transfer control to the block after it by fa...
void transferSuccessors(MachineBasicBlock *FromMBB)
Transfers all the successors from MBB to this machine basic block (i.e., copies all the successors Fr...
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
BranchProbability getSuccProbability(const_succ_iterator Succ) const
Return probability of the edge from this block to MBB.
iterator_range< livein_iterator > liveins() const
iterator_range< iterator > phis()
Returns a range that iterates over the phis in the basic block.
reverse_instr_iterator instr_rbegin()
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they're not in a MachineFuncti...
iterator SkipPHIsAndLabels(iterator I)
Return the first instruction in MBB after I that is not a PHI or a label.
std::vector< MachineBasicBlock * >::const_iterator const_succ_iterator
void addSuccessorWithoutProb(MachineBasicBlock *Succ)
Add Succ as a successor of this MachineBasicBlock.
void setCallFrameSize(unsigned N)
Set the call frame size on entry to this basic block.
std::optional< UniqueBBID > getBBID() const
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
void splitSuccessor(MachineBasicBlock *Old, MachineBasicBlock *New, bool NormalizeSuccProbs=false)
Split the old successor into old plus new and updates the probability info.
@ PrintNameIr
Add IR name where available.
@ PrintNameAttributes
Print attributes.
void updateTerminator(MachineBasicBlock *PreviousLayoutSuccessor)
Update the terminator instructions in block to account for changes to block layout which may have bee...
const MachineBasicBlock * getSinglePredecessor() const
Return the predecessor of this block if it has a single predecessor.
iterator SkipPHIsLabelsAndDebug(iterator I, Register Reg=Register(), bool SkipPseudoOp=true)
Return the first instruction in MBB after I that is not a PHI, label or debug.
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
bool canFallThrough()
Return true if the block can implicitly transfer control to the block after it by falling off the end...
void setSuccProbability(succ_iterator I, BranchProbability Prob)
Set successor probability of a given iterator.
iterator getFirstNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the first non-debug instruction in the basic block, or end().
succ_iterator succ_begin()
bool livein_empty() const
void printAsOperand(raw_ostream &OS, bool PrintType=true) const
void validateSuccProbs() const
Validate successors' probabilities and check if the sum of them is approximate one.
bool isIRBlockAddressTaken() const
Test whether this block is the target of an IR BlockAddress.
LiveInVector::const_iterator livein_iterator
MCSymbol * getEndSymbol() const
Returns the MCSymbol marking the end of this basic block.
void clearLiveIns()
Clear live in list.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been defined and not killed as of just before Before.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
livein_iterator livein_begin() const
unsigned succ_size() const
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
const uint32_t * getBeginClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the start of this basic block.
MBBSectionID getSectionID() const
Returns the section ID of this basic block.
std::vector< MachineBasicBlock * >::iterator succ_iterator
bool isEntryBlock() const
Returns true if this is the entry block of the function.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void copySuccessor(const MachineBasicBlock *Orig, succ_iterator I)
Copy a successor (and any probability info) from original block to this block's.
BasicBlock * getAddressTakenIRBlock() const
Retrieves the BasicBlock which corresponds to this MachineBasicBlock.
void sortUniqueLiveIns()
Sorts and uniques the LiveIns vector.
const MachineBasicBlock * getSingleSuccessor() const
Return the successor of this block if it has a single successor.
liveout_iterator liveout_begin() const
Iterator scanning successor basic blocks' liveins to determine the registers potentially live at the ...
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
bool isPredecessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a predecessor of this block.
DebugLoc rfindDebugLoc(reverse_instr_iterator MBBI)
Has exact same behavior as findDebugLoc (it also searches towards the end of this MBB) except that th...
void print(raw_ostream &OS, const SlotIndexes *=nullptr, bool IsStandalone=true) const
reverse_instr_iterator instr_rend()
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any debug instructions.
Instructions::iterator instr_iterator
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
void ReplaceUsesOfBlockWith(MachineBasicBlock *Old, MachineBasicBlock *New)
Given a machine basic block that branched to 'Old', change the code and CFG so that it branches to 'N...
MachineBasicBlock * SplitCriticalEdge(MachineBasicBlock *Succ, Pass &P, std::vector< SparseBitVector<> > *LiveInSets=nullptr)
Split the critical edge from this block to the given successor block, and return the newly created bl...
bool isLayoutSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB will be emitted immediately after this block, such that if this bloc...
DebugLoc findPrevDebugLoc(instr_iterator MBBI)
Find the previous valid DebugLoc preceding MBBI, skipping any debug instructions.
MachineBasicBlock * splitAt(MachineInstr &SplitInst, bool UpdateLiveIns=true, LiveIntervals *LIS=nullptr)
Split a basic block into 2 pieces at SplitPoint.
void eraseFromParent()
This method unlinks 'this' from the containing function and deletes it.
instr_iterator instr_end()
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
std::string getFullName() const
Return a formatted string to identify this block and its parent function.
bool isBeginSection() const
Returns true if this block begins any section.
unsigned getCallFrameSize() const
Return the call frame size on entry to this basic block.
DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
iterator_range< succ_iterator > successors()
instr_iterator getFirstInstrTerminator()
Same getFirstTerminator but it ignores bundles and return an instr_iterator instead.
reverse_iterator rbegin()
bool isMachineBlockAddressTaken() const
Test whether this block is used as something other than the target of a terminator,...
void printName(raw_ostream &os, unsigned printNameFlags=PrintNameIr, ModuleSlotTracker *moduleSlotTracker=nullptr) const
Print the basic block's name as:
bool isSuccessor(const MachineBasicBlock *MBB) const
Return true if the specified MBB is a successor of this block.
iterator_range< pred_iterator > predecessors()
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
Align getAlignment() const
Return alignment of the basic block.
bool canSplitCriticalEdge(const MachineBasicBlock *Succ) const
Check if the edge between this block and the given successor Succ, can be split.
bool isLegalToHoistInto() const
Returns true if it is legal to hoist instructions into this block.
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
bool mayHaveInlineAsmBr() const
Returns true if this block may have an INLINEASM_BR (overestimate, by checking if any of the successo...
void removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll())
Remove the specified register from the live in set.
LivenessQueryResult
Possible outcome of a register liveness query to computeRegisterLiveness()
@ LQR_Dead
Register is known to be fully dead.
@ LQR_Live
Register is known to be (at least partially) live.
@ LQR_Unknown
Register liveness not decidable from local neighborhood.
void moveAfter(MachineBasicBlock *NewBefore)
const uint32_t * getEndClobberMask(const TargetRegisterInfo *TRI) const
Get the clobber mask for the end of the basic block.
bool sizeWithoutDebugLargerThan(unsigned Limit) const
MachineBasicBlock * removeFromParent()
This method unlinks 'this' from the containing function, and returns it, but does not delete it.
Instructions::reverse_iterator reverse_instr_iterator
DominatorTree Class - Concrete subclass of DominatorTreeBase that is used to compute a normal dominat...
bool hasProperty(Property P) const
unsigned addToMBBNumbering(MachineBasicBlock *MBB)
Adds the MBB to the internal numbering.
unsigned getFunctionNumber() const
getFunctionNumber - Return a unique ID for the current function.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
bool hasBBSections() const
Returns true if this function has basic block sections enabled.
MCContext & getContext() const
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void resetDelegate(Delegate *delegate)
Reset the currently registered delegate - otherwise assert.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
void remove(iterator MBBI)
const MachineFunctionProperties & getProperties() const
Get the function properties.
void setDelegate(Delegate *delegate)
Set the delegate.
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
void splice(iterator InsertPt, iterator MBBI)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void erase(iterator MBBI)
void insert(iterator MBBI, MachineBasicBlock *MBB)
BasicBlockListType::const_iterator const_iterator
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
reverse_iterator getReverse() const
Get a reverse iterator to the same node.
Representation of each machine instruction.
bool ReplaceMBBInJumpTable(unsigned Idx, MachineBasicBlock *Old, MachineBasicBlock *New)
ReplaceMBBInJumpTable - If Old is a target of the jump tables, update the jump table to branch to New...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineOperand class - Representation of each machine instruction operand.
MachineBasicBlock * getMBB() const
void setMBB(MachineBasicBlock *MBB)
Register getReg() const
getReg - Returns the register number.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
Manage lifetime of a slot tracker for printing IR.
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
void incorporateFunction(const Function &F)
Incorporate the given function.
A Module instance is used to store all the information related to an LLVM module.
Pass interface - Implemented by all 'passes'.
virtual void print(raw_ostream &OS, const Module *M) const
print - Print out the internal state of the pass.
Simple wrapper around std::function<void(raw_ostream&)>.
Wrapper class representing virtual and physical registers.
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
static constexpr bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
bool remove(const value_type &X)
Remove an item from the set vector.
bool insert(const value_type &X)
Insert a new element into the SetVector.
SlotIndex - An opaque wrapper around machine indexes.
SlotIndex getPrevSlot() const
Returns the previous slot in the index list.
SlotIndex insertMachineInstrInMaps(MachineInstr &MI, bool Late=false)
Insert the given machine instruction into the mapping.
void removeMachineInstrFromMaps(MachineInstr &MI, bool AllowBundled=false)
Removes machine instruction (bundle) MI from the mapping.
SlotIndex getInstructionIndex(const MachineInstr &MI, bool IgnoreBundle=false) const
Returns the base index for the given instruction.
SlotIndex getMBBStartIdx(unsigned Num) const
Returns the first index in the given basic block number.
bool hasIndex(const MachineInstr &instr) const
Returns true if the given machine instr is mapped to an index, otherwise returns false.
A SetVector that performs no allocations if smaller than a certain size.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
std::pair< const_iterator, bool > insert(const T &V)
insert - Insert an element into the set if it isn't already there.
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StringRef - Represent a constant reference to a string, i.e.
TargetInstrInfo - Interface to description of machine instruction set.
virtual Register getExceptionPointerRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception address on entry to an ...
virtual Register getExceptionSelectorRegister(const Constant *PersonalityFn) const
If a physical register, this returns the register that receives the exception typeid on entry to a la...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
bool requiresStructuredCFG() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetLowering * getTargetLowering() const
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
VNInfo - Value Number Information.
StringRef getName() const
Return a constant reference to the value's name.
self_iterator getIterator()
MachineBasicBlock * getNextNode()
Get the next node, or nullptr for the list tail.
iterator erase(iterator where)
pointer remove(iterator &IT)
iterator insert(iterator where, pointer New)
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream & indent(unsigned NumSpaces)
indent - Insert 'NumSpaces' spaces.
A raw_ostream that writes to an SmallVector or SmallString.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ Kill
The last use of a register.
initializer< Ty > init(const Ty &Val)
This is an optimization pass for GlobalISel generic memory operations.
IterT next_nodbg(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It, then continue incrementing it while it points to a debug instruction.
auto find(R &&Range, const T &Val)
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
PhysRegInfo AnalyzePhysRegInBundle(const MachineInstr &MI, Register Reg, const TargetRegisterInfo *TRI)
AnalyzePhysRegInBundle - Analyze how the current instruction or bundle uses a physical register.
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
void sort(IteratorTy Start, IteratorTy End)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
auto instructionsWithoutDebug(IterT It, IterT End, bool SkipPseudoOp=true)
Construct a range iterator which begins at It and moves forwards until End is reached,...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
@ First
Helpers to iterate all locations in the MemoryEffectsBase class.
raw_ostream & operator<<(raw_ostream &OS, const APFixedPoint &FX)
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
bool is_contained(R &&Range, const E &Element)
Returns true if Element is found in Range.
IterT prev_nodbg(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It, then continue decrementing it while it points to a debug instruction.
Printable printReg(Register Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
void addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs)
Adds registers contained in LiveRegs to the block live-in list of MBB.
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
This struct is a compact representation of a valid (non-zero power of two) alignment.
uint64_t value() const
This is a hole in the type system and should not be abused.
This represents a simple continuous liveness interval for a value.
bool removeKill(MachineInstr &MI)
removeKill - Delete a kill corresponding to the specified machine instruction.
std::vector< MachineInstr * > Kills
Kills - List of MachineInstruction's which are the last use of this virtual register (kill it) in the...
static const MBBSectionID ExceptionSectionID
static const MBBSectionID ColdSectionID
enum llvm::MBBSectionID::SectionType Type
Pair of physical register and lane mask.
MachineJumpTableEntry - One jump table in the jump table info.
std::vector< MachineBasicBlock * > MBBs
MBBs - The vector of basic blocks from which to create the jump table.
Information about how a physical register Reg is used by a set of operands.
static void deleteNode(NodeTy *V)
void removeNodeFromList(NodeTy *)
void addNodeToList(NodeTy *)
void transferNodesFromList(ilist_callback_traits &OldList, Iterator, Iterator)
Callback before transferring nodes to this list.
Template traits for intrusive list.