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llvm::MachineRegisterInfo Class Reference

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc. More...

#include "llvm/CodeGen/MachineRegisterInfo.h"

Classes

class  defusechain_instr_iterator
 defusechain_iterator - This class provides iterator support for machine operands in the function that use or define a specific register. More...
 
class  defusechain_iterator
 reg_begin/reg_end - Provide iteration support to walk over all definitions and uses of a register within the MachineFunction that corresponds to this MachineRegisterInfo object. More...
 
class  Delegate
 

Public Types

using reg_iterator = defusechain_iterator< true, true, false, true, false, false >
 reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register. More...
 
using reg_instr_iterator = defusechain_instr_iterator< true, true, false, false, true, false >
 reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr. More...
 
using reg_bundle_iterator = defusechain_instr_iterator< true, true, false, false, false, true >
 reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle. More...
 
using reg_nodbg_iterator = defusechain_iterator< true, true, true, true, false, false >
 reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug. More...
 
using reg_instr_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, true, false >
 reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More...
 
using reg_bundle_nodbg_iterator = defusechain_instr_iterator< true, true, true, false, false, true >
 reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug. More...
 
using def_iterator = defusechain_iterator< false, true, false, true, false, false >
 def_iterator/def_begin/def_end - Walk all defs of the specified register. More...
 
using def_instr_iterator = defusechain_instr_iterator< false, true, false, false, true, false >
 def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst. More...
 
using def_bundle_iterator = defusechain_instr_iterator< false, true, false, false, false, true >
 def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle. More...
 
using use_iterator = defusechain_iterator< true, false, false, true, false, false >
 use_iterator/use_begin/use_end - Walk all uses of the specified register. More...
 
using use_instr_iterator = defusechain_instr_iterator< true, false, false, false, true, false >
 use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr. More...
 
using use_bundle_iterator = defusechain_instr_iterator< true, false, false, false, false, true >
 use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle. More...
 
using use_nodbg_iterator = defusechain_iterator< true, false, true, true, false, false >
 use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug. More...
 
using use_instr_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, true, false >
 use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug. More...
 
using use_bundle_nodbg_iterator = defusechain_instr_iterator< true, false, true, false, false, true >
 use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug. More...
 
using livein_iterator = std::vector< std::pair< unsigned, unsigned > >::const_iterator
 

Public Member Functions

 MachineRegisterInfo (MachineFunction *MF)
 
 MachineRegisterInfo (const MachineRegisterInfo &)=delete
 
MachineRegisterInfooperator= (const MachineRegisterInfo &)=delete
 
const TargetRegisterInfogetTargetRegisterInfo () const
 
void resetDelegate (Delegate *delegate)
 
void setDelegate (Delegate *delegate)
 
bool isSSA () const
 
void leaveSSA ()
 
bool tracksLiveness () const
 tracksLiveness - Returns true when tracking register liveness accurately. More...
 
void invalidateLiveness ()
 invalidateLiveness - Indicates that register liveness is no longer being tracked accurately. More...
 
bool shouldTrackSubRegLiveness (const TargetRegisterClass &RC) const
 Returns true if liveness for register class RC should be tracked at the subregister level. More...
 
bool shouldTrackSubRegLiveness (unsigned VReg) const
 
bool subRegLivenessEnabled () const
 
bool isUpdatedCSRsInitialized () const
 Returns true if the updated CSR list was initialized and false otherwise. More...
 
void disableCalleeSavedRegister (unsigned Reg)
 Disables the register from the list of CSRs. More...
 
const MCPhysReggetCalleeSavedRegs () const
 Returns list of callee saved registers. More...
 
void setCalleeSavedRegs (ArrayRef< MCPhysReg > CSRs)
 Sets the updated Callee Saved Registers list. More...
 
void addRegOperandToUseList (MachineOperand *MO)
 Add MO to the linked list of operands for its register. More...
 
void removeRegOperandFromUseList (MachineOperand *MO)
 Remove MO from its use-def list. More...
 
void moveOperands (MachineOperand *Dst, MachineOperand *Src, unsigned NumOps)
 Move NumOps operands from Src to Dst, updating use-def lists as needed. More...
 
void verifyUseList (unsigned Reg) const
 Verify the sanity of the use list for Reg. More...
 
void verifyUseLists () const
 Verify the use list of all registers. More...
 
reg_iterator reg_begin (unsigned RegNo) const
 
iterator_range< reg_iteratorreg_operands (unsigned Reg) const
 
reg_instr_iterator reg_instr_begin (unsigned RegNo) const
 
iterator_range< reg_instr_iteratorreg_instructions (unsigned Reg) const
 
reg_bundle_iterator reg_bundle_begin (unsigned RegNo) const
 
iterator_range< reg_bundle_iteratorreg_bundles (unsigned Reg) const
 
bool reg_empty (unsigned RegNo) const
 reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in). More...
 
reg_nodbg_iterator reg_nodbg_begin (unsigned RegNo) const
 
iterator_range< reg_nodbg_iteratorreg_nodbg_operands (unsigned Reg) const
 
reg_instr_nodbg_iterator reg_instr_nodbg_begin (unsigned RegNo) const
 
iterator_range< reg_instr_nodbg_iteratorreg_nodbg_instructions (unsigned Reg) const
 
reg_bundle_nodbg_iterator reg_bundle_nodbg_begin (unsigned RegNo) const
 
iterator_range< reg_bundle_nodbg_iteratorreg_nodbg_bundles (unsigned Reg) const
 
bool reg_nodbg_empty (unsigned RegNo) const
 reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions. More...
 
def_iterator def_begin (unsigned RegNo) const
 
iterator_range< def_iteratordef_operands (unsigned Reg) const
 
def_instr_iterator def_instr_begin (unsigned RegNo) const
 
iterator_range< def_instr_iteratordef_instructions (unsigned Reg) const
 
def_bundle_iterator def_bundle_begin (unsigned RegNo) const
 
iterator_range< def_bundle_iteratordef_bundles (unsigned Reg) const
 
bool def_empty (unsigned RegNo) const
 def_empty - Return true if there are no instructions defining the specified register (it may be live-in). More...
 
bool hasOneDef (unsigned RegNo) const
 Return true if there is exactly one operand defining the specified register. More...
 
use_iterator use_begin (unsigned RegNo) const
 
iterator_range< use_iteratoruse_operands (unsigned Reg) const
 
use_instr_iterator use_instr_begin (unsigned RegNo) const
 
iterator_range< use_instr_iteratoruse_instructions (unsigned Reg) const
 
use_bundle_iterator use_bundle_begin (unsigned RegNo) const
 
iterator_range< use_bundle_iteratoruse_bundles (unsigned Reg) const
 
bool use_empty (unsigned RegNo) const
 use_empty - Return true if there are no instructions using the specified register. More...
 
bool hasOneUse (unsigned RegNo) const
 hasOneUse - Return true if there is exactly one instruction using the specified register. More...
 
use_nodbg_iterator use_nodbg_begin (unsigned RegNo) const
 
iterator_range< use_nodbg_iteratoruse_nodbg_operands (unsigned Reg) const
 
use_instr_nodbg_iterator use_instr_nodbg_begin (unsigned RegNo) const
 
iterator_range< use_instr_nodbg_iteratoruse_nodbg_instructions (unsigned Reg) const
 
use_bundle_nodbg_iterator use_bundle_nodbg_begin (unsigned RegNo) const
 
iterator_range< use_bundle_nodbg_iteratoruse_nodbg_bundles (unsigned Reg) const
 
bool use_nodbg_empty (unsigned RegNo) const
 use_nodbg_empty - Return true if there are no non-Debug instructions using the specified register. More...
 
bool hasOneNonDBGUse (unsigned RegNo) const
 hasOneNonDBGUse - Return true if there is exactly one non-Debug instruction using the specified register. More...
 
void replaceRegWith (unsigned FromReg, unsigned ToReg)
 replaceRegWith - Replace all instances of FromReg with ToReg in the machine function. More...
 
MachineInstrgetVRegDef (unsigned Reg) const
 getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found. More...
 
MachineInstrgetUniqueVRegDef (unsigned Reg) const
 getUniqueVRegDef - Return the unique machine instr that defines the specified virtual register or null if none is found. More...
 
void clearKillFlags (unsigned Reg) const
 clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand. More...
 
void dumpUses (unsigned RegNo) const
 
bool isConstantPhysReg (unsigned PhysReg) const
 Returns true if PhysReg is unallocatable and constant throughout the function. More...
 
PSetIterator getPressureSets (unsigned RegUnit) const
 Get an iterator over the pressure sets affected by the given physical or virtual register. More...
 
const TargetRegisterClassgetRegClass (unsigned Reg) const
 Return the register class of the specified virtual register. More...
 
const TargetRegisterClassgetRegClassOrNull (unsigned Reg) const
 Return the register class of Reg, or null if Reg has not been assigned a register class yet. More...
 
const RegisterBankgetRegBankOrNull (unsigned Reg) const
 Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class. More...
 
const RegClassOrRegBankgetRegClassOrRegBank (unsigned Reg) const
 Return the register bank or register class of Reg. More...
 
void setRegClass (unsigned Reg, const TargetRegisterClass *RC)
 setRegClass - Set the register class of the specified virtual register. More...
 
void setRegBank (unsigned Reg, const RegisterBank &RegBank)
 Set the register bank to RegBank for Reg. More...
 
void setRegClassOrRegBank (unsigned Reg, const RegClassOrRegBank &RCOrRB)
 
const TargetRegisterClassconstrainRegClass (unsigned Reg, const TargetRegisterClass *RC, unsigned MinNumRegs=0)
 constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers. More...
 
bool recomputeRegClass (unsigned Reg)
 recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg. More...
 
unsigned createVirtualRegister (const TargetRegisterClass *RegClass)
 createVirtualRegister - Create and return a new virtual register in the function with the specified register class. More...
 
VRegToTypeMapgetVRegToType () const
 Accessor for VRegToType. More...
 
LLT getType (unsigned VReg) const
 Get the low-level type of VReg or LLT{} if VReg is not a generic (target independent) virtual register. More...
 
void setType (unsigned VReg, LLT Ty)
 Set the low-level type of VReg to Ty. More...
 
unsigned createGenericVirtualRegister (LLT Ty)
 Create and return a new generic virtual register with low-level type Ty. More...
 
void clearVirtRegTypes ()
 Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers). More...
 
unsigned createIncompleteVirtualRegister ()
 Creates a new virtual register that has no register class, register bank or size assigned yet. More...
 
unsigned getNumVirtRegs () const
 getNumVirtRegs - Return the number of virtual registers created. More...
 
void clearVirtRegs ()
 clearVirtRegs - Remove all virtual registers (after physreg assignment). More...
 
void setRegAllocationHint (unsigned VReg, unsigned Type, unsigned PrefReg)
 setRegAllocationHint - Specify a register allocation hint for the specified virtual register. More...
 
void setSimpleHint (unsigned VReg, unsigned PrefReg)
 Specify the preferred register allocation hint for the specified virtual register. More...
 
std::pair< unsigned, unsignedgetRegAllocationHint (unsigned VReg) const
 getRegAllocationHint - Return the register allocation hint for the specified virtual register. More...
 
unsigned getSimpleHint (unsigned VReg) const
 getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set. More...
 
void markUsesInDebugValueAsUndef (unsigned Reg) const
 markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis. More...
 
bool isPhysRegModified (unsigned PhysReg, bool SkipNoReturnDef=false) const
 Return true if the specified register is modified in this function. More...
 
bool isPhysRegUsed (unsigned PhysReg) const
 Return true if the specified register is modified or read in this function. More...
 
void addPhysRegsUsedFromRegMask (const uint32_t *RegMask)
 addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used. More...
 
const BitVectorgetUsedPhysRegsMask () const
 
void freezeReservedRegs (const MachineFunction &)
 freezeReservedRegs - Called by the register allocator to freeze the set of reserved registers before allocation begins. More...
 
bool reservedRegsFrozen () const
 reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant. More...
 
bool canReserveReg (unsigned PhysReg) const
 canReserveReg - Returns true if PhysReg can be used as a reserved register. More...
 
const BitVectorgetReservedRegs () const
 getReservedRegs - Returns a reference to the frozen set of reserved registers. More...
 
bool isReserved (unsigned PhysReg) const
 isReserved - Returns true when PhysReg is a reserved register. More...
 
bool isReservedRegUnit (unsigned Unit) const
 Returns true when the given register unit is considered reserved. More...
 
bool isAllocatable (unsigned PhysReg) const
 isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved. More...
 
void addLiveIn (unsigned Reg, unsigned vreg=0)
 addLiveIn - Add the specified register as a live-in. More...
 
livein_iterator livein_begin () const
 
livein_iterator livein_end () const
 
bool livein_empty () const
 
ArrayRef< std::pair< unsigned, unsigned > > liveins () const
 
bool isLiveIn (unsigned Reg) const
 
unsigned getLiveInPhysReg (unsigned VReg) const
 getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register. More...
 
unsigned getLiveInVirtReg (unsigned PReg) const
 getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register. More...
 
void EmitLiveInCopies (MachineBasicBlock *EntryMBB, const TargetRegisterInfo &TRI, const TargetInstrInfo &TII)
 EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block. More...
 
LaneBitmask getMaxLaneMaskForVReg (unsigned Reg) const
 Returns a mask covering all bits that can appear in lane masks of subregisters of the virtual register Reg. More...
 

Static Public Member Functions

static reg_iterator reg_end ()
 
static reg_instr_iterator reg_instr_end ()
 
static reg_bundle_iterator reg_bundle_end ()
 
static reg_nodbg_iterator reg_nodbg_end ()
 
static reg_instr_nodbg_iterator reg_instr_nodbg_end ()
 
static reg_bundle_nodbg_iterator reg_bundle_nodbg_end ()
 
static def_iterator def_end ()
 
static def_instr_iterator def_instr_end ()
 
static def_bundle_iterator def_bundle_end ()
 
static use_iterator use_end ()
 
static use_instr_iterator use_instr_end ()
 
static use_bundle_iterator use_bundle_end ()
 
static use_nodbg_iterator use_nodbg_end ()
 
static use_instr_nodbg_iterator use_instr_nodbg_end ()
 
static use_bundle_nodbg_iterator use_bundle_nodbg_end ()
 

Friends

template<bool , bool , bool , bool , bool , bool >
class defusechain_iterator
 
template<bool , bool , bool , bool , bool , bool >
class defusechain_instr_iterator
 

Detailed Description

MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.

Definition at line 52 of file MachineRegisterInfo.h.

Member Typedef Documentation

◆ def_bundle_iterator

def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the specified register, stepping by bundle.

Definition at line 404 of file MachineRegisterInfo.h.

◆ def_instr_iterator

def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the specified register, stepping by MachineInst.

Definition at line 388 of file MachineRegisterInfo.h.

◆ def_iterator

def_iterator/def_begin/def_end - Walk all defs of the specified register.

Definition at line 375 of file MachineRegisterInfo.h.

◆ livein_iterator

using llvm::MachineRegisterInfo::livein_iterator = std::vector<std::pair<unsigned,unsigned> >::const_iterator

Definition at line 840 of file MachineRegisterInfo.h.

◆ reg_bundle_iterator

reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses of the specified register, stepping by bundle.

Definition at line 301 of file MachineRegisterInfo.h.

◆ reg_bundle_nodbg_iterator

reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk all defs and uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 354 of file MachineRegisterInfo.h.

◆ reg_instr_iterator

reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses of the specified register, stepping by MachineInstr.

Definition at line 285 of file MachineRegisterInfo.h.

◆ reg_instr_nodbg_iterator

reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk all defs and uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 337 of file MachineRegisterInfo.h.

◆ reg_iterator

reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified register.

Definition at line 272 of file MachineRegisterInfo.h.

◆ reg_nodbg_iterator

reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses of the specified register, skipping those marked as Debug.

Definition at line 320 of file MachineRegisterInfo.h.

◆ use_bundle_iterator

use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the specified register, stepping by bundle.

Definition at line 460 of file MachineRegisterInfo.h.

◆ use_bundle_nodbg_iterator

use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk all uses of the specified register, stepping by bundle, skipping those marked as Debug.

Definition at line 522 of file MachineRegisterInfo.h.

◆ use_instr_iterator

use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the specified register, stepping by MachineInstr.

Definition at line 444 of file MachineRegisterInfo.h.

◆ use_instr_nodbg_iterator

use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk all uses of the specified register, stepping by MachineInstr, skipping those marked as Debug.

Definition at line 505 of file MachineRegisterInfo.h.

◆ use_iterator

use_iterator/use_begin/use_end - Walk all uses of the specified register.

Definition at line 431 of file MachineRegisterInfo.h.

◆ use_nodbg_iterator

use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the specified register, skipping those marked as Debug.

Definition at line 488 of file MachineRegisterInfo.h.

Constructor & Destructor Documentation

◆ MachineRegisterInfo() [1/2]

MachineRegisterInfo::MachineRegisterInfo ( MachineFunction MF)
explicit

◆ MachineRegisterInfo() [2/2]

llvm::MachineRegisterInfo::MachineRegisterInfo ( const MachineRegisterInfo )
delete

Member Function Documentation

◆ addLiveIn()

void llvm::MachineRegisterInfo::addLiveIn ( unsigned  Reg,
unsigned  vreg = 0 
)
inline

◆ addPhysRegsUsedFromRegMask()

void llvm::MachineRegisterInfo::addPhysRegsUsedFromRegMask ( const uint32_t RegMask)
inline

addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.

This corresponds to the bit mask attached to register mask operands.

Definition at line 755 of file MachineRegisterInfo.h.

References llvm::BitVector::setBitsNotInMask().

Referenced by INITIALIZE_PASS(), and llvm::MIRParserImpl::setupRegisterInfo().

◆ addRegOperandToUseList()

void MachineRegisterInfo::addRegOperandToUseList ( MachineOperand MO)

◆ canReserveReg()

bool llvm::MachineRegisterInfo::canReserveReg ( unsigned  PhysReg) const
inline

canReserveReg - Returns true if PhysReg can be used as a reserved register.

Any register can be reserved before freezeReservedRegs() is called.

Definition at line 786 of file MachineRegisterInfo.h.

References reservedRegsFrozen(), and llvm::BitVector::test().

Referenced by llvm::MipsRegisterInfo::canRealignStack(), llvm::X86RegisterInfo::canRealignStack(), and llvm::ARMBaseRegisterInfo::canRealignStack().

◆ clearKillFlags()

void MachineRegisterInfo::clearKillFlags ( unsigned  Reg) const

clearKillFlags - Iterate over all the uses of the given register and clear the kill flag from the MachineOperand.

This function is used by optimization passes which extend register lifetimes and need only preserve conservative kill flag information.

Definition at line 392 of file MachineRegisterInfo.cpp.

References use_operands().

Referenced by countOperands(), emitIndirectDst(), llvm::HexagonInstrInfo::expandPostRAPseudo(), getCopyRewriter(), hoistAndMergeSGPRInits(), insertPHI(), llvm::AArch64InstrInfo::insertSelect(), isDefInSubRange(), mayLoadFromGOTOrConstantPool(), llvm::SIInstrInfo::moveToVALU(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::SelectionDAGISel::runOnMachineFunction(), and use_nodbg_empty().

◆ clearVirtRegs()

void MachineRegisterInfo::clearVirtRegs ( )

clearVirtRegs - Remove all virtual registers (after physreg assignment).

Definition at line 164 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), I, llvm::TargetRegisterInfo::index2VirtReg(), llvm_unreachable, second, and verifyUseList().

Referenced by getNumVirtRegs(), llvm::SIInstrInfo::insertIndirectBranch(), and llvm::scavengeFrameVirtualRegs().

◆ clearVirtRegTypes()

void MachineRegisterInfo::clearVirtRegTypes ( )

Remove all types associated to virtual registers (after instruction selection and constraining of all generic virtual registers).

Definition at line 159 of file MachineRegisterInfo.cpp.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::clear(), and getVRegToType().

Referenced by getVRegToType().

◆ constrainRegClass()

const TargetRegisterClass * MachineRegisterInfo::constrainRegClass ( unsigned  Reg,
const TargetRegisterClass RC,
unsigned  MinNumRegs = 0 
)

constrainRegClass - Constrain the register class of the specified virtual register to be a common subclass of RC and the current register class, but only if the new class has at least MinNumRegs registers.

Return the new register class, or NULL if no such class exists. This should only be used when the constraint is known to be trivial, like GR32 -> GR32_NOSP. Beware of increasing register pressure.

Definition at line 69 of file MachineRegisterInfo.cpp.

References llvm::TargetRegisterInfo::getCommonSubClass(), llvm::TargetRegisterClass::getNumRegs(), getRegClass(), getTargetRegisterInfo(), and setRegClass().

Referenced by llvm::MachineBasicBlock::addLiveIn(), addSegmentsWithValNo(), llvm::X86InstrInfo::classifyLEAReg(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::FastISel::constrainOperandRegClass(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::X86InstrInfo::convertToThreeAddress(), countOperands(), llvm::FastISel::fastEmitInst_extractsubreg(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), genFusedMultiply(), genMaddR(), getRegsUsedByPHIs(), INITIALIZE_PASS(), llvm::SystemZInstrInfo::insertSelect(), llvm::AArch64InstrInfo::insertSelect(), llvm::Thumb2InstrInfo::loadRegFromStackSlot(), llvm::SIInstrInfo::loadRegFromStackSlot(), llvm::AArch64InstrInfo::loadRegFromStackSlot(), llvm::AArch64RegisterInfo::materializeFrameBaseRegister(), llvm::PPCRegisterInfo::materializeFrameBaseRegister(), llvm::ARMBaseRegisterInfo::materializeFrameBaseRegister(), mayLoadFromGOTOrConstantPool(), llvm::ARMBaseInstrInfo::optimizeSelect(), parseCond(), llvm::TargetInstrInfo::reassociateOps(), regOverlapsSet(), llvm::R600SchedStrategy::releaseBottomNode(), removePhis(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::UnreachableBlockElimPass::run(), llvm::SelectionDAGISel::runOnMachineFunction(), setRegClassOrRegBank(), llvm::Thumb2InstrInfo::storeRegToStackSlot(), llvm::SIInstrInfo::storeRegToStackSlot(), llvm::AArch64InstrInfo::storeRegToStackSlot(), llvm::TailDuplicator::tailDuplicateAndUpdate(), and UpdateOperandRegClass().

◆ createGenericVirtualRegister()

unsigned MachineRegisterInfo::createGenericVirtualRegister ( LLT  Ty)

◆ createIncompleteVirtualRegister()

unsigned MachineRegisterInfo::createIncompleteVirtualRegister ( )

Creates a new virtual register that has no register class, register bank or size assigned yet.

This is only allowed to be used temporarily while constructing machine instructions. Most operations are undefined on an incomplete register until one of setRegClass(), setRegBank() or setSize() has been called on it.

Definition at line 110 of file MachineRegisterInfo.cpp.

References getNumVirtRegs(), and llvm::TargetRegisterInfo::index2VirtReg().

Referenced by createGenericVirtualRegister(), createVirtualRegister(), llvm::PerFunctionMIParsingState::getVRegInfo(), and getVRegToType().

◆ createVirtualRegister()

unsigned MachineRegisterInfo::createVirtualRegister ( const TargetRegisterClass RegClass)

createVirtualRegister - Create and return a new virtual register in the function with the specified register class.

Definition at line 121 of file MachineRegisterInfo.cpp.

References assert(), createIncompleteVirtualRegister(), llvm::TargetRegisterClass::isAllocatable(), and llvm::MachineRegisterInfo::Delegate::MRI_NoteNewVirtualRegister().

Referenced by llvm::MachineBasicBlock::addLiveIn(), llvm::MachineFunction::addLiveIn(), addLiveIn(), llvm::AMDGPUInstructionSelector::AMDGPUInstructionSelector(), llvm::analyzeArguments(), AnalyzeReturnValues(), llvm::HexagonFrameLowering::assignCalleeSavedSpillSlots(), attachMEMCPYScratchRegs(), CallingConvSupported(), CC_Lanai32_VarArg(), changeFCMPPredToAArch64CC(), llvm::X86InstrInfo::classifyLEAReg(), llvm::constrainRegToClass(), containsNewBackedge(), llvm::SIInstrInfo::convertNonUniformIfRegion(), llvm::SIInstrInfo::convertNonUniformLoopRegion(), countOperands(), createBBSelectReg(), llvm::createHexagonHardwareLoops(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), createPHIsForCMOVsInSinkBB(), llvm::FunctionLoweringInfo::CreateReg(), llvm::FastISel::createResultReg(), llvm::createSILowerI1CopiesPass(), createSwiftErrorEntriesInEntryBlock(), llvm::createSystemZLDCleanupPass(), createVirtualRegs(), llvm::HexagonInstrInfo::createVR(), llvm::createX86GlobalBaseRegPass(), llvm::SIFrameLowering::eliminateCallFramePseudoInstr(), llvm::WebAssemblyRegisterInfo::eliminateFrameIndex(), llvm::ThumbRegisterInfo::eliminateFrameIndex(), llvm::SystemZRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), emitClzero(), llvm::SparcTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), emitLoadM0FromVGPRLoop(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), emitPostSt(), llvm::MipsSEFrameLowering::emitPrologue(), llvm::MSP430TargetLowering::EmitShiftInstr(), emitThumbRegPlusImmInReg(), emitXBegin(), FindStartOfTree(), fixupRegionExits(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldVGPRCopyIntoRegSequence(), forceReg(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::SIInstrInfo::getAddNoCarry(), getARClassRegisterMask(), llvm::FunctionLoweringInfo::getCatchPadExceptionPointerVReg(), llvm::ARMTargetLowering::getExceptionSelectorRegister(), llvm::MipsFunctionInfo::getGlobalBaseReg(), llvm::LanaiMachineFunctionInfo::getGlobalBaseReg(), llvm::SparcInstrInfo::getGlobalBaseReg(), llvm::X86InstrInfo::getGlobalBaseReg(), getLeaOP(), getLoadStoreOffsetAlign(), getMappedOp(), llvm::FunctionLoweringInfo::getOrCreateSwiftErrorVReg(), llvm::FunctionLoweringInfo::getOrCreateSwiftErrorVRegDefAt(), getRegClassFromGRPhysReg(), GetRegistersForValue(), getRegsUsedByPHIs(), llvm::X86InstrInfo::getSerializableDirectMachineOperandTargetFlags(), hasUseAfterLoop(), INITIALIZE_PASS(), llvm::X86FrameLowering::inlineStackProbe(), llvm::SITargetLowering::insertCopiesSplitCSR(), llvm::AArch64TargetLowering::insertCopiesSplitCSR(), llvm::PPCTargetLowering::insertCopiesSplitCSR(), llvm::SIInstrInfo::insertEQ(), llvm::SIInstrInfo::insertIndirectBranch(), llvm::SIInstrInfo::insertNE(), InsertNewDef(), insertPHI(), llvm::SystemZInstrInfo::insertSelect(), llvm::SIInstrInfo::insertSelect(), llvm::SIInstrInfo::insertVectorSelect(), isFunctionEntryBlock(), isImmValidForOpcode(), llvm::X86TargetLowering::isIntDivCheap(), isSortedByValueNo(), isSourceDefinedByImplicitDef(), isSubregOf(), isXor1OfSetCC(), llvm::SIInstrInfo::legalizeGenericOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsVOP2(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::SITargetLowering::legalizeTargetIndependentNode(), llvm::MipsSEInstrInfo::loadImmediate(), loadM0FromVGPR(), lowerCallResult(), LowerCallResult(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::HexagonTargetLowering::LowerFormalArguments(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::SparcTargetLowering::LowerFormalArguments_32(), llvm::RISCVTargetLowering::LowerOperation(), llvm::BPFTargetLowering::LowerOperation(), lowerVECTOR_SHUFFLE_VSHF(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), llvm::SIRegisterInfo::materializeFrameBaseRegister(), MaybeRewriteToDrop(), MaybeRewriteToFallthrough(), mayLoadFromGOTOrConstantPool(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), parseCond(), llvm::SITargetLowering::PostISelFolding(), ProcessSourceNode(), propagateSwiftErrorVRegs(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), llvm::TargetInstrInfo::reassociateOps(), regOverlapsSet(), RematerializeCheapDef(), removeExternalCFGEdges(), removePhis(), llvm::ARMTargetLowering::ReplaceNodeResults(), llvm::SIRegisterInfo::restoreSGPR(), llvm::AVRDynAllocaSR::runOnMachineFunction(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), setRegClassOrRegBank(), llvm::SIRegisterInfo::spillSGPR(), tryToElideArgumentCopy(), UnpackFromArgumentSlot(), and writeSPToMemory().

◆ def_begin()

def_iterator llvm::MachineRegisterInfo::def_begin ( unsigned  RegNo) const
inline

◆ def_bundle_begin()

def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_begin ( unsigned  RegNo) const
inline

Definition at line 405 of file MachineRegisterInfo.h.

Referenced by def_bundles().

◆ def_bundle_end()

static def_bundle_iterator llvm::MachineRegisterInfo::def_bundle_end ( )
inlinestatic

Definition at line 408 of file MachineRegisterInfo.h.

Referenced by def_bundles().

◆ def_bundles()

iterator_range<def_bundle_iterator> llvm::MachineRegisterInfo::def_bundles ( unsigned  Reg) const
inline

Definition at line 412 of file MachineRegisterInfo.h.

References def_bundle_begin(), def_bundle_end(), and llvm::make_range().

◆ def_empty()

bool llvm::MachineRegisterInfo::def_empty ( unsigned  RegNo) const
inline

def_empty - Return true if there are no instructions defining the specified register (it may be live-in).

Definition at line 418 of file MachineRegisterInfo.h.

References def_begin(), and def_end().

Referenced by llvm::MIRPrinter::convert(), llvm::createRegUsageInfoCollector(), getUniqueVRegDef(), isConstantPhysReg(), isSSA(), matchPair(), llvm::AArch64InstrInfo::optimizeCondBranch(), and llvm::InstructionSelect::runOnMachineFunction().

◆ def_end()

static def_iterator llvm::MachineRegisterInfo::def_end ( )
inlinestatic

◆ def_instr_begin()

def_instr_iterator llvm::MachineRegisterInfo::def_instr_begin ( unsigned  RegNo) const
inline

◆ def_instr_end()

static def_instr_iterator llvm::MachineRegisterInfo::def_instr_end ( )
inlinestatic

◆ def_instructions()

iterator_range<def_instr_iterator> llvm::MachineRegisterInfo::def_instructions ( unsigned  Reg) const
inline

◆ def_operands()

iterator_range<def_iterator> llvm::MachineRegisterInfo::def_operands ( unsigned  Reg) const
inline

◆ disableCalleeSavedRegister()

void MachineRegisterInfo::disableCalleeSavedRegister ( unsigned  Reg)

◆ dumpUses()

LLVM_DUMP_METHOD void MachineRegisterInfo::dumpUses ( unsigned  RegNo) const

Definition at line 462 of file MachineRegisterInfo.cpp.

References I, and use_instructions().

Referenced by use_nodbg_empty().

◆ EmitLiveInCopies()

void MachineRegisterInfo::EmitLiveInCopies ( MachineBasicBlock EntryMBB,
const TargetRegisterInfo TRI,
const TargetInstrInfo TII 
)

EmitLiveInCopies - Emit copies to initialize livein virtual registers into the given entry block.

Definition at line 425 of file MachineRegisterInfo.cpp.

References llvm::MachineBasicBlock::addLiveIn(), llvm::MachineBasicBlock::begin(), llvm::BuildMI(), first, llvm::MCInstrInfo::get(), second, and use_empty().

Referenced by liveins(), and llvm::SelectionDAGISel::runOnMachineFunction().

◆ freezeReservedRegs()

void MachineRegisterInfo::freezeReservedRegs ( const MachineFunction MF)

◆ getCalleeSavedRegs()

const MCPhysReg * MachineRegisterInfo::getCalleeSavedRegs ( ) const

◆ getLiveInPhysReg()

unsigned MachineRegisterInfo::getLiveInPhysReg ( unsigned  VReg) const

getLiveInPhysReg - If VReg is a live-in virtual register, return the corresponding live-in physical register.

Definition at line 406 of file MachineRegisterInfo.cpp.

References E, I, livein_begin(), and livein_end().

Referenced by getUnderlyingArgReg(), liveins(), and llvm::TargetLowering::parametersInCSRMatch().

◆ getLiveInVirtReg()

unsigned MachineRegisterInfo::getLiveInVirtReg ( unsigned  PReg) const

getLiveInVirtReg - If PReg is a live-in physical register, return the corresponding live-in physical register.

Definition at line 415 of file MachineRegisterInfo.cpp.

References E, I, livein_begin(), and livein_end().

Referenced by llvm::MachineFunction::addLiveIn(), llvm::AMDGPUTargetLowering::CreateLiveInRegister(), EnsureStackAlignment(), llvm::SITargetLowering::isTypeDesirableForOp(), and liveins().

◆ getMaxLaneMaskForVReg()

LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg ( unsigned  Reg) const

◆ getNumVirtRegs()

unsigned llvm::MachineRegisterInfo::getNumVirtRegs ( ) const
inline

◆ getPressureSets()

PSetIterator llvm::MachineRegisterInfo::getPressureSets ( unsigned  RegUnit) const
inline

Get an iterator over the pressure sets affected by the given physical or virtual register.

If RegUnit is physical, it must be a register unit (from MCRegUnitIterator).

Definition at line 1114 of file MachineRegisterInfo.h.

Referenced by llvm::PressureDiff::addPressureChange(), decreaseSetPressure(), llvm::SIScheduleDAGMI::fillVgprSgprCost(), llvm::GCNRegPressure::inc(), increaseSetPressure(), llvm::PSetIterator::operator++(), llvm::SIScheduleBlockScheduler::SIScheduleBlockScheduler(), and use_nodbg_empty().

◆ getRegAllocationHint()

std::pair<unsigned, unsigned> llvm::MachineRegisterInfo::getRegAllocationHint ( unsigned  VReg) const
inline

◆ getRegBankOrNull()

const RegisterBank* llvm::MachineRegisterInfo::getRegBankOrNull ( unsigned  Reg) const
inline

Return the register bank of Reg, or null if Reg has not been assigned a register bank or has been assigned a register class.

Note
It is possible to get the register bank from the register class via RegisterBankInfo::getRegBankFromRegClass.

Definition at line 622 of file MachineRegisterInfo.h.

References llvm::PointerUnion< PT1, PT2 >::dyn_cast().

Referenced by llvm::MIRPrinter::convert(), and matchPair().

◆ getRegClass()

const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClass ( unsigned  Reg) const
inline

Return the register class of the specified virtual register.

This shouldn't be used directly unless Reg has a register class.

See also
getRegClassOrNull when this might happen.

Definition at line 596 of file MachineRegisterInfo.h.

References assert(), and first.

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::MachineFunction::addLiveIn(), addSegmentsWithValNo(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::RegAllocBase::allocatePhysRegs(), llvm::AllocationOrder::AllocationOrder(), llvm::RegisterBankInfo::applyDefaultMapping(), llvm::VirtRegMap::assignVirt2StackSlot(), BuildInstOrderMap(), canFoldCopy(), canFoldIntoCSel(), llvm::PPCInstrInfo::canInsertSelect(), llvm::SystemZInstrInfo::canInsertSelect(), llvm::SIInstrInfo::canInsertSelect(), llvm::AArch64InstrInfo::canInsertSelect(), llvm::X86InstrInfo::canInsertSelect(), collectDebugValues(), computeWeight(), constrainRegClass(), containsNewBackedge(), llvm::MIRPrinter::convert(), ConvertImplicitDefToConstZero(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::NVPTXInstrInfo::copyPhysReg(), countOperands(), llvm::createHexagonHardwareLoops(), createPHIsForCMOVsInSinkBB(), llvm::createR600ISelDag(), llvm::createSILowerI1CopiesPass(), definesFullReg(), llvm::HexagonFrameLowering::determineCalleeSaves(), llvm::SplitEditor::dump(), llvm::SparcTargetLowering::emitEHSjLjSetJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), emitIndirectDst(), emitIndirectSrc(), emitXBegin(), llvm::HexagonBlockRanges::expandToSubRegs(), llvm::FastISel::fastEmitInst_extractsubreg(), FindStartOfTree(), fixupRegionExits(), llvm::SIInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), foldVGPRCopyIntoRegSequence(), forceReg(), llvm::BitTracker::MachineEvaluator::getCell(), getCopyRegClasses(), getCopyRewriter(), GetCostForDef(), llvm::ScheduleDAGInstrs::getLaneMaskForMO(), getMaxLaneMaskForVReg(), llvm::PPCInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::BitTracker::MachineEvaluator::getRegBitWidth(), llvm::SIRegisterInfo::getRegClassForReg(), getRegsUsedByPHIs(), getRegTy(), llvm::WebAssemblyAsmPrinter::getRegType(), hasUseAfterLoop(), hasVGPROperands(), llvm::MachineSSAUpdater::Initialize(), INITIALIZE_PASS(), insertPHI(), llvm::SystemZInstrInfo::insertSelect(), llvm::SIInstrInfo::insertSelect(), llvm::X86InstrInfo::insertSelect(), llvm::SIInstrInfo::insertVectorSelect(), isACalleeSavedRegister(), isCrossCopy(), isEqual(), isFPR64(), isFunctionEntryBlock(), isImmValidForOpcode(), llvm::SIInstrInfo::isLegalRegOperand(), isNonFoldablePartialRegisterLoad(), isOperandKill(), llvm::SIRegisterInfo::isSGPRReg(), isSourceDefinedByImplicitDef(), isTerminalReg(), isVGPR(), isVirtualRegisterOperand(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOperandsSMRD(), llvm::SIInstrInfo::legalizeOperandsVOP3(), llvm::WebAssemblyMCInstLower::Lower(), lowerVECTOR_SHUFFLE_VSHF(), llvm::HexagonEvaluator::mask(), llvm::SIInstrInfo::materializeImmediate(), MaybeRewriteToDrop(), MaybeRewriteToFallthrough(), mayLoadFromGOTOrConstantPool(), MoveAndTeeForMultiUse(), MoveForSingleUse(), llvm::SIInstrInfo::moveToVALU(), optimizeCall(), llvm::X86InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), phiHasVGPROperands(), llvm::VirtRegMap::print(), PrintNodeInfo(), llvm::PSetIterator::PSetIterator(), llvm::SIInstrInfo::readlaneVGPRToSGPR(), recomputeRegClass(), regOverlapsSet(), llvm::R600SchedStrategy::releaseBottomNode(), RematerializeCheapDef(), removeExternalCFGEdges(), removePhis(), llvm::UnreachableBlockElimPass::run(), llvm::SelectionDAGISel::runOnMachineFunction(), scavengeVReg(), llvm::AVRDAGToDAGISel::SelectInlineAsmMemoryOperand(), setM0ToIndexFromSGPR(), llvm::CoalescerPair::setRegisters(), llvm::SIInstrInfo::shouldClusterMemOps(), shouldTrackSubRegLiveness(), llvm::TailDuplicator::tailDuplicateAndUpdate(), tryChangeVGPRtoSGPRinCopy(), UpdateOperandRegClass(), and llvm::SIInstrInfo::usesConstantBus().

◆ getRegClassOrNull()

const TargetRegisterClass* llvm::MachineRegisterInfo::getRegClassOrNull ( unsigned  Reg) const
inline

Return the register class of Reg, or null if Reg has not been assigned a register class yet.

Note
A null register class can only happen when these two conditions are met:
  1. Generic virtual registers are created.
  2. The machine function has not completely been through the instruction selection process. None of this condition is possible without GlobalISel for now. In other words, if GlobalISel is not used or if the query happens after the select pass, using getRegClass is safe.

Definition at line 613 of file MachineRegisterInfo.h.

References llvm::PointerUnion< PT1, PT2 >::dyn_cast().

Referenced by llvm::MIRPrinter::convert(), getLeaOP(), getRegClassFromGRPhysReg(), matchPair(), and llvm::InstructionSelect::runOnMachineFunction().

◆ getRegClassOrRegBank()

const RegClassOrRegBank& llvm::MachineRegisterInfo::getRegClassOrRegBank ( unsigned  Reg) const
inline

Return the register bank or register class of Reg.

Note
Before the register bank gets assigned (i.e., before the RegBankSelect pass) Reg may not have either.

Definition at line 630 of file MachineRegisterInfo.h.

References setRegBank(), and setRegClass().

Referenced by changeFCMPPredToAArch64CC(), llvm::RegisterBankInfo::constrainGenericRegister(), llvm::RegisterBankInfo::getRegBank(), llvm::MachineInstr::print(), llvm::Localizer::runOnMachineFunction(), and setType().

◆ getReservedRegs()

const BitVector& llvm::MachineRegisterInfo::getReservedRegs ( ) const
inline

getReservedRegs - Returns a reference to the frozen set of reserved registers.

This method should always be preferred to calling TRI::getReservedRegs() when possible.

Definition at line 793 of file MachineRegisterInfo.h.

References assert(), and reservedRegsFrozen().

Referenced by INITIALIZE_PASS(), isReserved(), llvm::RegisterClassInfo::runOnMachineFunction(), and llvm::MachineFunction::verify().

◆ getSimpleHint()

unsigned llvm::MachineRegisterInfo::getSimpleHint ( unsigned  VReg) const
inline

getSimpleHint - Return the preferred register allocation hint, or 0 if a standard simple hint (Type == 0) is not set.

Definition at line 728 of file MachineRegisterInfo.h.

References assert(), getRegAllocationHint(), isPhysRegModified(), isPhysRegUsed(), llvm::TargetRegisterInfo::isVirtualRegister(), and markUsesInDebugValueAsUndef().

Referenced by llvm::MIRPrinter::convert(), llvm::VirtRegMap::hasPreferredPhys(), and isACalleeSavedRegister().

◆ getTargetRegisterInfo()

const TargetRegisterInfo* llvm::MachineRegisterInfo::getTargetRegisterInfo ( ) const
inline

◆ getType()

LLT MachineRegisterInfo::getType ( unsigned  VReg) const

Get the low-level type of VReg or LLT{} if VReg is not a generic (target independent) virtual register.

Definition at line 134 of file MachineRegisterInfo.cpp.

References llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::end(), llvm::DenseMapBase< DerivedT, KeyT, ValueT, KeyInfoT, BucketT >::find(), and getVRegToType().

Referenced by llvm::RegisterBankInfo::applyDefaultMapping(), llvm::MachineIRBuilder::buildBrCond(), llvm::MachineIRBuilder::buildBrIndirect(), llvm::MachineIRBuilder::buildCast(), llvm::MachineIRBuilder::buildConstant(), llvm::MachineIRBuilder::buildCopy(), llvm::MachineIRBuilder::buildExtOrTrunc(), llvm::MachineIRBuilder::buildExtract(), llvm::MachineIRBuilder::buildExtractVectorElement(), llvm::MachineIRBuilder::buildFCmp(), llvm::MachineIRBuilder::buildFConstant(), llvm::MachineIRBuilder::buildFrameIndex(), llvm::MachineIRBuilder::buildGEP(), llvm::MachineIRBuilder::buildGlobalValue(), llvm::MachineIRBuilder::buildICmp(), llvm::MachineIRBuilder::buildInsert(), llvm::MachineIRBuilder::buildInsertVectorElement(), llvm::MachineIRBuilder::buildLoad(), llvm::MachineIRBuilder::buildMerge(), llvm::MachineIRBuilder::buildPtrMask(), llvm::MachineIRBuilder::buildSelect(), llvm::MachineIRBuilder::buildSequence(), llvm::MachineIRBuilder::buildStore(), llvm::MachineIRBuilder::buildUAdde(), llvm::MachineIRBuilder::buildUnmerge(), changeFCMPPredToAArch64CC(), llvm::MIRPrinter::convert(), llvm::InstructionSelector::executeMatchTable(), llvm::LegalizerInfo::getAction(), llvm::IRTranslator::getAnalysisUsage(), llvm::ARMRegisterBankInfo::getInstrMapping(), llvm::AMDGPURegisterBankInfo::getInstrMapping(), llvm::AArch64RegisterBankInfo::getInstrMapping(), getLeaOP(), llvm::X86GenRegisterBankInfo::getPartialMappingIdx(), getRegClassFromGRPhysReg(), getTypeToPrint(), getVRegToType(), isImplicitOperandIn(), isPreISelGenericFloatingPointOpcode(), llvm::AArch64LegalizerInfo::legalizeCustom(), llvm::ARMLegalizerInfo::legalizeCustom(), llvm::LegalizerHelper::libcall(), llvm::AArch64CallLowering::lowerFormalArguments(), llvm::ARMCallLowering::lowerReturn(), matchPair(), llvm::MachineIRBuilder::materializeGEP(), llvm::LegalizerHelper::narrowScalar(), llvm::MachineInstr::print(), llvm::Localizer::runOnMachineFunction(), selectCopy(), selectMergeValues(), selectUnmergeValues(), llvm::LegalizerCombiner::tryCombineMerges(), llvm::LegalizerCombiner::tryCombineSExt(), llvm::LegalizerCombiner::tryCombineZExt(), unsupportedBinOp(), llvm::LegalizerHelper::widenScalar(), and X86SelectAddress().

◆ getUniqueVRegDef()

MachineInstr * MachineRegisterInfo::getUniqueVRegDef ( unsigned  Reg) const

◆ getUsedPhysRegsMask()

const BitVector& llvm::MachineRegisterInfo::getUsedPhysRegsMask ( ) const
inline

Definition at line 759 of file MachineRegisterInfo.h.

References freezeReservedRegs().

Referenced by llvm::createRegUsageInfoCollector().

◆ getVRegDef()

MachineInstr * MachineRegisterInfo::getVRegDef ( unsigned  Reg) const

getVRegDef - Return the machine instr that defines the specified virtual register or null if none is found.

This assumes that the code is in SSA form, so there should only be one definition.

Definition at line 362 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineRegisterInfo::defusechain_instr_iterator< ReturnUses, ReturnDefs, SkipDebug, ByOperand, ByInstr, ByBundle >::atEnd(), def_instr_begin(), def_instr_end(), and I.

Referenced by canCompareBeNewValueJump(), canFoldIntoCSel(), canFoldIntoMOVCC(), canFoldIntoSelect(), changeFCMPPredToAArch64CC(), countOperands(), llvm::createHexagonHardwareLoops(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), eraseGPOpnd(), llvm::InstructionSelector::executeMatchTable(), FindStartOfTree(), llvm::getConstantFPVRegVal(), llvm::getConstantVRegVal(), getImmOrMaterializedImm(), llvm::AArch64RegisterBankInfo::getInstrMapping(), getLeaOP(), llvm::FastISel::getRegForValue(), hasUseAfterLoop(), INITIALIZE_PASS(), llvm::InstructionSelector::isBaseWithConstantOffset(), isImmValidForOpcode(), llvm::LiveVariables::VarInfo::isLiveIn(), llvm::PPCInstrInfo::isSignOrZeroExtended(), isVirtualRegisterOperand(), llvm::SIInstrInfo::legalizeGenericOperand(), MatchingStackOffset(), mayLoadFromGOTOrConstantPool(), multipleIterations(), llvm::AArch64InstrInfo::optimizeCondBranch(), llvm::X86InstrInfo::optimizeLoadInstr(), phiHasBreakDef(), llvm::ARMBaseInstrInfo::produceSameValue(), pushDepHeight(), removeCopies(), removePhis(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::LegalizerCombiner::tryCombineAnyExt(), llvm::LegalizerCombiner::tryCombineMerges(), llvm::LegalizerCombiner::tryCombineSExt(), llvm::LegalizerCombiner::tryCombineZExt(), updatePhysDepsDownwards(), use_nodbg_empty(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::ValueIsPHI(), llvm::LegalizerHelper::widenScalar(), and X86SelectAddress().

◆ getVRegToType()

VRegToTypeMap& llvm::MachineRegisterInfo::getVRegToType ( ) const
inline

Accessor for VRegToType.

This accessor should only be used by global-isel related work.

Definition at line 670 of file MachineRegisterInfo.h.

References clearVirtRegTypes(), createGenericVirtualRegister(), createIncompleteVirtualRegister(), getType(), and setType().

Referenced by clearVirtRegTypes(), createGenericVirtualRegister(), getType(), llvm::InstructionSelect::runOnMachineFunction(), and setType().

◆ hasOneDef()

bool llvm::MachineRegisterInfo::hasOneDef ( unsigned  RegNo) const
inline

◆ hasOneNonDBGUse()

bool MachineRegisterInfo::hasOneNonDBGUse ( unsigned  RegNo) const

◆ hasOneUse()

bool llvm::MachineRegisterInfo::hasOneUse ( unsigned  RegNo) const
inline

◆ invalidateLiveness()

void llvm::MachineRegisterInfo::invalidateLiveness ( )
inline

invalidateLiveness - Indicates that register liveness is no longer being tracked accurately.

This should be called by late passes that invalidate the liveness information.

Definition at line 199 of file MachineRegisterInfo.h.

References llvm::MachineFunction::getProperties(), llvm::MachineFunctionProperties::reset(), and llvm::MachineFunctionProperties::TracksLiveness.

Referenced by llvm::createWebAssemblyFixIrreducibleControlFlow(), llvm::BranchFolder::OptimizeFunction(), llvm::MIRParserImpl::parseRegisterInfo(), PlaceMarkers(), and SortBlocks().

◆ isAllocatable()

bool llvm::MachineRegisterInfo::isAllocatable ( unsigned  PhysReg) const
inline

isAllocatable - Returns true when PhysReg belongs to an allocatable register class and it hasn't been reserved.

Allocatable registers may show up in the allocation order of some virtual register, so a register allocator needs to track its liveness and availability.

Definition at line 822 of file MachineRegisterInfo.h.

References getTargetRegisterInfo(), llvm::TargetRegisterInfo::isInAllocatableClass(), and isReserved().

Referenced by llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::AggressiveAntiDepBreaker::BreakAntiDependencies(), llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), computeLiveOuts(), CriticalPathStep(), llvm::SIRegisterInfo::findUnusedRegister(), getAllSGPRs(), llvm::PPCRegisterInfo::getCalleeSavedRegs(), getCopyRewriter(), getLiveLanesAt(), INITIALIZE_PASS(), and isConstantPhysReg().

◆ isConstantPhysReg()

bool MachineRegisterInfo::isConstantPhysReg ( unsigned  PhysReg) const

◆ isLiveIn()

bool MachineRegisterInfo::isLiveIn ( unsigned  Reg) const

◆ isPhysRegModified()

bool MachineRegisterInfo::isPhysRegModified ( unsigned  PhysReg,
bool  SkipNoReturnDef = false 
) const

Return true if the specified register is modified in this function.

This checks that no defining machine operands exist for the register or any of its aliases. Definitions found on functions marked noreturn are ignored, to consider them pass 'true' for optional parameter SkipNoReturnDef. The register is also considered modified when it is set in the UsedPhysRegMask.

Definition at line 534 of file MachineRegisterInfo.cpp.

References def_begin(), def_end(), getTargetRegisterInfo(), isNoReturnDef(), llvm::MCRegAliasIterator::isValid(), llvm::make_range(), and llvm::BitVector::test().

Referenced by llvm::XCoreFrameLowering::determineCalleeSaves(), llvm::TargetFrameLowering::determineCalleeSaves(), getSimpleHint(), HandleVRSaveUpdate(), and IsSafeToMove().

◆ isPhysRegUsed()

bool MachineRegisterInfo::isPhysRegUsed ( unsigned  PhysReg) const

Return true if the specified register is modified or read in this function.

This checks that no machine operands exist for the register or any of its aliases. The register is also considered used when it is set in the UsedPhysRegMask.

Definition at line 549 of file MachineRegisterInfo.cpp.

References getTargetRegisterInfo(), llvm::MCRegAliasIterator::isValid(), reg_nodbg_empty(), and llvm::BitVector::test().

Referenced by llvm::ARMFrameLowering::determineCalleeSaves(), llvm::AArch64FrameLowering::determineCalleeSaves(), llvm::SIFrameLowering::emitEntryFunctionPrologue(), llvm::SIRegisterInfo::findUnusedRegister(), getAllSGPRs(), getNumExtraSGPRs(), getSimpleHint(), needToReserveScavengingSpillSlots(), llvm::ExecutionDepsFix::runOnMachineFunction(), and verifyLeafProcRegUse().

◆ isReserved()

bool llvm::MachineRegisterInfo::isReserved ( unsigned  PhysReg) const
inline

◆ isReservedRegUnit()

bool MachineRegisterInfo::isReservedRegUnit ( unsigned  Unit) const

Returns true when the given register unit is considered reserved.

Register units are considered reserved when for at least one of their root registers, the root register and all super registers are reserved. This currently iterates the register hierarchy and may be slower than expected.

Definition at line 605 of file MachineRegisterInfo.cpp.

References getTargetRegisterInfo(), isReserved(), llvm::MCRegisterInfo::DiffListIterator::isValid(), and llvm::MCRegUnitRootIterator::isValid().

Referenced by llvm::LiveIntervals::HMEditor::getRegUnitLI(), isReserved(), matchPair(), and llvm::LiveIntervals::print().

◆ isSSA()

bool llvm::MachineRegisterInfo::isSSA ( ) const
inline

◆ isUpdatedCSRsInitialized()

bool llvm::MachineRegisterInfo::isUpdatedCSRsInitialized ( ) const
inline

Returns true if the updated CSR list was initialized and false otherwise.

Definition at line 222 of file MachineRegisterInfo.h.

References addRegOperandToUseList(), disableCalleeSavedRegister(), getCalleeSavedRegs(), moveOperands(), removeRegOperandFromUseList(), setCalleeSavedRegs(), verifyUseList(), and verifyUseLists().

Referenced by llvm::MIRPrinter::convert().

◆ leaveSSA()

void llvm::MachineRegisterInfo::leaveSSA ( )
inline

◆ livein_begin()

livein_iterator llvm::MachineRegisterInfo::livein_begin ( ) const
inline

◆ livein_empty()

bool llvm::MachineRegisterInfo::livein_empty ( ) const
inline

◆ livein_end()

livein_iterator llvm::MachineRegisterInfo::livein_end ( ) const
inline

◆ liveins()

ArrayRef<std::pair<unsigned, unsigned> > llvm::MachineRegisterInfo::liveins ( ) const
inline

◆ markUsesInDebugValueAsUndef()

void MachineRegisterInfo::markUsesInDebugValueAsUndef ( unsigned  Reg) const

markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the specified register as undefined which causes the DBG_VALUE to be deleted during LiveDebugVariables analysis.

Definition at line 493 of file MachineRegisterInfo.cpp.

References E, llvm::MachineInstr::getOperand(), I, llvm::MachineInstr::isDebugValue(), llvm::MachineOperand::setReg(), use_instr_begin(), use_instr_end(), and UseMI.

Referenced by llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), getSimpleHint(), and isVirtualRegisterOperand().

◆ moveOperands()

void MachineRegisterInfo::moveOperands ( MachineOperand Dst,
MachineOperand Src,
unsigned  NumOps 
)

Move NumOps operands from Src to Dst, updating use-def lists as needed.

The Dst range is assumed to be uninitialized memory. (Or it may contain operands that won't be destroyed, which is OK because the MO destructor is trivial anyway).

The Src and Dst ranges may overlap.

Definition at line 295 of file MachineRegisterInfo.cpp.

References assert(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::Reg.

Referenced by isUpdatedCSRsInitialized().

◆ operator=()

MachineRegisterInfo& llvm::MachineRegisterInfo::operator= ( const MachineRegisterInfo )
delete

◆ recomputeRegClass()

bool MachineRegisterInfo::recomputeRegClass ( unsigned  Reg)

recomputeRegClass - Try to find a legal super-class of Reg's register class that still satisfies the constraints from the instructions using Reg.

Returns true if Reg was upgraded.

This method can be used after constraints have been removed from a virtual register, for example after removing instructions or splitting the live range.

Definition at line 86 of file MachineRegisterInfo.cpp.

References llvm::TargetSubtargetInfo::getInstrInfo(), llvm::TargetRegisterInfo::getLargestLegalSuperClass(), llvm::MachineInstr::getOperand(), getRegClass(), llvm::MachineInstr::getRegClassConstraintEffect(), llvm::MachineFunction::getSubtarget(), getTargetRegisterInfo(), MI, reg_nodbg_operands(), setRegClass(), and TII.

Referenced by isTerminalReg(), and setRegClassOrRegBank().

◆ reg_begin()

reg_iterator llvm::MachineRegisterInfo::reg_begin ( unsigned  RegNo) const
inline

◆ reg_bundle_begin()

reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_begin ( unsigned  RegNo) const
inline

Definition at line 302 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

◆ reg_bundle_end()

static reg_bundle_iterator llvm::MachineRegisterInfo::reg_bundle_end ( )
inlinestatic

Definition at line 305 of file MachineRegisterInfo.h.

Referenced by reg_bundles().

◆ reg_bundle_nodbg_begin()

reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 355 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

◆ reg_bundle_nodbg_end()

static reg_bundle_nodbg_iterator llvm::MachineRegisterInfo::reg_bundle_nodbg_end ( )
inlinestatic

Definition at line 358 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_bundles().

◆ reg_bundles()

iterator_range<reg_bundle_iterator> llvm::MachineRegisterInfo::reg_bundles ( unsigned  Reg) const
inline

Definition at line 309 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_bundle_begin(), and reg_bundle_end().

◆ reg_empty()

bool llvm::MachineRegisterInfo::reg_empty ( unsigned  RegNo) const
inline

reg_empty - Return true if there are no instructions using or defining the specified register (it may be live-in).

Definition at line 315 of file MachineRegisterInfo.h.

References reg_begin(), and reg_end().

Referenced by getOrExecSource(), and llvm::LiveIntervals::print().

◆ reg_end()

static reg_iterator llvm::MachineRegisterInfo::reg_end ( )
inlinestatic

◆ reg_instr_begin()

reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_begin ( unsigned  RegNo) const
inline

◆ reg_instr_end()

static reg_instr_iterator llvm::MachineRegisterInfo::reg_instr_end ( )
inlinestatic

◆ reg_instr_nodbg_begin()

reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 338 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

◆ reg_instr_nodbg_end()

static reg_instr_nodbg_iterator llvm::MachineRegisterInfo::reg_instr_nodbg_end ( )
inlinestatic

Definition at line 341 of file MachineRegisterInfo.h.

Referenced by reg_nodbg_instructions().

◆ reg_instructions()

iterator_range<reg_instr_iterator> llvm::MachineRegisterInfo::reg_instructions ( unsigned  Reg) const
inline

◆ reg_nodbg_begin()

reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 321 of file MachineRegisterInfo.h.

Referenced by INITIALIZE_PASS(), reg_nodbg_empty(), and reg_nodbg_operands().

◆ reg_nodbg_bundles()

iterator_range<reg_bundle_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_bundles ( unsigned  Reg) const
inline

◆ reg_nodbg_empty()

bool llvm::MachineRegisterInfo::reg_nodbg_empty ( unsigned  RegNo) const
inline

reg_nodbg_empty - Return true if the only instructions using or defining Reg are Debug instructions.

Definition at line 369 of file MachineRegisterInfo.h.

References reg_nodbg_begin(), and reg_nodbg_end().

Referenced by llvm::LiveIntervals::addKillFlags(), llvm::RegAllocBase::allocatePhysRegs(), callHasRegMask(), getFPReg(), llvm::RegAllocBase::init(), isPhysRegUsed(), isTerminalReg(), matchPair(), and llvm::LiveIntervals::print().

◆ reg_nodbg_end()

static reg_nodbg_iterator llvm::MachineRegisterInfo::reg_nodbg_end ( )
inlinestatic

Definition at line 324 of file MachineRegisterInfo.h.

Referenced by INITIALIZE_PASS(), reg_nodbg_empty(), and reg_nodbg_operands().

◆ reg_nodbg_instructions()

iterator_range<reg_instr_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_instructions ( unsigned  Reg) const
inline

Definition at line 346 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_instr_nodbg_begin(), and reg_instr_nodbg_end().

Referenced by isTerminalReg().

◆ reg_nodbg_operands()

iterator_range<reg_nodbg_iterator> llvm::MachineRegisterInfo::reg_nodbg_operands ( unsigned  Reg) const
inline

◆ reg_operands()

iterator_range<reg_iterator> llvm::MachineRegisterInfo::reg_operands ( unsigned  Reg) const
inline

Definition at line 278 of file MachineRegisterInfo.h.

References llvm::make_range(), reg_begin(), and reg_end().

Referenced by getSingleDef(), hasAnyNonFlatUseOfReg(), and verifyUseList().

◆ removeRegOperandFromUseList()

void MachineRegisterInfo::removeRegOperandFromUseList ( MachineOperand MO)

◆ replaceRegWith()

void MachineRegisterInfo::replaceRegWith ( unsigned  FromReg,
unsigned  ToReg 
)

replaceRegWith - Replace all instances of FromReg with ToReg in the machine function.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well.

Note that it is usually necessary to first constrain ToReg's register class to match the FromReg constraints using:

constrainRegClass(ToReg, getRegClass(FromReg))

That function will return NULL if the virtual registers have incompatible constraints.

Note that if ToReg is a physical register the function will replace and apply sub registers to ToReg in order to obtain a final/proper physical register.

This is like llvm-level X->replaceAllUsesWith(Y), except that it also changes any definitions of the register as well. If ToReg is a physical register we apply the sub register to obtain the final/proper physical register.

Definition at line 342 of file MachineRegisterInfo.cpp.

References assert(), E, getTargetRegisterInfo(), I, llvm::TargetRegisterInfo::isPhysicalRegister(), llvm::RISCVFenceField::O, reg_begin(), reg_end(), llvm::MachineOperand::setReg(), and llvm::MachineOperand::substPhysReg().

Referenced by computeWeight(), llvm::SITargetLowering::finalizeLowering(), FindStartOfTree(), getAllSGPRs(), getCopyRewriter(), getOrExecSource(), INITIALIZE_PASS(), llvm::SIInstrInfo::insertIndirectBranch(), insertPHI(), mayLoadFromGOTOrConstantPool(), llvm::SIInstrInfo::moveToVALU(), llvm::UnreachableBlockElimPass::run(), llvm::SelectionDAGISel::runOnMachineFunction(), scavengeVReg(), llvm::TailDuplicator::tailDuplicateAndUpdate(), llvm::LegalizerCombiner::tryCombineMerges(), use_nodbg_empty(), and verifyLeafProcRegUse().

◆ reservedRegsFrozen()

bool llvm::MachineRegisterInfo::reservedRegsFrozen ( ) const
inline

reservedRegsFrozen - Returns true after freezeReservedRegs() was called to ensure the set of reserved registers stays constant.

Definition at line 779 of file MachineRegisterInfo.h.

References llvm::BitVector::empty().

Referenced by canReserveReg(), getReservedRegs(), and llvm::MachineFunction::verify().

◆ resetDelegate()

void llvm::MachineRegisterInfo::resetDelegate ( Delegate delegate)
inline

Definition at line 149 of file MachineRegisterInfo.h.

References assert().

Referenced by llvm::LiveRangeEdit::~LiveRangeEdit().

◆ setCalleeSavedRegs()

void MachineRegisterInfo::setCalleeSavedRegs ( ArrayRef< MCPhysReg CSRs)

Sets the updated Callee Saved Registers list.

Notice that it will override ant previously disabled/saved CSRs.

Definition at line 592 of file MachineRegisterInfo.cpp.

References llvm::SmallVectorImpl< T >::clear(), and llvm::SmallVectorTemplateBase< T, isPodLike >::push_back().

Referenced by isUpdatedCSRsInitialized(), and llvm::MIRParserImpl::parseRegisterInfo().

◆ setDelegate()

void llvm::MachineRegisterInfo::setDelegate ( Delegate delegate)
inline

Definition at line 158 of file MachineRegisterInfo.h.

References assert().

Referenced by llvm::LiveRangeEdit::LiveRangeEdit().

◆ setRegAllocationHint()

void llvm::MachineRegisterInfo::setRegAllocationHint ( unsigned  VReg,
unsigned  Type,
unsigned  PrefReg 
)
inline

setRegAllocationHint - Specify a register allocation hint for the specified virtual register.

Definition at line 706 of file MachineRegisterInfo.h.

References assert(), and llvm::TargetRegisterInfo::isVirtualRegister().

Referenced by llvm::VirtRegAuxInfo::calculateSpillWeightAndHint(), llvm::SIRegisterInfo::eliminateFrameIndex(), setSimpleHint(), shrinkScalarCompare(), and llvm::ARMBaseRegisterInfo::updateRegAllocHint().

◆ setRegBank()

void MachineRegisterInfo::setRegBank ( unsigned  Reg,
const RegisterBank RegBank 
)

◆ setRegClass()

void MachineRegisterInfo::setRegClass ( unsigned  Reg,
const TargetRegisterClass RC 
)

◆ setRegClassOrRegBank()

void llvm::MachineRegisterInfo::setRegClassOrRegBank ( unsigned  Reg,
const RegClassOrRegBank RCOrRB 
)
inline

◆ setSimpleHint()

void llvm::MachineRegisterInfo::setSimpleHint ( unsigned  VReg,
unsigned  PrefReg 
)
inline

Specify the preferred register allocation hint for the specified virtual register.

Definition at line 714 of file MachineRegisterInfo.h.

References setRegAllocationHint().

Referenced by emitLoadM0FromVGPRLoop(), and llvm::MIRParserImpl::setupRegisterInfo().

◆ setType()

void MachineRegisterInfo::setType ( unsigned  VReg,
LLT  Ty 
)

Set the low-level type of VReg to Ty.

Definition at line 139 of file MachineRegisterInfo.cpp.

References assert(), getRegClassOrRegBank(), getVRegToType(), and llvm::yaml::isNull().

Referenced by llvm::RegisterBankInfo::applyDefaultMapping(), getVRegToType(), and isImplicitOperandIn().

◆ shouldTrackSubRegLiveness() [1/2]

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( const TargetRegisterClass RC) const
inline

Returns true if liveness for register class RC should be tracked at the subregister level.

Definition at line 206 of file MachineRegisterInfo.h.

References llvm::TargetRegisterClass::HasDisjunctSubRegs, and subRegLivenessEnabled().

Referenced by isDefInSubRange(), isTerminalReg(), matchPair(), llvm::LiveIntervals::print(), shouldTrackSubRegLiveness(), and llvm::LiveIntervals::shrinkToUses().

◆ shouldTrackSubRegLiveness() [2/2]

bool llvm::MachineRegisterInfo::shouldTrackSubRegLiveness ( unsigned  VReg) const
inline

◆ subRegLivenessEnabled()

bool llvm::MachineRegisterInfo::subRegLivenessEnabled ( ) const
inline

◆ tracksLiveness()

bool llvm::MachineRegisterInfo::tracksLiveness ( ) const
inline

◆ use_begin()

use_iterator llvm::MachineRegisterInfo::use_begin ( unsigned  RegNo) const
inline

◆ use_bundle_begin()

use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_begin ( unsigned  RegNo) const
inline

Definition at line 461 of file MachineRegisterInfo.h.

Referenced by use_bundles().

◆ use_bundle_end()

static use_bundle_iterator llvm::MachineRegisterInfo::use_bundle_end ( )
inlinestatic

Definition at line 464 of file MachineRegisterInfo.h.

Referenced by use_bundles().

◆ use_bundle_nodbg_begin()

use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_begin ( unsigned  RegNo) const
inline

Definition at line 523 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

◆ use_bundle_nodbg_end()

static use_bundle_nodbg_iterator llvm::MachineRegisterInfo::use_bundle_nodbg_end ( )
inlinestatic

Definition at line 526 of file MachineRegisterInfo.h.

Referenced by use_nodbg_bundles().

◆ use_bundles()

iterator_range<use_bundle_iterator> llvm::MachineRegisterInfo::use_bundles ( unsigned  Reg) const
inline

Definition at line 468 of file MachineRegisterInfo.h.

References llvm::make_range(), use_bundle_begin(), and use_bundle_end().

◆ use_empty()

bool llvm::MachineRegisterInfo::use_empty ( unsigned  RegNo) const
inline

◆ use_end()

static use_iterator llvm::MachineRegisterInfo::use_end ( )
inlinestatic

◆ use_instr_begin()

use_instr_iterator llvm::MachineRegisterInfo::use_instr_begin ( unsigned  RegNo) const
inline

◆ use_instr_end()

static use_instr_iterator llvm::MachineRegisterInfo::use_instr_end ( )
inlinestatic

◆ use_instr_nodbg_begin()

use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_begin ( unsigned  RegNo) const
inline

◆ use_instr_nodbg_end()

static use_instr_nodbg_iterator llvm::MachineRegisterInfo::use_instr_nodbg_end ( )
inlinestatic

◆ use_instructions()

iterator_range<use_instr_iterator> llvm::MachineRegisterInfo::use_instructions ( unsigned  Reg) const
inline

◆ use_nodbg_begin()

use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_begin ( unsigned  RegNo) const
inline

◆ use_nodbg_bundles()

iterator_range<use_bundle_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_bundles ( unsigned  Reg) const
inline

◆ use_nodbg_empty()

bool llvm::MachineRegisterInfo::use_nodbg_empty ( unsigned  RegNo) const
inline

◆ use_nodbg_end()

static use_nodbg_iterator llvm::MachineRegisterInfo::use_nodbg_end ( )
inlinestatic

◆ use_nodbg_instructions()

iterator_range<use_instr_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_instructions ( unsigned  Reg) const
inline

◆ use_nodbg_operands()

iterator_range<use_nodbg_iterator> llvm::MachineRegisterInfo::use_nodbg_operands ( unsigned  Reg) const
inline

◆ use_operands()

iterator_range<use_iterator> llvm::MachineRegisterInfo::use_operands ( unsigned  Reg) const
inline

Definition at line 437 of file MachineRegisterInfo.h.

References llvm::make_range(), use_begin(), and use_end().

Referenced by clearKillFlags(), createBBSelectReg(), and isSubregOf().

◆ verifyUseList()

void MachineRegisterInfo::verifyUseList ( unsigned  Reg) const

◆ verifyUseLists()

void MachineRegisterInfo::verifyUseLists ( ) const

Friends And Related Function Documentation

◆ defusechain_instr_iterator

template<bool , bool , bool , bool , bool , bool >
friend class defusechain_instr_iterator
friend

Definition at line 267 of file MachineRegisterInfo.h.

◆ defusechain_iterator

template<bool , bool , bool , bool , bool , bool >
friend class defusechain_iterator
friend

Definition at line 261 of file MachineRegisterInfo.h.


The documentation for this class was generated from the following files: