LLVM  7.0.0svn
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements routines for translating functions from LLVM IR into
11 // Machine IR.
12 //
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/CodeGen/Analysis.h"
27 #include "llvm/IR/DataLayout.h"
28 #include "llvm/IR/DerivedTypes.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/IR/Instructions.h"
31 #include "llvm/IR/IntrinsicInst.h"
32 #include "llvm/IR/LLVMContext.h"
33 #include "llvm/IR/Module.h"
34 #include "llvm/Support/Debug.h"
39 #include <algorithm>
40 using namespace llvm;
41 
42 #define DEBUG_TYPE "function-lowering-info"
43 
44 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
45 /// PHI nodes or outside of the basic block that defines it, or used by a
46 /// switch or atomic instruction, which may expand to multiple basic blocks.
48  if (I->use_empty()) return false;
49  if (isa<PHINode>(I)) return true;
50  const BasicBlock *BB = I->getParent();
51  for (const User *U : I->users())
52  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
53  return true;
54 
55  return false;
56 }
57 
59  // For the users of the source value being used for compare instruction, if
60  // the number of signed predicate is greater than unsigned predicate, we
61  // prefer to use SIGN_EXTEND.
62  //
63  // With this optimization, we would be able to reduce some redundant sign or
64  // zero extension instruction, and eventually more machine CSE opportunities
65  // can be exposed.
66  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
67  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
68  for (const User *U : V->users()) {
69  if (const auto *CI = dyn_cast<CmpInst>(U)) {
70  NumOfSigned += CI->isSigned();
71  NumOfUnsigned += CI->isUnsigned();
72  }
73  }
74  if (NumOfSigned > NumOfUnsigned)
75  ExtendKind = ISD::SIGN_EXTEND;
76 
77  return ExtendKind;
78 }
79 
81  SelectionDAG *DAG) {
82  Fn = &fn;
83  MF = &mf;
85  RegInfo = &MF->getRegInfo();
87  unsigned StackAlign = TFI->getStackAlignment();
88 
89  // Check whether the function can return without sret-demotion.
92  mf.getDataLayout());
93  CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
94  Fn->isVarArg(), Outs, Fn->getContext());
95 
96  // If this personality uses funclets, we need to do a bit more work.
99  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
100  if (isFuncletEHPersonality(Personality)) {
101  // Calculate state numbers if we haven't already.
102  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
103  if (Personality == EHPersonality::MSVC_CXX)
104  calculateWinCXXEHStateNumbers(&fn, EHInfo);
105  else if (isAsynchronousEHPersonality(Personality))
106  calculateSEHStateNumbers(&fn, EHInfo);
107  else if (Personality == EHPersonality::CoreCLR)
108  calculateClrEHStateNumbers(&fn, EHInfo);
109 
110  // Map all BB references in the WinEH data to MBBs.
111  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
112  for (WinEHHandlerType &H : TBME.HandlerArray) {
113  if (const AllocaInst *AI = H.CatchObj.Alloca)
114  CatchObjects.insert({AI, {}}).first->second.push_back(
115  &H.CatchObj.FrameIndex);
116  else
117  H.CatchObj.FrameIndex = INT_MAX;
118  }
119  }
120  }
121 
122  // Initialize the mapping of values to registers. This is only set up for
123  // instruction values that are used outside of the block that defines
124  // them.
125  for (const BasicBlock &BB : *Fn) {
126  for (const Instruction &I : BB) {
127  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
128  Type *Ty = AI->getAllocatedType();
129  unsigned Align =
131  AI->getAlignment());
132 
133  // Static allocas can be folded into the initial stack frame
134  // adjustment. For targets that don't realign the stack, don't
135  // do this if there is an extra alignment requirement.
136  if (AI->isStaticAlloca() &&
137  (TFI->isStackRealignable() || (Align <= StackAlign))) {
138  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
139  uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
140 
141  TySize *= CUI->getZExtValue(); // Get total allocated size.
142  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
143  int FrameIndex = INT_MAX;
144  auto Iter = CatchObjects.find(AI);
145  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
146  FrameIndex = MF->getFrameInfo().CreateFixedObject(
147  TySize, 0, /*Immutable=*/false, /*isAliased=*/true);
148  MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
149  } else {
150  FrameIndex =
151  MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
152  }
153 
155  // Update the catch handler information.
156  if (Iter != CatchObjects.end()) {
157  for (int *CatchObjPtr : Iter->second)
158  *CatchObjPtr = FrameIndex;
159  }
160  } else {
161  // FIXME: Overaligned static allocas should be grouped into
162  // a single dynamic allocation instead of using a separate
163  // stack allocation for each one.
164  if (Align <= StackAlign)
165  Align = 0;
166  // Inform the Frame Information that we have variable-sized objects.
167  MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
168  }
169  }
170 
171  // Look for inline asm that clobbers the SP register.
172  if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
173  ImmutableCallSite CS(&I);
174  if (isa<InlineAsm>(CS.getCalledValue())) {
175  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
177  std::vector<TargetLowering::AsmOperandInfo> Ops =
178  TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
179  for (TargetLowering::AsmOperandInfo &Op : Ops) {
180  if (Op.Type == InlineAsm::isClobber) {
181  // Clobbers don't have SDValue operands, hence SDValue().
182  TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
183  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
184  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
185  Op.ConstraintVT);
186  if (PhysReg.first == SP)
188  }
189  }
190  }
191  }
192 
193  // Look for calls to the @llvm.va_start intrinsic. We can omit some
194  // prologue boilerplate for variadic functions that don't examine their
195  // arguments.
196  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
197  if (II->getIntrinsicID() == Intrinsic::vastart)
198  MF->getFrameInfo().setHasVAStart(true);
199  }
200 
201  // If we have a musttail call in a variadic function, we need to ensure we
202  // forward implicit register parameters.
203  if (const auto *CI = dyn_cast<CallInst>(&I)) {
204  if (CI->isMustTailCall() && Fn->isVarArg())
206  }
207 
208  // Mark values used outside their block as exported, by allocating
209  // a virtual register for them.
211  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
213 
214  // Decide the preferred extend type for a value.
216  }
217  }
218 
219  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
220  // also creates the initial PHI MachineInstrs, though none of the input
221  // operands are populated.
222  for (const BasicBlock &BB : *Fn) {
223  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
224  // are really data, and no instructions can live here.
225  if (BB.isEHPad()) {
226  const Instruction *PadInst = BB.getFirstNonPHI();
227  // If this is a non-landingpad EH pad, mark this function as using
228  // funclets.
229  // FIXME: SEH catchpads do not create funclets, so we could avoid setting
230  // this in such cases in order to improve frame layout.
231  if (!isa<LandingPadInst>(PadInst)) {
232  MF->setHasEHFunclets(true);
234  }
235  if (isa<CatchSwitchInst>(PadInst)) {
236  assert(&*BB.begin() == PadInst &&
237  "WinEHPrepare failed to remove PHIs from imaginary BBs");
238  continue;
239  }
240  if (isa<FuncletPadInst>(PadInst))
241  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
242  }
243 
245  MBBMap[&BB] = MBB;
246  MF->push_back(MBB);
247 
248  // Transfer the address-taken flag. This is necessary because there could
249  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
250  // the first one should be marked.
251  if (BB.hasAddressTaken())
252  MBB->setHasAddressTaken();
253 
254  // Mark landing pad blocks.
255  if (BB.isEHPad())
256  MBB->setIsEHPad();
257 
258  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
259  // appropriate.
260  for (const PHINode &PN : BB.phis()) {
261  if (PN.use_empty())
262  continue;
263 
264  // Skip empty types
265  if (PN.getType()->isEmptyTy())
266  continue;
267 
268  DebugLoc DL = PN.getDebugLoc();
269  unsigned PHIReg = ValueMap[&PN];
270  assert(PHIReg && "PHI node does not have an assigned virtual register!");
271 
272  SmallVector<EVT, 4> ValueVTs;
273  ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
274  for (EVT VT : ValueVTs) {
275  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
277  for (unsigned i = 0; i != NumRegisters; ++i)
278  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
279  PHIReg += NumRegisters;
280  }
281  }
282  }
283 
284  if (!isFuncletEHPersonality(Personality))
285  return;
286 
287  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
288 
289  // Map all BB references in the WinEH data to MBBs.
290  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
291  for (WinEHHandlerType &H : TBME.HandlerArray) {
292  if (H.Handler)
293  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
294  }
295  }
296  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
297  if (UME.Cleanup)
298  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
299  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
300  const BasicBlock *BB = UME.Handler.get<const BasicBlock *>();
301  UME.Handler = MBBMap[BB];
302  }
303  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
304  const BasicBlock *BB = CME.Handler.get<const BasicBlock *>();
305  CME.Handler = MBBMap[BB];
306  }
307 }
308 
309 /// clear - Clear out all the function-specific state. This returns this
310 /// FunctionLoweringInfo to an empty state, ready to be used for a
311 /// different function.
313  MBBMap.clear();
314  ValueMap.clear();
315  StaticAllocaMap.clear();
316  LiveOutRegInfo.clear();
317  VisitedBBs.clear();
318  ArgDbgValues.clear();
319  ByValArgFrameIndexMap.clear();
320  RegFixups.clear();
322  StatepointSpillMaps.clear();
323  PreferredExtendType.clear();
324 }
325 
326 /// CreateReg - Allocate a single virtual register for the given type.
330 }
331 
332 /// CreateRegs - Allocate the appropriate number of virtual registers of
333 /// the correctly promoted or expanded types. Assign these registers
334 /// consecutive vreg numbers and return the first assigned number.
335 ///
336 /// In the case that the given value has struct or array type, this function
337 /// will assign registers for each member or element.
338 ///
341 
342  SmallVector<EVT, 4> ValueVTs;
343  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
344 
345  unsigned FirstReg = 0;
346  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
347  EVT ValueVT = ValueVTs[Value];
348  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
349 
350  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
351  for (unsigned i = 0; i != NumRegs; ++i) {
352  unsigned R = CreateReg(RegisterVT);
353  if (!FirstReg) FirstReg = R;
354  }
355  }
356  return FirstReg;
357 }
358 
359 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
360 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
361 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
362 /// the larger bit width by zero extension. The bit width must be no smaller
363 /// than the LiveOutInfo's existing bit width.
365 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
366  if (!LiveOutRegInfo.inBounds(Reg))
367  return nullptr;
368 
369  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
370  if (!LOI->IsValid)
371  return nullptr;
372 
373  if (BitWidth > LOI->Known.getBitWidth()) {
374  LOI->NumSignBits = 1;
375  LOI->Known = LOI->Known.zextOrTrunc(BitWidth);
376  }
377 
378  return LOI;
379 }
380 
381 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
382 /// register based on the LiveOutInfo of its operands.
384  Type *Ty = PN->getType();
385  if (!Ty->isIntegerTy() || Ty->isVectorTy())
386  return;
387 
388  SmallVector<EVT, 1> ValueVTs;
389  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
390  assert(ValueVTs.size() == 1 &&
391  "PHIs with non-vector integer types should have a single VT.");
392  EVT IntVT = ValueVTs[0];
393 
394  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
395  return;
396  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
397  unsigned BitWidth = IntVT.getSizeInBits();
398 
399  unsigned DestReg = ValueMap[PN];
401  return;
402  LiveOutRegInfo.grow(DestReg);
403  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
404 
405  Value *V = PN->getIncomingValue(0);
406  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
407  DestLOI.NumSignBits = 1;
408  DestLOI.Known = KnownBits(BitWidth);
409  return;
410  }
411 
412  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
413  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
414  DestLOI.NumSignBits = Val.getNumSignBits();
415  DestLOI.Known.Zero = ~Val;
416  DestLOI.Known.One = Val;
417  } else {
418  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
419  "CopyToReg node was created.");
420  unsigned SrcReg = ValueMap[V];
422  DestLOI.IsValid = false;
423  return;
424  }
425  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
426  if (!SrcLOI) {
427  DestLOI.IsValid = false;
428  return;
429  }
430  DestLOI = *SrcLOI;
431  }
432 
433  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
434  DestLOI.Known.One.getBitWidth() == BitWidth &&
435  "Masks should have the same bit width as the type.");
436 
437  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
438  Value *V = PN->getIncomingValue(i);
439  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
440  DestLOI.NumSignBits = 1;
441  DestLOI.Known = KnownBits(BitWidth);
442  return;
443  }
444 
445  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
446  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
447  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
448  DestLOI.Known.Zero &= ~Val;
449  DestLOI.Known.One &= Val;
450  continue;
451  }
452 
453  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
454  "its CopyToReg node was created.");
455  unsigned SrcReg = ValueMap[V];
457  DestLOI.IsValid = false;
458  return;
459  }
460  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
461  if (!SrcLOI) {
462  DestLOI.IsValid = false;
463  return;
464  }
465  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
466  DestLOI.Known.Zero &= SrcLOI->Known.Zero;
467  DestLOI.Known.One &= SrcLOI->Known.One;
468  }
469 }
470 
471 /// setArgumentFrameIndex - Record frame index for the byval
472 /// argument. This overrides previous frame index entry for this argument,
473 /// if any.
475  int FI) {
476  ByValArgFrameIndexMap[A] = FI;
477 }
478 
479 /// getArgumentFrameIndex - Get frame index for the byval argument.
480 /// If the argument does not have any assigned frame index then 0 is
481 /// returned.
483  auto I = ByValArgFrameIndexMap.find(A);
484  if (I != ByValArgFrameIndexMap.end())
485  return I->second;
486  DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
487  return INT_MAX;
488 }
489 
491  const Value *CPI, const TargetRegisterClass *RC) {
493  auto I = CatchPadExceptionPointers.insert({CPI, 0});
494  unsigned &VReg = I.first->second;
495  if (I.second)
496  VReg = MRI.createVirtualRegister(RC);
497  assert(VReg && "null vreg in exception pointer table!");
498  return VReg;
499 }
500 
501 unsigned
503  const Value *Val) {
504  auto Key = std::make_pair(MBB, Val);
505  auto It = SwiftErrorVRegDefMap.find(Key);
506  // If this is the first use of this swifterror value in this basic block,
507  // create a new virtual register.
508  // After we processed all basic blocks we will satisfy this "upwards exposed
509  // use" by inserting a copy or phi at the beginning of this block.
510  if (It == SwiftErrorVRegDefMap.end()) {
511  auto &DL = MF->getDataLayout();
513  auto VReg = MF->getRegInfo().createVirtualRegister(RC);
514  SwiftErrorVRegDefMap[Key] = VReg;
516  return VReg;
517  } else return It->second;
518 }
519 
521  const MachineBasicBlock *MBB, const Value *Val, unsigned VReg) {
522  SwiftErrorVRegDefMap[std::make_pair(MBB, Val)] = VReg;
523 }
524 
525 std::pair<unsigned, bool>
528  auto It = SwiftErrorVRegDefUses.find(Key);
529  if (It == SwiftErrorVRegDefUses.end()) {
530  auto &DL = MF->getDataLayout();
532  unsigned VReg = MF->getRegInfo().createVirtualRegister(RC);
533  SwiftErrorVRegDefUses[Key] = VReg;
534  return std::make_pair(VReg, true);
535  }
536  return std::make_pair(It->second, false);
537 }
538 
539 std::pair<unsigned, bool>
542  auto It = SwiftErrorVRegDefUses.find(Key);
543  if (It == SwiftErrorVRegDefUses.end()) {
544  unsigned VReg = getOrCreateSwiftErrorVReg(MBB, Val);
545  SwiftErrorVRegDefUses[Key] = VReg;
546  return std::make_pair(VReg, true);
547  }
548  return std::make_pair(It->second, false);
549 }
void clear()
Definition: ValueMap.h:148
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:158
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:83
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:77
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:30
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:43
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
unsigned getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:98
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
void setHasEHFunclets(bool V)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
virtual const TargetLowering * getTargetLowering() const
const AllocaInst * Alloca
Definition: WinEHFuncInfo.h:66
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:738
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
A debug info location.
Definition: DebugLoc.h:34
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
Definition: APInt.cpp:884
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:227
DenseMap< const Value *, unsigned > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
bool CanLowerReturn
CanLowerReturn - true iff the function&#39;s return value can be lowered to registers.
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:40
void setCurrentSwiftErrorVReg(const MachineBasicBlock *MBB, const Value *, unsigned)
Set the swifterror virtual register in the SwiftErrorVRegDefMap for this basic block.
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:39
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1488
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:130
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:58
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegDefAt(const Instruction *)
Get or create the swifterror value virtual register for a def of a swifterror by an instruction...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:191
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
const HexagonInstrInfo * TII
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:197
Reg
All possible values of the reg field in the ModR/M byte.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:100
Key
PAL metadata keys.
unsigned getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:292
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
void setHasMustTailInVarArgFunc(bool B)
const LiveOutInfo * GetLiveOutRegInfo(unsigned Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
This contains information for each constraint that we are lowering.
KnownBits zextOrTrunc(unsigned BitWidth)
Zero extends or truncates the underlying known Zero and One bits.
Definition: KnownBits.h:131
static ISD::NodeType getPreferredExtendForValue(const Value *V)
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:205
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:680
virtual const TargetInstrInfo * getInstrInfo() const
void setHasOpaqueSPAdjustment(bool B)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:84
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
TargetInstrInfo - Interface to description of machine instruction set.
void clear()
clear - Clear out all the function-specific state.
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:47
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:150
SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:99
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:149
unsigned const MachineRegisterInfo * MRI
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegUseAt(const Instruction *, const MachineBasicBlock *, const Value *)
#define H(x, y, z)
Definition: MD5.cpp:57
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:723
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
DenseMap< const Instruction *, StatepointSpillMap > StatepointSpillMaps
Maps gc.statepoint instructions to their corresponding StatepointSpillMap instances.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Extended Value Type.
Definition: ValueTypes.h:34
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI&#39;s destination register based on the LiveOutI...
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
MachineBasicBlock * MBB
MBB - The current block.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:70
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
unsigned first
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it&#39;s handlers to build WinEHFuncInfo, which describes the state number...
SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:96
See the file comment.
Definition: ValueMap.h:86
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegDefMap
A map from swifterror value in a basic block to the virtual register it is currently represented by...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:194
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:210
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:862
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Module.h This file contains the declarations for the Module class.
Information about stack frame layout on the target.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegUpwardsUse
A list of upward exposed vreg uses that need to be satisfied by either a copy def or a phi node at th...
union llvm::WinEHHandlerType::@169 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
unsigned getNumIncomingValues() const
Return the number of incoming edges.
unsigned CreateRegs(Type *Ty)
CreateRegs - Allocate the appropriate number of virtual registers of the correctly promoted or expand...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:97
Class for arbitrary precision integers.
Definition: APInt.h:69
iterator_range< user_iterator > users()
Definition: Value.h:405
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:449
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:418
MachineRegisterInfo * RegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
Establish a view to a call site for examination.
Definition: CallSite.h:713
#define I(x, y, z)
Definition: MD5.cpp:58
virtual const TargetFrameLowering * getFrameLowering() const
unsigned CreateReg(MVT VT)
CreateReg - Allocate a single virtual register for the given type.
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:135
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:154
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void GetReturnInfo(Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
Definition: APInt.h:1599
LLVM Value Representation.
Definition: Value.h:73
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1260
void push_back(MachineBasicBlock *MBB)
llvm::DenseMap< PointerIntPair< const Instruction *, 1, bool >, unsigned > SwiftErrorVRegDefUses
A map from instructions that define/use a swifterror value to the virtual register that represents th...
#define DEBUG(X)
Definition: Debug.h:118
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
const TargetLowering * TLI
Conversion operators.
Definition: ISDOpcodes.h:443
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
int CreateVariableSizedObject(unsigned Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created. ...
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
bool use_empty() const
Definition: Value.h:328
This file describes how to lower LLVM code to machine code.
const BasicBlock * getParent() const
Definition: Instruction.h:67
an instruction to allocate memory on the stack
Definition: Instructions.h:60
unsigned InitializeRegForValue(const Value *V)
unsigned getOrCreateSwiftErrorVReg(const MachineBasicBlock *, const Value *)
Get or create the swifterror value virtual register in SwiftErrorVRegDefMap for this basic block...