LLVM  6.0.0svn
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements routines for translating functions from LLVM IR into
11 // Machine IR.
12 //
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/CodeGen/Analysis.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/IR/DebugInfo.h"
25 #include "llvm/IR/DerivedTypes.h"
26 #include "llvm/IR/Function.h"
27 #include "llvm/IR/Instructions.h"
28 #include "llvm/IR/IntrinsicInst.h"
29 #include "llvm/IR/LLVMContext.h"
30 #include "llvm/IR/Module.h"
31 #include "llvm/Support/Debug.h"
41 #include <algorithm>
42 using namespace llvm;
43 
44 #define DEBUG_TYPE "function-lowering-info"
45 
46 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
47 /// PHI nodes or outside of the basic block that defines it, or used by a
48 /// switch or atomic instruction, which may expand to multiple basic blocks.
50  if (I->use_empty()) return false;
51  if (isa<PHINode>(I)) return true;
52  const BasicBlock *BB = I->getParent();
53  for (const User *U : I->users())
54  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
55  return true;
56 
57  return false;
58 }
59 
61  // For the users of the source value being used for compare instruction, if
62  // the number of signed predicate is greater than unsigned predicate, we
63  // prefer to use SIGN_EXTEND.
64  //
65  // With this optimization, we would be able to reduce some redundant sign or
66  // zero extension instruction, and eventually more machine CSE opportunities
67  // can be exposed.
68  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
69  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
70  for (const User *U : V->users()) {
71  if (const auto *CI = dyn_cast<CmpInst>(U)) {
72  NumOfSigned += CI->isSigned();
73  NumOfUnsigned += CI->isUnsigned();
74  }
75  }
76  if (NumOfSigned > NumOfUnsigned)
77  ExtendKind = ISD::SIGN_EXTEND;
78 
79  return ExtendKind;
80 }
81 
83  SelectionDAG *DAG) {
84  Fn = &fn;
85  MF = &mf;
87  RegInfo = &MF->getRegInfo();
89  unsigned StackAlign = TFI->getStackAlignment();
90 
91  // Check whether the function can return without sret-demotion.
94  mf.getDataLayout());
95  CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
96  Fn->isVarArg(), Outs, Fn->getContext());
97 
98  // If this personality uses funclets, we need to do a bit more work.
100  EHPersonality Personality = classifyEHPersonality(
101  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
102  if (isFuncletEHPersonality(Personality)) {
103  // Calculate state numbers if we haven't already.
104  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
105  if (Personality == EHPersonality::MSVC_CXX)
106  calculateWinCXXEHStateNumbers(&fn, EHInfo);
107  else if (isAsynchronousEHPersonality(Personality))
108  calculateSEHStateNumbers(&fn, EHInfo);
109  else if (Personality == EHPersonality::CoreCLR)
110  calculateClrEHStateNumbers(&fn, EHInfo);
111 
112  // Map all BB references in the WinEH data to MBBs.
113  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
114  for (WinEHHandlerType &H : TBME.HandlerArray) {
115  if (const AllocaInst *AI = H.CatchObj.Alloca)
116  CatchObjects.insert({AI, {}}).first->second.push_back(
117  &H.CatchObj.FrameIndex);
118  else
119  H.CatchObj.FrameIndex = INT_MAX;
120  }
121  }
122  }
123 
124  // Initialize the mapping of values to registers. This is only set up for
125  // instruction values that are used outside of the block that defines
126  // them.
127  for (const BasicBlock &BB : *Fn) {
128  for (const Instruction &I : BB) {
129  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
130  Type *Ty = AI->getAllocatedType();
131  unsigned Align =
133  AI->getAlignment());
134 
135  // Static allocas can be folded into the initial stack frame
136  // adjustment. For targets that don't realign the stack, don't
137  // do this if there is an extra alignment requirement.
138  if (AI->isStaticAlloca() &&
139  (TFI->isStackRealignable() || (Align <= StackAlign))) {
140  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
141  uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
142 
143  TySize *= CUI->getZExtValue(); // Get total allocated size.
144  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
145  int FrameIndex = INT_MAX;
146  auto Iter = CatchObjects.find(AI);
147  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
148  FrameIndex = MF->getFrameInfo().CreateFixedObject(
149  TySize, 0, /*Immutable=*/false, /*isAliased=*/true);
150  MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
151  } else {
152  FrameIndex =
153  MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
154  }
155 
157  // Update the catch handler information.
158  if (Iter != CatchObjects.end()) {
159  for (int *CatchObjPtr : Iter->second)
160  *CatchObjPtr = FrameIndex;
161  }
162  } else {
163  // FIXME: Overaligned static allocas should be grouped into
164  // a single dynamic allocation instead of using a separate
165  // stack allocation for each one.
166  if (Align <= StackAlign)
167  Align = 0;
168  // Inform the Frame Information that we have variable-sized objects.
169  MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
170  }
171  }
172 
173  // Look for inline asm that clobbers the SP register.
174  if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
175  ImmutableCallSite CS(&I);
176  if (isa<InlineAsm>(CS.getCalledValue())) {
177  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
179  std::vector<TargetLowering::AsmOperandInfo> Ops =
180  TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
181  for (TargetLowering::AsmOperandInfo &Op : Ops) {
182  if (Op.Type == InlineAsm::isClobber) {
183  // Clobbers don't have SDValue operands, hence SDValue().
184  TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
185  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
186  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
187  Op.ConstraintVT);
188  if (PhysReg.first == SP)
190  }
191  }
192  }
193  }
194 
195  // Look for calls to the @llvm.va_start intrinsic. We can omit some
196  // prologue boilerplate for variadic functions that don't examine their
197  // arguments.
198  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
199  if (II->getIntrinsicID() == Intrinsic::vastart)
200  MF->getFrameInfo().setHasVAStart(true);
201  }
202 
203  // If we have a musttail call in a variadic function, we need to ensure we
204  // forward implicit register parameters.
205  if (const auto *CI = dyn_cast<CallInst>(&I)) {
206  if (CI->isMustTailCall() && Fn->isVarArg())
208  }
209 
210  // Mark values used outside their block as exported, by allocating
211  // a virtual register for them.
213  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
215 
216  // Decide the preferred extend type for a value.
218  }
219  }
220 
221  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
222  // also creates the initial PHI MachineInstrs, though none of the input
223  // operands are populated.
224  for (const BasicBlock &BB : *Fn) {
225  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
226  // are really data, and no instructions can live here.
227  if (BB.isEHPad()) {
228  const Instruction *PadInst = BB.getFirstNonPHI();
229  // If this is a non-landingpad EH pad, mark this function as using
230  // funclets.
231  // FIXME: SEH catchpads do not create funclets, so we could avoid setting
232  // this in such cases in order to improve frame layout.
233  if (!isa<LandingPadInst>(PadInst)) {
234  MF->setHasEHFunclets(true);
236  }
237  if (isa<CatchSwitchInst>(PadInst)) {
238  assert(&*BB.begin() == PadInst &&
239  "WinEHPrepare failed to remove PHIs from imaginary BBs");
240  continue;
241  }
242  if (isa<FuncletPadInst>(PadInst))
243  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
244  }
245 
247  MBBMap[&BB] = MBB;
248  MF->push_back(MBB);
249 
250  // Transfer the address-taken flag. This is necessary because there could
251  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
252  // the first one should be marked.
253  if (BB.hasAddressTaken())
254  MBB->setHasAddressTaken();
255 
256  // Mark landing pad blocks.
257  if (BB.isEHPad())
258  MBB->setIsEHPad();
259 
260  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
261  // appropriate.
262  for (BasicBlock::const_iterator I = BB.begin();
263  const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
264  if (PN->use_empty()) continue;
265 
266  // Skip empty types
267  if (PN->getType()->isEmptyTy())
268  continue;
269 
270  DebugLoc DL = PN->getDebugLoc();
271  unsigned PHIReg = ValueMap[PN];
272  assert(PHIReg && "PHI node does not have an assigned virtual register!");
273 
274  SmallVector<EVT, 4> ValueVTs;
275  ComputeValueVTs(*TLI, MF->getDataLayout(), PN->getType(), ValueVTs);
276  for (EVT VT : ValueVTs) {
277  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
279  for (unsigned i = 0; i != NumRegisters; ++i)
280  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
281  PHIReg += NumRegisters;
282  }
283  }
284  }
285 
286  if (!isFuncletEHPersonality(Personality))
287  return;
288 
289  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
290 
291  // Map all BB references in the WinEH data to MBBs.
292  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
293  for (WinEHHandlerType &H : TBME.HandlerArray) {
294  if (H.Handler)
295  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
296  }
297  }
298  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
299  if (UME.Cleanup)
300  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
301  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
302  const BasicBlock *BB = UME.Handler.get<const BasicBlock *>();
303  UME.Handler = MBBMap[BB];
304  }
305  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
306  const BasicBlock *BB = CME.Handler.get<const BasicBlock *>();
307  CME.Handler = MBBMap[BB];
308  }
309 }
310 
311 /// clear - Clear out all the function-specific state. This returns this
312 /// FunctionLoweringInfo to an empty state, ready to be used for a
313 /// different function.
315  MBBMap.clear();
316  ValueMap.clear();
317  StaticAllocaMap.clear();
318  LiveOutRegInfo.clear();
319  VisitedBBs.clear();
320  ArgDbgValues.clear();
321  ByValArgFrameIndexMap.clear();
322  RegFixups.clear();
324  StatepointSpillMaps.clear();
325  PreferredExtendType.clear();
326 }
327 
328 /// CreateReg - Allocate a single virtual register for the given type.
332 }
333 
334 /// CreateRegs - Allocate the appropriate number of virtual registers of
335 /// the correctly promoted or expanded types. Assign these registers
336 /// consecutive vreg numbers and return the first assigned number.
337 ///
338 /// In the case that the given value has struct or array type, this function
339 /// will assign registers for each member or element.
340 ///
343 
344  SmallVector<EVT, 4> ValueVTs;
345  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
346 
347  unsigned FirstReg = 0;
348  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
349  EVT ValueVT = ValueVTs[Value];
350  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
351 
352  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
353  for (unsigned i = 0; i != NumRegs; ++i) {
354  unsigned R = CreateReg(RegisterVT);
355  if (!FirstReg) FirstReg = R;
356  }
357  }
358  return FirstReg;
359 }
360 
361 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
362 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
363 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
364 /// the larger bit width by zero extension. The bit width must be no smaller
365 /// than the LiveOutInfo's existing bit width.
367 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
368  if (!LiveOutRegInfo.inBounds(Reg))
369  return nullptr;
370 
371  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
372  if (!LOI->IsValid)
373  return nullptr;
374 
375  if (BitWidth > LOI->Known.getBitWidth()) {
376  LOI->NumSignBits = 1;
377  LOI->Known = LOI->Known.zextOrTrunc(BitWidth);
378  }
379 
380  return LOI;
381 }
382 
383 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
384 /// register based on the LiveOutInfo of its operands.
386  Type *Ty = PN->getType();
387  if (!Ty->isIntegerTy() || Ty->isVectorTy())
388  return;
389 
390  SmallVector<EVT, 1> ValueVTs;
391  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
392  assert(ValueVTs.size() == 1 &&
393  "PHIs with non-vector integer types should have a single VT.");
394  EVT IntVT = ValueVTs[0];
395 
396  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
397  return;
398  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
399  unsigned BitWidth = IntVT.getSizeInBits();
400 
401  unsigned DestReg = ValueMap[PN];
403  return;
404  LiveOutRegInfo.grow(DestReg);
405  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
406 
407  Value *V = PN->getIncomingValue(0);
408  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
409  DestLOI.NumSignBits = 1;
410  DestLOI.Known = KnownBits(BitWidth);
411  return;
412  }
413 
414  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
415  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
416  DestLOI.NumSignBits = Val.getNumSignBits();
417  DestLOI.Known.Zero = ~Val;
418  DestLOI.Known.One = Val;
419  } else {
420  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
421  "CopyToReg node was created.");
422  unsigned SrcReg = ValueMap[V];
424  DestLOI.IsValid = false;
425  return;
426  }
427  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
428  if (!SrcLOI) {
429  DestLOI.IsValid = false;
430  return;
431  }
432  DestLOI = *SrcLOI;
433  }
434 
435  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
436  DestLOI.Known.One.getBitWidth() == BitWidth &&
437  "Masks should have the same bit width as the type.");
438 
439  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
440  Value *V = PN->getIncomingValue(i);
441  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
442  DestLOI.NumSignBits = 1;
443  DestLOI.Known = KnownBits(BitWidth);
444  return;
445  }
446 
447  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
448  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
449  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
450  DestLOI.Known.Zero &= ~Val;
451  DestLOI.Known.One &= Val;
452  continue;
453  }
454 
455  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
456  "its CopyToReg node was created.");
457  unsigned SrcReg = ValueMap[V];
459  DestLOI.IsValid = false;
460  return;
461  }
462  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
463  if (!SrcLOI) {
464  DestLOI.IsValid = false;
465  return;
466  }
467  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
468  DestLOI.Known.Zero &= SrcLOI->Known.Zero;
469  DestLOI.Known.One &= SrcLOI->Known.One;
470  }
471 }
472 
473 /// setArgumentFrameIndex - Record frame index for the byval
474 /// argument. This overrides previous frame index entry for this argument,
475 /// if any.
477  int FI) {
478  ByValArgFrameIndexMap[A] = FI;
479 }
480 
481 /// getArgumentFrameIndex - Get frame index for the byval argument.
482 /// If the argument does not have any assigned frame index then 0 is
483 /// returned.
485  auto I = ByValArgFrameIndexMap.find(A);
486  if (I != ByValArgFrameIndexMap.end())
487  return I->second;
488  DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
489  return INT_MAX;
490 }
491 
493  const Value *CPI, const TargetRegisterClass *RC) {
495  auto I = CatchPadExceptionPointers.insert({CPI, 0});
496  unsigned &VReg = I.first->second;
497  if (I.second)
498  VReg = MRI.createVirtualRegister(RC);
499  assert(VReg && "null vreg in exception pointer table!");
500  return VReg;
501 }
502 
503 unsigned
505  const Value *Val) {
506  auto Key = std::make_pair(MBB, Val);
507  auto It = SwiftErrorVRegDefMap.find(Key);
508  // If this is the first use of this swifterror value in this basic block,
509  // create a new virtual register.
510  // After we processed all basic blocks we will satisfy this "upwards exposed
511  // use" by inserting a copy or phi at the beginning of this block.
512  if (It == SwiftErrorVRegDefMap.end()) {
513  auto &DL = MF->getDataLayout();
515  auto VReg = MF->getRegInfo().createVirtualRegister(RC);
516  SwiftErrorVRegDefMap[Key] = VReg;
517  SwiftErrorVRegUpwardsUse[Key] = VReg;
518  return VReg;
519  } else return It->second;
520 }
521 
523  const MachineBasicBlock *MBB, const Value *Val, unsigned VReg) {
524  SwiftErrorVRegDefMap[std::make_pair(MBB, Val)] = VReg;
525 }
526 
527 std::pair<unsigned, bool>
530  auto It = SwiftErrorVRegDefUses.find(Key);
531  if (It == SwiftErrorVRegDefUses.end()) {
532  auto &DL = MF->getDataLayout();
534  unsigned VReg = MF->getRegInfo().createVirtualRegister(RC);
535  SwiftErrorVRegDefUses[Key] = VReg;
536  return std::make_pair(VReg, true);
537  }
538  return std::make_pair(It->second, false);
539 }
540 
541 std::pair<unsigned, bool>
544  auto It = SwiftErrorVRegDefUses.find(Key);
545  if (It == SwiftErrorVRegDefUses.end()) {
546  unsigned VReg = getOrCreateSwiftErrorVReg(MBB, Val);
547  SwiftErrorVRegDefUses[Key] = VReg;
548  return std::make_pair(VReg, true);
549  }
550  return std::make_pair(It->second, false);
551 }
void clear()
Definition: ValueMap.h:148
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:158
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:83
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:77
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:30
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:43
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSS, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
unsigned getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:98
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
void setHasEHFunclets(bool V)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
virtual const TargetLowering * getTargetLowering() const
const AllocaInst * Alloca
Definition: WinEHFuncInfo.h:66
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:697
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
A debug info location.
Definition: DebugLoc.h:34
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
Definition: APInt.cpp:883
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:227
DenseMap< const Value *, unsigned > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
bool CanLowerReturn
CanLowerReturn - true iff the function&#39;s return value can be lowered to registers.
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:40
void setCurrentSwiftErrorVReg(const MachineBasicBlock *MBB, const Value *, unsigned)
Set the swifterror virtual register in the SwiftErrorVRegDefMap for this basic block.
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:39
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1488
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:130
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:58
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegDefAt(const Instruction *)
Get or create the swifterror value virtual register for a def of a swifterror by an instruction...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:191
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
const HexagonInstrInfo * TII
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:197
Reg
All possible values of the reg field in the ModR/M byte.
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:100
unsigned getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:292
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
void setHasMustTailInVarArgFunc(bool B)
const LiveOutInfo * GetLiveOutRegInfo(unsigned Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
This contains information for each constraint that we are lowering.
KnownBits zextOrTrunc(unsigned BitWidth)
Zero extends or truncates the underlying known Zero and One bits.
Definition: KnownBits.h:133
static ISD::NodeType getPreferredExtendForValue(const Value *V)
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:205
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:634
virtual const TargetInstrInfo * getInstrInfo() const
void setHasOpaqueSPAdjustment(bool B)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:85
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
TargetInstrInfo - Interface to description of machine instruction set.
void clear()
clear - Clear out all the function-specific state.
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:47
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:150
SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:99
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:149
unsigned const MachineRegisterInfo * MRI
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegUseAt(const Instruction *, const MachineBasicBlock *, const Value *)
#define H(x, y, z)
Definition: MD5.cpp:57
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:692
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
union llvm::WinEHHandlerType::@163 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool Immutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
DenseMap< const Instruction *, StatepointSpillMap > StatepointSpillMaps
Maps gc.statepoint instructions to their corresponding StatepointSpillMap instances.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Extended Value Type.
Definition: ValueTypes.h:34
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI&#39;s destination register based on the LiveOutI...
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
MachineBasicBlock * MBB
MBB - The current block.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:70
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
unsigned first
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it&#39;s handlers to build WinEHFuncInfo, which describes the state number...
SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:96
Iterator for intrusive lists based on ilist_node.
See the file comment.
Definition: ValueMap.h:86
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegDefMap
A map from swifterror value in a basic block to the virtual register it is currently represented by...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:194
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:209
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Module.h This file contains the declarations for the Module class.
Information about stack frame layout on the target.
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegUpwardsUse
A list of upward exposed vreg uses that need to be satisfied by either a copy def or a phi node at th...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
unsigned getNumIncomingValues() const
Return the number of incoming edges.
unsigned CreateRegs(Type *Ty)
CreateRegs - Allocate the appropriate number of virtual registers of the correctly promoted or expand...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:97
Class for arbitrary precision integers.
Definition: APInt.h:69
iterator_range< user_iterator > users()
Definition: Value.h:395
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:448
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:405
const DebugLoc & getDebugLoc() const
Return the debug location for this node as a DebugLoc.
Definition: Instruction.h:284
MachineRegisterInfo * RegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
Establish a view to a call site for examination.
Definition: CallSite.h:695
#define I(x, y, z)
Definition: MD5.cpp:58
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
virtual const TargetFrameLowering * getFrameLowering() const
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
unsigned CreateReg(MVT VT)
CreateReg - Allocate a single virtual register for the given type.
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:135
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:154
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void GetReturnInfo(Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
Definition: APInt.h:1599
LLVM Value Representation.
Definition: Value.h:73
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1255
void push_back(MachineBasicBlock *MBB)
llvm::DenseMap< PointerIntPair< const Instruction *, 1, bool >, unsigned > SwiftErrorVRegDefUses
A map from instructions that define/use a swifterror value to the virtual register that represents th...
#define DEBUG(X)
Definition: Debug.h:118
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
const TargetLowering * TLI
bool isEmptyTy() const
Return true if this type is empty, that is, it has no elements or all of its elements are empty...
Definition: Type.cpp:98
Conversion operators.
Definition: ISDOpcodes.h:442
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
int CreateVariableSizedObject(unsigned Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created. ...
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
bool use_empty() const
Definition: Value.h:322
This file describes how to lower LLVM code to machine code.
const BasicBlock * getParent() const
Definition: Instruction.h:66
an instruction to allocate memory on the stack
Definition: Instructions.h:60
unsigned InitializeRegForValue(const Value *V)
unsigned getOrCreateSwiftErrorVReg(const MachineBasicBlock *, const Value *)
Get or create the swifterror value virtual register in SwiftErrorVRegDefMap for this basic block...