LLVM  7.0.0svn
FunctionLoweringInfo.cpp
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1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements routines for translating functions from LLVM IR into
11 // Machine IR.
12 //
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/CodeGen/Analysis.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/DerivedTypes.h"
30 #include "llvm/IR/Function.h"
31 #include "llvm/IR/Instructions.h"
32 #include "llvm/IR/IntrinsicInst.h"
33 #include "llvm/IR/LLVMContext.h"
34 #include "llvm/IR/Module.h"
35 #include "llvm/Support/Debug.h"
40 #include <algorithm>
41 using namespace llvm;
42 
43 #define DEBUG_TYPE "function-lowering-info"
44 
45 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
46 /// PHI nodes or outside of the basic block that defines it, or used by a
47 /// switch or atomic instruction, which may expand to multiple basic blocks.
49  if (I->use_empty()) return false;
50  if (isa<PHINode>(I)) return true;
51  const BasicBlock *BB = I->getParent();
52  for (const User *U : I->users())
53  if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
54  return true;
55 
56  return false;
57 }
58 
60  // For the users of the source value being used for compare instruction, if
61  // the number of signed predicate is greater than unsigned predicate, we
62  // prefer to use SIGN_EXTEND.
63  //
64  // With this optimization, we would be able to reduce some redundant sign or
65  // zero extension instruction, and eventually more machine CSE opportunities
66  // can be exposed.
67  ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
68  unsigned NumOfSigned = 0, NumOfUnsigned = 0;
69  for (const User *U : V->users()) {
70  if (const auto *CI = dyn_cast<CmpInst>(U)) {
71  NumOfSigned += CI->isSigned();
72  NumOfUnsigned += CI->isUnsigned();
73  }
74  }
75  if (NumOfSigned > NumOfUnsigned)
76  ExtendKind = ISD::SIGN_EXTEND;
77 
78  return ExtendKind;
79 }
80 
82  SelectionDAG *DAG) {
83  Fn = &fn;
84  MF = &mf;
86  RegInfo = &MF->getRegInfo();
88  unsigned StackAlign = TFI->getStackAlignment();
89 
90  // Check whether the function can return without sret-demotion.
93  mf.getDataLayout());
94  CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
95  Fn->isVarArg(), Outs, Fn->getContext());
96 
97  // If this personality uses funclets, we need to do a bit more work.
100  Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
101  if (isFuncletEHPersonality(Personality)) {
102  // Calculate state numbers if we haven't already.
103  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
104  if (Personality == EHPersonality::MSVC_CXX)
105  calculateWinCXXEHStateNumbers(&fn, EHInfo);
106  else if (isAsynchronousEHPersonality(Personality))
107  calculateSEHStateNumbers(&fn, EHInfo);
108  else if (Personality == EHPersonality::CoreCLR)
109  calculateClrEHStateNumbers(&fn, EHInfo);
110 
111  // Map all BB references in the WinEH data to MBBs.
112  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
113  for (WinEHHandlerType &H : TBME.HandlerArray) {
114  if (const AllocaInst *AI = H.CatchObj.Alloca)
115  CatchObjects.insert({AI, {}}).first->second.push_back(
116  &H.CatchObj.FrameIndex);
117  else
118  H.CatchObj.FrameIndex = INT_MAX;
119  }
120  }
121  }
122  if (Personality == EHPersonality::Wasm_CXX) {
123  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
124  calculateWasmEHInfo(&fn, EHInfo);
125  }
126 
127  // Initialize the mapping of values to registers. This is only set up for
128  // instruction values that are used outside of the block that defines
129  // them.
130  for (const BasicBlock &BB : *Fn) {
131  for (const Instruction &I : BB) {
132  if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
133  Type *Ty = AI->getAllocatedType();
134  unsigned Align =
136  AI->getAlignment());
137 
138  // Static allocas can be folded into the initial stack frame
139  // adjustment. For targets that don't realign the stack, don't
140  // do this if there is an extra alignment requirement.
141  if (AI->isStaticAlloca() &&
142  (TFI->isStackRealignable() || (Align <= StackAlign))) {
143  const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
144  uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
145 
146  TySize *= CUI->getZExtValue(); // Get total allocated size.
147  if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
148  int FrameIndex = INT_MAX;
149  auto Iter = CatchObjects.find(AI);
150  if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
151  FrameIndex = MF->getFrameInfo().CreateFixedObject(
152  TySize, 0, /*Immutable=*/false, /*isAliased=*/true);
153  MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
154  } else {
155  FrameIndex =
156  MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
157  }
158 
160  // Update the catch handler information.
161  if (Iter != CatchObjects.end()) {
162  for (int *CatchObjPtr : Iter->second)
163  *CatchObjPtr = FrameIndex;
164  }
165  } else {
166  // FIXME: Overaligned static allocas should be grouped into
167  // a single dynamic allocation instead of using a separate
168  // stack allocation for each one.
169  if (Align <= StackAlign)
170  Align = 0;
171  // Inform the Frame Information that we have variable-sized objects.
172  MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
173  }
174  }
175 
176  // Look for inline asm that clobbers the SP register.
177  if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
178  ImmutableCallSite CS(&I);
179  if (isa<InlineAsm>(CS.getCalledValue())) {
180  unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
182  std::vector<TargetLowering::AsmOperandInfo> Ops =
183  TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
184  for (TargetLowering::AsmOperandInfo &Op : Ops) {
185  if (Op.Type == InlineAsm::isClobber) {
186  // Clobbers don't have SDValue operands, hence SDValue().
187  TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
188  std::pair<unsigned, const TargetRegisterClass *> PhysReg =
189  TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
190  Op.ConstraintVT);
191  if (PhysReg.first == SP)
193  }
194  }
195  }
196  }
197 
198  // Look for calls to the @llvm.va_start intrinsic. We can omit some
199  // prologue boilerplate for variadic functions that don't examine their
200  // arguments.
201  if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
202  if (II->getIntrinsicID() == Intrinsic::vastart)
203  MF->getFrameInfo().setHasVAStart(true);
204  }
205 
206  // If we have a musttail call in a variadic function, we need to ensure we
207  // forward implicit register parameters.
208  if (const auto *CI = dyn_cast<CallInst>(&I)) {
209  if (CI->isMustTailCall() && Fn->isVarArg())
211  }
212 
213  // Mark values used outside their block as exported, by allocating
214  // a virtual register for them.
216  if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
218 
219  // Decide the preferred extend type for a value.
221  }
222  }
223 
224  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
225  // also creates the initial PHI MachineInstrs, though none of the input
226  // operands are populated.
227  for (const BasicBlock &BB : *Fn) {
228  // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
229  // are really data, and no instructions can live here.
230  if (BB.isEHPad()) {
231  const Instruction *PadInst = BB.getFirstNonPHI();
232  // If this is a non-landingpad EH pad, mark this function as using
233  // funclets.
234  // FIXME: SEH catchpads do not create EH scope/funclets, so we could avoid
235  // setting this in such cases in order to improve frame layout.
236  if (!isa<LandingPadInst>(PadInst)) {
237  MF->setHasEHScopes(true);
238  MF->setHasEHFunclets(true);
240  }
241  if (isa<CatchSwitchInst>(PadInst)) {
242  assert(&*BB.begin() == PadInst &&
243  "WinEHPrepare failed to remove PHIs from imaginary BBs");
244  continue;
245  }
246  if (isa<FuncletPadInst>(PadInst))
247  assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
248  }
249 
251  MBBMap[&BB] = MBB;
252  MF->push_back(MBB);
253 
254  // Transfer the address-taken flag. This is necessary because there could
255  // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
256  // the first one should be marked.
257  if (BB.hasAddressTaken())
258  MBB->setHasAddressTaken();
259 
260  // Mark landing pad blocks.
261  if (BB.isEHPad())
262  MBB->setIsEHPad();
263 
264  // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
265  // appropriate.
266  for (const PHINode &PN : BB.phis()) {
267  if (PN.use_empty())
268  continue;
269 
270  // Skip empty types
271  if (PN.getType()->isEmptyTy())
272  continue;
273 
274  DebugLoc DL = PN.getDebugLoc();
275  unsigned PHIReg = ValueMap[&PN];
276  assert(PHIReg && "PHI node does not have an assigned virtual register!");
277 
278  SmallVector<EVT, 4> ValueVTs;
279  ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
280  for (EVT VT : ValueVTs) {
281  unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
283  for (unsigned i = 0; i != NumRegisters; ++i)
284  BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
285  PHIReg += NumRegisters;
286  }
287  }
288  }
289 
290  if (isFuncletEHPersonality(Personality)) {
291  WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
292 
293  // Map all BB references in the WinEH data to MBBs.
294  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
295  for (WinEHHandlerType &H : TBME.HandlerArray) {
296  if (H.Handler)
297  H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
298  }
299  }
300  for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
301  if (UME.Cleanup)
302  UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
303  for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
304  const auto *BB = UME.Handler.get<const BasicBlock *>();
305  UME.Handler = MBBMap[BB];
306  }
307  for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
308  const auto *BB = CME.Handler.get<const BasicBlock *>();
309  CME.Handler = MBBMap[BB];
310  }
311  }
312 
313  else if (Personality == EHPersonality::Wasm_CXX) {
314  WasmEHFuncInfo &EHInfo = *MF->getWasmEHFuncInfo();
315  // Map all BB references in the WinEH data to MBBs.
317  for (auto &KV : EHInfo.EHPadUnwindMap) {
318  const auto *Src = KV.first.get<const BasicBlock *>();
319  const auto *Dst = KV.second.get<const BasicBlock *>();
320  NewMap[MBBMap[Src]] = MBBMap[Dst];
321  }
322  EHInfo.EHPadUnwindMap = std::move(NewMap);
323  NewMap.clear();
324  for (auto &KV : EHInfo.ThrowUnwindMap) {
325  const auto *Src = KV.first.get<const BasicBlock *>();
326  const auto *Dst = KV.second.get<const BasicBlock *>();
327  NewMap[MBBMap[Src]] = MBBMap[Dst];
328  }
329  EHInfo.ThrowUnwindMap = std::move(NewMap);
330  }
331 }
332 
333 /// clear - Clear out all the function-specific state. This returns this
334 /// FunctionLoweringInfo to an empty state, ready to be used for a
335 /// different function.
337  MBBMap.clear();
338  ValueMap.clear();
339  VirtReg2Value.clear();
340  StaticAllocaMap.clear();
341  LiveOutRegInfo.clear();
342  VisitedBBs.clear();
343  ArgDbgValues.clear();
344  ByValArgFrameIndexMap.clear();
345  RegFixups.clear();
348  StatepointSpillMaps.clear();
349  PreferredExtendType.clear();
350 }
351 
352 /// CreateReg - Allocate a single virtual register for the given type.
356 }
357 
358 /// CreateRegs - Allocate the appropriate number of virtual registers of
359 /// the correctly promoted or expanded types. Assign these registers
360 /// consecutive vreg numbers and return the first assigned number.
361 ///
362 /// In the case that the given value has struct or array type, this function
363 /// will assign registers for each member or element.
364 ///
367 
368  SmallVector<EVT, 4> ValueVTs;
369  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
370 
371  unsigned FirstReg = 0;
372  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
373  EVT ValueVT = ValueVTs[Value];
374  MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
375 
376  unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
377  for (unsigned i = 0; i != NumRegs; ++i) {
378  unsigned R = CreateReg(RegisterVT);
379  if (!FirstReg) FirstReg = R;
380  }
381  }
382  return FirstReg;
383 }
384 
385 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
386 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
387 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
388 /// the larger bit width by zero extension. The bit width must be no smaller
389 /// than the LiveOutInfo's existing bit width.
391 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
392  if (!LiveOutRegInfo.inBounds(Reg))
393  return nullptr;
394 
395  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
396  if (!LOI->IsValid)
397  return nullptr;
398 
399  if (BitWidth > LOI->Known.getBitWidth()) {
400  LOI->NumSignBits = 1;
401  LOI->Known = LOI->Known.zextOrTrunc(BitWidth);
402  }
403 
404  return LOI;
405 }
406 
407 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
408 /// register based on the LiveOutInfo of its operands.
410  Type *Ty = PN->getType();
411  if (!Ty->isIntegerTy() || Ty->isVectorTy())
412  return;
413 
414  SmallVector<EVT, 1> ValueVTs;
415  ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
416  assert(ValueVTs.size() == 1 &&
417  "PHIs with non-vector integer types should have a single VT.");
418  EVT IntVT = ValueVTs[0];
419 
420  if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
421  return;
422  IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
423  unsigned BitWidth = IntVT.getSizeInBits();
424 
425  unsigned DestReg = ValueMap[PN];
427  return;
428  LiveOutRegInfo.grow(DestReg);
429  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
430 
431  Value *V = PN->getIncomingValue(0);
432  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
433  DestLOI.NumSignBits = 1;
434  DestLOI.Known = KnownBits(BitWidth);
435  return;
436  }
437 
438  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
439  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
440  DestLOI.NumSignBits = Val.getNumSignBits();
441  DestLOI.Known.Zero = ~Val;
442  DestLOI.Known.One = Val;
443  } else {
444  assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
445  "CopyToReg node was created.");
446  unsigned SrcReg = ValueMap[V];
448  DestLOI.IsValid = false;
449  return;
450  }
451  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
452  if (!SrcLOI) {
453  DestLOI.IsValid = false;
454  return;
455  }
456  DestLOI = *SrcLOI;
457  }
458 
459  assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
460  DestLOI.Known.One.getBitWidth() == BitWidth &&
461  "Masks should have the same bit width as the type.");
462 
463  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
464  Value *V = PN->getIncomingValue(i);
465  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
466  DestLOI.NumSignBits = 1;
467  DestLOI.Known = KnownBits(BitWidth);
468  return;
469  }
470 
471  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
472  APInt Val = CI->getValue().zextOrTrunc(BitWidth);
473  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
474  DestLOI.Known.Zero &= ~Val;
475  DestLOI.Known.One &= Val;
476  continue;
477  }
478 
479  assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
480  "its CopyToReg node was created.");
481  unsigned SrcReg = ValueMap[V];
483  DestLOI.IsValid = false;
484  return;
485  }
486  const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
487  if (!SrcLOI) {
488  DestLOI.IsValid = false;
489  return;
490  }
491  DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
492  DestLOI.Known.Zero &= SrcLOI->Known.Zero;
493  DestLOI.Known.One &= SrcLOI->Known.One;
494  }
495 }
496 
497 /// setArgumentFrameIndex - Record frame index for the byval
498 /// argument. This overrides previous frame index entry for this argument,
499 /// if any.
501  int FI) {
502  ByValArgFrameIndexMap[A] = FI;
503 }
504 
505 /// getArgumentFrameIndex - Get frame index for the byval argument.
506 /// If the argument does not have any assigned frame index then 0 is
507 /// returned.
509  auto I = ByValArgFrameIndexMap.find(A);
510  if (I != ByValArgFrameIndexMap.end())
511  return I->second;
512  LLVM_DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
513  return INT_MAX;
514 }
515 
517  const Value *CPI, const TargetRegisterClass *RC) {
519  auto I = CatchPadExceptionPointers.insert({CPI, 0});
520  unsigned &VReg = I.first->second;
521  if (I.second)
522  VReg = MRI.createVirtualRegister(RC);
523  assert(VReg && "null vreg in exception pointer table!");
524  return VReg;
525 }
526 
527 unsigned
529  const Value *Val) {
530  auto Key = std::make_pair(MBB, Val);
531  auto It = SwiftErrorVRegDefMap.find(Key);
532  // If this is the first use of this swifterror value in this basic block,
533  // create a new virtual register.
534  // After we processed all basic blocks we will satisfy this "upwards exposed
535  // use" by inserting a copy or phi at the beginning of this block.
536  if (It == SwiftErrorVRegDefMap.end()) {
537  auto &DL = MF->getDataLayout();
539  auto VReg = MF->getRegInfo().createVirtualRegister(RC);
540  SwiftErrorVRegDefMap[Key] = VReg;
542  return VReg;
543  } else return It->second;
544 }
545 
547  const MachineBasicBlock *MBB, const Value *Val, unsigned VReg) {
548  SwiftErrorVRegDefMap[std::make_pair(MBB, Val)] = VReg;
549 }
550 
551 std::pair<unsigned, bool>
554  auto It = SwiftErrorVRegDefUses.find(Key);
555  if (It == SwiftErrorVRegDefUses.end()) {
556  auto &DL = MF->getDataLayout();
558  unsigned VReg = MF->getRegInfo().createVirtualRegister(RC);
559  SwiftErrorVRegDefUses[Key] = VReg;
560  return std::make_pair(VReg, true);
561  }
562  return std::make_pair(It->second, false);
563 }
564 
565 std::pair<unsigned, bool>
568  auto It = SwiftErrorVRegDefUses.find(Key);
569  if (It == SwiftErrorVRegDefUses.end()) {
570  unsigned VReg = getOrCreateSwiftErrorVReg(MBB, Val);
571  SwiftErrorVRegDefUses[Key] = VReg;
572  return std::make_pair(VReg, true);
573  }
574  return std::make_pair(It->second, false);
575 }
576 
577 const Value *
579  if (VirtReg2Value.empty()) {
580  for (auto &P : ValueMap) {
581  VirtReg2Value[P.second] = P.first;
582  }
583  }
584  return VirtReg2Value[Vreg];
585 }
void clear()
Definition: ValueMap.h:152
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:163
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:83
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:77
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:30
MBBOrBasicBlock Cleanup
Definition: WinEHFuncInfo.h:43
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
unsigned getCatchPadExceptionPointerVReg(const Value *CPI, const TargetRegisterClass *RC)
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:137
void setIsEHPad(bool V=true)
Indicates the block is a landing pad.
SmallVector< SEHUnwindMapEntry, 4 > SEHUnwindMap
Definition: WinEHFuncInfo.h:98
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
void setHasEHFunclets(bool V)
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
unsigned Reg
virtual const TargetLowering * getTargetLowering() const
const AllocaInst * Alloca
Definition: WinEHFuncInfo.h:66
LLVMContext & getContext() const
All values hold a context through their type.
Definition: Value.cpp:713
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:34
APInt zextOrTrunc(unsigned width) const
Zero extend or truncate to width.
Definition: APInt.cpp:882
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:227
DenseMap< const Value *, unsigned > CatchPadExceptionPointers
Track virtual registers created for exception pointers.
bool CanLowerReturn
CanLowerReturn - true iff the function&#39;s return value can be lowered to registers.
unsigned getBitWidth() const
Get the bit width of this value.
Definition: KnownBits.h:40
void setCurrentSwiftErrorVReg(const MachineBasicBlock *MBB, const Value *, unsigned)
Set the swifterror virtual register in the SwiftErrorVRegDefMap for this basic block.
int CreateStackObject(uint64_t Size, unsigned Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it...
NodeType
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Definition: ISDOpcodes.h:39
void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG)
set - Initialize this FunctionLoweringInfo with the given Function and its associated MachineFunction...
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1493
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:130
MBBOrBasicBlock Handler
Holds the __except or __finally basic block.
Definition: WinEHFuncInfo.h:58
MVT getRegisterType(MVT VT) const
Return the type of registers that this ValueType will eventually require.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegDefAt(const Instruction *)
Get or create the swifterror value virtual register for a def of a swifterror by an instruction...
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:191
static bool isUsedOutsideOfDefiningBlock(const Instruction *I)
isUsedOutsideOfDefiningBlock - Return true if this instruction is used by PHI nodes or outside of the...
const HexagonInstrInfo * TII
void calculateSEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
union llvm::WinEHHandlerType::@173 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
bool isIntegerTy() const
True if this is an instance of IntegerType.
Definition: Type.h:197
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
int getArgumentFrameIndex(const Argument *A)
getArgumentFrameIndex - Get frame index for the byval argument.
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:100
Key
PAL metadata keys.
unsigned getSizeInBits() const
Return the size of the specified value type in bits.
Definition: ValueTypes.h:292
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
void setHasMustTailInVarArgFunc(bool B)
const LiveOutInfo * GetLiveOutRegInfo(unsigned Reg)
GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the register is a PHI destinat...
DenseMap< BBOrMBB, BBOrMBB > EHPadUnwindMap
DenseMap< BBOrMBB, BBOrMBB > ThrowUnwindMap
This contains information for each constraint that we are lowering.
DenseSet< unsigned > RegsWithFixups
KnownBits zextOrTrunc(unsigned BitWidth)
Zero extends or truncates the underlying known Zero and One bits.
Definition: KnownBits.h:131
static ISD::NodeType getPreferredExtendForValue(const Value *V)
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:210
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:688
virtual const TargetInstrInfo * getInstrInfo() const
void setHasOpaqueSPAdjustment(bool B)
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void ComputeValueVTs(const TargetLowering &TLI, const DataLayout &DL, Type *Ty, SmallVectorImpl< EVT > &ValueVTs, SmallVectorImpl< uint64_t > *Offsets=nullptr, uint64_t StartingOffset=0)
ComputeValueVTs - Given an LLVM IR type, compute a sequence of EVTs that represent all the individual...
Definition: Analysis.cpp:84
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
TargetInstrInfo - Interface to description of machine instruction set.
void clear()
clear - Clear out all the function-specific state.
Similar to CxxUnwindMapEntry, but supports SEH filters.
Definition: WinEHFuncInfo.h:47
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void setHasEHScopes(bool V)
#define P(N)
Type * getReturnType() const
Returns the type of the ret val.
Definition: Function.h:155
SmallVector< ClrEHUnwindMapEntry, 4 > ClrEHUnwindMap
Definition: WinEHFuncInfo.h:99
DenseMap< unsigned, const Value * > VirtReg2Value
VirtReg2Value map is needed by the Divergence Analysis driven instruction selection.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:149
unsigned const MachineRegisterInfo * MRI
MVT getPointerTy(const DataLayout &DL, uint32_t AS=0) const
Return the pointer type for the given address space, defaults to the pointer type from the data layou...
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
std::pair< unsigned, bool > getOrCreateSwiftErrorVRegUseAt(const Instruction *, const MachineBasicBlock *, const Value *)
#define H(x, y, z)
Definition: MD5.cpp:57
unsigned getPrefTypeAlignment(Type *Ty) const
Returns the preferred stack/global alignment for the specified type.
Definition: DataLayout.cpp:732
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
void calculateClrEHStateNumbers(const Function *Fn, WinEHFuncInfo &FuncInfo)
DenseMap< const Instruction *, StatepointSpillMap > StatepointSpillMaps
Maps gc.statepoint instructions to their corresponding StatepointSpillMap instances.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:193
SmallPtrSet< const BasicBlock *, 4 > VisitedBBs
VisitedBBs - The set of basic blocks visited thus far by instruction selection.
Extended Value Type.
Definition: ValueTypes.h:34
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Value * getIncomingValue(unsigned i) const
Return incoming value number x.
void ComputePHILiveOutRegInfo(const PHINode *)
ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI&#39;s destination register based on the LiveOutI...
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
void calculateWasmEHInfo(const Function *F, WasmEHFuncInfo &FuncInfo)
MachineBasicBlock * MBB
MBB - The current block.
MBBOrBasicBlock Handler
Definition: WinEHFuncInfo.h:70
SmallVector< unsigned, 50 > StatepointStackSlots
StatepointStackSlots - A list of temporary stack slots (frame indices) used to spill values at a stat...
unsigned first
void calculateWinCXXEHStateNumbers(const Function *ParentFn, WinEHFuncInfo &FuncInfo)
Analyze the IR in ParentFn and it&#39;s handlers to build WinEHFuncInfo, which describes the state number...
SmallVector< CxxUnwindMapEntry, 4 > CxxUnwindMap
Definition: WinEHFuncInfo.h:96
See the file comment.
Definition: ValueMap.h:86
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
bool isFuncletEHPersonality(EHPersonality Pers)
Returns true if this is a personality function that invokes handler funclets (which must return to it...
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegDefMap
A map from swifterror value in a basic block to the virtual register it is currently represented by...
DenseMap< unsigned, unsigned > RegFixups
RegFixups - Registers which need to be replaced after isel is done.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:199
This is used to represent a portion of an LLVM function in a low-level Data Dependence DAG representa...
Definition: SelectionDAG.h:222
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:861
SmallVector< MachineInstr *, 8 > ArgDbgValues
ArgDbgValues - A list of DBG_VALUE instructions created during isel for function arguments that are i...
Module.h This file contains the declarations for the Module class.
Information about stack frame layout on the target.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
DenseMap< std::pair< const MachineBasicBlock *, const Value * >, unsigned > SwiftErrorVRegUpwardsUse
A list of upward exposed vreg uses that need to be satisfied by either a copy def or a phi node at th...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
unsigned getNumIncomingValues() const
Return the number of incoming edges.
unsigned CreateRegs(Type *Ty)
CreateRegs - Allocate the appropriate number of virtual registers of the correctly promoted or expand...
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:133
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:97
Class for arbitrary precision integers.
Definition: APInt.h:69
iterator_range< user_iterator > users()
Definition: Value.h:399
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
ANY_EXTEND - Used for integer types. The high bits are undefined.
Definition: ISDOpcodes.h:441
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
const WasmEHFuncInfo * getWasmEHFuncInfo() const
getWasmEHFuncInfo - Return information about how the current function uses Wasm exception handling...
DenseMap< const Value *, ISD::NodeType > PreferredExtendType
Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND) for a value.
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:428
MachineRegisterInfo * RegInfo
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
DenseMap< const Argument *, int > ByValArgFrameIndexMap
ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
Establish a view to a call site for examination.
Definition: CallSite.h:713
#define I(x, y, z)
Definition: MD5.cpp:58
virtual const TargetFrameLowering * getFrameLowering() const
const Value * getValueFromVirtualReg(unsigned Vreg)
This method is called from TargetLowerinInfo::isSDNodeSourceOfDivergence to get the Value correspondi...
unsigned CreateReg(MVT VT)
CreateReg - Allocate a single virtual register for the given type.
DenseMap< const AllocaInst *, int > StaticAllocaMap
StaticAllocaMap - Keep track of frame indices for fixed sized allocas in the entry block...
unsigned getNumRegisters(LLVMContext &Context, EVT VT) const
Return the number of registers that this ValueType will eventually require.
bool isStackRealignable() const
isStackRealignable - This method returns whether the stack can be realigned.
T get() const
Returns the value of the specified pointer type.
Definition: PointerUnion.h:135
size_type count(const KeyT &Val) const
Return 1 if the specified key is in the map, 0 otherwise.
Definition: ValueMap.h:158
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void GetReturnInfo(Type *ReturnType, AttributeList attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI, const DataLayout &DL)
Given an LLVM IR type and return type attributes, compute the return value EVTs and flags...
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
unsigned getNumSignBits() const
Computes the number of leading bits of this APInt that are equal to its sign bit. ...
Definition: APInt.h:1604
LLVM Value Representation.
Definition: Value.h:73
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1281
void push_back(MachineBasicBlock *MBB)
llvm::DenseMap< PointerIntPair< const Instruction *, 1, bool >, unsigned > SwiftErrorVRegDefUses
A map from instructions that define/use a swifterror value to the virtual register that represents th...
DenseMap< const BasicBlock *, MachineBasicBlock * > MBBMap
MBBMap - A mapping from LLVM basic blocks to their machine code entry.
const TargetLowering * TLI
Conversion operators.
Definition: ISDOpcodes.h:435
#define LLVM_DEBUG(X)
Definition: Debug.h:119
void setArgumentFrameIndex(const Argument *A, int FI)
setArgumentFrameIndex - Record frame index for the byval argument.
Unlike LLVM values, Selection DAG nodes may return multiple values as the result of a computation...
int CreateVariableSizedObject(unsigned Alignment, const AllocaInst *Alloca)
Notify the MachineFrameInfo object that a variable sized object has been created. ...
void setObjectAlignment(int ObjectIdx, unsigned Align)
setObjectAlignment - Change the alignment of the specified stack object.
EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
bool use_empty() const
Definition: Value.h:322
unsigned createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
This file describes how to lower LLVM code to machine code.
const BasicBlock * getParent() const
Definition: Instruction.h:67
an instruction to allocate memory on the stack
Definition: Instructions.h:60
unsigned InitializeRegForValue(const Value *V)
unsigned getOrCreateSwiftErrorVReg(const MachineBasicBlock *, const Value *)
Get or create the swifterror value virtual register in SwiftErrorVRegDefMap for this basic block...