LLVM  7.0.0svn
Classes | Namespaces | Functions
TargetRegisterInfo.h File Reference
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineValueType.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/MC/LaneBitmask.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Printable.h"
#include <cassert>
#include <cstdint>
#include <functional>
Include dependency graph for TargetRegisterInfo.h:

Go to the source code of this file.


class  llvm::TargetRegisterClass
struct  llvm::TargetRegisterInfoDesc
 Extra information, not in MCRegisterDesc, about registers. More...
struct  llvm::RegClassWeight
 Each TargetRegisterClass has a per register weight, and weight limit which must be less than the limits of its pressure sets. More...
class  llvm::TargetRegisterInfo
 TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDesc objects that represent all of the machine registers that the target has. More...
struct  llvm::TargetRegisterInfo::RegClassInfo
class  llvm::SuperRegClassIterator
class  llvm::BitMaskClassIterator
 This class encapuslates the logic to iterate over bitmask returned by the various RegClass related APIs. More...
struct  llvm::VirtReg2IndexFunctor


 Compute iterated dominance frontiers using a linear time algorithm.


Printable llvm::printReg (unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubRegIdx=0)
 Prints virtual and physical registers with or without a TRI instance. More...
Printable llvm::printRegUnit (unsigned Unit, const TargetRegisterInfo *TRI)
 Create Printable object to print register units on a raw_ostream. More...
Printable llvm::printVRegOrUnit (unsigned VRegOrUnit, const TargetRegisterInfo *TRI)
 Create Printable object to print virtual registers and physical registers on a raw_ostream. More...
Printable llvm::printRegClassOrBank (unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
 Create Printable object to print register classes or register banks on a raw_ostream. More...