LLVM  6.0.0svn
Classes | Public Types | Public Member Functions | Static Public Member Functions | Public Attributes | List of all members
llvm::MVT Class Reference

Machine Value Type. More...

#include "llvm/CodeGen/MachineValueType.h"

Collaboration diagram for llvm::MVT:
Collaboration graph
[legend]

Classes

class  ElementCount
 

Public Types

enum  SimpleValueType : uint8_t {
  INVALID_SIMPLE_VALUE_TYPE = 0, Other = 1, i1 = 2, i8 = 3,
  i16 = 4, i32 = 5, i64 = 6, i128 = 7,
  FIRST_INTEGER_VALUETYPE = i1, LAST_INTEGER_VALUETYPE = i128, f16 = 8, f32 = 9,
  f64 = 10, f80 = 11, f128 = 12, ppcf128 = 13,
  FIRST_FP_VALUETYPE = f16, LAST_FP_VALUETYPE = ppcf128, v1i1 = 14, v2i1 = 15,
  v4i1 = 16, v8i1 = 17, v16i1 = 18, v32i1 = 19,
  v64i1 = 20, v512i1 = 21, v1024i1 = 22, v1i8 = 23,
  v2i8 = 24, v4i8 = 25, v8i8 = 26, v16i8 = 27,
  v32i8 = 28, v64i8 = 29, v128i8 = 30, v256i8 = 31,
  v1i16 = 32, v2i16 = 33, v4i16 = 34, v8i16 = 35,
  v16i16 = 36, v32i16 = 37, v64i16 = 38, v128i16 = 39,
  v1i32 = 40, v2i32 = 41, v4i32 = 42, v8i32 = 43,
  v16i32 = 44, v32i32 = 45, v64i32 = 46, v1i64 = 47,
  v2i64 = 48, v4i64 = 49, v8i64 = 50, v16i64 = 51,
  v32i64 = 52, v1i128 = 53, nxv1i1 = 54, nxv2i1 = 55,
  nxv4i1 = 56, nxv8i1 = 57, nxv16i1 = 58, nxv32i1 = 59,
  nxv1i8 = 60, nxv2i8 = 61, nxv4i8 = 62, nxv8i8 = 63,
  nxv16i8 = 64, nxv32i8 = 65, nxv1i16 = 66, nxv2i16 = 67,
  nxv4i16 = 68, nxv8i16 = 69, nxv16i16 = 70, nxv32i16 = 71,
  nxv1i32 = 72, nxv2i32 = 73, nxv4i32 = 74, nxv8i32 = 75,
  nxv16i32 = 76, nxv32i32 = 77, nxv1i64 = 78, nxv2i64 = 79,
  nxv4i64 = 80, nxv8i64 = 81, nxv16i64 = 82, nxv32i64 = 83,
  FIRST_INTEGER_VECTOR_VALUETYPE = v1i1, LAST_INTEGER_VECTOR_VALUETYPE = nxv32i64, FIRST_INTEGER_SCALABLE_VALUETYPE = nxv1i1, LAST_INTEGER_SCALABLE_VALUETYPE = nxv32i64,
  v2f16 = 84, v4f16 = 85, v8f16 = 86, v1f32 = 87,
  v2f32 = 88, v4f32 = 89, v8f32 = 90, v16f32 = 91,
  v1f64 = 92, v2f64 = 93, v4f64 = 94, v8f64 = 95,
  nxv2f16 = 96, nxv4f16 = 97, nxv8f16 = 98, nxv1f32 = 99,
  nxv2f32 = 100, nxv4f32 = 101, nxv8f32 = 102, nxv16f32 = 103,
  nxv1f64 = 104, nxv2f64 = 105, nxv4f64 = 106, nxv8f64 = 107,
  FIRST_FP_VECTOR_VALUETYPE = v2f16, LAST_FP_VECTOR_VALUETYPE = nxv8f64, FIRST_FP_SCALABLE_VALUETYPE = nxv2f16, LAST_FP_SCALABLE_VALUETYPE = nxv8f64,
  FIRST_VECTOR_VALUETYPE = v1i1, LAST_VECTOR_VALUETYPE = nxv8f64, x86mmx = 108, Glue = 109,
  isVoid = 110, Untyped = 111, FIRST_VALUETYPE = 1, LAST_VALUETYPE = 112,
  MAX_ALLOWED_VALUETYPE = 128, token = 248, Metadata = 249, iPTRAny = 250,
  vAny = 251, fAny = 252, iAny = 253, iPTR = 254,
  Any = 255
}
 

Public Member Functions

constexpr MVT ()=default
 
constexpr MVT (SimpleValueType SVT)
 
bool operator> (const MVT &S) const
 
bool operator< (const MVT &S) const
 
bool operator== (const MVT &S) const
 
bool operator!= (const MVT &S) const
 
bool operator>= (const MVT &S) const
 
bool operator<= (const MVT &S) const
 
bool isValid () const
 Return true if this is a valid simple valuetype. More...
 
bool isFloatingPoint () const
 Return true if this is a FP or a vector FP type. More...
 
bool isInteger () const
 Return true if this is an integer or a vector integer type. More...
 
bool isScalarInteger () const
 Return true if this is an integer, not including vectors. More...
 
bool isVector () const
 Return true if this is a vector value type. More...
 
bool isScalableVector () const
 Return true if this is a vector value type where the runtime length is machine dependent. More...
 
bool is16BitVector () const
 Return true if this is a 16-bit vector type. More...
 
bool is32BitVector () const
 Return true if this is a 32-bit vector type. More...
 
bool is64BitVector () const
 Return true if this is a 64-bit vector type. More...
 
bool is128BitVector () const
 Return true if this is a 128-bit vector type. More...
 
bool is256BitVector () const
 Return true if this is a 256-bit vector type. More...
 
bool is512BitVector () const
 Return true if this is a 512-bit vector type. More...
 
bool is1024BitVector () const
 Return true if this is a 1024-bit vector type. More...
 
bool is2048BitVector () const
 Return true if this is a 1024-bit vector type. More...
 
bool isOverloaded () const
 Return true if this is an overloaded type for TableGen. More...
 
bool isPow2VectorType () const
 Returns true if the given vector is a power of 2. More...
 
MVT getPow2VectorType () const
 Widens the length of the given vector MVT up to the nearest power of 2 and returns that type. More...
 
MVT getScalarType () const
 If this is a vector, return the element type, otherwise return this. More...
 
MVT getVectorElementType () const
 
unsigned getVectorNumElements () const
 
MVT::ElementCount getVectorElementCount () const
 
unsigned getSizeInBits () const
 
unsigned getScalarSizeInBits () const
 
unsigned getStoreSize () const
 Return the number of bytes overwritten by a store of the specified value type. More...
 
unsigned getStoreSizeInBits () const
 Return the number of bits overwritten by a store of the specified value type. More...
 
bool bitsGT (MVT VT) const
 Return true if this has more bits than VT. More...
 
bool bitsGE (MVT VT) const
 Return true if this has no less bits than VT. More...
 
bool bitsLT (MVT VT) const
 Return true if this has less bits than VT. More...
 
bool bitsLE (MVT VT) const
 Return true if this has no more bits than VT. More...
 

Static Public Member Functions

static MVT getFloatingPointVT (unsigned BitWidth)
 
static MVT getIntegerVT (unsigned BitWidth)
 
static MVT getVectorVT (MVT VT, unsigned NumElements)
 
static MVT getScalableVectorVT (MVT VT, unsigned NumElements)
 
static MVT getVectorVT (MVT VT, unsigned NumElements, bool IsScalable)
 
static MVT getVectorVT (MVT VT, MVT::ElementCount EC)
 
static MVT getVT (Type *Ty, bool HandleUnknown=false)
 Return the value type corresponding to the specified type. More...
 
static mvt_range all_valuetypes ()
 SimpleValueType Iteration. More...
 
static mvt_range integer_valuetypes ()
 
static mvt_range fp_valuetypes ()
 
static mvt_range vector_valuetypes ()
 
static mvt_range integer_vector_valuetypes ()
 
static mvt_range fp_vector_valuetypes ()
 
static mvt_range integer_scalable_vector_valuetypes ()
 
static mvt_range fp_scalable_vector_valuetypes ()
 

Public Attributes

SimpleValueType SimpleTy = INVALID_SIMPLE_VALUE_TYPE
 

Detailed Description

Machine Value Type.

Every type that is supported natively by some processor targeted by LLVM occurs here. This means that any legal value type can be represented by an MVT.

Definition at line 30 of file MachineValueType.h.

Member Enumeration Documentation

◆ SimpleValueType

Enumerator
INVALID_SIMPLE_VALUE_TYPE 
Other 
i1 
i8 
i16 
i32 
i64 
i128 
FIRST_INTEGER_VALUETYPE 
LAST_INTEGER_VALUETYPE 
f16 
f32 
f64 
f80 
f128 
ppcf128 
FIRST_FP_VALUETYPE 
LAST_FP_VALUETYPE 
v1i1 
v2i1 
v4i1 
v8i1 
v16i1 
v32i1 
v64i1 
v512i1 
v1024i1 
v1i8 
v2i8 
v4i8 
v8i8 
v16i8 
v32i8 
v64i8 
v128i8 
v256i8 
v1i16 
v2i16 
v4i16 
v8i16 
v16i16 
v32i16 
v64i16 
v128i16 
v1i32 
v2i32 
v4i32 
v8i32 
v16i32 
v32i32 
v64i32 
v1i64 
v2i64 
v4i64 
v8i64 
v16i64 
v32i64 
v1i128 
nxv1i1 
nxv2i1 
nxv4i1 
nxv8i1 
nxv16i1 
nxv32i1 
nxv1i8 
nxv2i8 
nxv4i8 
nxv8i8 
nxv16i8 
nxv32i8 
nxv1i16 
nxv2i16 
nxv4i16 
nxv8i16 
nxv16i16 
nxv32i16 
nxv1i32 
nxv2i32 
nxv4i32 
nxv8i32 
nxv16i32 
nxv32i32 
nxv1i64 
nxv2i64 
nxv4i64 
nxv8i64 
nxv16i64 
nxv32i64 
FIRST_INTEGER_VECTOR_VALUETYPE 
LAST_INTEGER_VECTOR_VALUETYPE 
FIRST_INTEGER_SCALABLE_VALUETYPE 
LAST_INTEGER_SCALABLE_VALUETYPE 
v2f16 
v4f16 
v8f16 
v1f32 
v2f32 
v4f32 
v8f32 
v16f32 
v1f64 
v2f64 
v4f64 
v8f64 
nxv2f16 
nxv4f16 
nxv8f16 
nxv1f32 
nxv2f32 
nxv4f32 
nxv8f32 
nxv16f32 
nxv1f64 
nxv2f64 
nxv4f64 
nxv8f64 
FIRST_FP_VECTOR_VALUETYPE 
LAST_FP_VECTOR_VALUETYPE 
FIRST_FP_SCALABLE_VALUETYPE 
LAST_FP_SCALABLE_VALUETYPE 
FIRST_VECTOR_VALUETYPE 
LAST_VECTOR_VALUETYPE 
x86mmx 
Glue 
isVoid 
Untyped 
FIRST_VALUETYPE 
LAST_VALUETYPE 
MAX_ALLOWED_VALUETYPE 
token 
Metadata 
iPTRAny 
vAny 
fAny 
iAny 
iPTR 
Any 

Definition at line 32 of file MachineValueType.h.

Constructor & Destructor Documentation

◆ MVT() [1/2]

constexpr llvm::MVT::MVT ( )
default

◆ MVT() [2/2]

constexpr llvm::MVT::MVT ( SimpleValueType  SVT)
inline

Definition at line 274 of file MachineValueType.h.

Member Function Documentation

◆ all_valuetypes()

static mvt_range llvm::MVT::all_valuetypes ( )
inlinestatic

SimpleValueType Iteration.

Definition at line 1004 of file MachineValueType.h.

References FIRST_VALUETYPE, and LAST_VALUETYPE.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), and llvm::TargetLoweringBase::initActions().

◆ bitsGE()

bool llvm::MVT::bitsGE ( MVT  VT) const
inline

Return true if this has no less bits than VT.

Definition at line 769 of file MachineValueType.h.

References getSizeInBits().

Referenced by combineOrCmpEqZeroToCtlzSrl().

◆ bitsGT()

bool llvm::MVT::bitsGT ( MVT  VT) const
inline

Return true if this has more bits than VT.

Definition at line 764 of file MachineValueType.h.

References getSizeInBits().

Referenced by llvm::X86TargetLowering::BuildFILD(), getMaskNode(), LowerFCOPYSIGN(), and LowerScalarVariableShift().

◆ bitsLE()

bool llvm::MVT::bitsLE ( MVT  VT) const
inline

Return true if this has no more bits than VT.

Definition at line 779 of file MachineValueType.h.

References getSizeInBits().

Referenced by LowerScalarVariableShift().

◆ bitsLT()

bool llvm::MVT::bitsLT ( MVT  VT) const
inline

Return true if this has less bits than VT.

Definition at line 774 of file MachineValueType.h.

References getSizeInBits().

Referenced by llvm::X86TargetLowering::BuildFILD(), getPromotedVectorElementType(), LowerFCOPYSIGN(), and LowerScalarVariableShift().

◆ fp_scalable_vector_valuetypes()

static mvt_range llvm::MVT::fp_scalable_vector_valuetypes ( )
inlinestatic

Definition at line 1040 of file MachineValueType.h.

References FIRST_FP_SCALABLE_VALUETYPE, and LAST_FP_SCALABLE_VALUETYPE.

◆ fp_valuetypes()

static mvt_range llvm::MVT::fp_valuetypes ( )
inlinestatic

◆ fp_vector_valuetypes()

static mvt_range llvm::MVT::fp_vector_valuetypes ( )
inlinestatic

◆ getFloatingPointVT()

static MVT llvm::MVT::getFloatingPointVT ( unsigned  BitWidth)
inlinestatic

◆ getIntegerVT()

static MVT llvm::MVT::getIntegerVT ( unsigned  BitWidth)
inlinestatic

Definition at line 800 of file MachineValueType.h.

References i1, i128, i16, i32, i64, i8, and INVALID_SIMPLE_VALUE_TYPE.

Referenced by buildVector(), llvm::EVT::changeTypeToInteger(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineX86ShuffleChain(), combineX86ShufflesConstants(), llvm::ComputeSignatureVTs(), ConvertI1VectorToInteger(), doesIntrinsicReturnPredicate(), EltsFromConsecutiveLoads(), llvm::MipsTargetLowering::EmitInstrWithCustomInserter(), llvm::EVT::getIntegerVT(), getMaskNode(), getPermuteNode(), llvm::TargetLoweringBase::getPointerTy(), GetRegistersForValue(), llvm::TargetLoweringBase::getScalarShiftAmountTy(), llvm::SystemZTargetLowering::getTargetNodeName(), llvm::TargetLoweringBase::hasFastEqualityCompare(), llvm::X86TargetLowering::hasFastEqualityCompare(), isMulPowOf2(), isPromotedInstructionLegal(), lowerBuildVectorAsBroadcast(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), lowerFCOPYSIGN64(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), LowerVectorCTLZInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPACK(), lowerVectorShuffleWithPERMV(), LowerZERO_EXTEND_AVX512(), matchBinaryPermuteVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), matchVectorShuffleAsShift(), memsetStore(), NormalizeBuildVector(), llvm::TargetLowering::ParseConstraints(), parsePhysicalReg(), performExtendCombine(), scaleVectorType(), ShrinkLoadReplaceStoreWithStore(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SystemZTargetLowering::SystemZTargetLowering(), tryBuildVectorReplicate(), llvm::WebAssemblyTargetLowering::WebAssemblyTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

◆ getPow2VectorType()

MVT llvm::MVT::getPow2VectorType ( ) const
inline

Widens the length of the given vector MVT up to the nearest power of 2 and returns that type.

Definition at line 398 of file MachineValueType.h.

References getVectorElementType(), getVectorNumElements(), getVectorVT(), isPow2VectorType(), and llvm::Log2_32_Ceil().

Referenced by llvm::TargetLoweringBase::computeRegisterProperties().

◆ getScalableVectorVT()

static MVT llvm::MVT::getScalableVectorVT ( MVT  VT,
unsigned  NumElements 
)
inlinestatic

◆ getScalarSizeInBits()

unsigned llvm::MVT::getScalarSizeInBits ( ) const
inline

Definition at line 747 of file MachineValueType.h.

References getScalarType(), and getSizeInBits().

Referenced by combineInsertSubvector(), combineTargetShuffle(), combineX86ShuffleChain(), computeBytesPoppedByCalleeForSRet(), llvm::TargetLoweringBase::computeRegisterProperties(), createPackShuffleMask(), llvm::createUnpackShuffleMask(), llvm::DecodeBLENDMask(), llvm::DecodeEXTRQIMask(), llvm::DecodeINSERTQIMask(), llvm::DecodeMOVDDUPMask(), llvm::DecodePALIGNRMask(), DecodePALIGNRMask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::DecodeVPERMMask(), llvm::decodeVSHUF64x2FamilyMask(), llvm::DecodeZeroExtendMask(), llvm::PPCTargetLowering::expandVSXLoadForLE(), llvm::PPCTargetLowering::expandVSXStoreForLE(), getConstantVector(), getConstVector(), getFauxShuffleMask(), getMemCmpLoad(), getPromotedVectorElementType(), getPSHUFShuffleMask(), getScalarValueForVectorElement(), getTargetShuffleMask(), is128BitLaneCrossingShuffleMask(), isRepeatedShuffleMask(), isRepeatedTargetShuffleMask(), lower256BitVectorShuffle(), LowerBITREVERSE_XOP(), lowerBuildVectorAsBroadcast(), LowerCTTZ(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), LowerFCOPYSIGN(), LowerMGATHER(), LowerMSCATTER(), LowerMSTORE(), LowerRotate(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerTruncateVecI1(), lowerV4X128VectorShuffle(), LowerVectorCTLZInRegLUT(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPACK(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithPSHUFB(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), LowerZERO_EXTEND_AVX512(), matchBinaryPermuteVectorShuffle(), matchBinaryVectorShuffle(), matchUnaryVectorShuffle(), matchVectorShuffleAsEXTRQ(), matchVectorShuffleAsINSERTQ(), matchVectorShuffleWithSHUFPD(), performShiftToAllZeros(), scaleVectorType(), SupportedVectorShiftWithImm(), and SupportedVectorVarShift().

◆ getScalarType()

MVT llvm::MVT::getScalarType ( ) const
inline

◆ getSizeInBits()

unsigned llvm::MVT::getSizeInBits ( ) const
inline

Definition at line 618 of file MachineValueType.h.

References Any, f128, f16, f32, f64, f80, fAny, i1, i128, i16, i32, i64, i8, iAny, iPTR, iPTRAny, llvm_unreachable, Metadata, nxv16f32, nxv16i1, nxv16i16, nxv16i32, nxv16i64, nxv16i8, nxv1f32, nxv1f64, nxv1i1, nxv1i16, nxv1i32, nxv1i64, nxv1i8, nxv2f16, nxv2f32, nxv2f64, nxv2i1, nxv2i16, nxv2i32, nxv2i64, nxv2i8, nxv32i1, nxv32i16, nxv32i32, nxv32i64, nxv32i8, nxv4f16, nxv4f32, nxv4f64, nxv4i1, nxv4i16, nxv4i32, nxv4i64, nxv4i8, nxv8f16, nxv8f32, nxv8f64, nxv8i1, nxv8i16, nxv8i32, nxv8i64, nxv8i8, Other, ppcf128, token, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, v8i8, vAny, and x86mmx.

Referenced by AnalyzeReturnValues(), bitsGE(), bitsGT(), bitsLE(), bitsLT(), llvm::CC_ARM_AAPCS_Custom_Aggregate(), CC_Lanai32_VarArg(), CC_MipsO32(), CC_MipsO32_FP64(), CC_Sparc64_Full(), CC_Sparc64_Half(), llvm::CC_X86_32_VectorCall(), llvm::CC_X86_64_VectorCall(), llvm::AArch64TargetLowering::CCAssignFnForReturn(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineBasicSADPattern(), combineBitcastForMaskedOp(), combineInsertSubvector(), combineLoopSADPattern(), combineStore(), combineVectorSignBitsTruncation(), combineVSZext(), combineX86ShuffleChain(), combineX86ShufflesConstants(), combineX86ShufflesRecursively(), llvm::TargetLoweringBase::computeRegisterProperties(), ConvertI1VectorToInteger(), createPackShuffleMask(), createShuffleStride(), llvm::DecodeMOVDDUPMask(), llvm::DecodePALIGNRMask(), DecodePALIGNRMask(), llvm::DecodePSHUFMask(), llvm::DecodePSLLDQMask(), llvm::DecodePSRLDQMask(), llvm::DecodeSHUFPMask(), llvm::DecodeSubVectorBroadcast(), llvm::DecodeUNPCKHMask(), llvm::DecodeUNPCKLMask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::decodeVSHUF64x2FamilyMask(), llvm::DecodeZeroExtendMask(), EltsFromConsecutiveLoads(), llvm::NVPTXAsmPrinter::emitLineNumberAsDotLoc(), EnsureStackAlignment(), llvm::TargetLowering::expandUnalignedStore(), llvm::FastISel::fastEmit_ri_(), foldMaskAndShiftToScale(), genShuffleBland(), getCompareCC(), getComparePred(), getCopyFromParts(), getCopyFromPartsVector(), llvm::RegsForValue::getCopyFromRegs(), getCopyToParts(), getCopyToPartsVector(), getEstimate(), getFauxShuffleMask(), getMaskNode(), getMemCmpLoad(), getMOVL(), getOpenCLAlignment(), llvm::MipsTargetLowering::getOpndList(), getPromotedVectorElementType(), getPSHUFShuffleMask(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), llvm::SITargetLowering::getRegForInlineAsmConstraint(), llvm::ARMTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), GetRegistersForValue(), getRegOperandVectorVT(), getScalarSizeInBits(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), llvm::EVT::getSizeInBits(), getStoreSize(), getStrictFPOpcodeAction(), getTargetVShiftByConstNode(), getTargetVShiftNode(), llvm::AArch64TargetLowering::getVaListSizeInBits(), llvm::TargetLoweringBase::getVectorTypeBreakdown(), llvm::MipsTargetLowering::getVectorTypeBreakdownForCallingConv(), getVectorTypeBreakdownMVT(), getZeroVector(), group2Shuffle(), hasOnlySelectUsers(), llvm::HexagonTargetLowering::HexagonTargetLowering(), insert1BitVector(), isBroadcastShuffle(), isFusableLoadOpStorePattern(), isHorizontalBinOp(), isMulPowOf2(), llvm::X86TargetLowering::isShuffleMaskLegal(), isSupportedType(), isTruncWithZeroHighBitsInput(), llvm::LLT::LLT(), LowerADJUST_TRAMPOLINE(), LowerAsSplatVectorLoad(), LowerBITCAST(), LowerBITREVERSE_XOP(), lowerBuildVectorAsBroadcast(), LowerCallResult(), llvm::TargetLowering::LowerCallTo(), LowerCONCAT_VECTORSvXi1(), LowerCTLZ(), LowerEXTEND_VECTOR_INREG(), LowerExtendedLoad(), llvm::HexagonTargetLowering::LowerEXTRACT_VECTOR(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFABSorFNEG(), lowerFCOPYSIGN64(), llvm::SparcTargetLowering::LowerFormalArguments_64(), LowerHorizontalByteSum(), LowerMLOAD(), LowerMSTORE(), LowerMUL(), llvm::ARMCallLowering::lowerReturn(), LowerSCALAR_TO_VECTOR(), LowerShift(), LowerShiftParts(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND_AVX512(), llvm::LanaiTargetLowering::LowerSRL_PARTS(), LowerTruncateVecI1(), LowerVASTART(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), LowerVectorIntUnary(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsSplitOrBlend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleWithPSHUFB(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), lowerX86FPLogicOp(), matchBinaryPermuteVectorShuffle(), MatchingStackOffset(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), materializeVectorConstant(), mayTailCallThisCC(), llvm::TargetLowering::ParseConstraints(), performBitcastCombine(), performFDivCombine(), performFpToIntCombine(), PerformSTORECombine(), PerformVCVTCombine(), PerformVDIVCombine(), pickOpcodeForVT(), recoverFramePointer(), setGroupSize(), setTargetShuffleZeroElements(), shouldGuaranteeTCO(), simplifyDivRem(), splitAndLowerVectorShuffle(), tryCombineShiftImm(), UnpackFromArgumentSlot(), llvm::WebAssemblyTargetLowering::WebAssemblyTargetLowering(), and X86ChooseCmpImmediateOpcode().

◆ getStoreSize()

unsigned llvm::MVT::getStoreSize ( ) const
inline

◆ getStoreSizeInBits()

unsigned llvm::MVT::getStoreSizeInBits ( ) const
inline

Return the number of bits overwritten by a store of the specified value type.

Definition at line 759 of file MachineValueType.h.

References getStoreSize().

Referenced by insert1BitVector(), llvm::HexagonTargetLowering::LowerCall(), and llvm::HexagonTargetLowering::LowerFormalArguments().

◆ getVectorElementCount()

MVT::ElementCount llvm::MVT::getVectorElementCount ( ) const
inline

Definition at line 614 of file MachineValueType.h.

References getVectorNumElements(), and isScalableVector().

Referenced by llvm::EVT::getVectorElementCount().

◆ getVectorElementType()

MVT llvm::MVT::getVectorElementType ( ) const
inline

Definition at line 412 of file MachineValueType.h.

References f16, f32, f64, i1, i128, i16, i32, i64, i8, llvm_unreachable, nxv16f32, nxv16i1, nxv16i16, nxv16i32, nxv16i64, nxv16i8, nxv1f32, nxv1f64, nxv1i1, nxv1i16, nxv1i32, nxv1i64, nxv1i8, nxv2f16, nxv2f32, nxv2f64, nxv2i1, nxv2i16, nxv2i32, nxv2i64, nxv2i8, nxv32i1, nxv32i16, nxv32i32, nxv32i64, nxv32i8, nxv4f16, nxv4f32, nxv4f64, nxv4i1, nxv4i16, nxv4i32, nxv4i64, nxv4i8, nxv8f16, nxv8f32, nxv8f64, nxv8i1, nxv8i16, nxv8i32, nxv8i64, nxv8i8, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by llvm::AArch64TargetLowering::AArch64TargetLowering(), llvm::EVT::changeVectorElementTypeToInteger(), ChangeVSETULTtoVSETULE(), combineBitcastForMaskedOp(), combineInsertSubvector(), combineRedundantDWordShuffle(), combineTargetShuffle(), combineVSZext(), llvm::TargetLoweringBase::computeRegisterProperties(), ConvertI1VectorToInteger(), EmitKTEST(), ExtendToType(), getConstVector(), getCopyToPartsVector(), getPow2VectorType(), getPromotedVectorElementType(), getScalarType(), getScalarValueForVectorElement(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), getShuffleScalarElt(), getTargetVShiftByConstNode(), getTargetVShiftNode(), getUnderlyingExtractedFromVec(), llvm::EVT::getVectorElementType(), getVectorTypeBreakdownMVT(), getZeroVector(), llvm::HexagonTargetLowering::HexagonTargetLowering(), isTruncWithZeroHighBitsInput(), isTypePromotionOfi1ZeroUpBits(), llvm::LLT::LLT(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBoolVSETCC_AVX512(), LowerCONCAT_VECTORS(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerFABSorFNEG(), LowerHorizontalByteSum(), LowerINSERT_SUBVECTOR(), LowerIntVSETCC_AVX512(), llvm::SITargetLowering::LowerReturn(), LowerSCALAR_TO_VECTOR(), LowerScalarVariableShift(), LowerShift(), LowerShiftParts(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), lowerUINT_TO_FP_vXi32(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), LowerVectorIntUnary(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBitMask(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsTruncBroadcast(), lowerVectorShuffleWithUndefHalf(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), materializeVectorConstant(), performConcatVectorsCombine(), performFDivCombine(), performFpToIntCombine(), PerformVCVTCombine(), PerformVDIVCombine(), processShaderInputArgs(), scaleVectorType(), llvm::TargetLoweringBase::setJumpIsExpensive(), splitAndLowerVectorShuffle(), and tryExtendDUPToExtractHigh().

◆ getVectorNumElements()

unsigned llvm::MVT::getVectorNumElements ( ) const
inline

Definition at line 513 of file MachineValueType.h.

References llvm_unreachable, nxv16f32, nxv16i1, nxv16i16, nxv16i32, nxv16i64, nxv16i8, nxv1f32, nxv1f64, nxv1i1, nxv1i16, nxv1i32, nxv1i64, nxv1i8, nxv2f16, nxv2f32, nxv2f64, nxv2i1, nxv2i16, nxv2i32, nxv2i64, nxv2i8, nxv32i1, nxv32i16, nxv32i32, nxv32i64, nxv32i8, nxv4f16, nxv4f32, nxv4f64, nxv4i1, nxv4i16, nxv4i32, nxv4i64, nxv4i8, nxv8f16, nxv8f32, nxv8f64, nxv8i1, nxv8i16, nxv8i32, nxv8i64, nxv8i8, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), ChangeVSETULTtoVSETULE(), combineBasicSADPattern(), combineExtractSubvector(), combineHorizontalPredicateResult(), combineInsertSubvector(), combineTargetShuffle(), combineVSZext(), combineX86ShuffleChain(), llvm::TargetLoweringBase::computeRegisterProperties(), createPackShuffleMask(), createShuffleStride(), llvm::createUnpackShuffleMask(), llvm::DecodeBLENDMask(), llvm::DecodeEXTRQIMask(), llvm::DecodeInsertElementMask(), llvm::DecodeINSERTQIMask(), llvm::DecodeMOVDDUPMask(), llvm::DecodeMOVSHDUPMask(), llvm::DecodeMOVSLDUPMask(), llvm::DecodePALIGNRMask(), DecodePALIGNRMask(), llvm::DecodePSHUFHWMask(), llvm::DecodePSHUFLWMask(), llvm::DecodePSHUFMask(), llvm::DecodePSWAPMask(), llvm::DecodeScalarMoveMask(), llvm::DecodeSHUFPMask(), llvm::DecodeSubVectorBroadcast(), llvm::DecodeUNPCKHMask(), llvm::DecodeUNPCKLMask(), llvm::DecodeVALIGNMask(), llvm::DecodeVectorBroadcast(), llvm::DecodeVPERM2X128Mask(), llvm::DecodeVPERMIL2PMask(), llvm::DecodeVPERMILPMask(), llvm::DecodeVPERMMask(), llvm::DecodeZeroExtendMask(), llvm::DecodeZeroMoveLowMask(), ExpandHorizontalBinOp(), ExtendToType(), genShuffleBland(), getConstVector(), getCopyToPartsVector(), getFauxShuffleMask(), getGatherNode(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX2(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), getMemCmpLoad(), getMOVL(), getPow2VectorType(), getPrefetchNode(), getPromotedVectorElementType(), getScatterNode(), llvm::X86TargetLowering::getSetCCResultType(), llvm::X86TTIImpl::getShuffleCost(), getShuffleScalarElt(), getShuffleVectorZeroOrUndef(), getTargetShuffleMask(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getUnderlyingExtractedFromVec(), getVectorElementCount(), getVectorMaskingNode(), llvm::EVT::getVectorNumElements(), getVectorTypeBreakdownMVT(), getZeroVector(), group2Shuffle(), insert1BitVector(), isAddSub(), isHorizontalBinOp(), isPow2VectorType(), llvm::LLT::LLT(), lower1BitVectorShuffle(), lower256BitVectorShuffle(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAsSplatVectorLoad(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITCAST(), LowerBITREVERSE_XOP(), lowerBuildVectorAsBroadcast(), LowerBuildVectorAsInsert(), lowerBuildVectorToBitOp(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerExtendedLoad(), LowerEXTRACT_VECTOR_ELT_SSE4(), llvm::SITargetLowering::LowerFormalArguments(), LowerINTRINSIC_W_CHAIN(), LowerMGATHER(), LowerMSCATTER(), LowerMSTORE(), LowerMUL(), LowerMUL_LOHI(), LowerMULH(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerScalarVariableShift(), LowerShift(), LowerShiftParts(), lowerShuffleAsRepeatedMaskAndLanePermute(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerToHorizontalOp(), LowerTruncateVecI1(), LowerTruncatingStore(), lowerUINT_TO_FP_vXi32(), lowerV2X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTLZInRegLUT(), LowerVectorIntUnary(), lowerVectorShuffle(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsElementInsertion(), lowerVectorShuffleAsShift(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleAsZeroOrAnyExtend(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPACK(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithUndefHalf(), lowerVSELECTtoVectorShuffle(), LowerVSETCC(), LowerZERO_EXTEND(), LowerZERO_EXTEND_AVX512(), matchVectorShuffleAsEXTRQ(), matchVectorShuffleAsINSERTQ(), matchVectorShuffleWithSHUFPD(), matchVectorShuffleWithUNPCK(), performConcatVectorsCombine(), recoverFramePointer(), reduceVMULWidth(), scaleVectorType(), setGroupSize(), llvm::TargetLoweringBase::setJumpIsExpensive(), setTargetShuffleZeroElements(), splitAndLowerVectorShuffle(), and tryExtendDUPToExtractHigh().

◆ getVectorVT() [1/3]

static MVT llvm::MVT::getVectorVT ( MVT  VT,
unsigned  NumElements 
)
inlinestatic

Definition at line 819 of file MachineValueType.h.

References f16, f32, f64, i1, i128, i16, i32, i64, i8, INVALID_SIMPLE_VALUE_TYPE, SimpleTy, v1024i1, v128i16, v128i8, v16f32, v16i1, v16i16, v16i32, v16i64, v16i8, v1f32, v1f64, v1i1, v1i128, v1i16, v1i32, v1i64, v1i8, v256i8, v2f16, v2f32, v2f64, v2i1, v2i16, v2i32, v2i64, v2i8, v32i1, v32i16, v32i32, v32i64, v32i8, v4f16, v4f32, v4f64, v4i1, v4i16, v4i32, v4i64, v4i8, v512i1, v64i1, v64i16, v64i32, v64i8, v8f16, v8f32, v8f64, v8i1, v8i16, v8i32, v8i64, and v8i8.

Referenced by AddCombineBUILD_VECTORToVPADDL(), buildVector(), llvm::EVT::changeVectorElementTypeToInteger(), CombineBaseUpdate(), combineBasicSADPattern(), combineBitcastForMaskedOp(), combineHorizontalPredicateResult(), combineInsertSubvector(), combineLoopSADPattern(), combineTargetShuffle(), combineVSelectWithAllOnesOrZeros(), combineVSZext(), combineX86ShuffleChain(), combineX86ShufflesConstants(), createPSADBW(), EltsFromConsecutiveLoads(), getConstVector(), getExpandedMinMaxOps(), getFPTernOp(), getGatherNode(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX512(), getMaskNode(), getOnesVector(), getPermuteNode(), getPow2VectorType(), getPrefetchNode(), getPromotedVectorElementType(), getRegOperandVectorVT(), getScatterNode(), llvm::X86TargetLowering::getSetCCResultType(), llvm::SystemZTargetLowering::getTargetNodeName(), getTargetVShiftNode(), llvm::X86TargetLowering::getTgtMemIntrinsic(), getVectorMaskingNode(), getVectorTypeBreakdownMVT(), llvm::EVT::getVectorVT(), getVectorVT(), getZeroVector(), group2Shuffle(), llvm::HexagonTargetLowering::HexagonTargetLowering(), isPreferredADD(), lower256BitVectorShuffle(), Lower256IntArith(), Lower256IntVSETCC(), Lower512IntArith(), LowerAVXCONCAT_VECTORS(), LowerAVXExtend(), LowerBITREVERSE_XOP(), lowerBuildVectorAsBroadcast(), LowerCONCAT_VECTORSvXi1(), LowerEXTEND_VECTOR_INREG(), LowerExtended1BitVectorLoad(), LowerEXTRACT_VECTOR_ELT_SSE4(), LowerHorizontalByteSum(), LowerINTRINSIC_W_CHAIN(), LowerMGATHER(), LowerMLOAD(), LowerMSCATTER(), LowerMSTORE(), LowerMUL(), LowerMUL_LOHI(), LowerSCALAR_TO_VECTOR(), LowerScalarImmediateShift(), LowerShift(), LowerShiftParts(), LowerSIGN_EXTEND(), LowerSIGN_EXTEND_AVX512(), LowerTruncateVecI1(), LowerTruncatingStore(), lowerUINT_TO_FP_vXi32(), lowerV2X128VectorShuffle(), lowerV4X128VectorShuffle(), lowerV8I16GeneralSingleInputVectorShuffle(), LowerVectorCTLZ_AVX512CDI(), LowerVectorCTLZInRegLUT(), LowerVectorCTPOPBitmath(), LowerVectorCTPOPInRegLUT(), LowerVectorFP_TO_INT(), LowerVectorINT_TO_FP(), LowerVectorIntUnary(), lowerVectorShuffle(), lowerVectorShuffleAsBitBlend(), lowerVectorShuffleAsBlend(), lowerVectorShuffleAsBroadcast(), lowerVectorShuffleAsByteRotate(), lowerVectorShuffleAsPermuteAndUnpack(), lowerVectorShuffleAsSpecificZeroOrAnyExtend(), lowerVectorShuffleByMerging128BitLanes(), lowerVectorShuffleToEXPAND(), lowerVectorShuffleWithPACK(), lowerVectorShuffleWithPERMV(), lowerVectorShuffleWithPSHUFB(), lowerVectorShuffleWithUndefHalf(), lowerVSELECTtoVectorShuffle(), lowerX86FPLogicOp(), LowerZERO_EXTEND_AVX512(), matchBinaryPermuteVectorShuffle(), matchUnaryPermuteVectorShuffle(), matchUnaryVectorShuffle(), matchVectorShuffleAsShift(), materializeVectorConstant(), llvm::MipsTargetLowering::MipsTargetLowering(), NarrowVector(), performConcatVectorsCombine(), performExtendCombine(), recoverFramePointer(), reduceVMULWidth(), reorderSubVector(), scaleVectorType(), llvm::TargetLoweringBase::setJumpIsExpensive(), skipExtensionForVectorMULL(), SkipExtensionForVMULL(), splitAndLowerVectorShuffle(), tryBuildVectorReplicate(), tryExtendDUPToExtractHigh(), WidenVector(), and llvm::X86TargetLowering::X86TargetLowering().

◆ getVectorVT() [2/3]

static MVT llvm::MVT::getVectorVT ( MVT  VT,
unsigned  NumElements,
bool  IsScalable 
)
inlinestatic

Definition at line 963 of file MachineValueType.h.

References getScalableVectorVT(), and getVectorVT().

◆ getVectorVT() [3/3]

static MVT llvm::MVT::getVectorVT ( MVT  VT,
MVT::ElementCount  EC 
)
inlinestatic

◆ getVT()

MVT MVT::getVT ( Type Ty,
bool  HandleUnknown = false 
)
static

◆ integer_scalable_vector_valuetypes()

static mvt_range llvm::MVT::integer_scalable_vector_valuetypes ( )
inlinestatic

◆ integer_valuetypes()

static mvt_range llvm::MVT::integer_valuetypes ( )
inlinestatic

◆ integer_vector_valuetypes()

static mvt_range llvm::MVT::integer_vector_valuetypes ( )
inlinestatic

◆ is1024BitVector()

bool llvm::MVT::is1024BitVector ( ) const
inline

Return true if this is a 1024-bit vector type.

Definition at line 371 of file MachineValueType.h.

References v1024i1, v128i8, v16i64, v32i32, and v64i16.

Referenced by llvm::EVT::is1024BitVector().

◆ is128BitVector()

bool llvm::MVT::is128BitVector ( ) const
inline

◆ is16BitVector()

bool llvm::MVT::is16BitVector ( ) const
inline

Return true if this is a 16-bit vector type.

Definition at line 327 of file MachineValueType.h.

References v16i1, v1i16, and v2i8.

Referenced by llvm::EVT::is16BitVector().

◆ is2048BitVector()

bool llvm::MVT::is2048BitVector ( ) const
inline

Return true if this is a 1024-bit vector type.

Definition at line 378 of file MachineValueType.h.

References v128i16, v256i8, v32i64, and v64i32.

Referenced by llvm::EVT::is2048BitVector().

◆ is256BitVector()

bool llvm::MVT::is256BitVector ( ) const
inline

◆ is32BitVector()

bool llvm::MVT::is32BitVector ( ) const
inline

Return true if this is a 32-bit vector type.

Definition at line 333 of file MachineValueType.h.

References v1f32, v1i32, v2f16, v2i16, v32i1, and v4i8.

Referenced by llvm::EVT::is32BitVector().

◆ is512BitVector()

bool llvm::MVT::is512BitVector ( ) const
inline

◆ is64BitVector()

bool llvm::MVT::is64BitVector ( ) const
inline

Return true if this is a 64-bit vector type.

Definition at line 340 of file MachineValueType.h.

References v1f64, v1i64, v2f32, v2i32, v4f16, v4i16, v64i1, and v8i8.

Referenced by getCompareCC(), llvm::EVT::is64BitVector(), and tryExtendDUPToExtractHigh().

◆ isFloatingPoint()

bool llvm::MVT::isFloatingPoint ( ) const
inline

◆ isInteger()

bool llvm::MVT::isInteger ( ) const
inline

◆ isOverloaded()

bool llvm::MVT::isOverloaded ( ) const
inline

Return true if this is an overloaded type for TableGen.

Definition at line 384 of file MachineValueType.h.

References Any, fAny, iAny, iPTRAny, and vAny.

◆ isPow2VectorType()

bool llvm::MVT::isPow2VectorType ( ) const
inline

Returns true if the given vector is a power of 2.

Definition at line 391 of file MachineValueType.h.

References getVectorNumElements().

Referenced by getPow2VectorType().

◆ isScalableVector()

bool llvm::MVT::isScalableVector ( ) const
inline

Return true if this is a vector value type where the runtime length is machine dependent.

Definition at line 319 of file MachineValueType.h.

References FIRST_FP_SCALABLE_VALUETYPE, FIRST_INTEGER_SCALABLE_VALUETYPE, LAST_FP_SCALABLE_VALUETYPE, and LAST_INTEGER_SCALABLE_VALUETYPE.

Referenced by getVectorElementCount(), and llvm::EVT::isScalableVector().

◆ isScalarInteger()

bool llvm::MVT::isScalarInteger ( ) const
inline

Return true if this is an integer, not including vectors.

Definition at line 306 of file MachineValueType.h.

References FIRST_INTEGER_VALUETYPE, and LAST_INTEGER_VALUETYPE.

Referenced by llvm::EVT::isScalarInteger().

◆ isValid()

bool llvm::MVT::isValid ( ) const
inline

◆ isVector()

bool llvm::MVT::isVector ( ) const
inline

Return true if this is a vector value type.

Definition at line 312 of file MachineValueType.h.

References FIRST_VECTOR_VALUETYPE, and LAST_VECTOR_VALUETYPE.

Referenced by llvm::PPCTargetLowering::allowsMisalignedMemoryAccesses(), llvm::AMDGPUTargetLowering::analyzeFormalArgumentsCompute(), asmClobbersCTR(), CC_MipsO32_FP64(), llvm::CC_X86_32_VectorCall(), llvm::CC_X86_64_VectorCall(), combineX86ShufflesRecursively(), computeBytesPoppedByCalleeForSRet(), convertLocVTToValVT(), convertValVTToLocVT(), EmitKTEST(), llvm::CallLowering::ValueHandler::extendRegister(), getCompareCC(), getComparePred(), getCopyFromParts(), llvm::RegsForValue::getCopyFromRegs(), getCopyToPartsVector(), llvm::X86TTIImpl::getInterleavedMemoryOpCostAVX2(), getMemCmpLoad(), getPromotedVectorElementType(), llvm::MipsTargetLowering::getRegisterTypeForCallingConv(), getScalarType(), getScalarValueForVectorElement(), isCalleeLoad(), isMulPowOf2(), isSExtLoad(), isTruncWithZeroHighBitsInput(), isValueTypeInRegForCC(), llvm::EVT::isVector(), llvm::LLT::LLT(), LowerBITCAST(), LowerBITREVERSE_XOP(), LowerCTLZ(), LowerCTPOP(), LowerCTTZ(), LowerExtendedLoad(), LowerFABSorFNEG(), LowerFCOPYSIGN(), llvm::SITargetLowering::LowerFormalArguments(), lowerRegToMasks(), llvm::SITargetLowering::LowerReturn(), LowerRotate(), LowerShift(), LowerShiftParts(), llvm::AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(), LowerTruncateVecI1(), lowerUINT_TO_FP_vXi32(), lowerVectorShuffleAsBroadcast(), LowerVSETCC(), lowerX86FPLogicOp(), performConcatVectorsCombine(), pickOpcodeForVT(), processShaderInputArgs(), shouldGuaranteeTCO(), VerifyVectorType(), and llvm::WebAssemblyTargetLowering::WebAssemblyTargetLowering().

◆ operator!=()

bool llvm::MVT::operator!= ( const MVT S) const
inline

Definition at line 279 of file MachineValueType.h.

References SimpleTy.

Referenced by getVectorVT().

◆ operator<()

bool llvm::MVT::operator< ( const MVT S) const
inline

Definition at line 277 of file MachineValueType.h.

References SimpleTy.

◆ operator<=()

bool llvm::MVT::operator<= ( const MVT S) const
inline

Definition at line 281 of file MachineValueType.h.

References SimpleTy.

◆ operator==()

bool llvm::MVT::operator== ( const MVT S) const
inline

Definition at line 278 of file MachineValueType.h.

References SimpleTy.

◆ operator>()

bool llvm::MVT::operator> ( const MVT S) const
inline

Definition at line 276 of file MachineValueType.h.

References SimpleTy.

◆ operator>=()

bool llvm::MVT::operator>= ( const MVT S) const
inline

Definition at line 280 of file MachineValueType.h.

References SimpleTy.

◆ vector_valuetypes()

static mvt_range llvm::MVT::vector_valuetypes ( )
inlinestatic

Member Data Documentation

◆ SimpleTy

Definition at line 236 of file MachineValueType.h.

Referenced by AddCombineBUILD_VECTORToVPADDL(), llvm::TargetLoweringBase::AddPromotedToType(), llvm::TargetLoweringBase::addRegisterClass(), allocateSGPRTuple(), allocateVGPRTuple(), llvm::MipsSETargetLowering::allowsMisalignedMemoryAccesses(), llvm::HexagonTargetLowering::allowsMisalignedMemoryAccesses(), llvm::ARMTargetLowering::allowsMisalignedMemoryAccesses(), AnalyzeReturnValues(), llvm::CC_ARM_AAPCS_Custom_Aggregate(), CC_Lanai32_VarArg(), CC_MipsO32_FP64(), llvm::EVT::changeVectorElementTypeToInteger(), checkV64LaneV128(), combineBitcastvxi1(), computeBytesPoppedByCalleeForSRet(), countOperands(), doesIntrinsicReturnPredicate(), EnsureStackAlignment(), llvm::SelectionDAG::EVTToAPFloatSemantics(), ExpandBVWithShuffles(), FindOptimalMemOpLowering(), llvm::HexagonTargetLowering::findRepresentativeClass(), llvm::ARMTargetLowering::findRepresentativeClass(), llvm::X86TargetLowering::findRepresentativeClass(), llvm::TargetLoweringBase::findRepresentativeClass(), foldVectorXorShiftIntoCmp(), getAL(), llvm::R600RegisterInfo::getCFGStructurizerRegClass(), getCompareCC(), getComparePred(), llvm::TargetLoweringBase::getCondCodeAction(), getContiguousRangeOfSetBits(), getDivRemArgList(), llvm::EVT::getEVTString(), getExtensionTo64Bits(), GetFPLibCall(), getImplicitScaleFactor(), llvm::TargetLoweringBase::getIndexedLoadAction(), llvm::TargetLoweringBase::getIndexedStoreAction(), llvm::EVT::getIntegerVT(), llvm::TargetLoweringBase::getLoadExtAction(), llvm::TargetLoweringBase::getNumRegisters(), llvm::TargetLoweringBase::getOperationAction(), llvm::EVT::getRawBits(), llvm::TargetLoweringBase::getRegClassFor(), llvm::HexagonTargetLowering::getRegForInlineAsmConstraint(), llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::TargetLoweringBase::getRegisterType(), llvm::TargetLoweringBase::getRepRegClassCostFor(), llvm::TargetLoweringBase::getRepRegClassFor(), getScalableVectorVT(), llvm::AVRTargetLowering::getSetCCResultType(), llvm::TargetLoweringBase::getSetCCResultType(), llvm::TargetLoweringBase::getTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::getTypeAction(), llvm::EVT::getTypeForEVT(), llvm::TargetLoweringBase::getTypeToPromoteTo(), llvm::SelectionDAG::getValueType(), llvm::EVT::getVectorVT(), getVectorVT(), getX86SSEConditionCode(), is32Bit(), isDivRemLibcallAvailable(), llvm::SITargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::AArch64TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::SystemZTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::PPCTargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::X86TargetLowering::isFMAFasterThanFMulAndFAdd(), llvm::PPCTargetLowering::isFPImmLegal(), isFusableLoadOpStorePattern(), isHvxVectorType(), isLegalAddressImmediate(), llvm::ARMTargetLowering::isLegalAddressingMode(), isLegalT1AddressImmediate(), isLegalT2AddressImmediate(), llvm::ARMTargetLowering::isLegalT2ScaledAddressingMode(), isMulPowOf2(), isPerfectIncrement(), IsPTXVectorType(), isSExtLoad(), llvm::EVT::isSimple(), isSinCosLibcallAvailable(), llvm::TargetLoweringBase::isTypeLegal(), llvm::HexagonInstrInfo::isValidAutoIncImm(), isValidIndexedLoad(), llvm::XCoreTargetLowering::isZExtFree(), llvm::ARMTargetLowering::isZExtFree(), llvm::X86TargetLowering::isZExtFree(), lower128BitVectorShuffle(), lower1BitVectorShuffle(), lower256BitVectorShuffle(), lower512BitVectorShuffle(), lowerCallResult(), LowerCallResult(), LowerCMP_SWAP(), llvm::SystemZTargetLowering::LowerFormalArguments(), llvm::BPFTargetLowering::LowerOperation(), llvm::NVPTXTargetLowering::LowerOperation(), lowerRegToMasks(), lowerUINT_TO_FP_vXi32(), lowerVectorShuffleAsBlend(), lowerVSELECTtoVectorShuffle(), llvm::EVT::operator!=(), operator!=(), llvm::EVT::compareRawBits::operator()(), operator<(), operator<=(), operator==(), operator>(), operator>=(), peekThroughBitcast(), pickOpcodeForVT(), PrepareCall(), ReplaceINTRINSIC_W_CHAIN(), ReplaceLoadVector(), llvm::AVRDAGToDAGISel::selectIndexedLoad(), llvm::AVRDAGToDAGISel::selectIndexedProgMemLoad(), llvm::NVPTXDAGToDAGISel::SelectInlineAsmMemoryOperand(), llvm::TargetLoweringBase::setCondCodeAction(), llvm::TargetLoweringBase::setIndexedLoadAction(), llvm::TargetLoweringBase::setIndexedStoreAction(), llvm::TargetLoweringBase::setJumpIsExpensive(), llvm::TargetLoweringBase::setLoadExtAction(), llvm::TargetLoweringBase::setOperationAction(), llvm::TargetLoweringBase::setTruncStoreAction(), llvm::TargetLoweringBase::ValueTypeActionImpl::setTypeAction(), llvm::X86InstrInfo::shouldScheduleLoadsNear(), llvm::WebAssembly::toValType(), llvm::WebAssembly::TypeToString(), useSinCos(), VerifySDNode(), X86ChooseCmpImmediateOpcode(), and X86ChooseCmpOpcode().


The documentation for this class was generated from the following files: