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1 //===-- lib/CodeGen/GlobalISel/CallLowering.cpp - Call lowering -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 ///
9 /// \file
10 /// This file implements some simple delegations needed for call lowering.
11 ///
12 //===----------------------------------------------------------------------===//
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/IR/Instructions.h"
21 #include "llvm/IR/Module.h"
23 #define DEBUG_TYPE "call-lowering"
25 using namespace llvm;
27 void CallLowering::anchor() {}
30  MachineIRBuilder &MIRBuilder, ImmutableCallSite CS, unsigned ResReg,
31  ArrayRef<unsigned> ArgRegs, std::function<unsigned()> GetCalleeReg) const {
32  auto &DL = CS.getParent()->getParent()->getParent()->getDataLayout();
34  // First step is to marshall all the function's parameters into the correct
35  // physregs and memory locations. Gather the sequence of argument types that
36  // we'll pass to the assigner function.
37  SmallVector<ArgInfo, 8> OrigArgs;
38  unsigned i = 0;
39  unsigned NumFixedArgs = CS.getFunctionType()->getNumParams();
40  for (auto &Arg : CS.args()) {
41  ArgInfo OrigArg{ArgRegs[i], Arg->getType(), ISD::ArgFlagsTy{},
42  i < NumFixedArgs};
43  setArgFlags(OrigArg, i + AttributeList::FirstArgIndex, DL, CS);
44  // We don't currently support swifterror or swiftself args.
45  if (OrigArg.Flags.isSwiftError() || OrigArg.Flags.isSwiftSelf())
46  return false;
47  OrigArgs.push_back(OrigArg);
48  ++i;
49  }
52  if (const Function *F = CS.getCalledFunction())
53  Callee = MachineOperand::CreateGA(F, 0);
54  else
55  Callee = MachineOperand::CreateReg(GetCalleeReg(), false);
57  ArgInfo OrigRet{ResReg, CS.getType(), ISD::ArgFlagsTy{}};
58  if (!OrigRet.Ty->isVoidTy())
59  setArgFlags(OrigRet, AttributeList::ReturnIndex, DL, CS);
61  return lowerCall(MIRBuilder, CS.getCallingConv(), Callee, OrigRet, OrigArgs);
62 }
64 template <typename FuncInfoTy>
66  const DataLayout &DL,
67  const FuncInfoTy &FuncInfo) const {
68  const AttributeList &Attrs = FuncInfo.getAttributes();
69  if (Attrs.hasAttribute(OpIdx, Attribute::ZExt))
70  Arg.Flags.setZExt();
71  if (Attrs.hasAttribute(OpIdx, Attribute::SExt))
72  Arg.Flags.setSExt();
73  if (Attrs.hasAttribute(OpIdx, Attribute::InReg))
74  Arg.Flags.setInReg();
75  if (Attrs.hasAttribute(OpIdx, Attribute::StructRet))
76  Arg.Flags.setSRet();
77  if (Attrs.hasAttribute(OpIdx, Attribute::SwiftSelf))
78  Arg.Flags.setSwiftSelf();
79  if (Attrs.hasAttribute(OpIdx, Attribute::SwiftError))
80  Arg.Flags.setSwiftError();
81  if (Attrs.hasAttribute(OpIdx, Attribute::ByVal))
82  Arg.Flags.setByVal();
83  if (Attrs.hasAttribute(OpIdx, Attribute::InAlloca))
84  Arg.Flags.setInAlloca();
86  if (Arg.Flags.isByVal() || Arg.Flags.isInAlloca()) {
87  Type *ElementTy = cast<PointerType>(Arg.Ty)->getElementType();
88  Arg.Flags.setByValSize(DL.getTypeAllocSize(ElementTy));
89  // For ByVal, alignment should be passed from FE. BE will guess if
90  // this info is not there but there are cases it cannot get right.
91  unsigned FrameAlign;
92  if (FuncInfo.getParamAlignment(OpIdx - 2))
93  FrameAlign = FuncInfo.getParamAlignment(OpIdx - 2);
94  else
95  FrameAlign = getTLI()->getByValTypeAlignment(ElementTy, DL);
96  Arg.Flags.setByValAlign(FrameAlign);
97  }
98  if (Attrs.hasAttribute(OpIdx, Attribute::Nest))
99  Arg.Flags.setNest();
101 }
103 template void
104 CallLowering::setArgFlags<Function>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
105  const DataLayout &DL,
106  const Function &FuncInfo) const;
108 template void
109 CallLowering::setArgFlags<CallInst>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
110  const DataLayout &DL,
111  const CallInst &FuncInfo) const;
115  ValueHandler &Handler) const {
116  MachineFunction &MF = MIRBuilder.getMF();
117  const Function &F = MF.getFunction();
118  const DataLayout &DL = F.getParent()->getDataLayout();
121  CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
123  unsigned NumArgs = Args.size();
124  for (unsigned i = 0; i != NumArgs; ++i) {
125  MVT CurVT = MVT::getVT(Args[i].Ty);
126  if (Handler.assignArg(i, CurVT, CurVT, CCValAssign::Full, Args[i], CCInfo)) {
127  // Try to use the register type if we couldn't assign the VT.
128  if (!Handler.isArgumentHandler() || !CurVT.isValid())
129  return false;
130  CurVT = TLI->getRegisterTypeForCallingConv(
131  F.getContext(), F.getCallingConv(), EVT(CurVT));
132  if (Handler.assignArg(i, CurVT, CurVT, CCValAssign::Full, Args[i], CCInfo))
133  return false;
134  }
135  }
137  for (unsigned i = 0, e = Args.size(), j = 0; i != e; ++i, ++j) {
138  assert(j < ArgLocs.size() && "Skipped too many arg locs");
140  CCValAssign &VA = ArgLocs[j];
141  assert(VA.getValNo() == i && "Location doesn't correspond to current arg");
143  if (VA.needsCustom()) {
144  j += Handler.assignCustomValue(Args[i], makeArrayRef(ArgLocs).slice(j));
145  continue;
146  }
148  if (VA.isRegLoc()) {
149  MVT OrigVT = MVT::getVT(Args[i].Ty);
150  MVT VAVT = VA.getValVT();
151  if (Handler.isArgumentHandler() && VAVT != OrigVT) {
152  if (VAVT.getSizeInBits() < OrigVT.getSizeInBits())
153  return false; // Can't handle this type of arg yet.
154  const LLT VATy(VAVT);
155  unsigned NewReg =
156  MIRBuilder.getMRI()->createGenericVirtualRegister(VATy);
157  Handler.assignValueToReg(NewReg, VA.getLocReg(), VA);
158  // If it's a vector type, we either need to truncate the elements
159  // or do an unmerge to get the lower block of elements.
160  if (VATy.isVector() &&
161  VATy.getNumElements() > OrigVT.getVectorNumElements()) {
162  const LLT OrigTy(OrigVT);
163  // Just handle the case where the VA type is 2 * original type.
164  if (VATy.getNumElements() != OrigVT.getVectorNumElements() * 2) {
165  LLVM_DEBUG(dbgs()
166  << "Incoming promoted vector arg has too many elts");
167  return false;
168  }
169  auto Unmerge = MIRBuilder.buildUnmerge({OrigTy, OrigTy}, {NewReg});
170  MIRBuilder.buildCopy(Args[i].Reg, Unmerge.getReg(0));
171  } else {
172  MIRBuilder.buildTrunc(Args[i].Reg, {NewReg}).getReg(0);
173  }
174  } else {
175  Handler.assignValueToReg(Args[i].Reg, VA.getLocReg(), VA);
176  }
177  } else if (VA.isMemLoc()) {
178  MVT VT = MVT::getVT(Args[i].Ty);
179  unsigned Size = VT == MVT::iPTR ? DL.getPointerSize()
180  : alignTo(VT.getSizeInBits(), 8) / 8;
181  unsigned Offset = VA.getLocMemOffset();
182  MachinePointerInfo MPO;
183  unsigned StackAddr = Handler.getStackAddress(Size, Offset, MPO);
184  Handler.assignValueToAddress(Args[i].Reg, StackAddr, Size, MPO, VA);
185  } else {
186  // FIXME: Support byvals and other weirdness
187  return false;
188  }
189  }
190  return true;
191 }
194  CCValAssign &VA) {
195  LLT LocTy{VA.getLocVT()};
196  if (LocTy.getSizeInBits() == MRI.getType(ValReg).getSizeInBits())
197  return ValReg;
198  switch (VA.getLocInfo()) {
199  default: break;
200  case CCValAssign::Full:
201  case CCValAssign::BCvt:
202  // FIXME: bitconverting between vector types may or may not be a
203  // nop in big-endian situations.
204  return ValReg;
205  case CCValAssign::AExt: {
206  auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg);
207  return MIB->getOperand(0).getReg();
208  }
209  case CCValAssign::SExt: {
210  unsigned NewReg = MRI.createGenericVirtualRegister(LocTy);
211  MIRBuilder.buildSExt(NewReg, ValReg);
212  return NewReg;
213  }
214  case CCValAssign::ZExt: {
215  unsigned NewReg = MRI.createGenericVirtualRegister(LocTy);
216  MIRBuilder.buildZExt(NewReg, ValReg);
217  return NewReg;
218  }
219  }
220  llvm_unreachable("unable to extend register");
221 }
223 void CallLowering::ValueHandler::anchor() {}
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:176
void setByValAlign(unsigned A)
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:110
MachineInstrBuilder buildUnmerge(ArrayRef< LLT > Res, const SrcOp &Op)
Build and insert Res0, ...
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getReg() const
getReg - Returns the register number.
This class represents a function call, abstracting a target machine&#39;s calling convention.
unsigned Reg
unsigned getVectorNumElements() const
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:684
FunTy * getCalledFunction() const
Return the function being called if this is a direct call, otherwise return null (if it&#39;s an indirect...
Definition: CallSite.h:111
virtual unsigned getByValTypeAlignment(Type *Ty, const DataLayout &DL) const
Return the desired alignment for ByVal or InAlloca aggregate function arguments in the caller paramet...
bool hasAttribute(unsigned Index, Attribute::AttrKind Kind) const
Return true if the attribute exists at the given index.
bool isValid() const
Return true if this is a valid simple valuetype.
FunctionType * getFunctionType() const
Definition: CallSite.h:328
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
CallingConv::ID getCallingConv() const
Get the calling convention of the call.
Definition: CallSite.h:320
bool isVector() const
bool handleAssignments(MachineIRBuilder &MIRBuilder, ArrayRef< ArgInfo > Args, ValueHandler &Handler) const
Invoke Handler::assignArg on each of the given Args and then use Callback to move them to the assigne...
const TargetLowering * getTLI() const
Getter for generic TargetLowering class.
Definition: CallLowering.h:125
MachineInstrBuilder buildAnyExt(const DstOp &Res, const SrcOp &Op)
Build and insert Res = G_ANYEXT Op0.
const DataLayout & getDataLayout() const
Get the data layout for the module&#39;s target platform.
Definition: Module.cpp:369
ArrayRef< T > makeArrayRef(const T &OneElt)
Construct an ArrayRef from a single element.
Definition: ArrayRef.h:450
virtual MVT getRegisterTypeForCallingConv(LLVMContext &Context, CallingConv::ID CC, EVT VT) const
Certain combinations of ABIs, Targets and features require that types are legal for some operations a...
void setByValSize(unsigned S)
Type * getType() const
Return the type of the instruction that generated this call site.
Definition: CallSite.h:272
LocInfo getLocInfo() const
unsigned getSizeInBits() const
MachineFunction & getMF()
Getter for the function we currently build.
constexpr char Attrs[]
Key for Kernel::Metadata::mAttrs.
void setOrigAlign(unsigned A)
MachineInstrBuilder buildSExt(const DstOp &Res, const SrcOp &Op)
Build and insert Res = G_SEXT Op.
MachineRegisterInfo * getMRI()
Getter for MRI.
unsigned const MachineRegisterInfo * MRI
Machine Value Type.
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:45
virtual bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, const MachineOperand &Callee, const ArgInfo &OrigRet, ArrayRef< ArgInfo > OrigArgs) const
This hook must be implemented to lower the given call instruction, including argument and return valu...
Definition: CallLowering.h:195
virtual void assignValueToReg(unsigned ValVReg, unsigned PhysReg, CCValAssign &VA)=0
The specified value has been assigned to a physical register, handle the appropriate COPY (either to ...
MachineInstrBuilder buildZExt(const DstOp &Res, const SrcOp &Op)
Build and insert Res = G_ZEXT Op.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:148
unsigned getPointerSize(unsigned AS=0) const
Layout pointer size FIXME: The defaults need to be removed once all of the backends/clients are updat...
Definition: DataLayout.cpp:648
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:138
Helper class to build MachineInstr.
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
static MVT getVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
Definition: ValueTypes.cpp:288
void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL, const FuncInfoTy &FuncInfo) const
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:192
static unsigned NumFixedArgs
Extended Value Type.
Definition: ValueTypes.h:33
MachineInstrBuilder buildCopy(const DstOp &Res, const SrcOp &Op)
Build and insert Res = COPY Op.
MachineInstrBuilder buildTrunc(const DstOp &Res, const SrcOp &Op)
Build and insert Res = G_TRUNC Op.
Argument handling is mostly uniform between the four places that make these decisions: function forma...
Definition: CallLowering.h:64
This class contains a discriminated union of information about pointers in memory operands...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
iterator_range< IterTy > args() const
Definition: CallSite.h:222
virtual unsigned assignCustomValue(const ArgInfo &Arg, ArrayRef< CCValAssign > VAs)
Handle custom values, which may be passed into one or more of VAs.
Definition: CallLowering.h:100
unsigned createGenericVirtualRegister(LLT Ty, StringRef Name="")
Create and return a new generic virtual register with low-level type Ty.
CCState - This class holds information needed while lowering arguments and return values...
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:212
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:841
Module.h This file contains the declarations for the Module class.
CCValAssign - Represent assignment of one arg/retval to a location.
unsigned getABITypeAlignment(Type *Ty) const
Returns the minimum ABI-required alignment for the specified type.
Definition: DataLayout.cpp:749
const Function & getFunction() const
Return the LLVM function that this machine code represents.
This file declares the MachineIRBuilder class.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
amdgpu Simplify well known AMD library false FunctionCallee Callee
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
BBTy * getParent() const
Get the basic block containing the call site.
Definition: CallSite.h:101
uint64_t getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:461
virtual unsigned getStackAddress(uint64_t Size, int64_t Offset, MachinePointerInfo &MPO)=0
Materialize a VReg containing the address of the specified stack-based object.
virtual void assignValueToAddress(unsigned ValVReg, unsigned Addr, uint64_t Size, MachinePointerInfo &MPO, CCValAssign &VA)=0
The specified value has been assigned to a stack location.
Establish a view to a call site for examination.
Definition: CallSite.h:892
const Function * getParent() const
Return the enclosing method, or null if none.
Definition: BasicBlock.h:106
static MachineOperand CreateImm(int64_t Val)
virtual bool isArgumentHandler() const
Returns true if the handler is dealing with formal arguments, not with return values etc...
Definition: CallLowering.h:73
virtual bool assignArg(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, const ArgInfo &Info, CCState &State)
Definition: CallLowering.h:109
uint32_t Size
Definition: Profile.cpp:46
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
uint16_t getNumElements() const
Returns the number of elements in a vector LLT.
This file describes how to lower LLVM calls to machine code calls.
print Print MemDeps of function
unsigned extendRegister(unsigned ValReg, CCValAssign &VA)
#define LLVM_DEBUG(X)
Definition: Debug.h:122
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
This file describes how to lower LLVM code to machine code.