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CallingConvLower.h
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1 //===- llvm/CallingConvLower.h - Calling Conventions ------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the CCState and CCValAssign classes, used for lowering
10 // and implementing calling conventions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
15 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
16 
17 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/IR/CallingConv.h"
22 #include "llvm/MC/MCRegisterInfo.h"
23 
24 namespace llvm {
25 
26 class CCState;
27 class MVT;
28 class TargetMachine;
29 class TargetRegisterInfo;
30 
31 /// CCValAssign - Represent assignment of one arg/retval to a location.
32 class CCValAssign {
33 public:
34  enum LocInfo {
35  Full, // The value fills the full location.
36  SExt, // The value is sign extended in the location.
37  ZExt, // The value is zero extended in the location.
38  AExt, // The value is extended with undefined upper bits.
39  SExtUpper, // The value is in the upper bits of the location and should be
40  // sign extended when retrieved.
41  ZExtUpper, // The value is in the upper bits of the location and should be
42  // zero extended when retrieved.
43  AExtUpper, // The value is in the upper bits of the location and should be
44  // extended with undefined upper bits when retrieved.
45  BCvt, // The value is bit-converted in the location.
46  VExt, // The value is vector-widened in the location.
47  // FIXME: Not implemented yet. Code that uses AExt to mean
48  // vector-widen should be fixed to use VExt instead.
49  FPExt, // The floating-point value is fp-extended in the location.
50  Indirect // The location contains pointer to the value.
51  // TODO: a subset of the value is in the location.
52  };
53 
54 private:
55  /// ValNo - This is the value number begin assigned (e.g. an argument number).
56  unsigned ValNo;
57 
58  /// Loc is either a stack offset or a register number.
59  unsigned Loc;
60 
61  /// isMem - True if this is a memory loc, false if it is a register loc.
62  unsigned isMem : 1;
63 
64  /// isCustom - True if this arg/retval requires special handling.
65  unsigned isCustom : 1;
66 
67  /// Information about how the value is assigned.
68  LocInfo HTP : 6;
69 
70  /// ValVT - The type of the value being assigned.
71  MVT ValVT;
72 
73  /// LocVT - The type of the location being assigned to.
74  MVT LocVT;
75 public:
76 
77  static CCValAssign getReg(unsigned ValNo, MVT ValVT,
78  unsigned RegNo, MVT LocVT,
79  LocInfo HTP) {
81  Ret.ValNo = ValNo;
82  Ret.Loc = RegNo;
83  Ret.isMem = false;
84  Ret.isCustom = false;
85  Ret.HTP = HTP;
86  Ret.ValVT = ValVT;
87  Ret.LocVT = LocVT;
88  return Ret;
89  }
90 
91  static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
92  unsigned RegNo, MVT LocVT,
93  LocInfo HTP) {
95  Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
96  Ret.isCustom = true;
97  return Ret;
98  }
99 
100  static CCValAssign getMem(unsigned ValNo, MVT ValVT,
101  unsigned Offset, MVT LocVT,
102  LocInfo HTP) {
104  Ret.ValNo = ValNo;
105  Ret.Loc = Offset;
106  Ret.isMem = true;
107  Ret.isCustom = false;
108  Ret.HTP = HTP;
109  Ret.ValVT = ValVT;
110  Ret.LocVT = LocVT;
111  return Ret;
112  }
113 
114  static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
115  unsigned Offset, MVT LocVT,
116  LocInfo HTP) {
118  Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
119  Ret.isCustom = true;
120  return Ret;
121  }
122 
123  // There is no need to differentiate between a pending CCValAssign and other
124  // kinds, as they are stored in a different list.
125  static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
126  LocInfo HTP, unsigned ExtraInfo = 0) {
127  return getReg(ValNo, ValVT, ExtraInfo, LocVT, HTP);
128  }
129 
130  void convertToReg(unsigned RegNo) {
131  Loc = RegNo;
132  isMem = false;
133  }
134 
135  void convertToMem(unsigned Offset) {
136  Loc = Offset;
137  isMem = true;
138  }
139 
140  unsigned getValNo() const { return ValNo; }
141  MVT getValVT() const { return ValVT; }
142 
143  bool isRegLoc() const { return !isMem; }
144  bool isMemLoc() const { return isMem; }
145 
146  bool needsCustom() const { return isCustom; }
147 
148  unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
149  unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
150  unsigned getExtraInfo() const { return Loc; }
151  MVT getLocVT() const { return LocVT; }
152 
153  LocInfo getLocInfo() const { return HTP; }
154  bool isExtInLoc() const {
155  return (HTP == AExt || HTP == SExt || HTP == ZExt);
156  }
157 
158  bool isUpperBitsInLoc() const {
159  return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
160  }
161 };
162 
163 /// Describes a register that needs to be forwarded from the prologue to a
164 /// musttail call.
166  ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT)
167  : VReg(VReg), PReg(PReg), VT(VT) {}
168  unsigned VReg;
171 };
172 
173 /// CCAssignFn - This function assigns a location for Val, updating State to
174 /// reflect the change. It returns 'true' if it failed to handle Val.
175 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
177  ISD::ArgFlagsTy ArgFlags, CCState &State);
178 
179 /// CCCustomFn - This function assigns a location for Val, possibly updating
180 /// all args to reflect changes and indicates if it handled it. It must set
181 /// isCustom if it handles the arg and returns true.
182 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
184  ISD::ArgFlagsTy &ArgFlags, CCState &State);
185 
186 /// CCState - This class holds information needed while lowering arguments and
187 /// return values. It captures which registers are already assigned and which
188 /// stack slots are used. It provides accessors to allocate these values.
189 class CCState {
190 private:
192  bool IsVarArg;
193  bool AnalyzingMustTailForwardedRegs = false;
194  MachineFunction &MF;
195  const TargetRegisterInfo &TRI;
198 
199  unsigned StackOffset;
200  unsigned MaxStackArgAlign;
201  SmallVector<uint32_t, 16> UsedRegs;
202  SmallVector<CCValAssign, 4> PendingLocs;
203  SmallVector<ISD::ArgFlagsTy, 4> PendingArgFlags;
204 
205  // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
206  //
207  // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
208  // tracking.
209  // Or, in another words it tracks byval parameters that are stored in
210  // general purpose registers.
211  //
212  // For 4 byte stack alignment,
213  // instance index means byval parameter number in formal
214  // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
215  // then, for function "foo":
216  //
217  // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
218  //
219  // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
220  // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
221  //
222  // In case of 8 bytes stack alignment,
223  // ByValRegs may also contain information about wasted registers.
224  // In function shown above, r3 would be wasted according to AAPCS rules.
225  // And in that case ByValRegs[1].Waste would be "true".
226  // ByValRegs vector size still would be 2,
227  // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
228  //
229  // Supposed use-case for this collection:
230  // 1. Initially ByValRegs is empty, InRegsParamsProcessed is 0.
231  // 2. HandleByVal fillups ByValRegs.
232  // 3. Argument analysis (LowerFormatArguments, for example). After
233  // some byval argument was analyzed, InRegsParamsProcessed is increased.
234  struct ByValInfo {
235  ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
236  Begin(B), End(E), Waste(IsWaste) {}
237  // First register allocated for current parameter.
238  unsigned Begin;
239 
240  // First after last register allocated for current parameter.
241  unsigned End;
242 
243  // Means that current range of registers doesn't belong to any
244  // parameters. It was wasted due to stack alignment rules.
245  // For more information see:
246  // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
247  bool Waste;
248  };
249  SmallVector<ByValInfo, 4 > ByValRegs;
250 
251  // InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
252  // during argument analysis.
253  unsigned InRegsParamsProcessed;
254 
255 public:
256  CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
258 
259  void addLoc(const CCValAssign &V) {
260  Locs.push_back(V);
261  }
262 
263  LLVMContext &getContext() const { return Context; }
264  MachineFunction &getMachineFunction() const { return MF; }
266  bool isVarArg() const { return IsVarArg; }
267 
268  /// getNextStackOffset - Return the next stack offset such that all stack
269  /// slots satisfy their alignment requirements.
270  unsigned getNextStackOffset() const {
271  return StackOffset;
272  }
273 
274  /// getAlignedCallFrameSize - Return the size of the call frame needed to
275  /// be able to store all arguments and such that the alignment requirement
276  /// of each of the arguments is satisfied.
277  unsigned getAlignedCallFrameSize() const {
278  return alignTo(StackOffset, MaxStackArgAlign);
279  }
280 
281  /// isAllocated - Return true if the specified register (or an alias) is
282  /// allocated.
283  bool isAllocated(unsigned Reg) const {
284  return UsedRegs[Reg/32] & (1 << (Reg&31));
285  }
286 
287  /// AnalyzeFormalArguments - Analyze an array of argument values,
288  /// incorporating info about the formals into this state.
289  void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
290  CCAssignFn Fn);
291 
292  /// The function will invoke AnalyzeFormalArguments.
294  CCAssignFn Fn) {
295  AnalyzeFormalArguments(Ins, Fn);
296  }
297 
298  /// AnalyzeReturn - Analyze the returned values of a return,
299  /// incorporating info about the result values into this state.
300  void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
301  CCAssignFn Fn);
302 
303  /// CheckReturn - Analyze the return values of a function, returning
304  /// true if the return can be performed without sret-demotion, and
305  /// false otherwise.
306  bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
307  CCAssignFn Fn);
308 
309  /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
310  /// incorporating info about the passed values into this state.
311  void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
312  CCAssignFn Fn);
313 
314  /// AnalyzeCallOperands - Same as above except it takes vectors of types
315  /// and argument flags.
316  void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
318  CCAssignFn Fn);
319 
320  /// The function will invoke AnalyzeCallOperands.
322  CCAssignFn Fn) {
323  AnalyzeCallOperands(Outs, Fn);
324  }
325 
326  /// AnalyzeCallResult - Analyze the return values of a call,
327  /// incorporating info about the passed values into this state.
328  void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
329  CCAssignFn Fn);
330 
331  /// A shadow allocated register is a register that was allocated
332  /// but wasn't added to the location list (Locs).
333  /// \returns true if the register was allocated as shadow or false otherwise.
334  bool IsShadowAllocatedReg(unsigned Reg) const;
335 
336  /// AnalyzeCallResult - Same as above except it's specialized for calls which
337  /// produce a single value.
338  void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
339 
340  /// getFirstUnallocated - Return the index of the first unallocated register
341  /// in the set, or Regs.size() if they are all allocated.
343  for (unsigned i = 0; i < Regs.size(); ++i)
344  if (!isAllocated(Regs[i]))
345  return i;
346  return Regs.size();
347  }
348 
349  /// AllocateReg - Attempt to allocate one register. If it is not available,
350  /// return zero. Otherwise, return the register, marking it and any aliases
351  /// as allocated.
352  unsigned AllocateReg(unsigned Reg) {
353  if (isAllocated(Reg)) return 0;
354  MarkAllocated(Reg);
355  return Reg;
356  }
357 
358  /// Version of AllocateReg with extra register to be shadowed.
359  unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
360  if (isAllocated(Reg)) return 0;
361  MarkAllocated(Reg);
362  MarkAllocated(ShadowReg);
363  return Reg;
364  }
365 
366  /// AllocateReg - Attempt to allocate one of the specified registers. If none
367  /// are available, return zero. Otherwise, return the first one available,
368  /// marking it and any aliases as allocated.
370  unsigned FirstUnalloc = getFirstUnallocated(Regs);
371  if (FirstUnalloc == Regs.size())
372  return 0; // Didn't find the reg.
373 
374  // Mark the register and any aliases as allocated.
375  unsigned Reg = Regs[FirstUnalloc];
376  MarkAllocated(Reg);
377  return Reg;
378  }
379 
380  /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
381  /// registers. If this is not possible, return zero. Otherwise, return the first
382  /// register of the block that were allocated, marking the entire block as allocated.
383  unsigned AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
384  if (RegsRequired > Regs.size())
385  return 0;
386 
387  for (unsigned StartIdx = 0; StartIdx <= Regs.size() - RegsRequired;
388  ++StartIdx) {
389  bool BlockAvailable = true;
390  // Check for already-allocated regs in this block
391  for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
392  if (isAllocated(Regs[StartIdx + BlockIdx])) {
393  BlockAvailable = false;
394  break;
395  }
396  }
397  if (BlockAvailable) {
398  // Mark the entire block as allocated
399  for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
400  MarkAllocated(Regs[StartIdx + BlockIdx]);
401  }
402  return Regs[StartIdx];
403  }
404  }
405  // No block was available
406  return 0;
407  }
408 
409  /// Version of AllocateReg with list of registers to be shadowed.
410  unsigned AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
411  unsigned FirstUnalloc = getFirstUnallocated(Regs);
412  if (FirstUnalloc == Regs.size())
413  return 0; // Didn't find the reg.
414 
415  // Mark the register and any aliases as allocated.
416  unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
417  MarkAllocated(Reg);
418  MarkAllocated(ShadowReg);
419  return Reg;
420  }
421 
422  /// AllocateStack - Allocate a chunk of stack space with the specified size
423  /// and alignment.
424  unsigned AllocateStack(unsigned Size, unsigned Align) {
425  assert(Align && ((Align - 1) & Align) == 0); // Align is power of 2.
426  StackOffset = alignTo(StackOffset, Align);
427  unsigned Result = StackOffset;
428  StackOffset += Size;
429  MaxStackArgAlign = std::max(Align, MaxStackArgAlign);
430  ensureMaxAlignment(Align);
431  return Result;
432  }
433 
434  void ensureMaxAlignment(unsigned Align) {
435  if (!AnalyzingMustTailForwardedRegs)
436  MF.getFrameInfo().ensureMaxAlignment(Align);
437  }
438 
439  /// Version of AllocateStack with extra register to be shadowed.
440  unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
441  MarkAllocated(ShadowReg);
442  return AllocateStack(Size, Align);
443  }
444 
445  /// Version of AllocateStack with list of extra registers to be shadowed.
446  /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
447  unsigned AllocateStack(unsigned Size, unsigned Align,
448  ArrayRef<MCPhysReg> ShadowRegs) {
449  for (unsigned i = 0; i < ShadowRegs.size(); ++i)
450  MarkAllocated(ShadowRegs[i]);
451  return AllocateStack(Size, Align);
452  }
453 
454  // HandleByVal - Allocate a stack slot large enough to pass an argument by
455  // value. The size and alignment information of the argument is encoded in its
456  // parameter attribute.
457  void HandleByVal(unsigned ValNo, MVT ValVT,
459  int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
460 
461  // Returns count of byval arguments that are to be stored (even partly)
462  // in registers.
463  unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
464 
465  // Returns count of byval in-regs arguments proceed.
466  unsigned getInRegsParamsProcessed() const { return InRegsParamsProcessed; }
467 
468  // Get information about N-th byval parameter that is stored in registers.
469  // Here "ByValParamIndex" is N.
470  void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
471  unsigned& BeginReg, unsigned& EndReg) const {
472  assert(InRegsParamRecordIndex < ByValRegs.size() &&
473  "Wrong ByVal parameter index");
474 
475  const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
476  BeginReg = info.Begin;
477  EndReg = info.End;
478  }
479 
480  // Add information about parameter that is kept in registers.
481  void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
482  ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
483  }
484 
485  // Goes either to next byval parameter (excluding "waste" record), or
486  // to the end of collection.
487  // Returns false, if end is reached.
489  unsigned e = ByValRegs.size();
490  if (InRegsParamsProcessed < e)
491  ++InRegsParamsProcessed;
492  return InRegsParamsProcessed < e;
493  }
494 
495  // Clear byval registers tracking info.
497  InRegsParamsProcessed = 0;
498  ByValRegs.clear();
499  }
500 
501  // Rewind byval registers tracking info.
503  InRegsParamsProcessed = 0;
504  }
505 
506  // Get list of pending assignments
508  return PendingLocs;
509  }
510 
511  // Get a list of argflags for pending assignments.
513  return PendingArgFlags;
514  }
515 
516  /// Compute the remaining unused register parameters that would be used for
517  /// the given value type. This is useful when varargs are passed in the
518  /// registers that normal prototyped parameters would be passed in, or for
519  /// implementing perfect forwarding.
520  void getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT,
521  CCAssignFn Fn);
522 
523  /// Compute the set of registers that need to be preserved and forwarded to
524  /// any musttail calls.
525  void analyzeMustTailForwardedRegisters(
526  SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
527  CCAssignFn Fn);
528 
529  /// Returns true if the results of the two calling conventions are compatible.
530  /// This is usually part of the check for tailcall eligibility.
531  static bool resultsCompatible(CallingConv::ID CalleeCC,
532  CallingConv::ID CallerCC, MachineFunction &MF,
533  LLVMContext &C,
535  CCAssignFn CalleeFn, CCAssignFn CallerFn);
536 
537  /// The function runs an additional analysis pass over function arguments.
538  /// It will mark each argument with the attribute flag SecArgPass.
539  /// After running, it will sort the locs list.
540  template <class T>
542  CCAssignFn Fn) {
543  unsigned NumFirstPassLocs = Locs.size();
544 
545  /// Creates similar argument list to \p Args in which each argument is
546  /// marked using SecArgPass flag.
547  SmallVector<T, 16> SecPassArg;
548  // SmallVector<ISD::InputArg, 16> SecPassArg;
549  for (auto Arg : Args) {
550  Arg.Flags.setSecArgPass();
551  SecPassArg.push_back(Arg);
552  }
553 
554  // Run the second argument pass
555  AnalyzeArguments(SecPassArg, Fn);
556 
557  // Sort the locations of the arguments according to their original position.
558  SmallVector<CCValAssign, 16> TmpArgLocs;
559  std::swap(TmpArgLocs, Locs);
560  auto B = TmpArgLocs.begin(), E = TmpArgLocs.end();
561  std::merge(B, B + NumFirstPassLocs, B + NumFirstPassLocs, E,
562  std::back_inserter(Locs),
563  [](const CCValAssign &A, const CCValAssign &B) -> bool {
564  return A.getValNo() < B.getValNo();
565  });
566  }
567 
568 private:
569  /// MarkAllocated - Mark a register and all of its aliases as allocated.
570  void MarkAllocated(unsigned Reg);
571 };
572 
573 } // end namespace llvm
574 
575 #endif // LLVM_CODEGEN_CALLINGCONVLOWER_H
uint64_t CallInst * C
unsigned getFirstUnallocated(ArrayRef< MCPhysReg > Regs) const
getFirstUnallocated - Return the index of the first unallocated register in the set, or Regs.size() if they are all allocated.
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT, LocInfo HTP, unsigned ExtraInfo=0)
static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP)
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
LLVMContext & Context
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getExtraInfo() const
Describes a register that needs to be forwarded from the prologue to a musttail call.
bool isAllocated(unsigned Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
void AnalyzeArgumentsSecondPass(const SmallVectorImpl< T > &Args, CCAssignFn Fn)
The function runs an additional analysis pass over function arguments.
unsigned Reg
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change...
unsigned getValNo() const
unsigned const TargetRegisterInfo * TRI
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:684
MachineFunction & getMachineFunction() const
bool isUpperBitsInLoc() const
bool isMemLoc() const
bool needsCustom() const
void convertToMem(unsigned Offset)
unsigned AllocateReg(unsigned Reg, unsigned ShadowReg)
Version of AllocateReg with extra register to be shadowed.
bool CCCustomFn(unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo, ISD::ArgFlagsTy &ArgFlags, CCState &State)
CCCustomFn - This function assigns a location for Val, possibly updating all args to reflect changes ...
unsigned AllocateReg(ArrayRef< MCPhysReg > Regs)
AllocateReg - Attempt to allocate one of the specified registers.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
void addLoc(const CCValAssign &V)
LocInfo getLocInfo() const
unsigned getNextStackOffset() const
getNextStackOffset - Return the next stack offset such that all stack slots satisfy their alignment r...
SmallVectorImpl< CCValAssign > & getPendingLocs()
void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd)
SmallVectorImpl< ISD::ArgFlagsTy > & getPendingArgFlags()
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
static CCValAssign getReg(unsigned ValNo, MVT ValVT, unsigned RegNo, MVT LocVT, LocInfo HTP)
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
Definition: MathExtras.h:609
unsigned AllocateReg(ArrayRef< MCPhysReg > Regs, const MCPhysReg *ShadowRegs)
Version of AllocateReg with list of registers to be shadowed.
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT)
Machine Value Type.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:148
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
LLVMContext & getContext() const
amdgpu Simplify well known AMD library false FunctionCallee Value * Arg
lazy value info
unsigned getInRegsParamsProcessed() const
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
CCState - This class holds information needed while lowering arguments and return values...
void AnalyzeArguments(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
The function will invoke AnalyzeCallOperands.
bool isVarArg() const
unsigned AllocateRegBlock(ArrayRef< MCPhysReg > Regs, unsigned RegsRequired)
AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive registers.
CCValAssign - Represent assignment of one arg/retval to a location.
CallingConv::ID getCallingConv() const
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:940
unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg)
Version of AllocateStack with extra register to be shadowed.
void ensureMaxAlignment(unsigned Align)
Make sure the function is at least Align bytes aligned.
unsigned getLocMemOffset() const
unsigned AllocateStack(unsigned Size, unsigned Align, ArrayRef< MCPhysReg > ShadowRegs)
Version of AllocateStack with list of extra registers to be shadowed.
static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
static void AnalyzeArguments(CCState &State, SmallVectorImpl< CCValAssign > &ArgLocs, const SmallVectorImpl< ArgT > &Args)
Analyze incoming and outgoing function arguments.
uint32_t Size
Definition: Profile.cpp:46
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
void AnalyzeArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
The function will invoke AnalyzeFormalArguments.
unsigned getInRegsParamsCount() const
unsigned getAlignedCallFrameSize() const
getAlignedCallFrameSize - Return the size of the call frame needed to be able to store all arguments ...
bool isRegLoc() const
void clearByValRegsInfo()
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void getInRegsParamInfo(unsigned InRegsParamRecordIndex, unsigned &BeginReg, unsigned &EndReg) const
void rewindByValRegsInfo()
unsigned getLocReg() const
bool isExtInLoc() const
unsigned AllocateReg(unsigned Reg)
AllocateReg - Attempt to allocate one register.
unsigned AllocateStack(unsigned Size, unsigned Align)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
void convertToReg(unsigned RegNo)
void ensureMaxAlignment(unsigned Align)