LLVM  7.0.0svn
MIRPrinter.cpp
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1 //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the class that prints out the LLVM IR and machine
11 // functions using the MIR serialization format.
12 //
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/ADT/None.h"
18 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/ADT/SmallPtrSet.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringRef.h"
23 #include "llvm/ADT/Twine.h"
39 #include "llvm/IR/BasicBlock.h"
40 #include "llvm/IR/Constants.h"
41 #include "llvm/IR/DebugInfo.h"
42 #include "llvm/IR/DebugLoc.h"
43 #include "llvm/IR/Function.h"
44 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/InstrTypes.h"
47 #include "llvm/IR/Instructions.h"
48 #include "llvm/IR/Intrinsics.h"
49 #include "llvm/IR/Module.h"
51 #include "llvm/IR/Value.h"
52 #include "llvm/MC/LaneBitmask.h"
53 #include "llvm/MC/MCDwarf.h"
54 #include "llvm/MC/MCSymbol.h"
57 #include "llvm/Support/Casting.h"
60 #include "llvm/Support/Format.h"
66 #include <algorithm>
67 #include <cassert>
68 #include <cinttypes>
69 #include <cstdint>
70 #include <iterator>
71 #include <string>
72 #include <utility>
73 #include <vector>
74 
75 using namespace llvm;
76 
78  "simplify-mir", cl::Hidden,
79  cl::desc("Leave out unnecessary information when printing MIR"));
80 
81 namespace {
82 
83 /// This structure describes how to print out stack object references.
84 struct FrameIndexOperand {
85  std::string Name;
86  unsigned ID;
87  bool IsFixed;
88 
89  FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
90  : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
91 
92  /// Return an ordinary stack object reference.
93  static FrameIndexOperand create(StringRef Name, unsigned ID) {
94  return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
95  }
96 
97  /// Return a fixed stack object reference.
98  static FrameIndexOperand createFixed(unsigned ID) {
99  return FrameIndexOperand("", ID, /*IsFixed=*/true);
100  }
101 };
102 
103 } // end anonymous namespace
104 
105 namespace llvm {
106 
107 /// This class prints out the machine functions using the MIR serialization
108 /// format.
109 class MIRPrinter {
110  raw_ostream &OS;
111  DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
112  /// Maps from stack object indices to operand indices which will be used when
113  /// printing frame index machine operands.
114  DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
115 
116 public:
117  MIRPrinter(raw_ostream &OS) : OS(OS) {}
118 
119  void print(const MachineFunction &MF);
120 
121  void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
122  const TargetRegisterInfo *TRI);
123  void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
124  const MachineFrameInfo &MFI);
125  void convert(yaml::MachineFunction &MF,
127  void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
128  const MachineJumpTableInfo &JTI);
129  void convertStackObjects(yaml::MachineFunction &YMF,
130  const MachineFunction &MF, ModuleSlotTracker &MST);
131 
132 private:
133  void initRegisterMaskIds(const MachineFunction &MF);
134 };
135 
136 /// This class prints out the machine instructions using the MIR serialization
137 /// format.
138 class MIPrinter {
139  raw_ostream &OS;
140  ModuleSlotTracker &MST;
141  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
142  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
143  /// Synchronization scope names registered with LLVMContext.
145 
146  bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
147  bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
148 
149 public:
151  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
152  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
153  : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
154  StackObjectOperandMapping(StackObjectOperandMapping) {}
155 
156  void print(const MachineBasicBlock &MBB);
157 
158  void print(const MachineInstr &MI);
159  void printStackObjectReference(int FrameIndex);
160  void print(const MachineInstr &MI, unsigned OpIdx,
161  const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
162  LLT TypeToPrint, bool PrintDef = true);
163 };
164 
165 } // end namespace llvm
166 
167 namespace llvm {
168 namespace yaml {
169 
170 /// This struct serializes the LLVM IR module.
171 template <> struct BlockScalarTraits<Module> {
172  static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
173  Mod.print(OS, nullptr);
174  }
175 
176  static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
177  llvm_unreachable("LLVM Module is supposed to be parsed separately");
178  return "";
179  }
180 };
181 
182 } // end namespace yaml
183 } // end namespace llvm
184 
185 static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
186  const TargetRegisterInfo *TRI) {
187  raw_string_ostream OS(Dest.Value);
188  OS << printReg(Reg, TRI);
189 }
190 
192  initRegisterMaskIds(MF);
193 
194  yaml::MachineFunction YamlMF;
195  YamlMF.Name = MF.getName();
196  YamlMF.Alignment = MF.getAlignment();
198 
199  YamlMF.Legalized = MF.getProperties().hasProperty(
203  YamlMF.Selected = MF.getProperties().hasProperty(
205  YamlMF.FailedISel = MF.getProperties().hasProperty(
207 
208  convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
211  convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
212  convertStackObjects(YamlMF, MF, MST);
213  if (const auto *ConstantPool = MF.getConstantPool())
214  convert(YamlMF, *ConstantPool);
215  if (const auto *JumpTableInfo = MF.getJumpTableInfo())
216  convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
217  raw_string_ostream StrOS(YamlMF.Body.Value.Value);
218  bool IsNewlineNeeded = false;
219  for (const auto &MBB : MF) {
220  if (IsNewlineNeeded)
221  StrOS << "\n";
222  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
223  .print(MBB);
224  IsNewlineNeeded = true;
225  }
226  StrOS.flush();
227  yaml::Output Out(OS);
228  if (!SimplifyMIR)
229  Out.setWriteDefaultValues(true);
230  Out << YamlMF;
231 }
232 
233 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
234  const TargetRegisterInfo *TRI) {
235  assert(RegMask && "Can't print an empty register mask");
236  OS << StringRef("CustomRegMask(");
237 
238  bool IsRegInRegMaskFound = false;
239  for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
240  // Check whether the register is asserted in regmask.
241  if (RegMask[I / 32] & (1u << (I % 32))) {
242  if (IsRegInRegMaskFound)
243  OS << ',';
244  OS << printReg(I, TRI);
245  IsRegInRegMaskFound = true;
246  }
247  }
248 
249  OS << ')';
250 }
251 
252 static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
253  const MachineRegisterInfo &RegInfo,
254  const TargetRegisterInfo *TRI) {
255  raw_string_ostream OS(Dest.Value);
256  OS << printRegClassOrBank(Reg, RegInfo, TRI);
257 }
258 
259 template <typename T>
260 static void
262  T &Object, ModuleSlotTracker &MST) {
263  std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
264  &Object.DebugExpr.Value,
265  &Object.DebugLoc.Value}};
266  std::array<const Metadata *, 3> Metas{{DebugVar.Var,
267  DebugVar.Expr,
268  DebugVar.Loc}};
269  for (unsigned i = 0; i < 3; ++i) {
270  raw_string_ostream StrOS(*Outputs[i]);
271  Metas[i]->printAsOperand(StrOS, MST);
272  }
273 }
274 
276  const MachineRegisterInfo &RegInfo,
277  const TargetRegisterInfo *TRI) {
278  MF.TracksRegLiveness = RegInfo.tracksLiveness();
279 
280  // Print the virtual register definitions.
281  for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
284  VReg.ID = I;
285  if (RegInfo.getVRegName(Reg) != "")
286  continue;
287  ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
288  unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
289  if (PreferredReg)
290  printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
291  MF.VirtualRegisters.push_back(VReg);
292  }
293 
294  // Print the live ins.
295  for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
297  printRegMIR(LI.first, LiveIn.Register, TRI);
298  if (LI.second)
299  printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
300  MF.LiveIns.push_back(LiveIn);
301  }
302 
303  // Prints the callee saved registers.
304  if (RegInfo.isUpdatedCSRsInitialized()) {
305  const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
306  std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
307  for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
309  printRegMIR(*I, Reg, TRI);
310  CalleeSavedRegisters.push_back(Reg);
311  }
312  MF.CalleeSavedRegisters = CalleeSavedRegisters;
313  }
314 }
315 
317  yaml::MachineFrameInfo &YamlMFI,
318  const MachineFrameInfo &MFI) {
321  YamlMFI.HasStackMap = MFI.hasStackMap();
322  YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
323  YamlMFI.StackSize = MFI.getStackSize();
324  YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
325  YamlMFI.MaxAlignment = MFI.getMaxAlignment();
326  YamlMFI.AdjustsStack = MFI.adjustsStack();
327  YamlMFI.HasCalls = MFI.hasCalls();
329  ? MFI.getMaxCallFrameSize() : ~0u;
331  YamlMFI.HasVAStart = MFI.hasVAStart();
333  YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
334  if (MFI.getSavePoint()) {
335  raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
336  StrOS << printMBBReference(*MFI.getSavePoint());
337  }
338  if (MFI.getRestorePoint()) {
339  raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
340  StrOS << printMBBReference(*MFI.getRestorePoint());
341  }
342 }
343 
345  const MachineFunction &MF,
346  ModuleSlotTracker &MST) {
347  const MachineFrameInfo &MFI = MF.getFrameInfo();
349  // Process fixed stack objects.
350  unsigned ID = 0;
351  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) {
352  if (MFI.isDeadObjectIndex(I))
353  continue;
354 
356  YamlObject.ID = ID;
357  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
360  YamlObject.Offset = MFI.getObjectOffset(I);
361  YamlObject.Size = MFI.getObjectSize(I);
362  YamlObject.Alignment = MFI.getObjectAlignment(I);
363  YamlObject.StackID = MFI.getStackID(I);
364  YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
365  YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
366  YMF.FixedStackObjects.push_back(YamlObject);
367  StackObjectOperandMapping.insert(
368  std::make_pair(I, FrameIndexOperand::createFixed(ID++)));
369  }
370 
371  // Process ordinary stack objects.
372  ID = 0;
373  for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I) {
374  if (MFI.isDeadObjectIndex(I))
375  continue;
376 
377  yaml::MachineStackObject YamlObject;
378  YamlObject.ID = ID;
379  if (const auto *Alloca = MFI.getObjectAllocation(I))
380  YamlObject.Name.Value =
381  Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
382  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
387  YamlObject.Offset = MFI.getObjectOffset(I);
388  YamlObject.Size = MFI.getObjectSize(I);
389  YamlObject.Alignment = MFI.getObjectAlignment(I);
390  YamlObject.StackID = MFI.getStackID(I);
391 
392  YMF.StackObjects.push_back(YamlObject);
393  StackObjectOperandMapping.insert(std::make_pair(
394  I, FrameIndexOperand::create(YamlObject.Name.Value, ID++)));
395  }
396 
397  for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
399  printRegMIR(CSInfo.getReg(), Reg, TRI);
400  auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
401  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
402  "Invalid stack object index");
403  const FrameIndexOperand &StackObject = StackObjectInfo->second;
404  if (StackObject.IsFixed) {
405  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
406  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
407  CSInfo.isRestored();
408  } else {
409  YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
410  YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
411  CSInfo.isRestored();
412  }
413  }
414  for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
415  auto LocalObject = MFI.getLocalFrameObjectMap(I);
416  auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
417  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
418  "Invalid stack object index");
419  const FrameIndexOperand &StackObject = StackObjectInfo->second;
420  assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
421  YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
422  }
423 
424  // Print the stack object references in the frame information class after
425  // converting the stack objects.
426  if (MFI.hasStackProtectorIndex()) {
428  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
430  }
431 
432  // Print the debug variable information.
433  for (const MachineFunction::VariableDbgInfo &DebugVar :
434  MF.getVariableDbgInfo()) {
435  auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
436  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
437  "Invalid stack object index");
438  const FrameIndexOperand &StackObject = StackObjectInfo->second;
439  if (StackObject.IsFixed) {
440  auto &Object = YMF.FixedStackObjects[StackObject.ID];
441  printStackObjectDbgInfo(DebugVar, Object, MST);
442  } else {
443  auto &Object = YMF.StackObjects[StackObject.ID];
444  printStackObjectDbgInfo(DebugVar, Object, MST);
445  }
446  }
447 }
448 
451  unsigned ID = 0;
452  for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
453  std::string Str;
454  raw_string_ostream StrOS(Str);
455  if (Constant.isMachineConstantPoolEntry()) {
456  Constant.Val.MachineCPVal->print(StrOS);
457  } else {
458  Constant.Val.ConstVal->printAsOperand(StrOS);
459  }
460 
461  yaml::MachineConstantPoolValue YamlConstant;
462  YamlConstant.ID = ID++;
463  YamlConstant.Value = StrOS.str();
464  YamlConstant.Alignment = Constant.getAlignment();
465  YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
466 
467  MF.Constants.push_back(YamlConstant);
468  }
469 }
470 
472  yaml::MachineJumpTable &YamlJTI,
473  const MachineJumpTableInfo &JTI) {
474  YamlJTI.Kind = JTI.getEntryKind();
475  unsigned ID = 0;
476  for (const auto &Table : JTI.getJumpTables()) {
477  std::string Str;
479  Entry.ID = ID++;
480  for (const auto *MBB : Table.MBBs) {
481  raw_string_ostream StrOS(Str);
482  StrOS << printMBBReference(*MBB);
483  Entry.Blocks.push_back(StrOS.str());
484  Str.clear();
485  }
486  YamlJTI.Entries.push_back(Entry);
487  }
488 }
489 
490 void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
491  const auto *TRI = MF.getSubtarget().getRegisterInfo();
492  unsigned I = 0;
493  for (const uint32_t *Mask : TRI->getRegMasks())
494  RegisterMaskIds.insert(std::make_pair(Mask, I++));
495 }
496 
499  bool &IsFallthrough) {
501 
502  for (const MachineInstr &MI : MBB) {
503  if (MI.isPHI())
504  continue;
505  for (const MachineOperand &MO : MI.operands()) {
506  if (!MO.isMBB())
507  continue;
508  MachineBasicBlock *Succ = MO.getMBB();
509  auto RP = Seen.insert(Succ);
510  if (RP.second)
511  Result.push_back(Succ);
512  }
513  }
514  MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
515  IsFallthrough = I == MBB.end() || !I->isBarrier();
516 }
517 
518 bool
519 MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
520  if (MBB.succ_size() <= 1)
521  return true;
522  if (!MBB.hasSuccessorProbabilities())
523  return true;
524 
525  SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
526  MBB.Probs.end());
528  Normalized.end());
529  SmallVector<BranchProbability,8> Equal(Normalized.size());
531 
532  return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
533 }
534 
535 bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
537  bool GuessedFallthrough;
538  guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
539  if (GuessedFallthrough) {
540  const MachineFunction &MF = *MBB.getParent();
541  MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
542  if (NextI != MF.end()) {
543  MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
544  if (!is_contained(GuessedSuccs, Next))
545  GuessedSuccs.push_back(Next);
546  }
547  }
548  if (GuessedSuccs.size() != MBB.succ_size())
549  return false;
550  return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
551 }
552 
554  assert(MBB.getNumber() >= 0 && "Invalid MBB number");
555  OS << "bb." << MBB.getNumber();
556  bool HasAttributes = false;
557  if (const auto *BB = MBB.getBasicBlock()) {
558  if (BB->hasName()) {
559  OS << "." << BB->getName();
560  } else {
561  HasAttributes = true;
562  OS << " (";
563  int Slot = MST.getLocalSlot(BB);
564  if (Slot == -1)
565  OS << "<ir-block badref>";
566  else
567  OS << (Twine("%ir-block.") + Twine(Slot)).str();
568  }
569  }
570  if (MBB.hasAddressTaken()) {
571  OS << (HasAttributes ? ", " : " (");
572  OS << "address-taken";
573  HasAttributes = true;
574  }
575  if (MBB.isEHPad()) {
576  OS << (HasAttributes ? ", " : " (");
577  OS << "landing-pad";
578  HasAttributes = true;
579  }
580  if (MBB.getAlignment()) {
581  OS << (HasAttributes ? ", " : " (");
582  OS << "align " << MBB.getAlignment();
583  HasAttributes = true;
584  }
585  if (HasAttributes)
586  OS << ")";
587  OS << ":\n";
588 
589  bool HasLineAttributes = false;
590  // Print the successors
591  bool canPredictProbs = canPredictBranchProbabilities(MBB);
592  // Even if the list of successors is empty, if we cannot guess it,
593  // we need to print it to tell the parser that the list is empty.
594  // This is needed, because MI model unreachable as empty blocks
595  // with an empty successor list. If the parser would see that
596  // without the successor list, it would guess the code would
597  // fallthrough.
598  if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
599  !canPredictSuccessors(MBB)) {
600  OS.indent(2) << "successors: ";
601  for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
602  if (I != MBB.succ_begin())
603  OS << ", ";
604  OS << printMBBReference(**I);
605  if (!SimplifyMIR || !canPredictProbs)
606  OS << '('
607  << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
608  << ')';
609  }
610  OS << "\n";
611  HasLineAttributes = true;
612  }
613 
614  // Print the live in registers.
615  const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
616  if (MRI.tracksLiveness() && !MBB.livein_empty()) {
618  OS.indent(2) << "liveins: ";
619  bool First = true;
620  for (const auto &LI : MBB.liveins()) {
621  if (!First)
622  OS << ", ";
623  First = false;
624  OS << printReg(LI.PhysReg, &TRI);
625  if (!LI.LaneMask.all())
626  OS << ":0x" << PrintLaneMask(LI.LaneMask);
627  }
628  OS << "\n";
629  HasLineAttributes = true;
630  }
631 
632  if (HasLineAttributes)
633  OS << "\n";
634  bool IsInBundle = false;
635  for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
636  const MachineInstr &MI = *I;
637  if (IsInBundle && !MI.isInsideBundle()) {
638  OS.indent(2) << "}\n";
639  IsInBundle = false;
640  }
641  OS.indent(IsInBundle ? 4 : 2);
642  print(MI);
643  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
644  OS << " {";
645  IsInBundle = true;
646  }
647  OS << "\n";
648  }
649  if (IsInBundle)
650  OS.indent(2) << "}\n";
651 }
652 
654  const auto *MF = MI.getMF();
655  const auto &MRI = MF->getRegInfo();
656  const auto &SubTarget = MF->getSubtarget();
657  const auto *TRI = SubTarget.getRegisterInfo();
658  assert(TRI && "Expected target register info");
659  const auto *TII = SubTarget.getInstrInfo();
660  assert(TII && "Expected target instruction info");
661  if (MI.isCFIInstruction())
662  assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
663 
664  SmallBitVector PrintedTypes(8);
665  bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
666  unsigned I = 0, E = MI.getNumOperands();
667  for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
668  !MI.getOperand(I).isImplicit();
669  ++I) {
670  if (I)
671  OS << ", ";
672  print(MI, I, TRI, ShouldPrintRegisterTies,
673  MI.getTypeToPrint(I, PrintedTypes, MRI),
674  /*PrintDef=*/false);
675  }
676 
677  if (I)
678  OS << " = ";
680  OS << "frame-setup ";
682  OS << "frame-destroy ";
684  OS << "nnan ";
686  OS << "ninf ";
688  OS << "nsz ";
690  OS << "arcp ";
692  OS << "contract ";
694  OS << "afn ";
696  OS << "reassoc ";
697 
698  OS << TII->getName(MI.getOpcode());
699  if (I < E)
700  OS << ' ';
701 
702  bool NeedComma = false;
703  for (; I < E; ++I) {
704  if (NeedComma)
705  OS << ", ";
706  print(MI, I, TRI, ShouldPrintRegisterTies,
707  MI.getTypeToPrint(I, PrintedTypes, MRI));
708  NeedComma = true;
709  }
710 
711  if (const DebugLoc &DL = MI.getDebugLoc()) {
712  if (NeedComma)
713  OS << ',';
714  OS << " debug-location ";
715  DL->printAsOperand(OS, MST);
716  }
717 
718  if (!MI.memoperands_empty()) {
719  OS << " :: ";
720  const LLVMContext &Context = MF->getFunction().getContext();
721  const MachineFrameInfo &MFI = MF->getFrameInfo();
722  bool NeedComma = false;
723  for (const auto *Op : MI.memoperands()) {
724  if (NeedComma)
725  OS << ", ";
726  Op->print(OS, MST, SSNs, Context, &MFI, TII);
727  NeedComma = true;
728  }
729  }
730 }
731 
733  auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
734  assert(ObjectInfo != StackObjectOperandMapping.end() &&
735  "Invalid frame index");
736  const FrameIndexOperand &Operand = ObjectInfo->second;
737  MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
738  Operand.Name);
739 }
740 
741 void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
742  const TargetRegisterInfo *TRI,
743  bool ShouldPrintRegisterTies, LLT TypeToPrint,
744  bool PrintDef) {
745  const MachineOperand &Op = MI.getOperand(OpIdx);
746  switch (Op.getType()) {
748  if (MI.isOperandSubregIdx(OpIdx)) {
751  break;
752  }
770  unsigned TiedOperandIdx = 0;
771  if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
772  TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
774  Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
775  ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
776  break;
777  }
779  printStackObjectReference(Op.getIndex());
780  break;
782  auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
783  if (RegMaskInfo != RegisterMaskIds.end())
784  OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
785  else
786  printCustomRegMask(Op.getRegMask(), OS, TRI);
787  break;
788  }
789  }
790 }
791 
792 void llvm::printMIR(raw_ostream &OS, const Module &M) {
793  yaml::Output Out(OS);
794  Out << const_cast<Module &>(M);
795 }
796 
798  MIRPrinter Printer(OS);
799  Printer.print(MF);
800 }
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:261
LLVMContext & Context
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:176
instr_iterator instr_end()
Atomic ordering constants.
This is a &#39;bitvector&#39; (really, a variable-sized bit array), optimized for the case when the array is ...
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
bool hasStackProtectorIndex() const
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:235
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:109
bool isCFIInstruction() const
Definition: MachineInstr.h:836
const MachineFunctionProperties & getProperties() const
Get the function properties.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Optional< std::vector< FlowStringValue > > CalleeSavedRegisters
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:285
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
int64_t getLocalFrameSize() const
Get the size of the local object blob.
Address of indexed Jump Table for switch.
unsigned Reg
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:34
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:94
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Manage lifetime of a slot tracker for printing IR.
iterator_range< mmo_iterator > memoperands()
Definition: MachineInstr.h:417
Mask of live-out registers.
print alias Alias Set Printer
VariableDbgInfoMapTy & getVariableDbgInfo()
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
Mask of preserved registers.
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
const HexagonInstrInfo * TII
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
MCCFIInstruction index.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:314
MachineBasicBlock * getRestorePoint() const
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:553
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Target-dependent index+offset operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Name of external global symbol.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:311
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
std::vector< VirtualRegisterDefinition > VirtualRegisters
Immediate >64bit operand.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
int getObjectIndexBegin() const
Return the minimum frame object index.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
This class is a data container for one entry in a MachineConstantPool.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:252
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Address of a global value.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:117
const TargetRegisterInfo * getTargetRegisterInfo() const
std::vector< FlowStringValue > Blocks
unsigned const MachineRegisterInfo * MRI
Serializable representation of stack object from the MachineFrameInfo class.
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubRegIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:185
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:116
This file contains the declarations for the subclasses of Constant, which represent the different fla...
MachineJumpTable JumpTableInfo
Constant pool.
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
Definition: MachineInstr.h:326
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
unsigned getAlignment() const
Return alignment of the basic block.
int getStackProtectorIndex() const
Return the index for the stack protector object.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Address of a basic block.
virtual ArrayRef< const char * > getRegMaskNames() const =0
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:3554
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:344
unsigned MaxCallFrameSize
~0u means: not computed yet.
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:138
std::vector< MachineStackObject > StackObjects
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
self_iterator getIterator()
Definition: ilist_node.h:82
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can&#39;t be determined by the instruction&#39;s descr...
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:233
Serializable representation of MachineFrameInfo.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:193
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:792
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:810
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:3631
std::string & str()
Flushes the stream contents to the target string and returns the string&#39;s reference.
Definition: raw_ostream.h:486
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
TargetIntrinsicInfo - Interface to description of machine instruction set.
const std::vector< MachineConstantPoolEntry > & getConstants() const
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:3471
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Generic predicate for ISel.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:862
Module.h This file contains the declarations for the Module class.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
The access may modify the value stored in memory.
MCSymbol reference (for debug/eh info)
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
ArrayRef< std::pair< unsigned, unsigned > > liveins() const
A wrapper around std::string which contains a source range that&#39;s being set during parsing...
unsigned succ_size() const
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:60
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
std::vector< MachineFunctionLiveIn > LiveIns
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:172
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isEHPad() const
Returns true if the block is a landing pad.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
std::vector< Entry > Entries
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
#define I(x, y, z)
Definition: MD5.cpp:58
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
std::vector< MachineConstantPoolValue > Constants
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Abstract Stack Frame Index.
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:275
This file defines passes to print out IR in various granularities.
uint8_t getStackID(int ObjectIdx) const
MachineBasicBlock * getSavePoint() const
bool memoperands_empty() const
Return true if we don&#39;t have any memory operands which described the memory access done by this instr...
Definition: MachineInstr.h:415
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasProperty(Property P) const
std::vector< FixedMachineStackObject > FixedStackObjects
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:470
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
JTEntryKind getEntryKind() const
Floating-point immediate operand.
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:732
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
bool isMaxCallFrameSizeComputed() const
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Address of indexed Constant in Constant Pool.
MachineJumpTableInfo::JTEntryKind Kind
unsigned getSimpleHint(unsigned VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint...
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:150
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:316
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:191
uint32_t getNumerator() const
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
Definition: MachineInstr.h:197
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Successors, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:497
StringRef getVRegName(unsigned Reg) const
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
bool isImplicit() const
bool hasCalls() const
Return true if the current function has any function calls.
Metadata reference (for debug info)
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:967