LLVM  8.0.0svn
MIRPrinter.cpp
Go to the documentation of this file.
1 //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the class that prints out the LLVM IR and machine
11 // functions using the MIR serialization format.
12 //
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/ADT/None.h"
18 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/ADT/SmallPtrSet.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringRef.h"
23 #include "llvm/ADT/Twine.h"
39 #include "llvm/IR/BasicBlock.h"
40 #include "llvm/IR/Constants.h"
41 #include "llvm/IR/DebugInfo.h"
42 #include "llvm/IR/DebugLoc.h"
43 #include "llvm/IR/Function.h"
44 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/InstrTypes.h"
47 #include "llvm/IR/Instructions.h"
48 #include "llvm/IR/Intrinsics.h"
49 #include "llvm/IR/Module.h"
51 #include "llvm/IR/Value.h"
52 #include "llvm/MC/LaneBitmask.h"
53 #include "llvm/MC/MCContext.h"
54 #include "llvm/MC/MCDwarf.h"
55 #include "llvm/MC/MCSymbol.h"
58 #include "llvm/Support/Casting.h"
61 #include "llvm/Support/Format.h"
67 #include <algorithm>
68 #include <cassert>
69 #include <cinttypes>
70 #include <cstdint>
71 #include <iterator>
72 #include <string>
73 #include <utility>
74 #include <vector>
75 
76 using namespace llvm;
77 
79  "simplify-mir", cl::Hidden,
80  cl::desc("Leave out unnecessary information when printing MIR"));
81 
82 namespace {
83 
84 /// This structure describes how to print out stack object references.
85 struct FrameIndexOperand {
86  std::string Name;
87  unsigned ID;
88  bool IsFixed;
89 
90  FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
91  : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
92 
93  /// Return an ordinary stack object reference.
94  static FrameIndexOperand create(StringRef Name, unsigned ID) {
95  return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
96  }
97 
98  /// Return a fixed stack object reference.
99  static FrameIndexOperand createFixed(unsigned ID) {
100  return FrameIndexOperand("", ID, /*IsFixed=*/true);
101  }
102 };
103 
104 } // end anonymous namespace
105 
106 namespace llvm {
107 
108 /// This class prints out the machine functions using the MIR serialization
109 /// format.
110 class MIRPrinter {
111  raw_ostream &OS;
112  DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
113  /// Maps from stack object indices to operand indices which will be used when
114  /// printing frame index machine operands.
115  DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
116 
117 public:
118  MIRPrinter(raw_ostream &OS) : OS(OS) {}
119 
120  void print(const MachineFunction &MF);
121 
122  void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
123  const TargetRegisterInfo *TRI);
124  void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
125  const MachineFrameInfo &MFI);
126  void convert(yaml::MachineFunction &MF,
128  void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
129  const MachineJumpTableInfo &JTI);
130  void convertStackObjects(yaml::MachineFunction &YMF,
131  const MachineFunction &MF, ModuleSlotTracker &MST);
132 
133 private:
134  void initRegisterMaskIds(const MachineFunction &MF);
135 };
136 
137 /// This class prints out the machine instructions using the MIR serialization
138 /// format.
139 class MIPrinter {
140  raw_ostream &OS;
141  ModuleSlotTracker &MST;
142  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
143  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
144  /// Synchronization scope names registered with LLVMContext.
146 
147  bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
148  bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
149 
150 public:
152  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
153  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
154  : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
155  StackObjectOperandMapping(StackObjectOperandMapping) {}
156 
157  void print(const MachineBasicBlock &MBB);
158 
159  void print(const MachineInstr &MI);
160  void printStackObjectReference(int FrameIndex);
161  void print(const MachineInstr &MI, unsigned OpIdx,
162  const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
163  LLT TypeToPrint, bool PrintDef = true);
164 };
165 
166 } // end namespace llvm
167 
168 namespace llvm {
169 namespace yaml {
170 
171 /// This struct serializes the LLVM IR module.
172 template <> struct BlockScalarTraits<Module> {
173  static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
174  Mod.print(OS, nullptr);
175  }
176 
177  static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
178  llvm_unreachable("LLVM Module is supposed to be parsed separately");
179  return "";
180  }
181 };
182 
183 } // end namespace yaml
184 } // end namespace llvm
185 
186 static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
187  const TargetRegisterInfo *TRI) {
188  raw_string_ostream OS(Dest.Value);
189  OS << printReg(Reg, TRI);
190 }
191 
193  initRegisterMaskIds(MF);
194 
195  yaml::MachineFunction YamlMF;
196  YamlMF.Name = MF.getName();
197  YamlMF.Alignment = MF.getAlignment();
199 
200  YamlMF.Legalized = MF.getProperties().hasProperty(
204  YamlMF.Selected = MF.getProperties().hasProperty(
206  YamlMF.FailedISel = MF.getProperties().hasProperty(
208 
209  convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
212  convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
213  convertStackObjects(YamlMF, MF, MST);
214  if (const auto *ConstantPool = MF.getConstantPool())
215  convert(YamlMF, *ConstantPool);
216  if (const auto *JumpTableInfo = MF.getJumpTableInfo())
217  convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
218  raw_string_ostream StrOS(YamlMF.Body.Value.Value);
219  bool IsNewlineNeeded = false;
220  for (const auto &MBB : MF) {
221  if (IsNewlineNeeded)
222  StrOS << "\n";
223  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
224  .print(MBB);
225  IsNewlineNeeded = true;
226  }
227  StrOS.flush();
228  yaml::Output Out(OS);
229  if (!SimplifyMIR)
230  Out.setWriteDefaultValues(true);
231  Out << YamlMF;
232 }
233 
234 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
235  const TargetRegisterInfo *TRI) {
236  assert(RegMask && "Can't print an empty register mask");
237  OS << StringRef("CustomRegMask(");
238 
239  bool IsRegInRegMaskFound = false;
240  for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
241  // Check whether the register is asserted in regmask.
242  if (RegMask[I / 32] & (1u << (I % 32))) {
243  if (IsRegInRegMaskFound)
244  OS << ',';
245  OS << printReg(I, TRI);
246  IsRegInRegMaskFound = true;
247  }
248  }
249 
250  OS << ')';
251 }
252 
253 static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
254  const MachineRegisterInfo &RegInfo,
255  const TargetRegisterInfo *TRI) {
256  raw_string_ostream OS(Dest.Value);
257  OS << printRegClassOrBank(Reg, RegInfo, TRI);
258 }
259 
260 template <typename T>
261 static void
263  T &Object, ModuleSlotTracker &MST) {
264  std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
265  &Object.DebugExpr.Value,
266  &Object.DebugLoc.Value}};
267  std::array<const Metadata *, 3> Metas{{DebugVar.Var,
268  DebugVar.Expr,
269  DebugVar.Loc}};
270  for (unsigned i = 0; i < 3; ++i) {
271  raw_string_ostream StrOS(*Outputs[i]);
272  Metas[i]->printAsOperand(StrOS, MST);
273  }
274 }
275 
277  const MachineRegisterInfo &RegInfo,
278  const TargetRegisterInfo *TRI) {
279  MF.TracksRegLiveness = RegInfo.tracksLiveness();
280 
281  // Print the virtual register definitions.
282  for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
285  VReg.ID = I;
286  if (RegInfo.getVRegName(Reg) != "")
287  continue;
288  ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
289  unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
290  if (PreferredReg)
291  printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
292  MF.VirtualRegisters.push_back(VReg);
293  }
294 
295  // Print the live ins.
296  for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
298  printRegMIR(LI.first, LiveIn.Register, TRI);
299  if (LI.second)
300  printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
301  MF.LiveIns.push_back(LiveIn);
302  }
303 
304  // Prints the callee saved registers.
305  if (RegInfo.isUpdatedCSRsInitialized()) {
306  const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
307  std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
308  for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
310  printRegMIR(*I, Reg, TRI);
311  CalleeSavedRegisters.push_back(Reg);
312  }
313  MF.CalleeSavedRegisters = CalleeSavedRegisters;
314  }
315 }
316 
318  yaml::MachineFrameInfo &YamlMFI,
319  const MachineFrameInfo &MFI) {
322  YamlMFI.HasStackMap = MFI.hasStackMap();
323  YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
324  YamlMFI.StackSize = MFI.getStackSize();
325  YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
326  YamlMFI.MaxAlignment = MFI.getMaxAlignment();
327  YamlMFI.AdjustsStack = MFI.adjustsStack();
328  YamlMFI.HasCalls = MFI.hasCalls();
330  ? MFI.getMaxCallFrameSize() : ~0u;
334  YamlMFI.HasVAStart = MFI.hasVAStart();
336  YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
337  if (MFI.getSavePoint()) {
338  raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
339  StrOS << printMBBReference(*MFI.getSavePoint());
340  }
341  if (MFI.getRestorePoint()) {
342  raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
343  StrOS << printMBBReference(*MFI.getRestorePoint());
344  }
345 }
346 
348  const MachineFunction &MF,
349  ModuleSlotTracker &MST) {
350  const MachineFrameInfo &MFI = MF.getFrameInfo();
352  // Process fixed stack objects.
353  unsigned ID = 0;
354  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) {
355  if (MFI.isDeadObjectIndex(I))
356  continue;
357 
359  YamlObject.ID = ID;
360  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
363  YamlObject.Offset = MFI.getObjectOffset(I);
364  YamlObject.Size = MFI.getObjectSize(I);
365  YamlObject.Alignment = MFI.getObjectAlignment(I);
366  YamlObject.StackID = MFI.getStackID(I);
367  YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
368  YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
369  YMF.FixedStackObjects.push_back(YamlObject);
370  StackObjectOperandMapping.insert(
371  std::make_pair(I, FrameIndexOperand::createFixed(ID++)));
372  }
373 
374  // Process ordinary stack objects.
375  ID = 0;
376  for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I) {
377  if (MFI.isDeadObjectIndex(I))
378  continue;
379 
380  yaml::MachineStackObject YamlObject;
381  YamlObject.ID = ID;
382  if (const auto *Alloca = MFI.getObjectAllocation(I))
383  YamlObject.Name.Value =
384  Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
385  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
390  YamlObject.Offset = MFI.getObjectOffset(I);
391  YamlObject.Size = MFI.getObjectSize(I);
392  YamlObject.Alignment = MFI.getObjectAlignment(I);
393  YamlObject.StackID = MFI.getStackID(I);
394 
395  YMF.StackObjects.push_back(YamlObject);
396  StackObjectOperandMapping.insert(std::make_pair(
397  I, FrameIndexOperand::create(YamlObject.Name.Value, ID++)));
398  }
399 
400  for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
402  printRegMIR(CSInfo.getReg(), Reg, TRI);
403  auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
404  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
405  "Invalid stack object index");
406  const FrameIndexOperand &StackObject = StackObjectInfo->second;
407  if (StackObject.IsFixed) {
408  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
409  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
410  CSInfo.isRestored();
411  } else {
412  YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
413  YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
414  CSInfo.isRestored();
415  }
416  }
417  for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
418  auto LocalObject = MFI.getLocalFrameObjectMap(I);
419  auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
420  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
421  "Invalid stack object index");
422  const FrameIndexOperand &StackObject = StackObjectInfo->second;
423  assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
424  YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
425  }
426 
427  // Print the stack object references in the frame information class after
428  // converting the stack objects.
429  if (MFI.hasStackProtectorIndex()) {
431  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
433  }
434 
435  // Print the debug variable information.
436  for (const MachineFunction::VariableDbgInfo &DebugVar :
437  MF.getVariableDbgInfo()) {
438  auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
439  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
440  "Invalid stack object index");
441  const FrameIndexOperand &StackObject = StackObjectInfo->second;
442  if (StackObject.IsFixed) {
443  auto &Object = YMF.FixedStackObjects[StackObject.ID];
444  printStackObjectDbgInfo(DebugVar, Object, MST);
445  } else {
446  auto &Object = YMF.StackObjects[StackObject.ID];
447  printStackObjectDbgInfo(DebugVar, Object, MST);
448  }
449  }
450 }
451 
454  unsigned ID = 0;
455  for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
456  std::string Str;
457  raw_string_ostream StrOS(Str);
458  if (Constant.isMachineConstantPoolEntry()) {
459  Constant.Val.MachineCPVal->print(StrOS);
460  } else {
461  Constant.Val.ConstVal->printAsOperand(StrOS);
462  }
463 
464  yaml::MachineConstantPoolValue YamlConstant;
465  YamlConstant.ID = ID++;
466  YamlConstant.Value = StrOS.str();
467  YamlConstant.Alignment = Constant.getAlignment();
468  YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
469 
470  MF.Constants.push_back(YamlConstant);
471  }
472 }
473 
475  yaml::MachineJumpTable &YamlJTI,
476  const MachineJumpTableInfo &JTI) {
477  YamlJTI.Kind = JTI.getEntryKind();
478  unsigned ID = 0;
479  for (const auto &Table : JTI.getJumpTables()) {
480  std::string Str;
482  Entry.ID = ID++;
483  for (const auto *MBB : Table.MBBs) {
484  raw_string_ostream StrOS(Str);
485  StrOS << printMBBReference(*MBB);
486  Entry.Blocks.push_back(StrOS.str());
487  Str.clear();
488  }
489  YamlJTI.Entries.push_back(Entry);
490  }
491 }
492 
493 void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
494  const auto *TRI = MF.getSubtarget().getRegisterInfo();
495  unsigned I = 0;
496  for (const uint32_t *Mask : TRI->getRegMasks())
497  RegisterMaskIds.insert(std::make_pair(Mask, I++));
498 }
499 
502  bool &IsFallthrough) {
504 
505  for (const MachineInstr &MI : MBB) {
506  if (MI.isPHI())
507  continue;
508  for (const MachineOperand &MO : MI.operands()) {
509  if (!MO.isMBB())
510  continue;
511  MachineBasicBlock *Succ = MO.getMBB();
512  auto RP = Seen.insert(Succ);
513  if (RP.second)
514  Result.push_back(Succ);
515  }
516  }
517  MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
518  IsFallthrough = I == MBB.end() || !I->isBarrier();
519 }
520 
521 bool
522 MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
523  if (MBB.succ_size() <= 1)
524  return true;
525  if (!MBB.hasSuccessorProbabilities())
526  return true;
527 
528  SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
529  MBB.Probs.end());
531  Normalized.end());
532  SmallVector<BranchProbability,8> Equal(Normalized.size());
534 
535  return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
536 }
537 
538 bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
540  bool GuessedFallthrough;
541  guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
542  if (GuessedFallthrough) {
543  const MachineFunction &MF = *MBB.getParent();
544  MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
545  if (NextI != MF.end()) {
546  MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
547  if (!is_contained(GuessedSuccs, Next))
548  GuessedSuccs.push_back(Next);
549  }
550  }
551  if (GuessedSuccs.size() != MBB.succ_size())
552  return false;
553  return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
554 }
555 
557  assert(MBB.getNumber() >= 0 && "Invalid MBB number");
558  OS << "bb." << MBB.getNumber();
559  bool HasAttributes = false;
560  if (const auto *BB = MBB.getBasicBlock()) {
561  if (BB->hasName()) {
562  OS << "." << BB->getName();
563  } else {
564  HasAttributes = true;
565  OS << " (";
566  int Slot = MST.getLocalSlot(BB);
567  if (Slot == -1)
568  OS << "<ir-block badref>";
569  else
570  OS << (Twine("%ir-block.") + Twine(Slot)).str();
571  }
572  }
573  if (MBB.hasAddressTaken()) {
574  OS << (HasAttributes ? ", " : " (");
575  OS << "address-taken";
576  HasAttributes = true;
577  }
578  if (MBB.isEHPad()) {
579  OS << (HasAttributes ? ", " : " (");
580  OS << "landing-pad";
581  HasAttributes = true;
582  }
583  if (MBB.getAlignment()) {
584  OS << (HasAttributes ? ", " : " (");
585  OS << "align " << MBB.getAlignment();
586  HasAttributes = true;
587  }
588  if (HasAttributes)
589  OS << ")";
590  OS << ":\n";
591 
592  bool HasLineAttributes = false;
593  // Print the successors
594  bool canPredictProbs = canPredictBranchProbabilities(MBB);
595  // Even if the list of successors is empty, if we cannot guess it,
596  // we need to print it to tell the parser that the list is empty.
597  // This is needed, because MI model unreachable as empty blocks
598  // with an empty successor list. If the parser would see that
599  // without the successor list, it would guess the code would
600  // fallthrough.
601  if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
602  !canPredictSuccessors(MBB)) {
603  OS.indent(2) << "successors: ";
604  for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
605  if (I != MBB.succ_begin())
606  OS << ", ";
607  OS << printMBBReference(**I);
608  if (!SimplifyMIR || !canPredictProbs)
609  OS << '('
610  << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
611  << ')';
612  }
613  OS << "\n";
614  HasLineAttributes = true;
615  }
616 
617  // Print the live in registers.
618  const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
619  if (MRI.tracksLiveness() && !MBB.livein_empty()) {
621  OS.indent(2) << "liveins: ";
622  bool First = true;
623  for (const auto &LI : MBB.liveins()) {
624  if (!First)
625  OS << ", ";
626  First = false;
627  OS << printReg(LI.PhysReg, &TRI);
628  if (!LI.LaneMask.all())
629  OS << ":0x" << PrintLaneMask(LI.LaneMask);
630  }
631  OS << "\n";
632  HasLineAttributes = true;
633  }
634 
635  if (HasLineAttributes)
636  OS << "\n";
637  bool IsInBundle = false;
638  for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
639  const MachineInstr &MI = *I;
640  if (IsInBundle && !MI.isInsideBundle()) {
641  OS.indent(2) << "}\n";
642  IsInBundle = false;
643  }
644  OS.indent(IsInBundle ? 4 : 2);
645  print(MI);
646  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
647  OS << " {";
648  IsInBundle = true;
649  }
650  OS << "\n";
651  }
652  if (IsInBundle)
653  OS.indent(2) << "}\n";
654 }
655 
657  const auto *MF = MI.getMF();
658  const auto &MRI = MF->getRegInfo();
659  const auto &SubTarget = MF->getSubtarget();
660  const auto *TRI = SubTarget.getRegisterInfo();
661  assert(TRI && "Expected target register info");
662  const auto *TII = SubTarget.getInstrInfo();
663  assert(TII && "Expected target instruction info");
664  if (MI.isCFIInstruction())
665  assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
666 
667  SmallBitVector PrintedTypes(8);
668  bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
669  unsigned I = 0, E = MI.getNumOperands();
670  for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
671  !MI.getOperand(I).isImplicit();
672  ++I) {
673  if (I)
674  OS << ", ";
675  print(MI, I, TRI, ShouldPrintRegisterTies,
676  MI.getTypeToPrint(I, PrintedTypes, MRI),
677  /*PrintDef=*/false);
678  }
679 
680  if (I)
681  OS << " = ";
683  OS << "frame-setup ";
685  OS << "frame-destroy ";
687  OS << "nnan ";
689  OS << "ninf ";
691  OS << "nsz ";
693  OS << "arcp ";
695  OS << "contract ";
697  OS << "afn ";
699  OS << "reassoc ";
701  OS << "nuw ";
703  OS << "nsw ";
705  OS << "exact ";
706 
707  OS << TII->getName(MI.getOpcode());
708  if (I < E)
709  OS << ' ';
710 
711  bool NeedComma = false;
712  for (; I < E; ++I) {
713  if (NeedComma)
714  OS << ", ";
715  print(MI, I, TRI, ShouldPrintRegisterTies,
716  MI.getTypeToPrint(I, PrintedTypes, MRI));
717  NeedComma = true;
718  }
719 
720  // Print any optional symbols attached to this instruction as-if they were
721  // operands.
722  if (MCSymbol *PreInstrSymbol = MI.getPreInstrSymbol()) {
723  if (NeedComma)
724  OS << ',';
725  OS << " pre-instr-symbol ";
726  MachineOperand::printSymbol(OS, *PreInstrSymbol);
727  NeedComma = true;
728  }
729  if (MCSymbol *PostInstrSymbol = MI.getPostInstrSymbol()) {
730  if (NeedComma)
731  OS << ',';
732  OS << " post-instr-symbol ";
733  MachineOperand::printSymbol(OS, *PostInstrSymbol);
734  NeedComma = true;
735  }
736 
737  if (const DebugLoc &DL = MI.getDebugLoc()) {
738  if (NeedComma)
739  OS << ',';
740  OS << " debug-location ";
741  DL->printAsOperand(OS, MST);
742  }
743 
744  if (!MI.memoperands_empty()) {
745  OS << " :: ";
746  const LLVMContext &Context = MF->getFunction().getContext();
747  const MachineFrameInfo &MFI = MF->getFrameInfo();
748  bool NeedComma = false;
749  for (const auto *Op : MI.memoperands()) {
750  if (NeedComma)
751  OS << ", ";
752  Op->print(OS, MST, SSNs, Context, &MFI, TII);
753  NeedComma = true;
754  }
755  }
756 }
757 
759  auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
760  assert(ObjectInfo != StackObjectOperandMapping.end() &&
761  "Invalid frame index");
762  const FrameIndexOperand &Operand = ObjectInfo->second;
763  MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
764  Operand.Name);
765 }
766 
767 void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
768  const TargetRegisterInfo *TRI,
769  bool ShouldPrintRegisterTies, LLT TypeToPrint,
770  bool PrintDef) {
771  const MachineOperand &Op = MI.getOperand(OpIdx);
772  switch (Op.getType()) {
774  if (MI.isOperandSubregIdx(OpIdx)) {
777  break;
778  }
796  unsigned TiedOperandIdx = 0;
797  if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
798  TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
800  Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
801  ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
802  break;
803  }
805  printStackObjectReference(Op.getIndex());
806  break;
808  auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
809  if (RegMaskInfo != RegisterMaskIds.end())
810  OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
811  else
812  printCustomRegMask(Op.getRegMask(), OS, TRI);
813  break;
814  }
815  }
816 }
817 
818 void llvm::printMIR(raw_ostream &OS, const Module &M) {
819  yaml::Output Out(OS);
820  Out << const_cast<Module &>(M);
821 }
822 
824  MIRPrinter Printer(OS);
825  Printer.print(MF);
826 }
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:262
LLVMContext & Context
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:177
instr_iterator instr_end()
Atomic ordering constants.
This is a &#39;bitvector&#39; (really, a variable-sized bit array), optimized for the case when the array is ...
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
bool hasStackProtectorIndex() const
#define LLVM_FALLTHROUGH
Definition: Compiler.h:86
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:110
bool isCFIInstruction() const
Definition: MachineInstr.h:990
const MachineFunctionProperties & getProperties() const
Get the function properties.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Optional< std::vector< FlowStringValue > > CalleeSavedRegisters
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:383
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
int64_t getLocalFrameSize() const
Get the size of the local object blob.
Address of indexed Jump Table for switch.
unsigned Reg
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:34
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:94
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Manage lifetime of a slot tracker for printing IR.
Mask of live-out registers.
print alias Alias Set Printer
VariableDbgInfoMapTy & getVariableDbgInfo()
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
Mask of preserved registers.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:500
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
amdgpu Simplify well known AMD library false Value Value const Twine & Name
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
const HexagonInstrInfo * TII
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
MCCFIInstruction index.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:412
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
MachineBasicBlock * getRestorePoint() const
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:556
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Target-dependent index+offset operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Name of external global symbol.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:409
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
std::vector< VirtualRegisterDefinition > VirtualRegisters
Immediate >64bit operand.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
int getObjectIndexBegin() const
Return the minimum frame object index.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
This class is a data container for one entry in a MachineConstantPool.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:350
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MCSymbol * getPreInstrSymbol() const
Helper to extract a pre-instruction symbol if one has been added.
Definition: MachineInstr.h:555
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getCVBytesOfCalleeSavedRegisters() const
Returns how many bytes of callee-saved registers the target pushed in the prologue.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Address of a global value.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:118
const TargetRegisterInfo * getTargetRegisterInfo() const
std::vector< FlowStringValue > Blocks
unsigned const MachineRegisterInfo * MRI
Serializable representation of stack object from the MachineFrameInfo class.
ArrayRef< MachineMemOperand * > memoperands() const
Access to memory operands of the instruction.
Definition: MachineInstr.h:516
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:186
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:129
This file contains the declarations for the subclasses of Constant, which represent the different fla...
MachineJumpTable JumpTableInfo
Constant pool.
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
Definition: MachineInstr.h:429
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
unsigned getAlignment() const
Return alignment of the basic block.
int getStackProtectorIndex() const
Return the index for the stack protector object.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Address of a basic block.
virtual ArrayRef< const char * > getRegMaskNames() const =0
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4120
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:347
unsigned MaxCallFrameSize
~0u means: not computed yet.
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:139
std::vector< MachineStackObject > StackObjects
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
self_iterator getIterator()
Definition: ilist_node.h:82
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can&#39;t be determined by the instruction&#39;s descr...
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:234
Serializable representation of MachineFrameInfo.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:818
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:842
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:53
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:4197
std::string & str()
Flushes the stream contents to the target string and returns the string&#39;s reference.
Definition: raw_ostream.h:499
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MCSymbol * getPostInstrSymbol() const
Helper to extract a post-instruction symbol if one has been added.
Definition: MachineInstr.h:567
TargetIntrinsicInfo - Interface to description of machine instruction set.
const std::vector< MachineConstantPoolEntry > & getConstants() const
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:4037
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Generic predicate for ISel.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
Module.h This file contains the declarations for the Module class.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
The access may modify the value stored in memory.
MCSymbol reference (for debug/eh info)
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
ArrayRef< std::pair< unsigned, unsigned > > liveins() const
A wrapper around std::string which contains a source range that&#39;s being set during parsing...
unsigned succ_size() const
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
std::vector< MachineFunctionLiveIn > LiveIns
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:173
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isEHPad() const
Returns true if the block is a landing pad.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
std::vector< Entry > Entries
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
#define I(x, y, z)
Definition: MD5.cpp:58
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
std::vector< MachineConstantPoolValue > Constants
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Abstract Stack Frame Index.
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:276
This file defines passes to print out IR in various granularities.
uint8_t getStackID(int ObjectIdx) const
MachineBasicBlock * getSavePoint() const
bool memoperands_empty() const
Return true if we don&#39;t have any memory operands which described the memory access done by this instr...
Definition: MachineInstr.h:546
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasProperty(Property P) const
std::vector< FixedMachineStackObject > FixedStackObjects
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:483
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:566
JTEntryKind getEntryKind() const
Floating-point immediate operand.
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:758
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
bool isMaxCallFrameSizeComputed() const
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Address of indexed Constant in Constant Pool.
MachineJumpTableInfo::JTEntryKind Kind
unsigned getSimpleHint(unsigned VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint...
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:151
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:414
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:192
uint32_t getNumerator() const
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
Definition: MachineInstr.h:295
StringRef getVRegName(unsigned Reg) const
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
bool isImplicit() const
bool hasCalls() const
Return true if the current function has any function calls.
Metadata reference (for debug info)
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1101