LLVM  9.0.0svn
MIRPrinter.cpp
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1 //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the class that prints out the LLVM IR and machine
10 // functions using the MIR serialization format.
11 //
12 //===----------------------------------------------------------------------===//
13 
15 #include "llvm/ADT/DenseMap.h"
16 #include "llvm/ADT/None.h"
17 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/ADT/SmallPtrSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringRef.h"
22 #include "llvm/ADT/Twine.h"
38 #include "llvm/IR/BasicBlock.h"
39 #include "llvm/IR/Constants.h"
40 #include "llvm/IR/DebugInfo.h"
41 #include "llvm/IR/DebugLoc.h"
42 #include "llvm/IR/Function.h"
43 #include "llvm/IR/GlobalValue.h"
45 #include "llvm/IR/InstrTypes.h"
46 #include "llvm/IR/Instructions.h"
47 #include "llvm/IR/Intrinsics.h"
48 #include "llvm/IR/Module.h"
50 #include "llvm/IR/Value.h"
51 #include "llvm/MC/LaneBitmask.h"
52 #include "llvm/MC/MCContext.h"
53 #include "llvm/MC/MCDwarf.h"
54 #include "llvm/MC/MCSymbol.h"
57 #include "llvm/Support/Casting.h"
60 #include "llvm/Support/Format.h"
66 #include <algorithm>
67 #include <cassert>
68 #include <cinttypes>
69 #include <cstdint>
70 #include <iterator>
71 #include <string>
72 #include <utility>
73 #include <vector>
74 
75 using namespace llvm;
76 
78  "simplify-mir", cl::Hidden,
79  cl::desc("Leave out unnecessary information when printing MIR"));
80 
81 namespace {
82 
83 /// This structure describes how to print out stack object references.
84 struct FrameIndexOperand {
85  std::string Name;
86  unsigned ID;
87  bool IsFixed;
88 
89  FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
90  : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
91 
92  /// Return an ordinary stack object reference.
93  static FrameIndexOperand create(StringRef Name, unsigned ID) {
94  return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
95  }
96 
97  /// Return a fixed stack object reference.
98  static FrameIndexOperand createFixed(unsigned ID) {
99  return FrameIndexOperand("", ID, /*IsFixed=*/true);
100  }
101 };
102 
103 } // end anonymous namespace
104 
105 namespace llvm {
106 
107 /// This class prints out the machine functions using the MIR serialization
108 /// format.
109 class MIRPrinter {
110  raw_ostream &OS;
111  DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
112  /// Maps from stack object indices to operand indices which will be used when
113  /// printing frame index machine operands.
114  DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
115 
116 public:
117  MIRPrinter(raw_ostream &OS) : OS(OS) {}
118 
119  void print(const MachineFunction &MF);
120 
121  void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
122  const TargetRegisterInfo *TRI);
123  void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
124  const MachineFrameInfo &MFI);
125  void convert(yaml::MachineFunction &MF,
127  void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
128  const MachineJumpTableInfo &JTI);
129  void convertStackObjects(yaml::MachineFunction &YMF,
130  const MachineFunction &MF, ModuleSlotTracker &MST);
131 
132 private:
133  void initRegisterMaskIds(const MachineFunction &MF);
134 };
135 
136 /// This class prints out the machine instructions using the MIR serialization
137 /// format.
138 class MIPrinter {
139  raw_ostream &OS;
140  ModuleSlotTracker &MST;
141  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
142  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
143  /// Synchronization scope names registered with LLVMContext.
145 
146  bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
147  bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
148 
149 public:
151  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
152  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
153  : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
154  StackObjectOperandMapping(StackObjectOperandMapping) {}
155 
156  void print(const MachineBasicBlock &MBB);
157 
158  void print(const MachineInstr &MI);
159  void printStackObjectReference(int FrameIndex);
160  void print(const MachineInstr &MI, unsigned OpIdx,
161  const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
162  LLT TypeToPrint, bool PrintDef = true);
163 };
164 
165 } // end namespace llvm
166 
167 namespace llvm {
168 namespace yaml {
169 
170 /// This struct serializes the LLVM IR module.
171 template <> struct BlockScalarTraits<Module> {
172  static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
173  Mod.print(OS, nullptr);
174  }
175 
176  static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
177  llvm_unreachable("LLVM Module is supposed to be parsed separately");
178  return "";
179  }
180 };
181 
182 } // end namespace yaml
183 } // end namespace llvm
184 
185 static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
186  const TargetRegisterInfo *TRI) {
187  raw_string_ostream OS(Dest.Value);
188  OS << printReg(Reg, TRI);
189 }
190 
192  initRegisterMaskIds(MF);
193 
194  yaml::MachineFunction YamlMF;
195  YamlMF.Name = MF.getName();
196  YamlMF.Alignment = MF.getAlignment();
198  YamlMF.HasWinCFI = MF.hasWinCFI();
199 
200  YamlMF.Legalized = MF.getProperties().hasProperty(
204  YamlMF.Selected = MF.getProperties().hasProperty(
206  YamlMF.FailedISel = MF.getProperties().hasProperty(
208 
209  convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
212  convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
213  convertStackObjects(YamlMF, MF, MST);
214  if (const auto *ConstantPool = MF.getConstantPool())
215  convert(YamlMF, *ConstantPool);
216  if (const auto *JumpTableInfo = MF.getJumpTableInfo())
217  convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
218  raw_string_ostream StrOS(YamlMF.Body.Value.Value);
219  bool IsNewlineNeeded = false;
220  for (const auto &MBB : MF) {
221  if (IsNewlineNeeded)
222  StrOS << "\n";
223  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
224  .print(MBB);
225  IsNewlineNeeded = true;
226  }
227  StrOS.flush();
228  yaml::Output Out(OS);
229  if (!SimplifyMIR)
230  Out.setWriteDefaultValues(true);
231  Out << YamlMF;
232 }
233 
234 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
235  const TargetRegisterInfo *TRI) {
236  assert(RegMask && "Can't print an empty register mask");
237  OS << StringRef("CustomRegMask(");
238 
239  bool IsRegInRegMaskFound = false;
240  for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
241  // Check whether the register is asserted in regmask.
242  if (RegMask[I / 32] & (1u << (I % 32))) {
243  if (IsRegInRegMaskFound)
244  OS << ',';
245  OS << printReg(I, TRI);
246  IsRegInRegMaskFound = true;
247  }
248  }
249 
250  OS << ')';
251 }
252 
253 static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
254  const MachineRegisterInfo &RegInfo,
255  const TargetRegisterInfo *TRI) {
256  raw_string_ostream OS(Dest.Value);
257  OS << printRegClassOrBank(Reg, RegInfo, TRI);
258 }
259 
260 template <typename T>
261 static void
263  T &Object, ModuleSlotTracker &MST) {
264  std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
265  &Object.DebugExpr.Value,
266  &Object.DebugLoc.Value}};
267  std::array<const Metadata *, 3> Metas{{DebugVar.Var,
268  DebugVar.Expr,
269  DebugVar.Loc}};
270  for (unsigned i = 0; i < 3; ++i) {
271  raw_string_ostream StrOS(*Outputs[i]);
272  Metas[i]->printAsOperand(StrOS, MST);
273  }
274 }
275 
277  const MachineRegisterInfo &RegInfo,
278  const TargetRegisterInfo *TRI) {
279  MF.TracksRegLiveness = RegInfo.tracksLiveness();
280 
281  // Print the virtual register definitions.
282  for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
285  VReg.ID = I;
286  if (RegInfo.getVRegName(Reg) != "")
287  continue;
288  ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
289  unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
290  if (PreferredReg)
291  printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
292  MF.VirtualRegisters.push_back(VReg);
293  }
294 
295  // Print the live ins.
296  for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
298  printRegMIR(LI.first, LiveIn.Register, TRI);
299  if (LI.second)
300  printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
301  MF.LiveIns.push_back(LiveIn);
302  }
303 
304  // Prints the callee saved registers.
305  if (RegInfo.isUpdatedCSRsInitialized()) {
306  const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
307  std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
308  for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
310  printRegMIR(*I, Reg, TRI);
311  CalleeSavedRegisters.push_back(Reg);
312  }
313  MF.CalleeSavedRegisters = CalleeSavedRegisters;
314  }
315 }
316 
318  yaml::MachineFrameInfo &YamlMFI,
319  const MachineFrameInfo &MFI) {
322  YamlMFI.HasStackMap = MFI.hasStackMap();
323  YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
324  YamlMFI.StackSize = MFI.getStackSize();
325  YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
326  YamlMFI.MaxAlignment = MFI.getMaxAlignment();
327  YamlMFI.AdjustsStack = MFI.adjustsStack();
328  YamlMFI.HasCalls = MFI.hasCalls();
330  ? MFI.getMaxCallFrameSize() : ~0u;
334  YamlMFI.HasVAStart = MFI.hasVAStart();
336  YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
337  if (MFI.getSavePoint()) {
338  raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
339  StrOS << printMBBReference(*MFI.getSavePoint());
340  }
341  if (MFI.getRestorePoint()) {
342  raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
343  StrOS << printMBBReference(*MFI.getRestorePoint());
344  }
345 }
346 
348  const MachineFunction &MF,
349  ModuleSlotTracker &MST) {
350  const MachineFrameInfo &MFI = MF.getFrameInfo();
352  // Process fixed stack objects.
353  unsigned ID = 0;
354  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) {
355  if (MFI.isDeadObjectIndex(I))
356  continue;
357 
359  YamlObject.ID = ID;
360  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
363  YamlObject.Offset = MFI.getObjectOffset(I);
364  YamlObject.Size = MFI.getObjectSize(I);
365  YamlObject.Alignment = MFI.getObjectAlignment(I);
366  YamlObject.StackID = MFI.getStackID(I);
367  YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
368  YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
369  YMF.FixedStackObjects.push_back(YamlObject);
370  StackObjectOperandMapping.insert(
371  std::make_pair(I, FrameIndexOperand::createFixed(ID++)));
372  }
373 
374  // Process ordinary stack objects.
375  ID = 0;
376  for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I) {
377  if (MFI.isDeadObjectIndex(I))
378  continue;
379 
380  yaml::MachineStackObject YamlObject;
381  YamlObject.ID = ID;
382  if (const auto *Alloca = MFI.getObjectAllocation(I))
383  YamlObject.Name.Value =
384  Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
385  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
390  YamlObject.Offset = MFI.getObjectOffset(I);
391  YamlObject.Size = MFI.getObjectSize(I);
392  YamlObject.Alignment = MFI.getObjectAlignment(I);
393  YamlObject.StackID = MFI.getStackID(I);
394 
395  YMF.StackObjects.push_back(YamlObject);
396  StackObjectOperandMapping.insert(std::make_pair(
397  I, FrameIndexOperand::create(YamlObject.Name.Value, ID++)));
398  }
399 
400  for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
402  printRegMIR(CSInfo.getReg(), Reg, TRI);
403  if (!CSInfo.isSpilledToReg()) {
404  auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
405  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
406  "Invalid stack object index");
407  const FrameIndexOperand &StackObject = StackObjectInfo->second;
408  if (StackObject.IsFixed) {
409  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
410  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
411  CSInfo.isRestored();
412  } else {
413  YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
414  YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
415  CSInfo.isRestored();
416  }
417  }
418  }
419  for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
420  auto LocalObject = MFI.getLocalFrameObjectMap(I);
421  auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
422  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
423  "Invalid stack object index");
424  const FrameIndexOperand &StackObject = StackObjectInfo->second;
425  assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
426  YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
427  }
428 
429  // Print the stack object references in the frame information class after
430  // converting the stack objects.
431  if (MFI.hasStackProtectorIndex()) {
433  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
435  }
436 
437  // Print the debug variable information.
438  for (const MachineFunction::VariableDbgInfo &DebugVar :
439  MF.getVariableDbgInfo()) {
440  auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
441  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
442  "Invalid stack object index");
443  const FrameIndexOperand &StackObject = StackObjectInfo->second;
444  if (StackObject.IsFixed) {
445  auto &Object = YMF.FixedStackObjects[StackObject.ID];
446  printStackObjectDbgInfo(DebugVar, Object, MST);
447  } else {
448  auto &Object = YMF.StackObjects[StackObject.ID];
449  printStackObjectDbgInfo(DebugVar, Object, MST);
450  }
451  }
452 }
453 
456  unsigned ID = 0;
457  for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
458  std::string Str;
459  raw_string_ostream StrOS(Str);
460  if (Constant.isMachineConstantPoolEntry()) {
461  Constant.Val.MachineCPVal->print(StrOS);
462  } else {
463  Constant.Val.ConstVal->printAsOperand(StrOS);
464  }
465 
466  yaml::MachineConstantPoolValue YamlConstant;
467  YamlConstant.ID = ID++;
468  YamlConstant.Value = StrOS.str();
469  YamlConstant.Alignment = Constant.getAlignment();
470  YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
471 
472  MF.Constants.push_back(YamlConstant);
473  }
474 }
475 
477  yaml::MachineJumpTable &YamlJTI,
478  const MachineJumpTableInfo &JTI) {
479  YamlJTI.Kind = JTI.getEntryKind();
480  unsigned ID = 0;
481  for (const auto &Table : JTI.getJumpTables()) {
482  std::string Str;
484  Entry.ID = ID++;
485  for (const auto *MBB : Table.MBBs) {
486  raw_string_ostream StrOS(Str);
487  StrOS << printMBBReference(*MBB);
488  Entry.Blocks.push_back(StrOS.str());
489  Str.clear();
490  }
491  YamlJTI.Entries.push_back(Entry);
492  }
493 }
494 
495 void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
496  const auto *TRI = MF.getSubtarget().getRegisterInfo();
497  unsigned I = 0;
498  for (const uint32_t *Mask : TRI->getRegMasks())
499  RegisterMaskIds.insert(std::make_pair(Mask, I++));
500 }
501 
504  bool &IsFallthrough) {
506 
507  for (const MachineInstr &MI : MBB) {
508  if (MI.isPHI())
509  continue;
510  for (const MachineOperand &MO : MI.operands()) {
511  if (!MO.isMBB())
512  continue;
513  MachineBasicBlock *Succ = MO.getMBB();
514  auto RP = Seen.insert(Succ);
515  if (RP.second)
516  Result.push_back(Succ);
517  }
518  }
519  MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
520  IsFallthrough = I == MBB.end() || !I->isBarrier();
521 }
522 
523 bool
524 MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
525  if (MBB.succ_size() <= 1)
526  return true;
527  if (!MBB.hasSuccessorProbabilities())
528  return true;
529 
530  SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
531  MBB.Probs.end());
533  Normalized.end());
534  SmallVector<BranchProbability,8> Equal(Normalized.size());
536 
537  return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
538 }
539 
540 bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
542  bool GuessedFallthrough;
543  guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
544  if (GuessedFallthrough) {
545  const MachineFunction &MF = *MBB.getParent();
546  MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
547  if (NextI != MF.end()) {
548  MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
549  if (!is_contained(GuessedSuccs, Next))
550  GuessedSuccs.push_back(Next);
551  }
552  }
553  if (GuessedSuccs.size() != MBB.succ_size())
554  return false;
555  return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
556 }
557 
559  assert(MBB.getNumber() >= 0 && "Invalid MBB number");
560  OS << "bb." << MBB.getNumber();
561  bool HasAttributes = false;
562  if (const auto *BB = MBB.getBasicBlock()) {
563  if (BB->hasName()) {
564  OS << "." << BB->getName();
565  } else {
566  HasAttributes = true;
567  OS << " (";
568  int Slot = MST.getLocalSlot(BB);
569  if (Slot == -1)
570  OS << "<ir-block badref>";
571  else
572  OS << (Twine("%ir-block.") + Twine(Slot)).str();
573  }
574  }
575  if (MBB.hasAddressTaken()) {
576  OS << (HasAttributes ? ", " : " (");
577  OS << "address-taken";
578  HasAttributes = true;
579  }
580  if (MBB.isEHPad()) {
581  OS << (HasAttributes ? ", " : " (");
582  OS << "landing-pad";
583  HasAttributes = true;
584  }
585  if (MBB.getAlignment()) {
586  OS << (HasAttributes ? ", " : " (");
587  OS << "align " << MBB.getAlignment();
588  HasAttributes = true;
589  }
590  if (HasAttributes)
591  OS << ")";
592  OS << ":\n";
593 
594  bool HasLineAttributes = false;
595  // Print the successors
596  bool canPredictProbs = canPredictBranchProbabilities(MBB);
597  // Even if the list of successors is empty, if we cannot guess it,
598  // we need to print it to tell the parser that the list is empty.
599  // This is needed, because MI model unreachable as empty blocks
600  // with an empty successor list. If the parser would see that
601  // without the successor list, it would guess the code would
602  // fallthrough.
603  if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
604  !canPredictSuccessors(MBB)) {
605  OS.indent(2) << "successors: ";
606  for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
607  if (I != MBB.succ_begin())
608  OS << ", ";
609  OS << printMBBReference(**I);
610  if (!SimplifyMIR || !canPredictProbs)
611  OS << '('
612  << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
613  << ')';
614  }
615  OS << "\n";
616  HasLineAttributes = true;
617  }
618 
619  // Print the live in registers.
620  const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
621  if (MRI.tracksLiveness() && !MBB.livein_empty()) {
623  OS.indent(2) << "liveins: ";
624  bool First = true;
625  for (const auto &LI : MBB.liveins()) {
626  if (!First)
627  OS << ", ";
628  First = false;
629  OS << printReg(LI.PhysReg, &TRI);
630  if (!LI.LaneMask.all())
631  OS << ":0x" << PrintLaneMask(LI.LaneMask);
632  }
633  OS << "\n";
634  HasLineAttributes = true;
635  }
636 
637  if (HasLineAttributes)
638  OS << "\n";
639  bool IsInBundle = false;
640  for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
641  const MachineInstr &MI = *I;
642  if (IsInBundle && !MI.isInsideBundle()) {
643  OS.indent(2) << "}\n";
644  IsInBundle = false;
645  }
646  OS.indent(IsInBundle ? 4 : 2);
647  print(MI);
648  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
649  OS << " {";
650  IsInBundle = true;
651  }
652  OS << "\n";
653  }
654  if (IsInBundle)
655  OS.indent(2) << "}\n";
656 }
657 
659  const auto *MF = MI.getMF();
660  const auto &MRI = MF->getRegInfo();
661  const auto &SubTarget = MF->getSubtarget();
662  const auto *TRI = SubTarget.getRegisterInfo();
663  assert(TRI && "Expected target register info");
664  const auto *TII = SubTarget.getInstrInfo();
665  assert(TII && "Expected target instruction info");
666  if (MI.isCFIInstruction())
667  assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
668 
669  SmallBitVector PrintedTypes(8);
670  bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
671  unsigned I = 0, E = MI.getNumOperands();
672  for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
673  !MI.getOperand(I).isImplicit();
674  ++I) {
675  if (I)
676  OS << ", ";
677  print(MI, I, TRI, ShouldPrintRegisterTies,
678  MI.getTypeToPrint(I, PrintedTypes, MRI),
679  /*PrintDef=*/false);
680  }
681 
682  if (I)
683  OS << " = ";
685  OS << "frame-setup ";
687  OS << "frame-destroy ";
689  OS << "nnan ";
691  OS << "ninf ";
693  OS << "nsz ";
695  OS << "arcp ";
697  OS << "contract ";
699  OS << "afn ";
701  OS << "reassoc ";
703  OS << "nuw ";
705  OS << "nsw ";
707  OS << "exact ";
708 
709  OS << TII->getName(MI.getOpcode());
710  if (I < E)
711  OS << ' ';
712 
713  bool NeedComma = false;
714  for (; I < E; ++I) {
715  if (NeedComma)
716  OS << ", ";
717  print(MI, I, TRI, ShouldPrintRegisterTies,
718  MI.getTypeToPrint(I, PrintedTypes, MRI));
719  NeedComma = true;
720  }
721 
722  // Print any optional symbols attached to this instruction as-if they were
723  // operands.
724  if (MCSymbol *PreInstrSymbol = MI.getPreInstrSymbol()) {
725  if (NeedComma)
726  OS << ',';
727  OS << " pre-instr-symbol ";
728  MachineOperand::printSymbol(OS, *PreInstrSymbol);
729  NeedComma = true;
730  }
731  if (MCSymbol *PostInstrSymbol = MI.getPostInstrSymbol()) {
732  if (NeedComma)
733  OS << ',';
734  OS << " post-instr-symbol ";
735  MachineOperand::printSymbol(OS, *PostInstrSymbol);
736  NeedComma = true;
737  }
738 
739  if (const DebugLoc &DL = MI.getDebugLoc()) {
740  if (NeedComma)
741  OS << ',';
742  OS << " debug-location ";
743  DL->printAsOperand(OS, MST);
744  }
745 
746  if (!MI.memoperands_empty()) {
747  OS << " :: ";
748  const LLVMContext &Context = MF->getFunction().getContext();
749  const MachineFrameInfo &MFI = MF->getFrameInfo();
750  bool NeedComma = false;
751  for (const auto *Op : MI.memoperands()) {
752  if (NeedComma)
753  OS << ", ";
754  Op->print(OS, MST, SSNs, Context, &MFI, TII);
755  NeedComma = true;
756  }
757  }
758 }
759 
761  auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
762  assert(ObjectInfo != StackObjectOperandMapping.end() &&
763  "Invalid frame index");
764  const FrameIndexOperand &Operand = ObjectInfo->second;
765  MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
766  Operand.Name);
767 }
768 
769 void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
770  const TargetRegisterInfo *TRI,
771  bool ShouldPrintRegisterTies, LLT TypeToPrint,
772  bool PrintDef) {
773  const MachineOperand &Op = MI.getOperand(OpIdx);
774  switch (Op.getType()) {
776  if (MI.isOperandSubregIdx(OpIdx)) {
779  break;
780  }
798  unsigned TiedOperandIdx = 0;
799  if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
800  TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
802  Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
803  ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
804  break;
805  }
807  printStackObjectReference(Op.getIndex());
808  break;
810  auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
811  if (RegMaskInfo != RegisterMaskIds.end())
812  OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
813  else
814  printCustomRegMask(Op.getRegMask(), OS, TRI);
815  break;
816  }
817  }
818 }
819 
820 void llvm::printMIR(raw_ostream &OS, const Module &M) {
821  yaml::Output Out(OS);
822  Out << const_cast<Module &>(M);
823 }
824 
826  MIRPrinter Printer(OS);
827  Printer.print(MF);
828 }
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:262
LLVMContext & Context
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:176
instr_iterator instr_end()
Atomic ordering constants.
This is a &#39;bitvector&#39; (really, a variable-sized bit array), optimized for the case when the array is ...
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
bool hasStackProtectorIndex() const
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:109
bool isCFIInstruction() const
Definition: MachineInstr.h:989
const MachineFunctionProperties & getProperties() const
Get the function properties.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Optional< std::vector< FlowStringValue > > CalleeSavedRegisters
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:382
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
int64_t getLocalFrameSize() const
Get the size of the local object blob.
Address of indexed Jump Table for switch.
unsigned Reg
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:123
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:33
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:93
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Manage lifetime of a slot tracker for printing IR.
Mask of live-out registers.
print alias Alias Set Printer
VariableDbgInfoMapTy & getVariableDbgInfo()
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
Mask of preserved registers.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:502
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
const HexagonInstrInfo * TII
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
MCCFIInstruction index.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:411
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
MachineBasicBlock * getRestorePoint() const
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:558
Target-dependent index+offset operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Name of external global symbol.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:408
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
std::vector< VirtualRegisterDefinition > VirtualRegisters
Immediate >64bit operand.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
int getObjectIndexBegin() const
Return the minimum frame object index.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
This class is a data container for one entry in a MachineConstantPool.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:349
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MCSymbol * getPreInstrSymbol() const
Helper to extract a pre-instruction symbol if one has been added.
Definition: MachineInstr.h:554
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getCVBytesOfCalleeSavedRegisters() const
Returns how many bytes of callee-saved registers the target pushed in the prologue.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Address of a global value.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:117
const TargetRegisterInfo * getTargetRegisterInfo() const
std::vector< FlowStringValue > Blocks
unsigned const MachineRegisterInfo * MRI
Serializable representation of stack object from the MachineFrameInfo class.
ArrayRef< MachineMemOperand * > memoperands() const
Access to memory operands of the instruction.
Definition: MachineInstr.h:515
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:185
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:68
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:41
This file contains the declarations for the subclasses of Constant, which represent the different fla...
MachineJumpTable JumpTableInfo
Constant pool.
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
Definition: MachineInstr.h:428
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:370
unsigned getAlignment() const
Return alignment of the basic block.
int getStackProtectorIndex() const
Return the index for the stack protector object.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Address of a basic block.
virtual ArrayRef< const char * > getRegMaskNames() const =0
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4192
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:347
unsigned MaxCallFrameSize
~0u means: not computed yet.
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:138
std::vector< MachineStackObject > StackObjects
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
self_iterator getIterator()
Definition: ilist_node.h:81
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can&#39;t be determined by the instruction&#39;s descr...
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:234
Serializable representation of MachineFrameInfo.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:192
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:820
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:840
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:52
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:4269
std::string & str()
Flushes the stream contents to the target string and returns the string&#39;s reference.
Definition: raw_ostream.h:498
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MCSymbol * getPostInstrSymbol() const
Helper to extract a post-instruction symbol if one has been added.
Definition: MachineInstr.h:566
TargetIntrinsicInfo - Interface to description of machine instruction set.
const std::vector< MachineConstantPoolEntry > & getConstants() const
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:4109
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:417
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Generic predicate for ISel.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:839
Module.h This file contains the declarations for the Module class.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
The access may modify the value stored in memory.
MCSymbol reference (for debug/eh info)
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
ArrayRef< std::pair< unsigned, unsigned > > liveins() const
A wrapper around std::string which contains a source range that&#39;s being set during parsing...
unsigned succ_size() const
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:63
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
std::vector< MachineFunctionLiveIn > LiveIns
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:172
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isEHPad() const
Returns true if the block is a landing pad.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
std::vector< Entry > Entries
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
#define I(x, y, z)
Definition: MD5.cpp:58
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
std::vector< MachineConstantPoolValue > Constants
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Abstract Stack Frame Index.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:276
This file defines passes to print out IR in various granularities.
uint8_t getStackID(int ObjectIdx) const
MachineBasicBlock * getSavePoint() const
bool memoperands_empty() const
Return true if we don&#39;t have any memory operands which described the memory access done by this instr...
Definition: MachineInstr.h:545
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasProperty(Property P) const
std::vector< FixedMachineStackObject > FixedStackObjects
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:482
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
JTEntryKind getEntryKind() const
Floating-point immediate operand.
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:250
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:760
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
bool isMaxCallFrameSizeComputed() const
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Address of indexed Constant in Constant Pool.
MachineJumpTableInfo::JTEntryKind Kind
unsigned getSimpleHint(unsigned VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint...
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:150
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:191
uint32_t getNumerator() const
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
Definition: MachineInstr.h:294
StringRef getVRegName(unsigned Reg) const
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
bool isImplicit() const
bool hasCalls() const
Return true if the current function has any function calls.
Metadata reference (for debug info)
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1244