LLVM  8.0.0svn
MIRPrinter.cpp
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1 //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the class that prints out the LLVM IR and machine
11 // functions using the MIR serialization format.
12 //
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/ADT/None.h"
18 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/ADT/SmallPtrSet.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringRef.h"
23 #include "llvm/ADT/Twine.h"
39 #include "llvm/IR/BasicBlock.h"
40 #include "llvm/IR/Constants.h"
41 #include "llvm/IR/DebugInfo.h"
42 #include "llvm/IR/DebugLoc.h"
43 #include "llvm/IR/Function.h"
44 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/InstrTypes.h"
47 #include "llvm/IR/Instructions.h"
48 #include "llvm/IR/Intrinsics.h"
49 #include "llvm/IR/Module.h"
51 #include "llvm/IR/Value.h"
52 #include "llvm/MC/LaneBitmask.h"
53 #include "llvm/MC/MCContext.h"
54 #include "llvm/MC/MCDwarf.h"
55 #include "llvm/MC/MCSymbol.h"
58 #include "llvm/Support/Casting.h"
61 #include "llvm/Support/Format.h"
67 #include <algorithm>
68 #include <cassert>
69 #include <cinttypes>
70 #include <cstdint>
71 #include <iterator>
72 #include <string>
73 #include <utility>
74 #include <vector>
75 
76 using namespace llvm;
77 
79  "simplify-mir", cl::Hidden,
80  cl::desc("Leave out unnecessary information when printing MIR"));
81 
82 namespace {
83 
84 /// This structure describes how to print out stack object references.
85 struct FrameIndexOperand {
86  std::string Name;
87  unsigned ID;
88  bool IsFixed;
89 
90  FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
91  : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
92 
93  /// Return an ordinary stack object reference.
94  static FrameIndexOperand create(StringRef Name, unsigned ID) {
95  return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
96  }
97 
98  /// Return a fixed stack object reference.
99  static FrameIndexOperand createFixed(unsigned ID) {
100  return FrameIndexOperand("", ID, /*IsFixed=*/true);
101  }
102 };
103 
104 } // end anonymous namespace
105 
106 namespace llvm {
107 
108 /// This class prints out the machine functions using the MIR serialization
109 /// format.
110 class MIRPrinter {
111  raw_ostream &OS;
112  DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
113  /// Maps from stack object indices to operand indices which will be used when
114  /// printing frame index machine operands.
115  DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
116 
117 public:
118  MIRPrinter(raw_ostream &OS) : OS(OS) {}
119 
120  void print(const MachineFunction &MF);
121 
122  void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
123  const TargetRegisterInfo *TRI);
124  void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
125  const MachineFrameInfo &MFI);
126  void convert(yaml::MachineFunction &MF,
128  void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
129  const MachineJumpTableInfo &JTI);
130  void convertStackObjects(yaml::MachineFunction &YMF,
131  const MachineFunction &MF, ModuleSlotTracker &MST);
132 
133 private:
134  void initRegisterMaskIds(const MachineFunction &MF);
135 };
136 
137 /// This class prints out the machine instructions using the MIR serialization
138 /// format.
139 class MIPrinter {
140  raw_ostream &OS;
141  ModuleSlotTracker &MST;
142  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
143  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
144  /// Synchronization scope names registered with LLVMContext.
146 
147  bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
148  bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
149 
150 public:
152  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
153  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
154  : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
155  StackObjectOperandMapping(StackObjectOperandMapping) {}
156 
157  void print(const MachineBasicBlock &MBB);
158 
159  void print(const MachineInstr &MI);
160  void printStackObjectReference(int FrameIndex);
161  void print(const MachineInstr &MI, unsigned OpIdx,
162  const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
163  LLT TypeToPrint, bool PrintDef = true);
164 };
165 
166 } // end namespace llvm
167 
168 namespace llvm {
169 namespace yaml {
170 
171 /// This struct serializes the LLVM IR module.
172 template <> struct BlockScalarTraits<Module> {
173  static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
174  Mod.print(OS, nullptr);
175  }
176 
177  static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
178  llvm_unreachable("LLVM Module is supposed to be parsed separately");
179  return "";
180  }
181 };
182 
183 } // end namespace yaml
184 } // end namespace llvm
185 
186 static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
187  const TargetRegisterInfo *TRI) {
188  raw_string_ostream OS(Dest.Value);
189  OS << printReg(Reg, TRI);
190 }
191 
193  initRegisterMaskIds(MF);
194 
195  yaml::MachineFunction YamlMF;
196  YamlMF.Name = MF.getName();
197  YamlMF.Alignment = MF.getAlignment();
199  YamlMF.HasWinCFI = MF.hasWinCFI();
200 
201  YamlMF.Legalized = MF.getProperties().hasProperty(
205  YamlMF.Selected = MF.getProperties().hasProperty(
207  YamlMF.FailedISel = MF.getProperties().hasProperty(
209 
210  convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
213  convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
214  convertStackObjects(YamlMF, MF, MST);
215  if (const auto *ConstantPool = MF.getConstantPool())
216  convert(YamlMF, *ConstantPool);
217  if (const auto *JumpTableInfo = MF.getJumpTableInfo())
218  convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
219  raw_string_ostream StrOS(YamlMF.Body.Value.Value);
220  bool IsNewlineNeeded = false;
221  for (const auto &MBB : MF) {
222  if (IsNewlineNeeded)
223  StrOS << "\n";
224  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
225  .print(MBB);
226  IsNewlineNeeded = true;
227  }
228  StrOS.flush();
229  yaml::Output Out(OS);
230  if (!SimplifyMIR)
231  Out.setWriteDefaultValues(true);
232  Out << YamlMF;
233 }
234 
235 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
236  const TargetRegisterInfo *TRI) {
237  assert(RegMask && "Can't print an empty register mask");
238  OS << StringRef("CustomRegMask(");
239 
240  bool IsRegInRegMaskFound = false;
241  for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
242  // Check whether the register is asserted in regmask.
243  if (RegMask[I / 32] & (1u << (I % 32))) {
244  if (IsRegInRegMaskFound)
245  OS << ',';
246  OS << printReg(I, TRI);
247  IsRegInRegMaskFound = true;
248  }
249  }
250 
251  OS << ')';
252 }
253 
254 static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
255  const MachineRegisterInfo &RegInfo,
256  const TargetRegisterInfo *TRI) {
257  raw_string_ostream OS(Dest.Value);
258  OS << printRegClassOrBank(Reg, RegInfo, TRI);
259 }
260 
261 template <typename T>
262 static void
264  T &Object, ModuleSlotTracker &MST) {
265  std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
266  &Object.DebugExpr.Value,
267  &Object.DebugLoc.Value}};
268  std::array<const Metadata *, 3> Metas{{DebugVar.Var,
269  DebugVar.Expr,
270  DebugVar.Loc}};
271  for (unsigned i = 0; i < 3; ++i) {
272  raw_string_ostream StrOS(*Outputs[i]);
273  Metas[i]->printAsOperand(StrOS, MST);
274  }
275 }
276 
278  const MachineRegisterInfo &RegInfo,
279  const TargetRegisterInfo *TRI) {
280  MF.TracksRegLiveness = RegInfo.tracksLiveness();
281 
282  // Print the virtual register definitions.
283  for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
286  VReg.ID = I;
287  if (RegInfo.getVRegName(Reg) != "")
288  continue;
289  ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
290  unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
291  if (PreferredReg)
292  printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
293  MF.VirtualRegisters.push_back(VReg);
294  }
295 
296  // Print the live ins.
297  for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
299  printRegMIR(LI.first, LiveIn.Register, TRI);
300  if (LI.second)
301  printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
302  MF.LiveIns.push_back(LiveIn);
303  }
304 
305  // Prints the callee saved registers.
306  if (RegInfo.isUpdatedCSRsInitialized()) {
307  const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
308  std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
309  for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
311  printRegMIR(*I, Reg, TRI);
312  CalleeSavedRegisters.push_back(Reg);
313  }
314  MF.CalleeSavedRegisters = CalleeSavedRegisters;
315  }
316 }
317 
319  yaml::MachineFrameInfo &YamlMFI,
320  const MachineFrameInfo &MFI) {
323  YamlMFI.HasStackMap = MFI.hasStackMap();
324  YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
325  YamlMFI.StackSize = MFI.getStackSize();
326  YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
327  YamlMFI.MaxAlignment = MFI.getMaxAlignment();
328  YamlMFI.AdjustsStack = MFI.adjustsStack();
329  YamlMFI.HasCalls = MFI.hasCalls();
331  ? MFI.getMaxCallFrameSize() : ~0u;
335  YamlMFI.HasVAStart = MFI.hasVAStart();
337  YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
338  if (MFI.getSavePoint()) {
339  raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
340  StrOS << printMBBReference(*MFI.getSavePoint());
341  }
342  if (MFI.getRestorePoint()) {
343  raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
344  StrOS << printMBBReference(*MFI.getRestorePoint());
345  }
346 }
347 
349  const MachineFunction &MF,
350  ModuleSlotTracker &MST) {
351  const MachineFrameInfo &MFI = MF.getFrameInfo();
353  // Process fixed stack objects.
354  unsigned ID = 0;
355  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) {
356  if (MFI.isDeadObjectIndex(I))
357  continue;
358 
360  YamlObject.ID = ID;
361  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
364  YamlObject.Offset = MFI.getObjectOffset(I);
365  YamlObject.Size = MFI.getObjectSize(I);
366  YamlObject.Alignment = MFI.getObjectAlignment(I);
367  YamlObject.StackID = MFI.getStackID(I);
368  YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
369  YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
370  YMF.FixedStackObjects.push_back(YamlObject);
371  StackObjectOperandMapping.insert(
372  std::make_pair(I, FrameIndexOperand::createFixed(ID++)));
373  }
374 
375  // Process ordinary stack objects.
376  ID = 0;
377  for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I) {
378  if (MFI.isDeadObjectIndex(I))
379  continue;
380 
381  yaml::MachineStackObject YamlObject;
382  YamlObject.ID = ID;
383  if (const auto *Alloca = MFI.getObjectAllocation(I))
384  YamlObject.Name.Value =
385  Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
386  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
391  YamlObject.Offset = MFI.getObjectOffset(I);
392  YamlObject.Size = MFI.getObjectSize(I);
393  YamlObject.Alignment = MFI.getObjectAlignment(I);
394  YamlObject.StackID = MFI.getStackID(I);
395 
396  YMF.StackObjects.push_back(YamlObject);
397  StackObjectOperandMapping.insert(std::make_pair(
398  I, FrameIndexOperand::create(YamlObject.Name.Value, ID++)));
399  }
400 
401  for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
403  printRegMIR(CSInfo.getReg(), Reg, TRI);
404  if (!CSInfo.isSpilledToReg()) {
405  auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
406  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
407  "Invalid stack object index");
408  const FrameIndexOperand &StackObject = StackObjectInfo->second;
409  if (StackObject.IsFixed) {
410  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
411  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
412  CSInfo.isRestored();
413  } else {
414  YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
415  YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
416  CSInfo.isRestored();
417  }
418  }
419  }
420  for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
421  auto LocalObject = MFI.getLocalFrameObjectMap(I);
422  auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
423  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
424  "Invalid stack object index");
425  const FrameIndexOperand &StackObject = StackObjectInfo->second;
426  assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
427  YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
428  }
429 
430  // Print the stack object references in the frame information class after
431  // converting the stack objects.
432  if (MFI.hasStackProtectorIndex()) {
434  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
436  }
437 
438  // Print the debug variable information.
439  for (const MachineFunction::VariableDbgInfo &DebugVar :
440  MF.getVariableDbgInfo()) {
441  auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
442  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
443  "Invalid stack object index");
444  const FrameIndexOperand &StackObject = StackObjectInfo->second;
445  if (StackObject.IsFixed) {
446  auto &Object = YMF.FixedStackObjects[StackObject.ID];
447  printStackObjectDbgInfo(DebugVar, Object, MST);
448  } else {
449  auto &Object = YMF.StackObjects[StackObject.ID];
450  printStackObjectDbgInfo(DebugVar, Object, MST);
451  }
452  }
453 }
454 
457  unsigned ID = 0;
458  for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
459  std::string Str;
460  raw_string_ostream StrOS(Str);
461  if (Constant.isMachineConstantPoolEntry()) {
462  Constant.Val.MachineCPVal->print(StrOS);
463  } else {
464  Constant.Val.ConstVal->printAsOperand(StrOS);
465  }
466 
467  yaml::MachineConstantPoolValue YamlConstant;
468  YamlConstant.ID = ID++;
469  YamlConstant.Value = StrOS.str();
470  YamlConstant.Alignment = Constant.getAlignment();
471  YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
472 
473  MF.Constants.push_back(YamlConstant);
474  }
475 }
476 
478  yaml::MachineJumpTable &YamlJTI,
479  const MachineJumpTableInfo &JTI) {
480  YamlJTI.Kind = JTI.getEntryKind();
481  unsigned ID = 0;
482  for (const auto &Table : JTI.getJumpTables()) {
483  std::string Str;
485  Entry.ID = ID++;
486  for (const auto *MBB : Table.MBBs) {
487  raw_string_ostream StrOS(Str);
488  StrOS << printMBBReference(*MBB);
489  Entry.Blocks.push_back(StrOS.str());
490  Str.clear();
491  }
492  YamlJTI.Entries.push_back(Entry);
493  }
494 }
495 
496 void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
497  const auto *TRI = MF.getSubtarget().getRegisterInfo();
498  unsigned I = 0;
499  for (const uint32_t *Mask : TRI->getRegMasks())
500  RegisterMaskIds.insert(std::make_pair(Mask, I++));
501 }
502 
505  bool &IsFallthrough) {
507 
508  for (const MachineInstr &MI : MBB) {
509  if (MI.isPHI())
510  continue;
511  for (const MachineOperand &MO : MI.operands()) {
512  if (!MO.isMBB())
513  continue;
514  MachineBasicBlock *Succ = MO.getMBB();
515  auto RP = Seen.insert(Succ);
516  if (RP.second)
517  Result.push_back(Succ);
518  }
519  }
520  MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
521  IsFallthrough = I == MBB.end() || !I->isBarrier();
522 }
523 
524 bool
525 MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
526  if (MBB.succ_size() <= 1)
527  return true;
528  if (!MBB.hasSuccessorProbabilities())
529  return true;
530 
531  SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
532  MBB.Probs.end());
534  Normalized.end());
535  SmallVector<BranchProbability,8> Equal(Normalized.size());
537 
538  return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
539 }
540 
541 bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
543  bool GuessedFallthrough;
544  guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
545  if (GuessedFallthrough) {
546  const MachineFunction &MF = *MBB.getParent();
547  MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
548  if (NextI != MF.end()) {
549  MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
550  if (!is_contained(GuessedSuccs, Next))
551  GuessedSuccs.push_back(Next);
552  }
553  }
554  if (GuessedSuccs.size() != MBB.succ_size())
555  return false;
556  return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
557 }
558 
560  assert(MBB.getNumber() >= 0 && "Invalid MBB number");
561  OS << "bb." << MBB.getNumber();
562  bool HasAttributes = false;
563  if (const auto *BB = MBB.getBasicBlock()) {
564  if (BB->hasName()) {
565  OS << "." << BB->getName();
566  } else {
567  HasAttributes = true;
568  OS << " (";
569  int Slot = MST.getLocalSlot(BB);
570  if (Slot == -1)
571  OS << "<ir-block badref>";
572  else
573  OS << (Twine("%ir-block.") + Twine(Slot)).str();
574  }
575  }
576  if (MBB.hasAddressTaken()) {
577  OS << (HasAttributes ? ", " : " (");
578  OS << "address-taken";
579  HasAttributes = true;
580  }
581  if (MBB.isEHPad()) {
582  OS << (HasAttributes ? ", " : " (");
583  OS << "landing-pad";
584  HasAttributes = true;
585  }
586  if (MBB.getAlignment()) {
587  OS << (HasAttributes ? ", " : " (");
588  OS << "align " << MBB.getAlignment();
589  HasAttributes = true;
590  }
591  if (HasAttributes)
592  OS << ")";
593  OS << ":\n";
594 
595  bool HasLineAttributes = false;
596  // Print the successors
597  bool canPredictProbs = canPredictBranchProbabilities(MBB);
598  // Even if the list of successors is empty, if we cannot guess it,
599  // we need to print it to tell the parser that the list is empty.
600  // This is needed, because MI model unreachable as empty blocks
601  // with an empty successor list. If the parser would see that
602  // without the successor list, it would guess the code would
603  // fallthrough.
604  if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
605  !canPredictSuccessors(MBB)) {
606  OS.indent(2) << "successors: ";
607  for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
608  if (I != MBB.succ_begin())
609  OS << ", ";
610  OS << printMBBReference(**I);
611  if (!SimplifyMIR || !canPredictProbs)
612  OS << '('
613  << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
614  << ')';
615  }
616  OS << "\n";
617  HasLineAttributes = true;
618  }
619 
620  // Print the live in registers.
621  const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
622  if (MRI.tracksLiveness() && !MBB.livein_empty()) {
624  OS.indent(2) << "liveins: ";
625  bool First = true;
626  for (const auto &LI : MBB.liveins()) {
627  if (!First)
628  OS << ", ";
629  First = false;
630  OS << printReg(LI.PhysReg, &TRI);
631  if (!LI.LaneMask.all())
632  OS << ":0x" << PrintLaneMask(LI.LaneMask);
633  }
634  OS << "\n";
635  HasLineAttributes = true;
636  }
637 
638  if (HasLineAttributes)
639  OS << "\n";
640  bool IsInBundle = false;
641  for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
642  const MachineInstr &MI = *I;
643  if (IsInBundle && !MI.isInsideBundle()) {
644  OS.indent(2) << "}\n";
645  IsInBundle = false;
646  }
647  OS.indent(IsInBundle ? 4 : 2);
648  print(MI);
649  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
650  OS << " {";
651  IsInBundle = true;
652  }
653  OS << "\n";
654  }
655  if (IsInBundle)
656  OS.indent(2) << "}\n";
657 }
658 
660  const auto *MF = MI.getMF();
661  const auto &MRI = MF->getRegInfo();
662  const auto &SubTarget = MF->getSubtarget();
663  const auto *TRI = SubTarget.getRegisterInfo();
664  assert(TRI && "Expected target register info");
665  const auto *TII = SubTarget.getInstrInfo();
666  assert(TII && "Expected target instruction info");
667  if (MI.isCFIInstruction())
668  assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
669 
670  SmallBitVector PrintedTypes(8);
671  bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
672  unsigned I = 0, E = MI.getNumOperands();
673  for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
674  !MI.getOperand(I).isImplicit();
675  ++I) {
676  if (I)
677  OS << ", ";
678  print(MI, I, TRI, ShouldPrintRegisterTies,
679  MI.getTypeToPrint(I, PrintedTypes, MRI),
680  /*PrintDef=*/false);
681  }
682 
683  if (I)
684  OS << " = ";
686  OS << "frame-setup ";
688  OS << "frame-destroy ";
690  OS << "nnan ";
692  OS << "ninf ";
694  OS << "nsz ";
696  OS << "arcp ";
698  OS << "contract ";
700  OS << "afn ";
702  OS << "reassoc ";
704  OS << "nuw ";
706  OS << "nsw ";
708  OS << "exact ";
709 
710  OS << TII->getName(MI.getOpcode());
711  if (I < E)
712  OS << ' ';
713 
714  bool NeedComma = false;
715  for (; I < E; ++I) {
716  if (NeedComma)
717  OS << ", ";
718  print(MI, I, TRI, ShouldPrintRegisterTies,
719  MI.getTypeToPrint(I, PrintedTypes, MRI));
720  NeedComma = true;
721  }
722 
723  // Print any optional symbols attached to this instruction as-if they were
724  // operands.
725  if (MCSymbol *PreInstrSymbol = MI.getPreInstrSymbol()) {
726  if (NeedComma)
727  OS << ',';
728  OS << " pre-instr-symbol ";
729  MachineOperand::printSymbol(OS, *PreInstrSymbol);
730  NeedComma = true;
731  }
732  if (MCSymbol *PostInstrSymbol = MI.getPostInstrSymbol()) {
733  if (NeedComma)
734  OS << ',';
735  OS << " post-instr-symbol ";
736  MachineOperand::printSymbol(OS, *PostInstrSymbol);
737  NeedComma = true;
738  }
739 
740  if (const DebugLoc &DL = MI.getDebugLoc()) {
741  if (NeedComma)
742  OS << ',';
743  OS << " debug-location ";
744  DL->printAsOperand(OS, MST);
745  }
746 
747  if (!MI.memoperands_empty()) {
748  OS << " :: ";
749  const LLVMContext &Context = MF->getFunction().getContext();
750  const MachineFrameInfo &MFI = MF->getFrameInfo();
751  bool NeedComma = false;
752  for (const auto *Op : MI.memoperands()) {
753  if (NeedComma)
754  OS << ", ";
755  Op->print(OS, MST, SSNs, Context, &MFI, TII);
756  NeedComma = true;
757  }
758  }
759 }
760 
762  auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
763  assert(ObjectInfo != StackObjectOperandMapping.end() &&
764  "Invalid frame index");
765  const FrameIndexOperand &Operand = ObjectInfo->second;
766  MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
767  Operand.Name);
768 }
769 
770 void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
771  const TargetRegisterInfo *TRI,
772  bool ShouldPrintRegisterTies, LLT TypeToPrint,
773  bool PrintDef) {
774  const MachineOperand &Op = MI.getOperand(OpIdx);
775  switch (Op.getType()) {
777  if (MI.isOperandSubregIdx(OpIdx)) {
780  break;
781  }
799  unsigned TiedOperandIdx = 0;
800  if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
801  TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
803  Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
804  ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
805  break;
806  }
808  printStackObjectReference(Op.getIndex());
809  break;
811  auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
812  if (RegMaskInfo != RegisterMaskIds.end())
813  OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
814  else
815  printCustomRegMask(Op.getRegMask(), OS, TRI);
816  break;
817  }
818  }
819 }
820 
821 void llvm::printMIR(raw_ostream &OS, const Module &M) {
822  yaml::Output Out(OS);
823  Out << const_cast<Module &>(M);
824 }
825 
827  MIRPrinter Printer(OS);
828  Printer.print(MF);
829 }
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
static void printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar, T &Object, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:263
LLVMContext & Context
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:177
instr_iterator instr_end()
Atomic ordering constants.
This is a &#39;bitvector&#39; (really, a variable-sized bit array), optimized for the case when the array is ...
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
This class represents lattice values for constants.
Definition: AllocatorList.h:24
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
bool hasStackProtectorIndex() const
#define LLVM_FALLTHROUGH
Definition: Compiler.h:86
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:110
bool isCFIInstruction() const
Definition: MachineInstr.h:990
const MachineFunctionProperties & getProperties() const
Get the function properties.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
Optional< std::vector< FlowStringValue > > CalleeSavedRegisters
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:383
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
int64_t getLocalFrameSize() const
Get the size of the local object blob.
Address of indexed Jump Table for switch.
unsigned Reg
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
MachineBasicBlock reference.
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:34
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:94
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Manage lifetime of a slot tracker for printing IR.
Mask of live-out registers.
print alias Alias Set Printer
VariableDbgInfoMapTy & getVariableDbgInfo()
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
Mask of preserved registers.
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:503
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
amdgpu Simplify well known AMD library false Value Value const Twine & Name
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
const HexagonInstrInfo * TII
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
MCCFIInstruction index.
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:412
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubIdx=0, const MachineRegisterInfo *MRI=nullptr)
Prints virtual and physical registers with or without a TRI instance.
MachineBasicBlock * getRestorePoint() const
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:559
Target-dependent index+offset operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Name of external global symbol.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:409
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
std::vector< VirtualRegisterDefinition > VirtualRegisters
Immediate >64bit operand.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
int getObjectIndexBegin() const
Return the minimum frame object index.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
This class is a data container for one entry in a MachineConstantPool.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:350
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MCSymbol * getPreInstrSymbol() const
Helper to extract a pre-instruction symbol if one has been added.
Definition: MachineInstr.h:555
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
unsigned getCVBytesOfCalleeSavedRegisters() const
Returns how many bytes of callee-saved registers the target pushed in the prologue.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Address of a global value.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:118
const TargetRegisterInfo * getTargetRegisterInfo() const
std::vector< FlowStringValue > Blocks
unsigned const MachineRegisterInfo * MRI
Serializable representation of stack object from the MachineFrameInfo class.
ArrayRef< MachineMemOperand * > memoperands() const
Access to memory operands of the instruction.
Definition: MachineInstr.h:516
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:186
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:129
This file contains the declarations for the subclasses of Constant, which represent the different fla...
MachineJumpTable JumpTableInfo
Constant pool.
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
Definition: MachineInstr.h:429
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
unsigned getAlignment() const
Return alignment of the basic block.
int getStackProtectorIndex() const
Return the index for the stack protector object.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Address of a basic block.
virtual ArrayRef< const char * > getRegMaskNames() const =0
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:4145
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:348
unsigned MaxCallFrameSize
~0u means: not computed yet.
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:139
std::vector< MachineStackObject > StackObjects
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
self_iterator getIterator()
Definition: ilist_node.h:82
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can&#39;t be determined by the instruction&#39;s descr...
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:235
Serializable representation of MachineFrameInfo.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:821
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:842
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
size_t size() const
Definition: SmallVector.h:53
static void printSymbol(raw_ostream &OS, MCSymbol &Sym)
Print a MCSymbol as an operand.
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:4222
std::string & str()
Flushes the stream contents to the target string and returns the string&#39;s reference.
Definition: raw_ostream.h:499
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
MCSymbol * getPostInstrSymbol() const
Helper to extract a post-instruction symbol if one has been added.
Definition: MachineInstr.h:567
TargetIntrinsicInfo - Interface to description of machine instruction set.
const std::vector< MachineConstantPoolEntry > & getConstants() const
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:4062
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Generic predicate for ISel.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
Module.h This file contains the declarations for the Module class.
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
The access may modify the value stored in memory.
MCSymbol reference (for debug/eh info)
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
ArrayRef< std::pair< unsigned, unsigned > > liveins() const
A wrapper around std::string which contains a source range that&#39;s being set during parsing...
unsigned succ_size() const
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:64
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
std::vector< MachineFunctionLiveIn > LiveIns
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:173
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isEHPad() const
Returns true if the block is a landing pad.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
std::vector< Entry > Entries
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
#define I(x, y, z)
Definition: MD5.cpp:58
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
std::vector< MachineConstantPoolValue > Constants
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Abstract Stack Frame Index.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:277
This file defines passes to print out IR in various granularities.
uint8_t getStackID(int ObjectIdx) const
MachineBasicBlock * getSavePoint() const
bool memoperands_empty() const
Return true if we don&#39;t have any memory operands which described the memory access done by this instr...
Definition: MachineInstr.h:546
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasProperty(Property P) const
std::vector< FixedMachineStackObject > FixedStackObjects
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:483
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:566
JTEntryKind getEntryKind() const
Floating-point immediate operand.
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:761
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
bool isMaxCallFrameSizeComputed() const
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Address of indexed Constant in Constant Pool.
MachineJumpTableInfo::JTEntryKind Kind
unsigned getSimpleHint(unsigned VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint...
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:151
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:414
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:192
uint32_t getNumerator() const
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
Definition: MachineInstr.h:295
StringRef getVRegName(unsigned Reg) const
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
bool isImplicit() const
bool hasCalls() const
Return true if the current function has any function calls.
Metadata reference (for debug info)
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:1239