LLVM  7.0.0svn
MIRPrinter.cpp
Go to the documentation of this file.
1 //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the class that prints out the LLVM IR and machine
11 // functions using the MIR serialization format.
12 //
13 //===----------------------------------------------------------------------===//
14 
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/ADT/None.h"
18 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/ADT/SmallPtrSet.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/StringExtras.h"
23 #include "llvm/ADT/StringRef.h"
24 #include "llvm/ADT/Twine.h"
40 #include "llvm/IR/BasicBlock.h"
41 #include "llvm/IR/Constants.h"
42 #include "llvm/IR/DebugInfo.h"
43 #include "llvm/IR/DebugLoc.h"
44 #include "llvm/IR/Function.h"
45 #include "llvm/IR/GlobalValue.h"
47 #include "llvm/IR/InstrTypes.h"
48 #include "llvm/IR/Instructions.h"
49 #include "llvm/IR/Intrinsics.h"
50 #include "llvm/IR/Module.h"
52 #include "llvm/IR/Value.h"
53 #include "llvm/MC/LaneBitmask.h"
54 #include "llvm/MC/MCDwarf.h"
55 #include "llvm/MC/MCSymbol.h"
58 #include "llvm/Support/Casting.h"
61 #include "llvm/Support/Format.h"
67 #include <algorithm>
68 #include <cassert>
69 #include <cinttypes>
70 #include <cstdint>
71 #include <iterator>
72 #include <string>
73 #include <utility>
74 #include <vector>
75 
76 using namespace llvm;
77 
79  "simplify-mir", cl::Hidden,
80  cl::desc("Leave out unnecessary information when printing MIR"));
81 
82 namespace {
83 
84 /// This structure describes how to print out stack object references.
85 struct FrameIndexOperand {
86  std::string Name;
87  unsigned ID;
88  bool IsFixed;
89 
90  FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
91  : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
92 
93  /// Return an ordinary stack object reference.
94  static FrameIndexOperand create(StringRef Name, unsigned ID) {
95  return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
96  }
97 
98  /// Return a fixed stack object reference.
99  static FrameIndexOperand createFixed(unsigned ID) {
100  return FrameIndexOperand("", ID, /*IsFixed=*/true);
101  }
102 };
103 
104 } // end anonymous namespace
105 
106 namespace llvm {
107 
108 /// This class prints out the machine functions using the MIR serialization
109 /// format.
110 class MIRPrinter {
111  raw_ostream &OS;
112  DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
113  /// Maps from stack object indices to operand indices which will be used when
114  /// printing frame index machine operands.
115  DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
116 
117 public:
118  MIRPrinter(raw_ostream &OS) : OS(OS) {}
119 
120  void print(const MachineFunction &MF);
121 
122  void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
123  const TargetRegisterInfo *TRI);
124  void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
125  const MachineFrameInfo &MFI);
126  void convert(yaml::MachineFunction &MF,
128  void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
129  const MachineJumpTableInfo &JTI);
130  void convertStackObjects(yaml::MachineFunction &YMF,
131  const MachineFunction &MF, ModuleSlotTracker &MST);
132 
133 private:
134  void initRegisterMaskIds(const MachineFunction &MF);
135 };
136 
137 /// This class prints out the machine instructions using the MIR serialization
138 /// format.
139 class MIPrinter {
140  raw_ostream &OS;
141  ModuleSlotTracker &MST;
142  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
143  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
144  /// Synchronization scope names registered with LLVMContext.
146 
147  bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
148  bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
149 
150 public:
152  const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
153  const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
154  : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
155  StackObjectOperandMapping(StackObjectOperandMapping) {}
156 
157  void print(const MachineBasicBlock &MBB);
158 
159  void print(const MachineInstr &MI);
160  void printIRValueReference(const Value &V);
161  void printStackObjectReference(int FrameIndex);
162  void print(const MachineInstr &MI, unsigned OpIdx,
163  const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
164  LLT TypeToPrint, bool PrintDef = true);
165  void print(const LLVMContext &Context, const TargetInstrInfo &TII,
166  const MachineMemOperand &Op);
167  void printSyncScope(const LLVMContext &Context, SyncScope::ID SSID);
168 };
169 
170 } // end namespace llvm
171 
172 namespace llvm {
173 namespace yaml {
174 
175 /// This struct serializes the LLVM IR module.
176 template <> struct BlockScalarTraits<Module> {
177  static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
178  Mod.print(OS, nullptr);
179  }
180 
181  static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
182  llvm_unreachable("LLVM Module is supposed to be parsed separately");
183  return "";
184  }
185 };
186 
187 } // end namespace yaml
188 } // end namespace llvm
189 
190 static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
191  const TargetRegisterInfo *TRI) {
192  raw_string_ostream OS(Dest.Value);
193  OS << printReg(Reg, TRI);
194 }
195 
197  initRegisterMaskIds(MF);
198 
199  yaml::MachineFunction YamlMF;
200  YamlMF.Name = MF.getName();
201  YamlMF.Alignment = MF.getAlignment();
203 
204  YamlMF.Legalized = MF.getProperties().hasProperty(
208  YamlMF.Selected = MF.getProperties().hasProperty(
210 
211  convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
214  convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
215  convertStackObjects(YamlMF, MF, MST);
216  if (const auto *ConstantPool = MF.getConstantPool())
217  convert(YamlMF, *ConstantPool);
218  if (const auto *JumpTableInfo = MF.getJumpTableInfo())
219  convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
220  raw_string_ostream StrOS(YamlMF.Body.Value.Value);
221  bool IsNewlineNeeded = false;
222  for (const auto &MBB : MF) {
223  if (IsNewlineNeeded)
224  StrOS << "\n";
225  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
226  .print(MBB);
227  IsNewlineNeeded = true;
228  }
229  StrOS.flush();
230  yaml::Output Out(OS);
231  if (!SimplifyMIR)
232  Out.setWriteDefaultValues(true);
233  Out << YamlMF;
234 }
235 
236 static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
237  const TargetRegisterInfo *TRI) {
238  assert(RegMask && "Can't print an empty register mask");
239  OS << StringRef("CustomRegMask(");
240 
241  bool IsRegInRegMaskFound = false;
242  for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
243  // Check whether the register is asserted in regmask.
244  if (RegMask[I / 32] & (1u << (I % 32))) {
245  if (IsRegInRegMaskFound)
246  OS << ',';
247  OS << printReg(I, TRI);
248  IsRegInRegMaskFound = true;
249  }
250  }
251 
252  OS << ')';
253 }
254 
255 static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
256  const MachineRegisterInfo &RegInfo,
257  const TargetRegisterInfo *TRI) {
258  raw_string_ostream OS(Dest.Value);
259  OS << printRegClassOrBank(Reg, RegInfo, TRI);
260 }
261 
262 
264  const MachineRegisterInfo &RegInfo,
265  const TargetRegisterInfo *TRI) {
266  MF.TracksRegLiveness = RegInfo.tracksLiveness();
267 
268  // Print the virtual register definitions.
269  for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
272  VReg.ID = I;
273  ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
274  unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
275  if (PreferredReg)
276  printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
277  MF.VirtualRegisters.push_back(VReg);
278  }
279 
280  // Print the live ins.
281  for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
283  printRegMIR(LI.first, LiveIn.Register, TRI);
284  if (LI.second)
285  printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
286  MF.LiveIns.push_back(LiveIn);
287  }
288 
289  // Prints the callee saved registers.
290  if (RegInfo.isUpdatedCSRsInitialized()) {
291  const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
292  std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
293  for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
295  printRegMIR(*I, Reg, TRI);
296  CalleeSavedRegisters.push_back(Reg);
297  }
298  MF.CalleeSavedRegisters = CalleeSavedRegisters;
299  }
300 }
301 
303  yaml::MachineFrameInfo &YamlMFI,
304  const MachineFrameInfo &MFI) {
307  YamlMFI.HasStackMap = MFI.hasStackMap();
308  YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
309  YamlMFI.StackSize = MFI.getStackSize();
310  YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
311  YamlMFI.MaxAlignment = MFI.getMaxAlignment();
312  YamlMFI.AdjustsStack = MFI.adjustsStack();
313  YamlMFI.HasCalls = MFI.hasCalls();
315  ? MFI.getMaxCallFrameSize() : ~0u;
317  YamlMFI.HasVAStart = MFI.hasVAStart();
319  if (MFI.getSavePoint()) {
320  raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
321  StrOS << printMBBReference(*MFI.getSavePoint());
322  }
323  if (MFI.getRestorePoint()) {
324  raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
325  StrOS << printMBBReference(*MFI.getRestorePoint());
326  }
327 }
328 
330  const MachineFunction &MF,
331  ModuleSlotTracker &MST) {
332  const MachineFrameInfo &MFI = MF.getFrameInfo();
333  const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
334  // Process fixed stack objects.
335  unsigned ID = 0;
336  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) {
337  if (MFI.isDeadObjectIndex(I))
338  continue;
339 
341  YamlObject.ID = ID;
342  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
345  YamlObject.Offset = MFI.getObjectOffset(I);
346  YamlObject.Size = MFI.getObjectSize(I);
347  YamlObject.Alignment = MFI.getObjectAlignment(I);
348  YamlObject.StackID = MFI.getStackID(I);
349  YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
350  YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
351  YMF.FixedStackObjects.push_back(YamlObject);
352  StackObjectOperandMapping.insert(
353  std::make_pair(I, FrameIndexOperand::createFixed(ID++)));
354  }
355 
356  // Process ordinary stack objects.
357  ID = 0;
358  for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I) {
359  if (MFI.isDeadObjectIndex(I))
360  continue;
361 
362  yaml::MachineStackObject YamlObject;
363  YamlObject.ID = ID;
364  if (const auto *Alloca = MFI.getObjectAllocation(I))
365  YamlObject.Name.Value =
366  Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
367  YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
372  YamlObject.Offset = MFI.getObjectOffset(I);
373  YamlObject.Size = MFI.getObjectSize(I);
374  YamlObject.Alignment = MFI.getObjectAlignment(I);
375  YamlObject.StackID = MFI.getStackID(I);
376 
377  YMF.StackObjects.push_back(YamlObject);
378  StackObjectOperandMapping.insert(std::make_pair(
379  I, FrameIndexOperand::create(YamlObject.Name.Value, ID++)));
380  }
381 
382  for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
384  printRegMIR(CSInfo.getReg(), Reg, TRI);
385  auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
386  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
387  "Invalid stack object index");
388  const FrameIndexOperand &StackObject = StackObjectInfo->second;
389  if (StackObject.IsFixed) {
390  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
391  YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
392  CSInfo.isRestored();
393  } else {
394  YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
395  YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
396  CSInfo.isRestored();
397  }
398  }
399  for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
400  auto LocalObject = MFI.getLocalFrameObjectMap(I);
401  auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
402  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
403  "Invalid stack object index");
404  const FrameIndexOperand &StackObject = StackObjectInfo->second;
405  assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
406  YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
407  }
408 
409  // Print the stack object references in the frame information class after
410  // converting the stack objects.
411  if (MFI.hasStackProtectorIndex()) {
413  MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
415  }
416 
417  // Print the debug variable information.
418  for (const MachineFunction::VariableDbgInfo &DebugVar :
419  MF.getVariableDbgInfo()) {
420  auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
421  assert(StackObjectInfo != StackObjectOperandMapping.end() &&
422  "Invalid stack object index");
423  const FrameIndexOperand &StackObject = StackObjectInfo->second;
424  assert(!StackObject.IsFixed && "Expected a non-fixed stack object");
425  auto &Object = YMF.StackObjects[StackObject.ID];
426  {
427  raw_string_ostream StrOS(Object.DebugVar.Value);
428  DebugVar.Var->printAsOperand(StrOS, MST);
429  }
430  {
431  raw_string_ostream StrOS(Object.DebugExpr.Value);
432  DebugVar.Expr->printAsOperand(StrOS, MST);
433  }
434  {
435  raw_string_ostream StrOS(Object.DebugLoc.Value);
436  DebugVar.Loc->printAsOperand(StrOS, MST);
437  }
438  }
439 }
440 
443  unsigned ID = 0;
444  for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
445  std::string Str;
446  raw_string_ostream StrOS(Str);
447  if (Constant.isMachineConstantPoolEntry()) {
448  Constant.Val.MachineCPVal->print(StrOS);
449  } else {
450  Constant.Val.ConstVal->printAsOperand(StrOS);
451  }
452 
453  yaml::MachineConstantPoolValue YamlConstant;
454  YamlConstant.ID = ID++;
455  YamlConstant.Value = StrOS.str();
456  YamlConstant.Alignment = Constant.getAlignment();
457  YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
458 
459  MF.Constants.push_back(YamlConstant);
460  }
461 }
462 
464  yaml::MachineJumpTable &YamlJTI,
465  const MachineJumpTableInfo &JTI) {
466  YamlJTI.Kind = JTI.getEntryKind();
467  unsigned ID = 0;
468  for (const auto &Table : JTI.getJumpTables()) {
469  std::string Str;
471  Entry.ID = ID++;
472  for (const auto *MBB : Table.MBBs) {
473  raw_string_ostream StrOS(Str);
474  StrOS << printMBBReference(*MBB);
475  Entry.Blocks.push_back(StrOS.str());
476  Str.clear();
477  }
478  YamlJTI.Entries.push_back(Entry);
479  }
480 }
481 
482 void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
483  const auto *TRI = MF.getSubtarget().getRegisterInfo();
484  unsigned I = 0;
485  for (const uint32_t *Mask : TRI->getRegMasks())
486  RegisterMaskIds.insert(std::make_pair(Mask, I++));
487 }
488 
491  bool &IsFallthrough) {
493 
494  for (const MachineInstr &MI : MBB) {
495  if (MI.isPHI())
496  continue;
497  for (const MachineOperand &MO : MI.operands()) {
498  if (!MO.isMBB())
499  continue;
500  MachineBasicBlock *Succ = MO.getMBB();
501  auto RP = Seen.insert(Succ);
502  if (RP.second)
503  Result.push_back(Succ);
504  }
505  }
506  MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
507  IsFallthrough = I == MBB.end() || !I->isBarrier();
508 }
509 
510 bool
511 MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
512  if (MBB.succ_size() <= 1)
513  return true;
514  if (!MBB.hasSuccessorProbabilities())
515  return true;
516 
517  SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
518  MBB.Probs.end());
520  Normalized.end());
521  SmallVector<BranchProbability,8> Equal(Normalized.size());
523 
524  return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
525 }
526 
527 bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
529  bool GuessedFallthrough;
530  guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
531  if (GuessedFallthrough) {
532  const MachineFunction &MF = *MBB.getParent();
533  MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
534  if (NextI != MF.end()) {
535  MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
536  if (!is_contained(GuessedSuccs, Next))
537  GuessedSuccs.push_back(Next);
538  }
539  }
540  if (GuessedSuccs.size() != MBB.succ_size())
541  return false;
542  return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
543 }
544 
546  assert(MBB.getNumber() >= 0 && "Invalid MBB number");
547  OS << "bb." << MBB.getNumber();
548  bool HasAttributes = false;
549  if (const auto *BB = MBB.getBasicBlock()) {
550  if (BB->hasName()) {
551  OS << "." << BB->getName();
552  } else {
553  HasAttributes = true;
554  OS << " (";
555  int Slot = MST.getLocalSlot(BB);
556  if (Slot == -1)
557  OS << "<ir-block badref>";
558  else
559  OS << (Twine("%ir-block.") + Twine(Slot)).str();
560  }
561  }
562  if (MBB.hasAddressTaken()) {
563  OS << (HasAttributes ? ", " : " (");
564  OS << "address-taken";
565  HasAttributes = true;
566  }
567  if (MBB.isEHPad()) {
568  OS << (HasAttributes ? ", " : " (");
569  OS << "landing-pad";
570  HasAttributes = true;
571  }
572  if (MBB.getAlignment()) {
573  OS << (HasAttributes ? ", " : " (");
574  OS << "align " << MBB.getAlignment();
575  HasAttributes = true;
576  }
577  if (HasAttributes)
578  OS << ")";
579  OS << ":\n";
580 
581  bool HasLineAttributes = false;
582  // Print the successors
583  bool canPredictProbs = canPredictBranchProbabilities(MBB);
584  // Even if the list of successors is empty, if we cannot guess it,
585  // we need to print it to tell the parser that the list is empty.
586  // This is needed, because MI model unreachable as empty blocks
587  // with an empty successor list. If the parser would see that
588  // without the successor list, it would guess the code would
589  // fallthrough.
590  if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
591  !canPredictSuccessors(MBB)) {
592  OS.indent(2) << "successors: ";
593  for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
594  if (I != MBB.succ_begin())
595  OS << ", ";
596  OS << printMBBReference(**I);
597  if (!SimplifyMIR || !canPredictProbs)
598  OS << '('
599  << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
600  << ')';
601  }
602  OS << "\n";
603  HasLineAttributes = true;
604  }
605 
606  // Print the live in registers.
607  const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
608  if (MRI.tracksLiveness() && !MBB.livein_empty()) {
609  const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
610  OS.indent(2) << "liveins: ";
611  bool First = true;
612  for (const auto &LI : MBB.liveins()) {
613  if (!First)
614  OS << ", ";
615  First = false;
616  OS << printReg(LI.PhysReg, &TRI);
617  if (!LI.LaneMask.all())
618  OS << ":0x" << PrintLaneMask(LI.LaneMask);
619  }
620  OS << "\n";
621  HasLineAttributes = true;
622  }
623 
624  if (HasLineAttributes)
625  OS << "\n";
626  bool IsInBundle = false;
627  for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
628  const MachineInstr &MI = *I;
629  if (IsInBundle && !MI.isInsideBundle()) {
630  OS.indent(2) << "}\n";
631  IsInBundle = false;
632  }
633  OS.indent(IsInBundle ? 4 : 2);
634  print(MI);
635  if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
636  OS << " {";
637  IsInBundle = true;
638  }
639  OS << "\n";
640  }
641  if (IsInBundle)
642  OS.indent(2) << "}\n";
643 }
644 
646  const auto *MF = MI.getMF();
647  const auto &MRI = MF->getRegInfo();
648  const auto &SubTarget = MF->getSubtarget();
649  const auto *TRI = SubTarget.getRegisterInfo();
650  assert(TRI && "Expected target register info");
651  const auto *TII = SubTarget.getInstrInfo();
652  assert(TII && "Expected target instruction info");
653  if (MI.isCFIInstruction())
654  assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
655 
656  SmallBitVector PrintedTypes(8);
657  bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
658  unsigned I = 0, E = MI.getNumOperands();
659  for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
660  !MI.getOperand(I).isImplicit();
661  ++I) {
662  if (I)
663  OS << ", ";
664  print(MI, I, TRI, ShouldPrintRegisterTies,
665  MI.getTypeToPrint(I, PrintedTypes, MRI),
666  /*PrintDef=*/false);
667  }
668 
669  if (I)
670  OS << " = ";
672  OS << "frame-setup ";
673  else if (MI.getFlag(MachineInstr::FrameDestroy))
674  OS << "frame-destroy ";
675 
676  OS << TII->getName(MI.getOpcode());
677  if (I < E)
678  OS << ' ';
679 
680  bool NeedComma = false;
681  for (; I < E; ++I) {
682  if (NeedComma)
683  OS << ", ";
684  print(MI, I, TRI, ShouldPrintRegisterTies,
685  MI.getTypeToPrint(I, PrintedTypes, MRI));
686  NeedComma = true;
687  }
688 
689  if (const DebugLoc &DL = MI.getDebugLoc()) {
690  if (NeedComma)
691  OS << ',';
692  OS << " debug-location ";
693  DL->printAsOperand(OS, MST);
694  }
695 
696  if (!MI.memoperands_empty()) {
697  OS << " :: ";
698  const LLVMContext &Context = MF->getFunction().getContext();
699  bool NeedComma = false;
700  for (const auto *Op : MI.memoperands()) {
701  if (NeedComma)
702  OS << ", ";
703  print(Context, *TII, *Op);
704  NeedComma = true;
705  }
706  }
707 }
708 
710  if (isa<GlobalValue>(V)) {
711  V.printAsOperand(OS, /*PrintType=*/false, MST);
712  return;
713  }
714  if (isa<Constant>(V)) {
715  // Machine memory operands can load/store to/from constant value pointers.
716  OS << '`';
717  V.printAsOperand(OS, /*PrintType=*/true, MST);
718  OS << '`';
719  return;
720  }
721  OS << "%ir.";
722  if (V.hasName()) {
724  return;
725  }
726  MachineOperand::printIRSlotNumber(OS, MST.getLocalSlot(&V));
727 }
728 
730  auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
731  assert(ObjectInfo != StackObjectOperandMapping.end() &&
732  "Invalid frame index");
733  const FrameIndexOperand &Operand = ObjectInfo->second;
734  MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
735  Operand.Name);
736 }
737 
738 void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
739  const TargetRegisterInfo *TRI,
740  bool ShouldPrintRegisterTies, LLT TypeToPrint,
741  bool PrintDef) {
742  const MachineOperand &Op = MI.getOperand(OpIdx);
743  switch (Op.getType()) {
745  if (MI.isOperandSubregIdx(OpIdx)) {
747  MachineOperand::printSubRegIdx(OS, Op.getImm(), TRI);
748  break;
749  }
767  unsigned TiedOperandIdx = 0;
768  if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
769  TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
771  Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
772  ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
773  break;
774  }
776  printStackObjectReference(Op.getIndex());
777  break;
779  auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
780  if (RegMaskInfo != RegisterMaskIds.end())
781  OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
782  else
783  printCustomRegMask(Op.getRegMask(), OS, TRI);
784  break;
785  }
786  }
787 }
788 
789 static const char *getTargetMMOFlagName(const TargetInstrInfo &TII,
790  unsigned TMMOFlag) {
792  for (const auto &I : Flags) {
793  if (I.first == TMMOFlag) {
794  return I.second;
795  }
796  }
797  return nullptr;
798 }
799 
801  const MachineMemOperand &Op) {
802  OS << '(';
803  if (Op.isVolatile())
804  OS << "volatile ";
805  if (Op.isNonTemporal())
806  OS << "non-temporal ";
807  if (Op.isDereferenceable())
808  OS << "dereferenceable ";
809  if (Op.isInvariant())
810  OS << "invariant ";
813  << "\" ";
816  << "\" ";
819  << "\" ";
820 
821  assert((Op.isLoad() || Op.isStore()) && "machine memory operand must be a load or store (or both)");
822  if (Op.isLoad())
823  OS << "load ";
824  if (Op.isStore())
825  OS << "store ";
826 
827  printSyncScope(Context, Op.getSyncScopeID());
828 
830  OS << toIRString(Op.getOrdering()) << ' ';
832  OS << toIRString(Op.getFailureOrdering()) << ' ';
833 
834  OS << Op.getSize();
835  if (const Value *Val = Op.getValue()) {
836  OS << ((Op.isLoad() && Op.isStore()) ? " on "
837  : Op.isLoad() ? " from " : " into ");
838  printIRValueReference(*Val);
839  } else if (const PseudoSourceValue *PVal = Op.getPseudoValue()) {
840  OS << ((Op.isLoad() && Op.isStore()) ? " on "
841  : Op.isLoad() ? " from " : " into ");
842  assert(PVal && "Expected a pseudo source value");
843  switch (PVal->kind()) {
845  OS << "stack";
846  break;
848  OS << "got";
849  break;
851  OS << "jump-table";
852  break;
854  OS << "constant-pool";
855  break;
857  printStackObjectReference(
858  cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex());
859  break;
861  OS << "call-entry ";
862  cast<GlobalValuePseudoSourceValue>(PVal)->getValue()->printAsOperand(
863  OS, /*PrintType=*/false, MST);
864  break;
866  OS << "call-entry &";
868  OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
869  break;
871  llvm_unreachable("TargetCustom pseudo source values are not supported");
872  break;
873  }
874  }
876  if (Op.getBaseAlignment() != Op.getSize())
877  OS << ", align " << Op.getBaseAlignment();
878  auto AAInfo = Op.getAAInfo();
879  if (AAInfo.TBAA) {
880  OS << ", !tbaa ";
881  AAInfo.TBAA->printAsOperand(OS, MST);
882  }
883  if (AAInfo.Scope) {
884  OS << ", !alias.scope ";
885  AAInfo.Scope->printAsOperand(OS, MST);
886  }
887  if (AAInfo.NoAlias) {
888  OS << ", !noalias ";
889  AAInfo.NoAlias->printAsOperand(OS, MST);
890  }
891  if (Op.getRanges()) {
892  OS << ", !range ";
893  Op.getRanges()->printAsOperand(OS, MST);
894  }
895  if (unsigned AS = Op.getAddrSpace())
896  OS << ", addrspace " << AS;
897  OS << ')';
898 }
899 
901  switch (SSID) {
902  case SyncScope::System: {
903  break;
904  }
905  default: {
906  if (SSNs.empty())
907  Context.getSyncScopeNames(SSNs);
908 
909  OS << "syncscope(\"";
910  PrintEscapedString(SSNs[SSID], OS);
911  OS << "\") ";
912  break;
913  }
914  }
915 }
916 
917 void llvm::printMIR(raw_ostream &OS, const Module &M) {
918  yaml::Output Out(OS);
919  Out << const_cast<Module &>(M);
920 }
921 
923  MIRPrinter Printer(OS);
924  Printer.print(MF);
925 }
LLT getTypeToPrint(unsigned OpIdx, SmallBitVector &PrintedTypes, const MachineRegisterInfo &MRI) const
Debugging supportDetermine the generic type to be printed (if needed) on uses and defs...
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
bool hasSuccessorProbabilities() const
Return true if any of the successors have probabilities attached to them.
static void printOperandOffset(raw_ostream &OS, int64_t Offset)
Print the offset with explicit +/- signs.
A common definition of LaneBitmask for use in TableGen and CodeGen.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< MachineJumpTableEntry > & getJumpTables() const
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
instr_iterator instr_begin()
LLVMContext & Context
unsigned getAddrSpace() const
static StringRef input(StringRef Str, void *Ctxt, Module &Mod)
Definition: MIRPrinter.cpp:181
instr_iterator instr_end()
Atomic ordering constants.
This is a &#39;bitvector&#39; (really, a variable-sized bit array), optimized for the case when the array is ...
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
static const char * getTargetMMOFlagName(const TargetInstrInfo &TII, unsigned TMMOFlag)
Definition: MIRPrinter.cpp:789
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:656
bool hasVAStart() const
Returns true if the function calls the llvm.va_start intrinsic.
static unsigned index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
bool hasStackProtectorIndex() const
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
void PrintEscapedString(StringRef Name, raw_ostream &Out)
PrintEscapedString - Print each character of the specified string, escaping it if it is not printable...
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
This class prints out the machine functions using the MIR serialization format.
Definition: MIRPrinter.cpp:110
bool isCFIInstruction() const
Definition: MachineInstr.h:812
const MachineFunctionProperties & getProperties() const
Get the function properties.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
AtomicOrdering getFailureOrdering() const
For cmpxchg atomic operations, return the atomic ordering requirements when store does not occur...
Optional< std::vector< FlowStringValue > > CalleeSavedRegisters
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:271
static void printTargetFlags(raw_ostream &OS, const MachineOperand &Op)
Print operand target flags.
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
Address of indexed Jump Table for switch.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
uint64_t getSize() const
Return the size in bytes of the memory reference.
MachineBasicBlock reference.
A debug info location.
Definition: DebugLoc.h:34
Printable PrintLaneMask(LaneBitmask LaneMask)
Create Printable object to print LaneBitmasks on a raw_ostream.
Definition: LaneBitmask.h:94
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
Manage lifetime of a slot tracker for printing IR.
iterator_range< mmo_iterator > memoperands()
Definition: MachineInstr.h:399
Mask of live-out registers.
uint64_t getBaseAlignment() const
Return the minimum known alignment in bytes of the base address, without the offset.
print alias Alias Set Printer
VariableDbgInfoMapTy & getVariableDbgInfo()
bool isVariableSizedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a variable sized object.
Mask of preserved registers.
AAMDNodes getAAInfo() const
Return the AA tags for the memory reference.
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
A description of a memory reference used in the backend.
std::pair< int, int64_t > getLocalFrameObjectMap(int i) const
Get the local offset mapping for a for an object.
This file declares the MachineConstantPool class which is an abstract constant pool to keep track of ...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
const HexagonInstrInfo * TII
Printable printMBBReference(const MachineBasicBlock &MBB)
Prints a machine basic block reference.
Serializable representation of the fixed stack object from the MachineFrameInfo class.
MCCFIInstruction index.
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:296
const MDNode * getRanges() const
Return the range tag for the memory reference.
MachineBasicBlock * getRestorePoint() const
void print(const MachineBasicBlock &MBB)
Definition: MIRPrinter.cpp:545
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
Target-dependent index+offset operand.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Name of external global symbol.
Reg
All possible values of the reg field in the ModR/M byte.
unsigned getAlignment() const
getAlignment - Return the alignment (log2, not bytes) of the function.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:293
bool isImmutableObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an immutable object.
Printable printReg(unsigned Reg, const TargetRegisterInfo *TRI=nullptr, unsigned SubRegIdx=0)
Prints virtual and physical registers with or without a TRI instance.
AtomicOrdering getOrdering() const
Return the atomic ordering requirements for this memory operation.
static cl::opt< bool > SimplifyMIR("simplify-mir", cl::Hidden, cl::desc("Leave out unnecessary information when printing MIR"))
std::vector< VirtualRegisterDefinition > VirtualRegisters
Immediate >64bit operand.
static void normalizeProbabilities(ProbabilityIter Begin, ProbabilityIter End)
int getObjectIndexBegin() const
Return the minimum frame object index.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
This class is a data container for one entry in a MachineConstantPool.
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
Printable printRegClassOrBank(unsigned Reg, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Create Printable object to print register classes or register banks on a raw_ostream.
virtual ArrayRef< std::pair< MachineMemOperand::Flags, const char * > > getSerializableMachineMemOperandTargetFlags() const
Return an array that contains the MMO target flag values and their names.
bool isInsideBundle() const
Return true if MI is in a bundle (but not the first MI in a bundle).
Definition: MachineInstr.h:238
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
Expected< const typename ELFT::Sym * > getSymbol(typename ELFT::SymRange Symbols, uint32_t Index)
Definition: ELF.h:249
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
TargetInstrInfo - Interface to description of machine instruction set.
const Value * getValue() const
Return the base address of the memory access.
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:59
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
Address of a global value.
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MIRPrinter(raw_ostream &OS)
Definition: MIRPrinter.cpp:118
const char * toIRString(AtomicOrdering ao)
String used by LLVM IR to represent atomic ordering.
const TargetRegisterInfo * getTargetRegisterInfo() const
std::vector< FlowStringValue > Blocks
unsigned const MachineRegisterInfo * MRI
Serializable representation of stack object from the MachineFrameInfo class.
bool hasName() const
Definition: Value.h:251
static void printRegMIR(unsigned Reg, yaml::StringValue &Dest, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:190
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:116
This file contains the declarations for the subclasses of Constant, which represent the different fla...
MachineJumpTable JumpTableInfo
Constant pool.
void getSyncScopeNames(SmallVectorImpl< StringRef > &SSNs) const
getSyncScopeNames - Populates client supplied SmallVector with synchronization scope names registered...
bool isOperandSubregIdx(unsigned OpIdx) const
Return true if operand OpIdx is a subregister index.
Definition: MachineInstr.h:308
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:371
unsigned getAlignment() const
Return alignment of the basic block.
int getStackProtectorIndex() const
Return the index for the stack protector object.
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex, bool IsFixed, StringRef Name)
Print a stack object reference.
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
Address of a basic block.
virtual ArrayRef< const char * > getRegMaskNames() const =0
const PseudoSourceValue * getPseudoValue() const
void print(raw_ostream &O, bool IsForDebug=false) const
Implement operator<< on Value.
Definition: AsmWriter.cpp:3501
void convertStackObjects(yaml::MachineFunction &YMF, const MachineFunction &MF, ModuleSlotTracker &MST)
Definition: MIRPrinter.cpp:329
unsigned MaxCallFrameSize
~0u means: not computed yet.
This class prints out the machine instructions using the MIR serialization format.
Definition: MIRPrinter.cpp:139
std::vector< MachineStackObject > StackObjects
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
self_iterator getIterator()
Definition: ilist_node.h:82
bool hasComplexRegisterTies() const
Return true when an instruction has tied register that can&#39;t be determined by the instruction&#39;s descr...
MachineConstantPool * getConstantPool()
getConstantPool - Return the constant pool object for the current function.
static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:236
Serializable representation of MachineFrameInfo.
unsigned getNumVirtRegs() const
getNumVirtRegs - Return the number of virtual registers created.
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
void printMIR(raw_ostream &OS, const Module &M)
Print LLVM IR using the MIR serialization format to the given output stream.
Definition: MIRPrinter.cpp:917
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:761
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
const AMDGPUAS & AS
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
void printAsOperand(raw_ostream &O, bool PrintType=true, const Module *M=nullptr) const
Print the name of this Value out to the specified raw_ostream.
Definition: AsmWriter.cpp:3580
std::string & str()
Flushes the stream contents to the target string and returns the string&#39;s reference.
Definition: raw_ostream.h:478
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
static void printIRSlotNumber(raw_ostream &OS, int Slot)
Print an IRSlotNumber.
TargetIntrinsicInfo - Interface to description of machine instruction set.
const std::vector< MachineConstantPoolEntry > & getConstants() const
void print(raw_ostream &OS, AssemblyAnnotationWriter *AAW, bool ShouldPreserveUseListOrder=false, bool IsForDebug=false) const
Print the module to an output stream with an optional AssemblyAnnotationWriter.
Definition: AsmWriter.cpp:3418
unsigned findTiedOperandIdx(unsigned OpIdx) const
Given the index of a tied register operand, find the operand it is tied to.
Iterator for intrusive lists based on ilist_node.
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements...
Definition: SmallPtrSet.h:418
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
Generic predicate for ISel.
void print(raw_ostream &os, const TargetRegisterInfo *TRI=nullptr, const TargetIntrinsicInfo *IntrinsicInfo=nullptr) const
Print the MachineOperand to os.
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:862
Module.h This file contains the declarations for the Module class.
void printLLVMNameWithoutPrefix(raw_ostream &OS, StringRef Name)
Print out a name of an LLVM value without any prefixes.
Definition: AsmWriter.cpp:394
bool hasMustTailInVarArgFunc() const
Returns true if the function is variadic and contains a musttail call.
void printSyncScope(const LLVMContext &Context, SyncScope::ID SSID)
Definition: MIRPrinter.cpp:900
int64_t getImm() const
const Function & getFunction() const
Return the LLVM function that this machine code represents.
MCSymbol reference (for debug/eh info)
const uint32_t * getRegMask() const
getRegMask - Returns a bit mask of registers preserved by this RegMask operand.
Special value supplied for machine level alias analysis.
ArrayRef< std::pair< unsigned, unsigned > > liveins() const
A wrapper around std::string which contains a source range that&#39;s being set during parsing...
unsigned succ_size() const
static void printSubRegIdx(raw_ostream &OS, uint64_t Index, const TargetRegisterInfo *TRI)
Print a subreg index operand.
The access may modify the value stored in memory.
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:60
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
std::vector< MachineFunctionLiveIn > LiveIns
static void output(const Module &Mod, void *Ctxt, raw_ostream &OS)
Definition: MIRPrinter.cpp:177
bool isUpdatedCSRsInitialized() const
Returns true if the updated CSR list was initialized and false otherwise.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isEHPad() const
Returns true if the block is a landing pad.
bool exposesReturnsTwice() const
exposesReturnsTwice - Returns true if the function calls setjmp or any other similar functions with a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isAliasedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to an object that might be pointed to by an LLVM IR v...
std::vector< Entry > Entries
StringRef getName() const
Return a constant reference to the value&#39;s name.
Definition: Value.cpp:224
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
bool isReturnAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
#define I(x, y, z)
Definition: MD5.cpp:58
Flags getFlags() const
Return the raw flags of the source value,.
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
std::vector< MachineConstantPoolValue > Constants
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
int getOffsetAdjustment() const
Return the correction for frame offsets.
Abstract Stack Frame Index.
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo, const TargetRegisterInfo *TRI)
Definition: MIRPrinter.cpp:263
This file defines passes to print out IR in various granularities.
uint8_t getStackID(int ObjectIdx) const
void printAsOperand(raw_ostream &OS, const Module *M=nullptr) const
Print as operand.
Definition: AsmWriter.cpp:3624
MachineBasicBlock * getSavePoint() const
bool memoperands_empty() const
Return true if we don&#39;t have any memory operands which described the memory access done by this instr...
Definition: MachineInstr.h:397
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasProperty(Property P) const
std::vector< FixedMachineStackObject > FixedStackObjects
A raw_ostream that writes to an std::string.
Definition: raw_ostream.h:462
int64_t getOffset() const
For normal values, this is a byte offset added to the base address.
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
LLVM Value Representation.
Definition: Value.h:73
JTEntryKind getEntryKind() const
Floating-point immediate operand.
SyncScope::ID getSyncScopeID() const
Returns the synchronization scope ID for this memory operation.
void printIRValueReference(const Value &V)
Definition: MIRPrinter.cpp:709
#define LLVM_FALLTHROUGH
LLVM_FALLTHROUGH - Mark fallthrough cases in switch statements.
Definition: Compiler.h:235
const MCPhysReg * getCalleeSavedRegs() const
Returns list of callee saved registers.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
void printStackObjectReference(int FrameIndex)
Definition: MIRPrinter.cpp:729
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
bool isMaxCallFrameSizeComputed() const
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Address of indexed Constant in Constant Pool.
MachineJumpTableInfo::JTEntryKind Kind
unsigned getSimpleHint(unsigned VReg) const
getSimpleHint - same as getRegAllocationHint except it will only return a target independent hint...
MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST, const DenseMap< const uint32_t *, unsigned > &RegisterMaskIds, const DenseMap< int, FrameIndexOperand > &StackObjectOperandMapping)
Definition: MIRPrinter.cpp:151
const MachineJumpTableInfo * getJumpTableInfo() const
getJumpTableInfo - Return the jump table info object for the current function.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:298
int64_t getLocalFrameObjectCount() const
Return the number of objects allocated into the local object block.
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void print(const MachineFunction &MF)
Definition: MIRPrinter.cpp:196
uint32_t getNumerator() const
bool getFlag(MIFlag Flag) const
Return whether an MI flag is set.
Definition: MachineInstr.h:183
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Successors, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:489
bool isSpillSlotObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a spill slot.
bool isImplicit() const
bool hasCalls() const
Return true if the current function has any function calls.
Metadata reference (for debug info)
bool is_contained(R &&Range, const E &Element)
Wrapper function around std::find to detect if an element exists in a container.
Definition: STLExtras.h:873