LLVM  8.0.0svn
MIParser.cpp
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1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the parsing of machine instructions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MIParser.h"
15 #include "MILexer.h"
16 #include "llvm/ADT/APInt.h"
17 #include "llvm/ADT/APSInt.h"
18 #include "llvm/ADT/ArrayRef.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/None.h"
21 #include "llvm/ADT/Optional.h"
22 #include "llvm/ADT/SmallVector.h"
23 #include "llvm/ADT/StringMap.h"
24 #include "llvm/ADT/StringRef.h"
25 #include "llvm/ADT/StringSwitch.h"
26 #include "llvm/ADT/Twine.h"
28 #include "llvm/AsmParser/Parser.h"
42 #include "llvm/IR/BasicBlock.h"
43 #include "llvm/IR/Constants.h"
44 #include "llvm/IR/DataLayout.h"
46 #include "llvm/IR/DebugLoc.h"
47 #include "llvm/IR/Function.h"
48 #include "llvm/IR/InstrTypes.h"
49 #include "llvm/IR/Instructions.h"
50 #include "llvm/IR/Intrinsics.h"
51 #include "llvm/IR/Metadata.h"
52 #include "llvm/IR/Module.h"
54 #include "llvm/IR/Type.h"
55 #include "llvm/IR/Value.h"
57 #include "llvm/MC/LaneBitmask.h"
58 #include "llvm/MC/MCContext.h"
59 #include "llvm/MC/MCDwarf.h"
60 #include "llvm/MC/MCInstrDesc.h"
61 #include "llvm/MC/MCRegisterInfo.h"
64 #include "llvm/Support/Casting.h"
68 #include "llvm/Support/SMLoc.h"
69 #include "llvm/Support/SourceMgr.h"
73 #include <algorithm>
74 #include <cassert>
75 #include <cctype>
76 #include <cstddef>
77 #include <cstdint>
78 #include <limits>
79 #include <string>
80 #include <utility>
81 
82 using namespace llvm;
83 
85  SourceMgr &SM, const SlotMapping &IRSlots,
86  const Name2RegClassMap &Names2RegClasses,
87  const Name2RegBankMap &Names2RegBanks)
88  : MF(MF), SM(&SM), IRSlots(IRSlots), Names2RegClasses(Names2RegClasses),
89  Names2RegBanks(Names2RegBanks) {
90 }
91 
93  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
94  if (I.second) {
96  VRegInfo *Info = new (Allocator) VRegInfo;
98  I.first->second = Info;
99  }
100  return *I.first->second;
101 }
102 
104  assert(RegName != "" && "Expected named reg.");
105 
106  auto I = VRegInfosNamed.insert(std::make_pair(RegName.str(), nullptr));
107  if (I.second) {
108  VRegInfo *Info = new (Allocator) VRegInfo;
110  I.first->second = Info;
111  }
112  return *I.first->second;
113 }
114 
115 namespace {
116 
117 /// A wrapper struct around the 'MachineOperand' struct that includes a source
118 /// range and other attributes.
119 struct ParsedMachineOperand {
120  MachineOperand Operand;
121  StringRef::iterator Begin;
123  Optional<unsigned> TiedDefIdx;
124 
125  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
126  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
127  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
128  if (TiedDefIdx)
129  assert(Operand.isReg() && Operand.isUse() &&
130  "Only used register operands can be tied");
131  }
132 };
133 
134 class MIParser {
137  StringRef Source, CurrentSource;
138  MIToken Token;
140  /// Maps from instruction names to op codes.
141  StringMap<unsigned> Names2InstrOpCodes;
142  /// Maps from register names to registers.
143  StringMap<unsigned> Names2Regs;
144  /// Maps from register mask names to register masks.
145  StringMap<const uint32_t *> Names2RegMasks;
146  /// Maps from subregister names to subregister indices.
147  StringMap<unsigned> Names2SubRegIndices;
148  /// Maps from slot numbers to function's unnamed basic blocks.
149  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
150  /// Maps from slot numbers to function's unnamed values.
152  /// Maps from target index names to target indices.
153  StringMap<int> Names2TargetIndices;
154  /// Maps from direct target flag names to the direct target flag values.
155  StringMap<unsigned> Names2DirectTargetFlags;
156  /// Maps from direct target flag names to the bitmask target flag values.
157  StringMap<unsigned> Names2BitmaskTargetFlags;
158  /// Maps from MMO target flag names to MMO target flag values.
159  StringMap<MachineMemOperand::Flags> Names2MMOTargetFlags;
160 
161 public:
162  MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
163  StringRef Source);
164 
165  /// \p SkipChar gives the number of characters to skip before looking
166  /// for the next token.
167  void lex(unsigned SkipChar = 0);
168 
169  /// Report an error at the current location with the given message.
170  ///
171  /// This function always return true.
172  bool error(const Twine &Msg);
173 
174  /// Report an error at the given location with the given message.
175  ///
176  /// This function always return true.
177  bool error(StringRef::iterator Loc, const Twine &Msg);
178 
179  bool
180  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
181  bool parseBasicBlocks();
182  bool parse(MachineInstr *&MI);
183  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
184  bool parseStandaloneNamedRegister(unsigned &Reg);
185  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
186  bool parseStandaloneRegister(unsigned &Reg);
187  bool parseStandaloneStackObject(int &FI);
188  bool parseStandaloneMDNode(MDNode *&Node);
189 
190  bool
191  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
192  bool parseBasicBlock(MachineBasicBlock &MBB,
193  MachineBasicBlock *&AddFalthroughFrom);
194  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
195  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
196 
197  bool parseNamedRegister(unsigned &Reg);
198  bool parseVirtualRegister(VRegInfo *&Info);
199  bool parseNamedVirtualRegister(VRegInfo *&Info);
200  bool parseRegister(unsigned &Reg, VRegInfo *&VRegInfo);
201  bool parseRegisterFlag(unsigned &Flags);
202  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
203  bool parseSubRegisterIndex(unsigned &SubReg);
204  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
205  bool parseRegisterOperand(MachineOperand &Dest,
206  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
207  bool parseImmediateOperand(MachineOperand &Dest);
208  bool parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
209  const Constant *&C);
210  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
211  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
212  bool parseTypedImmediateOperand(MachineOperand &Dest);
213  bool parseFPImmediateOperand(MachineOperand &Dest);
215  bool parseMBBOperand(MachineOperand &Dest);
216  bool parseStackFrameIndex(int &FI);
217  bool parseStackObjectOperand(MachineOperand &Dest);
218  bool parseFixedStackFrameIndex(int &FI);
219  bool parseFixedStackObjectOperand(MachineOperand &Dest);
220  bool parseGlobalValue(GlobalValue *&GV);
221  bool parseGlobalAddressOperand(MachineOperand &Dest);
222  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
223  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
224  bool parseJumpTableIndexOperand(MachineOperand &Dest);
225  bool parseExternalSymbolOperand(MachineOperand &Dest);
226  bool parseMCSymbolOperand(MachineOperand &Dest);
227  bool parseMDNode(MDNode *&Node);
228  bool parseDIExpression(MDNode *&Expr);
229  bool parseMetadataOperand(MachineOperand &Dest);
230  bool parseCFIOffset(int &Offset);
231  bool parseCFIRegister(unsigned &Reg);
232  bool parseCFIEscapeValues(std::string& Values);
233  bool parseCFIOperand(MachineOperand &Dest);
234  bool parseIRBlock(BasicBlock *&BB, const Function &F);
235  bool parseBlockAddressOperand(MachineOperand &Dest);
236  bool parseIntrinsicOperand(MachineOperand &Dest);
237  bool parsePredicateOperand(MachineOperand &Dest);
238  bool parseTargetIndexOperand(MachineOperand &Dest);
239  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
240  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
241  bool parseMachineOperand(MachineOperand &Dest,
242  Optional<unsigned> &TiedDefIdx);
243  bool parseMachineOperandAndTargetFlags(MachineOperand &Dest,
244  Optional<unsigned> &TiedDefIdx);
245  bool parseOffset(int64_t &Offset);
246  bool parseAlignment(unsigned &Alignment);
247  bool parseAddrspace(unsigned &Addrspace);
248  bool parseOperandsOffset(MachineOperand &Op);
249  bool parseIRValue(const Value *&V);
250  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
251  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
252  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
253  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
254  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
255  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
256  bool parsePreOrPostInstrSymbol(MCSymbol *&Symbol);
257 
258 private:
259  /// Convert the integer literal in the current token into an unsigned integer.
260  ///
261  /// Return true if an error occurred.
262  bool getUnsigned(unsigned &Result);
263 
264  /// Convert the integer literal in the current token into an uint64.
265  ///
266  /// Return true if an error occurred.
267  bool getUint64(uint64_t &Result);
268 
269  /// Convert the hexadecimal literal in the current token into an unsigned
270  /// APInt with a minimum bitwidth required to represent the value.
271  ///
272  /// Return true if the literal does not represent an integer value.
273  bool getHexUint(APInt &Result);
274 
275  /// If the current token is of the given kind, consume it and return false.
276  /// Otherwise report an error and return true.
277  bool expectAndConsume(MIToken::TokenKind TokenKind);
278 
279  /// If the current token is of the given kind, consume it and return true.
280  /// Otherwise return false.
281  bool consumeIfPresent(MIToken::TokenKind TokenKind);
282 
283  void initNames2InstrOpCodes();
284 
285  /// Try to convert an instruction name to an opcode. Return true if the
286  /// instruction name is invalid.
287  bool parseInstrName(StringRef InstrName, unsigned &OpCode);
288 
289  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
290 
291  bool assignRegisterTies(MachineInstr &MI,
293 
294  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
295  const MCInstrDesc &MCID);
296 
297  void initNames2Regs();
298 
299  /// Try to convert a register name to a register number. Return true if the
300  /// register name is invalid.
301  bool getRegisterByName(StringRef RegName, unsigned &Reg);
302 
303  void initNames2RegMasks();
304 
305  /// Check if the given identifier is a name of a register mask.
306  ///
307  /// Return null if the identifier isn't a register mask.
308  const uint32_t *getRegMask(StringRef Identifier);
309 
310  void initNames2SubRegIndices();
311 
312  /// Check if the given identifier is a name of a subregister index.
313  ///
314  /// Return 0 if the name isn't a subregister index class.
315  unsigned getSubRegIndex(StringRef Name);
316 
317  const BasicBlock *getIRBlock(unsigned Slot);
318  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
319 
320  const Value *getIRValue(unsigned Slot);
321 
322  void initNames2TargetIndices();
323 
324  /// Try to convert a name of target index to the corresponding target index.
325  ///
326  /// Return true if the name isn't a name of a target index.
327  bool getTargetIndex(StringRef Name, int &Index);
328 
329  void initNames2DirectTargetFlags();
330 
331  /// Try to convert a name of a direct target flag to the corresponding
332  /// target flag.
333  ///
334  /// Return true if the name isn't a name of a direct flag.
335  bool getDirectTargetFlag(StringRef Name, unsigned &Flag);
336 
337  void initNames2BitmaskTargetFlags();
338 
339  /// Try to convert a name of a bitmask target flag to the corresponding
340  /// target flag.
341  ///
342  /// Return true if the name isn't a name of a bitmask target flag.
343  bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag);
344 
345  void initNames2MMOTargetFlags();
346 
347  /// Try to convert a name of a MachineMemOperand target flag to the
348  /// corresponding target flag.
349  ///
350  /// Return true if the name isn't a name of a target MMO flag.
351  bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag);
352 
353  /// Get or create an MCSymbol for a given name.
354  MCSymbol *getOrCreateMCSymbol(StringRef Name);
355 
356  /// parseStringConstant
357  /// ::= StringConstant
358  bool parseStringConstant(std::string &Result);
359 };
360 
361 } // end anonymous namespace
362 
363 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
365  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
366 {}
367 
368 void MIParser::lex(unsigned SkipChar) {
369  CurrentSource = lexMIToken(
370  CurrentSource.data() + SkipChar, Token,
371  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
372 }
373 
374 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
375 
376 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
377  const SourceMgr &SM = *PFS.SM;
378  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
379  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
380  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
381  // Create an ordinary diagnostic when the source manager's buffer is the
382  // source string.
384  return true;
385  }
386  // Create a diagnostic for a YAML string literal.
387  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
388  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
389  Source, None, None);
390  return true;
391 }
392 
393 static const char *toString(MIToken::TokenKind TokenKind) {
394  switch (TokenKind) {
395  case MIToken::comma:
396  return "','";
397  case MIToken::equal:
398  return "'='";
399  case MIToken::colon:
400  return "':'";
401  case MIToken::lparen:
402  return "'('";
403  case MIToken::rparen:
404  return "')'";
405  default:
406  return "<unknown token>";
407  }
408 }
409 
410 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
411  if (Token.isNot(TokenKind))
412  return error(Twine("expected ") + toString(TokenKind));
413  lex();
414  return false;
415 }
416 
417 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
418  if (Token.isNot(TokenKind))
419  return false;
420  lex();
421  return true;
422 }
423 
424 bool MIParser::parseBasicBlockDefinition(
427  unsigned ID = 0;
428  if (getUnsigned(ID))
429  return true;
430  auto Loc = Token.location();
431  auto Name = Token.stringValue();
432  lex();
433  bool HasAddressTaken = false;
434  bool IsLandingPad = false;
435  unsigned Alignment = 0;
436  BasicBlock *BB = nullptr;
437  if (consumeIfPresent(MIToken::lparen)) {
438  do {
439  // TODO: Report an error when multiple same attributes are specified.
440  switch (Token.kind()) {
442  HasAddressTaken = true;
443  lex();
444  break;
446  IsLandingPad = true;
447  lex();
448  break;
449  case MIToken::kw_align:
450  if (parseAlignment(Alignment))
451  return true;
452  break;
453  case MIToken::IRBlock:
454  // TODO: Report an error when both name and ir block are specified.
455  if (parseIRBlock(BB, MF.getFunction()))
456  return true;
457  lex();
458  break;
459  default:
460  break;
461  }
462  } while (consumeIfPresent(MIToken::comma));
463  if (expectAndConsume(MIToken::rparen))
464  return true;
465  }
466  if (expectAndConsume(MIToken::colon))
467  return true;
468 
469  if (!Name.empty()) {
470  BB = dyn_cast_or_null<BasicBlock>(
472  if (!BB)
473  return error(Loc, Twine("basic block '") + Name +
474  "' is not defined in the function '" +
475  MF.getName() + "'");
476  }
477  auto *MBB = MF.CreateMachineBasicBlock(BB);
478  MF.insert(MF.end(), MBB);
479  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
480  if (!WasInserted)
481  return error(Loc, Twine("redefinition of machine basic block with id #") +
482  Twine(ID));
483  if (Alignment)
484  MBB->setAlignment(Alignment);
485  if (HasAddressTaken)
486  MBB->setHasAddressTaken();
487  MBB->setIsEHPad(IsLandingPad);
488  return false;
489 }
490 
491 bool MIParser::parseBasicBlockDefinitions(
493  lex();
494  // Skip until the first machine basic block.
495  while (Token.is(MIToken::Newline))
496  lex();
497  if (Token.isErrorOrEOF())
498  return Token.isError();
499  if (Token.isNot(MIToken::MachineBasicBlockLabel))
500  return error("expected a basic block definition before instructions");
501  unsigned BraceDepth = 0;
502  do {
503  if (parseBasicBlockDefinition(MBBSlots))
504  return true;
505  bool IsAfterNewline = false;
506  // Skip until the next machine basic block.
507  while (true) {
508  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
509  Token.isErrorOrEOF())
510  break;
511  else if (Token.is(MIToken::MachineBasicBlockLabel))
512  return error("basic block definition should be located at the start of "
513  "the line");
514  else if (consumeIfPresent(MIToken::Newline)) {
515  IsAfterNewline = true;
516  continue;
517  }
518  IsAfterNewline = false;
519  if (Token.is(MIToken::lbrace))
520  ++BraceDepth;
521  if (Token.is(MIToken::rbrace)) {
522  if (!BraceDepth)
523  return error("extraneous closing brace ('}')");
524  --BraceDepth;
525  }
526  lex();
527  }
528  // Verify that we closed all of the '{' at the end of a file or a block.
529  if (!Token.isError() && BraceDepth)
530  return error("expected '}'"); // FIXME: Report a note that shows '{'.
531  } while (!Token.isErrorOrEOF());
532  return Token.isError();
533 }
534 
535 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
536  assert(Token.is(MIToken::kw_liveins));
537  lex();
538  if (expectAndConsume(MIToken::colon))
539  return true;
540  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
541  return false;
542  do {
543  if (Token.isNot(MIToken::NamedRegister))
544  return error("expected a named register");
545  unsigned Reg = 0;
546  if (parseNamedRegister(Reg))
547  return true;
548  lex();
550  if (consumeIfPresent(MIToken::colon)) {
551  // Parse lane mask.
552  if (Token.isNot(MIToken::IntegerLiteral) &&
553  Token.isNot(MIToken::HexLiteral))
554  return error("expected a lane mask");
555  static_assert(sizeof(LaneBitmask::Type) == sizeof(unsigned),
556  "Use correct get-function for lane mask");
558  if (getUnsigned(V))
559  return error("invalid lane mask value");
560  Mask = LaneBitmask(V);
561  lex();
562  }
563  MBB.addLiveIn(Reg, Mask);
564  } while (consumeIfPresent(MIToken::comma));
565  return false;
566 }
567 
568 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
569  assert(Token.is(MIToken::kw_successors));
570  lex();
571  if (expectAndConsume(MIToken::colon))
572  return true;
573  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
574  return false;
575  do {
576  if (Token.isNot(MIToken::MachineBasicBlock))
577  return error("expected a machine basic block reference");
578  MachineBasicBlock *SuccMBB = nullptr;
579  if (parseMBBReference(SuccMBB))
580  return true;
581  lex();
582  unsigned Weight = 0;
583  if (consumeIfPresent(MIToken::lparen)) {
584  if (Token.isNot(MIToken::IntegerLiteral) &&
585  Token.isNot(MIToken::HexLiteral))
586  return error("expected an integer literal after '('");
587  if (getUnsigned(Weight))
588  return true;
589  lex();
590  if (expectAndConsume(MIToken::rparen))
591  return true;
592  }
593  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
594  } while (consumeIfPresent(MIToken::comma));
595  MBB.normalizeSuccProbs();
596  return false;
597 }
598 
599 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
600  MachineBasicBlock *&AddFalthroughFrom) {
601  // Skip the definition.
603  lex();
604  if (consumeIfPresent(MIToken::lparen)) {
605  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
606  lex();
607  consumeIfPresent(MIToken::rparen);
608  }
609  consumeIfPresent(MIToken::colon);
610 
611  // Parse the liveins and successors.
612  // N.B: Multiple lists of successors and liveins are allowed and they're
613  // merged into one.
614  // Example:
615  // liveins: %edi
616  // liveins: %esi
617  //
618  // is equivalent to
619  // liveins: %edi, %esi
620  bool ExplicitSuccessors = false;
621  while (true) {
622  if (Token.is(MIToken::kw_successors)) {
623  if (parseBasicBlockSuccessors(MBB))
624  return true;
625  ExplicitSuccessors = true;
626  } else if (Token.is(MIToken::kw_liveins)) {
627  if (parseBasicBlockLiveins(MBB))
628  return true;
629  } else if (consumeIfPresent(MIToken::Newline)) {
630  continue;
631  } else
632  break;
633  if (!Token.isNewlineOrEOF())
634  return error("expected line break at the end of a list");
635  lex();
636  }
637 
638  // Parse the instructions.
639  bool IsInBundle = false;
640  MachineInstr *PrevMI = nullptr;
641  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
642  !Token.is(MIToken::Eof)) {
643  if (consumeIfPresent(MIToken::Newline))
644  continue;
645  if (consumeIfPresent(MIToken::rbrace)) {
646  // The first parsing pass should verify that all closing '}' have an
647  // opening '{'.
648  assert(IsInBundle);
649  IsInBundle = false;
650  continue;
651  }
652  MachineInstr *MI = nullptr;
653  if (parse(MI))
654  return true;
655  MBB.insert(MBB.end(), MI);
656  if (IsInBundle) {
659  }
660  PrevMI = MI;
661  if (Token.is(MIToken::lbrace)) {
662  if (IsInBundle)
663  return error("nested instruction bundles are not allowed");
664  lex();
665  // This instruction is the start of the bundle.
667  IsInBundle = true;
668  if (!Token.is(MIToken::Newline))
669  // The next instruction can be on the same line.
670  continue;
671  }
672  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
673  lex();
674  }
675 
676  // Construct successor list by searching for basic block machine operands.
677  if (!ExplicitSuccessors) {
679  bool IsFallthrough;
680  guessSuccessors(MBB, Successors, IsFallthrough);
681  for (MachineBasicBlock *Succ : Successors)
682  MBB.addSuccessor(Succ);
683 
684  if (IsFallthrough) {
685  AddFalthroughFrom = &MBB;
686  } else {
687  MBB.normalizeSuccProbs();
688  }
689  }
690 
691  return false;
692 }
693 
694 bool MIParser::parseBasicBlocks() {
695  lex();
696  // Skip until the first machine basic block.
697  while (Token.is(MIToken::Newline))
698  lex();
699  if (Token.isErrorOrEOF())
700  return Token.isError();
701  // The first parsing pass should have verified that this token is a MBB label
702  // in the 'parseBasicBlockDefinitions' method.
704  MachineBasicBlock *AddFalthroughFrom = nullptr;
705  do {
706  MachineBasicBlock *MBB = nullptr;
707  if (parseMBBReference(MBB))
708  return true;
709  if (AddFalthroughFrom) {
710  if (!AddFalthroughFrom->isSuccessor(MBB))
711  AddFalthroughFrom->addSuccessor(MBB);
712  AddFalthroughFrom->normalizeSuccProbs();
713  AddFalthroughFrom = nullptr;
714  }
715  if (parseBasicBlock(*MBB, AddFalthroughFrom))
716  return true;
717  // The method 'parseBasicBlock' should parse the whole block until the next
718  // block or the end of file.
719  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
720  } while (Token.isNot(MIToken::Eof));
721  return false;
722 }
723 
725  // Parse any register operands before '='
728  while (Token.isRegister() || Token.isRegisterFlag()) {
729  auto Loc = Token.location();
730  Optional<unsigned> TiedDefIdx;
731  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
732  return true;
733  Operands.push_back(
734  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
735  if (Token.isNot(MIToken::comma))
736  break;
737  lex();
738  }
739  if (!Operands.empty() && expectAndConsume(MIToken::equal))
740  return true;
741 
742  unsigned OpCode, Flags = 0;
743  if (Token.isError() || parseInstruction(OpCode, Flags))
744  return true;
745 
746  // Parse the remaining machine operands.
747  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_pre_instr_symbol) &&
748  Token.isNot(MIToken::kw_post_instr_symbol) &&
749  Token.isNot(MIToken::kw_debug_location) &&
750  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
751  auto Loc = Token.location();
752  Optional<unsigned> TiedDefIdx;
753  if (parseMachineOperandAndTargetFlags(MO, TiedDefIdx))
754  return true;
755  if (OpCode == TargetOpcode::DBG_VALUE && MO.isReg())
756  MO.setIsDebug();
757  Operands.push_back(
758  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
759  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
760  Token.is(MIToken::lbrace))
761  break;
762  if (Token.isNot(MIToken::comma))
763  return error("expected ',' before the next machine operand");
764  lex();
765  }
766 
767  MCSymbol *PreInstrSymbol = nullptr;
768  if (Token.is(MIToken::kw_pre_instr_symbol))
769  if (parsePreOrPostInstrSymbol(PreInstrSymbol))
770  return true;
771  MCSymbol *PostInstrSymbol = nullptr;
772  if (Token.is(MIToken::kw_post_instr_symbol))
773  if (parsePreOrPostInstrSymbol(PostInstrSymbol))
774  return true;
775 
776  DebugLoc DebugLocation;
777  if (Token.is(MIToken::kw_debug_location)) {
778  lex();
779  if (Token.isNot(MIToken::exclaim))
780  return error("expected a metadata node after 'debug-location'");
781  MDNode *Node = nullptr;
782  if (parseMDNode(Node))
783  return true;
784  if (!isa<DILocation>(Node))
785  return error("referenced metadata is not a DILocation");
786  DebugLocation = DebugLoc(Node);
787  }
788 
789  // Parse the machine memory operands.
791  if (Token.is(MIToken::coloncolon)) {
792  lex();
793  while (!Token.isNewlineOrEOF()) {
794  MachineMemOperand *MemOp = nullptr;
795  if (parseMachineMemoryOperand(MemOp))
796  return true;
797  MemOperands.push_back(MemOp);
798  if (Token.isNewlineOrEOF())
799  break;
800  if (Token.isNot(MIToken::comma))
801  return error("expected ',' before the next machine memory operand");
802  lex();
803  }
804  }
805 
806  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
807  if (!MCID.isVariadic()) {
808  // FIXME: Move the implicit operand verification to the machine verifier.
809  if (verifyImplicitOperands(Operands, MCID))
810  return true;
811  }
812 
813  // TODO: Check for extraneous machine operands.
814  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
815  MI->setFlags(Flags);
816  for (const auto &Operand : Operands)
817  MI->addOperand(MF, Operand.Operand);
818  if (assignRegisterTies(*MI, Operands))
819  return true;
820  if (PreInstrSymbol)
821  MI->setPreInstrSymbol(MF, PreInstrSymbol);
822  if (PostInstrSymbol)
823  MI->setPostInstrSymbol(MF, PostInstrSymbol);
824  if (!MemOperands.empty())
825  MI->setMemRefs(MF, MemOperands);
826  return false;
827 }
828 
829 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
830  lex();
831  if (Token.isNot(MIToken::MachineBasicBlock))
832  return error("expected a machine basic block reference");
833  if (parseMBBReference(MBB))
834  return true;
835  lex();
836  if (Token.isNot(MIToken::Eof))
837  return error(
838  "expected end of string after the machine basic block reference");
839  return false;
840 }
841 
842 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
843  lex();
844  if (Token.isNot(MIToken::NamedRegister))
845  return error("expected a named register");
846  if (parseNamedRegister(Reg))
847  return true;
848  lex();
849  if (Token.isNot(MIToken::Eof))
850  return error("expected end of string after the register reference");
851  return false;
852 }
853 
854 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
855  lex();
856  if (Token.isNot(MIToken::VirtualRegister))
857  return error("expected a virtual register");
858  if (parseVirtualRegister(Info))
859  return true;
860  lex();
861  if (Token.isNot(MIToken::Eof))
862  return error("expected end of string after the register reference");
863  return false;
864 }
865 
866 bool MIParser::parseStandaloneRegister(unsigned &Reg) {
867  lex();
868  if (Token.isNot(MIToken::NamedRegister) &&
869  Token.isNot(MIToken::VirtualRegister))
870  return error("expected either a named or virtual register");
871 
872  VRegInfo *Info;
873  if (parseRegister(Reg, Info))
874  return true;
875 
876  lex();
877  if (Token.isNot(MIToken::Eof))
878  return error("expected end of string after the register reference");
879  return false;
880 }
881 
882 bool MIParser::parseStandaloneStackObject(int &FI) {
883  lex();
884  if (Token.isNot(MIToken::StackObject))
885  return error("expected a stack object");
886  if (parseStackFrameIndex(FI))
887  return true;
888  if (Token.isNot(MIToken::Eof))
889  return error("expected end of string after the stack object reference");
890  return false;
891 }
892 
893 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
894  lex();
895  if (Token.is(MIToken::exclaim)) {
896  if (parseMDNode(Node))
897  return true;
898  } else if (Token.is(MIToken::md_diexpr)) {
899  if (parseDIExpression(Node))
900  return true;
901  } else
902  return error("expected a metadata node");
903  if (Token.isNot(MIToken::Eof))
904  return error("expected end of string after the metadata node");
905  return false;
906 }
907 
908 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
909  assert(MO.isImplicit());
910  return MO.isDef() ? "implicit-def" : "implicit";
911 }
912 
913 static std::string getRegisterName(const TargetRegisterInfo *TRI,
914  unsigned Reg) {
915  assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
916  return StringRef(TRI->getName(Reg)).lower();
917 }
918 
919 /// Return true if the parsed machine operands contain a given machine operand.
920 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
922  for (const auto &I : Operands) {
923  if (ImplicitOperand.isIdenticalTo(I.Operand))
924  return true;
925  }
926  return false;
927 }
928 
929 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
930  const MCInstrDesc &MCID) {
931  if (MCID.isCall())
932  // We can't verify call instructions as they can contain arbitrary implicit
933  // register and register mask operands.
934  return false;
935 
936  // Gather all the expected implicit operands.
937  SmallVector<MachineOperand, 4> ImplicitOperands;
938  if (MCID.ImplicitDefs)
939  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
940  ImplicitOperands.push_back(
941  MachineOperand::CreateReg(*ImpDefs, true, true));
942  if (MCID.ImplicitUses)
943  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
944  ImplicitOperands.push_back(
945  MachineOperand::CreateReg(*ImpUses, false, true));
946 
947  const auto *TRI = MF.getSubtarget().getRegisterInfo();
948  assert(TRI && "Expected target register info");
949  for (const auto &I : ImplicitOperands) {
950  if (isImplicitOperandIn(I, Operands))
951  continue;
952  return error(Operands.empty() ? Token.location() : Operands.back().End,
953  Twine("missing implicit register operand '") +
954  printImplicitRegisterFlag(I) + " $" +
955  getRegisterName(TRI, I.getReg()) + "'");
956  }
957  return false;
958 }
959 
960 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
961  // Allow frame and fast math flags for OPCODE
962  while (Token.is(MIToken::kw_frame_setup) ||
963  Token.is(MIToken::kw_frame_destroy) ||
964  Token.is(MIToken::kw_nnan) ||
965  Token.is(MIToken::kw_ninf) ||
966  Token.is(MIToken::kw_nsz) ||
967  Token.is(MIToken::kw_arcp) ||
968  Token.is(MIToken::kw_contract) ||
969  Token.is(MIToken::kw_afn) ||
970  Token.is(MIToken::kw_reassoc) ||
971  Token.is(MIToken::kw_nuw) ||
972  Token.is(MIToken::kw_nsw) ||
973  Token.is(MIToken::kw_exact)) {
974  // Mine frame and fast math flags
975  if (Token.is(MIToken::kw_frame_setup))
976  Flags |= MachineInstr::FrameSetup;
977  if (Token.is(MIToken::kw_frame_destroy))
979  if (Token.is(MIToken::kw_nnan))
980  Flags |= MachineInstr::FmNoNans;
981  if (Token.is(MIToken::kw_ninf))
982  Flags |= MachineInstr::FmNoInfs;
983  if (Token.is(MIToken::kw_nsz))
984  Flags |= MachineInstr::FmNsz;
985  if (Token.is(MIToken::kw_arcp))
986  Flags |= MachineInstr::FmArcp;
987  if (Token.is(MIToken::kw_contract))
988  Flags |= MachineInstr::FmContract;
989  if (Token.is(MIToken::kw_afn))
990  Flags |= MachineInstr::FmAfn;
991  if (Token.is(MIToken::kw_reassoc))
992  Flags |= MachineInstr::FmReassoc;
993  if (Token.is(MIToken::kw_nuw))
994  Flags |= MachineInstr::NoUWrap;
995  if (Token.is(MIToken::kw_nsw))
996  Flags |= MachineInstr::NoSWrap;
997  if (Token.is(MIToken::kw_exact))
998  Flags |= MachineInstr::IsExact;
999 
1000  lex();
1001  }
1002  if (Token.isNot(MIToken::Identifier))
1003  return error("expected a machine instruction");
1004  StringRef InstrName = Token.stringValue();
1005  if (parseInstrName(InstrName, OpCode))
1006  return error(Twine("unknown machine instruction name '") + InstrName + "'");
1007  lex();
1008  return false;
1009 }
1010 
1011 bool MIParser::parseNamedRegister(unsigned &Reg) {
1012  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
1013  StringRef Name = Token.stringValue();
1014  if (getRegisterByName(Name, Reg))
1015  return error(Twine("unknown register name '") + Name + "'");
1016  return false;
1017 }
1018 
1019 bool MIParser::parseNamedVirtualRegister(VRegInfo *&Info) {
1020  assert(Token.is(MIToken::NamedVirtualRegister) && "Expected NamedVReg token");
1021  StringRef Name = Token.stringValue();
1022  // TODO: Check that the VReg name is not the same as a physical register name.
1023  // If it is, then print a warning (when warnings are implemented).
1024  Info = &PFS.getVRegInfoNamed(Name);
1025  return false;
1026 }
1027 
1028 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
1029  if (Token.is(MIToken::NamedVirtualRegister))
1030  return parseNamedVirtualRegister(Info);
1031  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
1032  unsigned ID;
1033  if (getUnsigned(ID))
1034  return true;
1035  Info = &PFS.getVRegInfo(ID);
1036  return false;
1037 }
1038 
1039 bool MIParser::parseRegister(unsigned &Reg, VRegInfo *&Info) {
1040  switch (Token.kind()) {
1041  case MIToken::underscore:
1042  Reg = 0;
1043  return false;
1045  return parseNamedRegister(Reg);
1048  if (parseVirtualRegister(Info))
1049  return true;
1050  Reg = Info->VReg;
1051  return false;
1052  // TODO: Parse other register kinds.
1053  default:
1054  llvm_unreachable("The current token should be a register");
1055  }
1056 }
1057 
1058 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
1059  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
1060  return error("expected '_', register class, or register bank name");
1061  StringRef::iterator Loc = Token.location();
1062  StringRef Name = Token.stringValue();
1063 
1064  // Was it a register class?
1065  auto RCNameI = PFS.Names2RegClasses.find(Name);
1066  if (RCNameI != PFS.Names2RegClasses.end()) {
1067  lex();
1068  const TargetRegisterClass &RC = *RCNameI->getValue();
1069 
1070  switch (RegInfo.Kind) {
1071  case VRegInfo::UNKNOWN:
1072  case VRegInfo::NORMAL:
1073  RegInfo.Kind = VRegInfo::NORMAL;
1074  if (RegInfo.Explicit && RegInfo.D.RC != &RC) {
1076  return error(Loc, Twine("conflicting register classes, previously: ") +
1077  Twine(TRI.getRegClassName(RegInfo.D.RC)));
1078  }
1079  RegInfo.D.RC = &RC;
1080  RegInfo.Explicit = true;
1081  return false;
1082 
1083  case VRegInfo::GENERIC:
1084  case VRegInfo::REGBANK:
1085  return error(Loc, "register class specification on generic register");
1086  }
1087  llvm_unreachable("Unexpected register kind");
1088  }
1089 
1090  // Should be a register bank or a generic register.
1091  const RegisterBank *RegBank = nullptr;
1092  if (Name != "_") {
1093  auto RBNameI = PFS.Names2RegBanks.find(Name);
1094  if (RBNameI == PFS.Names2RegBanks.end())
1095  return error(Loc, "expected '_', register class, or register bank name");
1096  RegBank = RBNameI->getValue();
1097  }
1098 
1099  lex();
1100 
1101  switch (RegInfo.Kind) {
1102  case VRegInfo::UNKNOWN:
1103  case VRegInfo::GENERIC:
1104  case VRegInfo::REGBANK:
1105  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1106  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1107  return error(Loc, "conflicting generic register banks");
1108  RegInfo.D.RegBank = RegBank;
1109  RegInfo.Explicit = true;
1110  return false;
1111 
1112  case VRegInfo::NORMAL:
1113  return error(Loc, "register bank specification on normal register");
1114  }
1115  llvm_unreachable("Unexpected register kind");
1116 }
1117 
1118 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1119  const unsigned OldFlags = Flags;
1120  switch (Token.kind()) {
1121  case MIToken::kw_implicit:
1122  Flags |= RegState::Implicit;
1123  break;
1125  Flags |= RegState::ImplicitDefine;
1126  break;
1127  case MIToken::kw_def:
1128  Flags |= RegState::Define;
1129  break;
1130  case MIToken::kw_dead:
1131  Flags |= RegState::Dead;
1132  break;
1133  case MIToken::kw_killed:
1134  Flags |= RegState::Kill;
1135  break;
1136  case MIToken::kw_undef:
1137  Flags |= RegState::Undef;
1138  break;
1139  case MIToken::kw_internal:
1140  Flags |= RegState::InternalRead;
1141  break;
1143  Flags |= RegState::EarlyClobber;
1144  break;
1145  case MIToken::kw_debug_use:
1146  Flags |= RegState::Debug;
1147  break;
1148  case MIToken::kw_renamable:
1149  Flags |= RegState::Renamable;
1150  break;
1151  default:
1152  llvm_unreachable("The current token should be a register flag");
1153  }
1154  if (OldFlags == Flags)
1155  // We know that the same flag is specified more than once when the flags
1156  // weren't modified.
1157  return error("duplicate '" + Token.stringValue() + "' register flag");
1158  lex();
1159  return false;
1160 }
1161 
1162 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1163  assert(Token.is(MIToken::dot));
1164  lex();
1165  if (Token.isNot(MIToken::Identifier))
1166  return error("expected a subregister index after '.'");
1167  auto Name = Token.stringValue();
1168  SubReg = getSubRegIndex(Name);
1169  if (!SubReg)
1170  return error(Twine("use of unknown subregister index '") + Name + "'");
1171  lex();
1172  return false;
1173 }
1174 
1175 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1176  if (!consumeIfPresent(MIToken::kw_tied_def))
1177  return true;
1178  if (Token.isNot(MIToken::IntegerLiteral))
1179  return error("expected an integer literal after 'tied-def'");
1180  if (getUnsigned(TiedDefIdx))
1181  return true;
1182  lex();
1183  if (expectAndConsume(MIToken::rparen))
1184  return true;
1185  return false;
1186 }
1187 
1188 bool MIParser::assignRegisterTies(MachineInstr &MI,
1189  ArrayRef<ParsedMachineOperand> Operands) {
1190  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1191  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1192  if (!Operands[I].TiedDefIdx)
1193  continue;
1194  // The parser ensures that this operand is a register use, so we just have
1195  // to check the tied-def operand.
1196  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1197  if (DefIdx >= E)
1198  return error(Operands[I].Begin,
1199  Twine("use of invalid tied-def operand index '" +
1200  Twine(DefIdx) + "'; instruction has only ") +
1201  Twine(E) + " operands");
1202  const auto &DefOperand = Operands[DefIdx].Operand;
1203  if (!DefOperand.isReg() || !DefOperand.isDef())
1204  // FIXME: add note with the def operand.
1205  return error(Operands[I].Begin,
1206  Twine("use of invalid tied-def operand index '") +
1207  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1208  " isn't a defined register");
1209  // Check that the tied-def operand wasn't tied elsewhere.
1210  for (const auto &TiedPair : TiedRegisterPairs) {
1211  if (TiedPair.first == DefIdx)
1212  return error(Operands[I].Begin,
1213  Twine("the tied-def operand #") + Twine(DefIdx) +
1214  " is already tied with another register operand");
1215  }
1216  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1217  }
1218  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1219  // indices must be less than tied max.
1220  for (const auto &TiedPair : TiedRegisterPairs)
1221  MI.tieOperands(TiedPair.first, TiedPair.second);
1222  return false;
1223 }
1224 
1225 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1226  Optional<unsigned> &TiedDefIdx,
1227  bool IsDef) {
1228  unsigned Flags = IsDef ? RegState::Define : 0;
1229  while (Token.isRegisterFlag()) {
1230  if (parseRegisterFlag(Flags))
1231  return true;
1232  }
1233  if (!Token.isRegister())
1234  return error("expected a register after register flags");
1235  unsigned Reg;
1236  VRegInfo *RegInfo;
1237  if (parseRegister(Reg, RegInfo))
1238  return true;
1239  lex();
1240  unsigned SubReg = 0;
1241  if (Token.is(MIToken::dot)) {
1242  if (parseSubRegisterIndex(SubReg))
1243  return true;
1245  return error("subregister index expects a virtual register");
1246  }
1247  if (Token.is(MIToken::colon)) {
1249  return error("register class specification expects a virtual register");
1250  lex();
1251  if (parseRegisterClassOrBank(*RegInfo))
1252  return true;
1253  }
1255  if ((Flags & RegState::Define) == 0) {
1256  if (consumeIfPresent(MIToken::lparen)) {
1257  unsigned Idx;
1258  if (!parseRegisterTiedDefIndex(Idx))
1259  TiedDefIdx = Idx;
1260  else {
1261  // Try a redundant low-level type.
1262  LLT Ty;
1263  if (parseLowLevelType(Token.location(), Ty))
1264  return error("expected tied-def or low-level type after '('");
1265 
1266  if (expectAndConsume(MIToken::rparen))
1267  return true;
1268 
1269  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1270  return error("inconsistent type for generic virtual register");
1271 
1272  MRI.setType(Reg, Ty);
1273  }
1274  }
1275  } else if (consumeIfPresent(MIToken::lparen)) {
1276  // Virtual registers may have a tpe with GlobalISel.
1278  return error("unexpected type on physical register");
1279 
1280  LLT Ty;
1281  if (parseLowLevelType(Token.location(), Ty))
1282  return true;
1283 
1284  if (expectAndConsume(MIToken::rparen))
1285  return true;
1286 
1287  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1288  return error("inconsistent type for generic virtual register");
1289 
1290  MRI.setType(Reg, Ty);
1291  } else if (TargetRegisterInfo::isVirtualRegister(Reg)) {
1292  // Generic virtual registers must have a type.
1293  // If we end up here this means the type hasn't been specified and
1294  // this is bad!
1295  if (RegInfo->Kind == VRegInfo::GENERIC ||
1296  RegInfo->Kind == VRegInfo::REGBANK)
1297  return error("generic virtual registers must have a type");
1298  }
1300  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1301  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1302  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1303  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1304 
1305  return false;
1306 }
1307 
1308 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1309  assert(Token.is(MIToken::IntegerLiteral));
1310  const APSInt &Int = Token.integerValue();
1311  if (Int.getMinSignedBits() > 64)
1312  return error("integer literal is too large to be an immediate operand");
1313  Dest = MachineOperand::CreateImm(Int.getExtValue());
1314  lex();
1315  return false;
1316 }
1317 
1318 bool MIParser::parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1319  const Constant *&C) {
1320  auto Source = StringValue.str(); // The source has to be null terminated.
1321  SMDiagnostic Err;
1322  C = parseConstantValue(Source, Err, *MF.getFunction().getParent(),
1323  &PFS.IRSlots);
1324  if (!C)
1325  return error(Loc + Err.getColumnNo(), Err.getMessage());
1326  return false;
1327 }
1328 
1329 bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
1330  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1331  return true;
1332  lex();
1333  return false;
1334 }
1335 
1336 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1337  if (Token.range().front() == 's' || Token.range().front() == 'p') {
1338  StringRef SizeStr = Token.range().drop_front();
1339  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1340  return error("expected integers after 's'/'p' type character");
1341  }
1342 
1343  if (Token.range().front() == 's') {
1344  Ty = LLT::scalar(APSInt(Token.range().drop_front()).getZExtValue());
1345  lex();
1346  return false;
1347  } else if (Token.range().front() == 'p') {
1348  const DataLayout &DL = MF.getDataLayout();
1349  unsigned AS = APSInt(Token.range().drop_front()).getZExtValue();
1350  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1351  lex();
1352  return false;
1353  }
1354 
1355  // Now we're looking for a vector.
1356  if (Token.isNot(MIToken::less))
1357  return error(Loc,
1358  "expected sN, pA, <M x sN>, or <M x pA> for GlobalISel type");
1359  lex();
1360 
1361  if (Token.isNot(MIToken::IntegerLiteral))
1362  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1363  uint64_t NumElements = Token.integerValue().getZExtValue();
1364  lex();
1365 
1366  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1367  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1368  lex();
1369 
1370  if (Token.range().front() != 's' && Token.range().front() != 'p')
1371  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1372  StringRef SizeStr = Token.range().drop_front();
1373  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1374  return error("expected integers after 's'/'p' type character");
1375 
1376  if (Token.range().front() == 's')
1377  Ty = LLT::scalar(APSInt(Token.range().drop_front()).getZExtValue());
1378  else if (Token.range().front() == 'p') {
1379  const DataLayout &DL = MF.getDataLayout();
1380  unsigned AS = APSInt(Token.range().drop_front()).getZExtValue();
1381  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1382  } else
1383  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1384  lex();
1385 
1386  if (Token.isNot(MIToken::greater))
1387  return error(Loc, "expected <M x sN> or <M x pA> for vector type");
1388  lex();
1389 
1390  Ty = LLT::vector(NumElements, Ty);
1391  return false;
1392 }
1393 
1394 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1395  assert(Token.is(MIToken::Identifier));
1396  StringRef TypeStr = Token.range();
1397  if (TypeStr.front() != 'i' && TypeStr.front() != 's' &&
1398  TypeStr.front() != 'p')
1399  return error(
1400  "a typed immediate operand should start with one of 'i', 's', or 'p'");
1401  StringRef SizeStr = Token.range().drop_front();
1402  if (SizeStr.size() == 0 || !llvm::all_of(SizeStr, isdigit))
1403  return error("expected integers after 'i'/'s'/'p' type character");
1404 
1405  auto Loc = Token.location();
1406  lex();
1407  if (Token.isNot(MIToken::IntegerLiteral)) {
1408  if (Token.isNot(MIToken::Identifier) ||
1409  !(Token.range() == "true" || Token.range() == "false"))
1410  return error("expected an integer literal");
1411  }
1412  const Constant *C = nullptr;
1413  if (parseIRConstant(Loc, C))
1414  return true;
1415  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1416  return false;
1417 }
1418 
1419 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1420  auto Loc = Token.location();
1421  lex();
1422  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1423  Token.isNot(MIToken::HexLiteral))
1424  return error("expected a floating point literal");
1425  const Constant *C = nullptr;
1426  if (parseIRConstant(Loc, C))
1427  return true;
1428  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1429  return false;
1430 }
1431 
1432 bool MIParser::getUnsigned(unsigned &Result) {
1433  if (Token.hasIntegerValue()) {
1434  const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
1435  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1436  if (Val64 == Limit)
1437  return error("expected 32-bit integer (too large)");
1438  Result = Val64;
1439  return false;
1440  }
1441  if (Token.is(MIToken::HexLiteral)) {
1442  APInt A;
1443  if (getHexUint(A))
1444  return true;
1445  if (A.getBitWidth() > 32)
1446  return error("expected 32-bit integer (too large)");
1447  Result = A.getZExtValue();
1448  return false;
1449  }
1450  return true;
1451 }
1452 
1454  assert(Token.is(MIToken::MachineBasicBlock) ||
1456  unsigned Number;
1457  if (getUnsigned(Number))
1458  return true;
1459  auto MBBInfo = PFS.MBBSlots.find(Number);
1460  if (MBBInfo == PFS.MBBSlots.end())
1461  return error(Twine("use of undefined machine basic block #") +
1462  Twine(Number));
1463  MBB = MBBInfo->second;
1464  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
1465  // we drop the <irname> from the bb.<id>.<irname> format.
1466  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
1467  return error(Twine("the name of machine basic block #") + Twine(Number) +
1468  " isn't '" + Token.stringValue() + "'");
1469  return false;
1470 }
1471 
1472 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
1473  MachineBasicBlock *MBB;
1474  if (parseMBBReference(MBB))
1475  return true;
1476  Dest = MachineOperand::CreateMBB(MBB);
1477  lex();
1478  return false;
1479 }
1480 
1481 bool MIParser::parseStackFrameIndex(int &FI) {
1482  assert(Token.is(MIToken::StackObject));
1483  unsigned ID;
1484  if (getUnsigned(ID))
1485  return true;
1486  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
1487  if (ObjectInfo == PFS.StackObjectSlots.end())
1488  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
1489  "'");
1490  StringRef Name;
1491  if (const auto *Alloca =
1492  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
1493  Name = Alloca->getName();
1494  if (!Token.stringValue().empty() && Token.stringValue() != Name)
1495  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
1496  "' isn't '" + Token.stringValue() + "'");
1497  lex();
1498  FI = ObjectInfo->second;
1499  return false;
1500 }
1501 
1502 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
1503  int FI;
1504  if (parseStackFrameIndex(FI))
1505  return true;
1506  Dest = MachineOperand::CreateFI(FI);
1507  return false;
1508 }
1509 
1510 bool MIParser::parseFixedStackFrameIndex(int &FI) {
1511  assert(Token.is(MIToken::FixedStackObject));
1512  unsigned ID;
1513  if (getUnsigned(ID))
1514  return true;
1515  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
1516  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
1517  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
1518  Twine(ID) + "'");
1519  lex();
1520  FI = ObjectInfo->second;
1521  return false;
1522 }
1523 
1524 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
1525  int FI;
1526  if (parseFixedStackFrameIndex(FI))
1527  return true;
1528  Dest = MachineOperand::CreateFI(FI);
1529  return false;
1530 }
1531 
1532 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
1533  switch (Token.kind()) {
1535  const Module *M = MF.getFunction().getParent();
1536  GV = M->getNamedValue(Token.stringValue());
1537  if (!GV)
1538  return error(Twine("use of undefined global value '") + Token.range() +
1539  "'");
1540  break;
1541  }
1542  case MIToken::GlobalValue: {
1543  unsigned GVIdx;
1544  if (getUnsigned(GVIdx))
1545  return true;
1546  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
1547  return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
1548  "'");
1549  GV = PFS.IRSlots.GlobalValues[GVIdx];
1550  break;
1551  }
1552  default:
1553  llvm_unreachable("The current token should be a global value");
1554  }
1555  return false;
1556 }
1557 
1558 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
1559  GlobalValue *GV = nullptr;
1560  if (parseGlobalValue(GV))
1561  return true;
1562  lex();
1563  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
1564  if (parseOperandsOffset(Dest))
1565  return true;
1566  return false;
1567 }
1568 
1569 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
1570  assert(Token.is(MIToken::ConstantPoolItem));
1571  unsigned ID;
1572  if (getUnsigned(ID))
1573  return true;
1574  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
1575  if (ConstantInfo == PFS.ConstantPoolSlots.end())
1576  return error("use of undefined constant '%const." + Twine(ID) + "'");
1577  lex();
1578  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
1579  if (parseOperandsOffset(Dest))
1580  return true;
1581  return false;
1582 }
1583 
1584 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
1585  assert(Token.is(MIToken::JumpTableIndex));
1586  unsigned ID;
1587  if (getUnsigned(ID))
1588  return true;
1589  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
1590  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
1591  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
1592  lex();
1593  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
1594  return false;
1595 }
1596 
1597 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
1598  assert(Token.is(MIToken::ExternalSymbol));
1599  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
1600  lex();
1601  Dest = MachineOperand::CreateES(Symbol);
1602  if (parseOperandsOffset(Dest))
1603  return true;
1604  return false;
1605 }
1606 
1607 bool MIParser::parseMCSymbolOperand(MachineOperand &Dest) {
1608  assert(Token.is(MIToken::MCSymbol));
1609  MCSymbol *Symbol = getOrCreateMCSymbol(Token.stringValue());
1610  lex();
1611  Dest = MachineOperand::CreateMCSymbol(Symbol);
1612  if (parseOperandsOffset(Dest))
1613  return true;
1614  return false;
1615 }
1616 
1617 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
1618  assert(Token.is(MIToken::SubRegisterIndex));
1619  StringRef Name = Token.stringValue();
1620  unsigned SubRegIndex = getSubRegIndex(Token.stringValue());
1621  if (SubRegIndex == 0)
1622  return error(Twine("unknown subregister index '") + Name + "'");
1623  lex();
1624  Dest = MachineOperand::CreateImm(SubRegIndex);
1625  return false;
1626 }
1627 
1628 bool MIParser::parseMDNode(MDNode *&Node) {
1629  assert(Token.is(MIToken::exclaim));
1630 
1631  auto Loc = Token.location();
1632  lex();
1633  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1634  return error("expected metadata id after '!'");
1635  unsigned ID;
1636  if (getUnsigned(ID))
1637  return true;
1638  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1639  if (NodeInfo == PFS.IRSlots.MetadataNodes.end())
1640  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
1641  lex();
1642  Node = NodeInfo->second.get();
1643  return false;
1644 }
1645 
1646 bool MIParser::parseDIExpression(MDNode *&Expr) {
1647  assert(Token.is(MIToken::md_diexpr));
1648  lex();
1649 
1650  // FIXME: Share this parsing with the IL parser.
1651  SmallVector<uint64_t, 8> Elements;
1652 
1653  if (expectAndConsume(MIToken::lparen))
1654  return true;
1655 
1656  if (Token.isNot(MIToken::rparen)) {
1657  do {
1658  if (Token.is(MIToken::Identifier)) {
1659  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
1660  lex();
1661  Elements.push_back(Op);
1662  continue;
1663  }
1664  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
1665  }
1666 
1667  if (Token.isNot(MIToken::IntegerLiteral) ||
1668  Token.integerValue().isSigned())
1669  return error("expected unsigned integer");
1670 
1671  auto &U = Token.integerValue();
1672  if (U.ugt(UINT64_MAX))
1673  return error("element too large, limit is " + Twine(UINT64_MAX));
1674  Elements.push_back(U.getZExtValue());
1675  lex();
1676 
1677  } while (consumeIfPresent(MIToken::comma));
1678  }
1679 
1680  if (expectAndConsume(MIToken::rparen))
1681  return true;
1682 
1683  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
1684  return false;
1685 }
1686 
1687 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
1688  MDNode *Node = nullptr;
1689  if (Token.is(MIToken::exclaim)) {
1690  if (parseMDNode(Node))
1691  return true;
1692  } else if (Token.is(MIToken::md_diexpr)) {
1693  if (parseDIExpression(Node))
1694  return true;
1695  }
1696  Dest = MachineOperand::CreateMetadata(Node);
1697  return false;
1698 }
1699 
1700 bool MIParser::parseCFIOffset(int &Offset) {
1701  if (Token.isNot(MIToken::IntegerLiteral))
1702  return error("expected a cfi offset");
1703  if (Token.integerValue().getMinSignedBits() > 32)
1704  return error("expected a 32 bit integer (the cfi offset is too large)");
1705  Offset = (int)Token.integerValue().getExtValue();
1706  lex();
1707  return false;
1708 }
1709 
1710 bool MIParser::parseCFIRegister(unsigned &Reg) {
1711  if (Token.isNot(MIToken::NamedRegister))
1712  return error("expected a cfi register");
1713  unsigned LLVMReg;
1714  if (parseNamedRegister(LLVMReg))
1715  return true;
1716  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1717  assert(TRI && "Expected target register info");
1718  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
1719  if (DwarfReg < 0)
1720  return error("invalid DWARF register");
1721  Reg = (unsigned)DwarfReg;
1722  lex();
1723  return false;
1724 }
1725 
1726 bool MIParser::parseCFIEscapeValues(std::string &Values) {
1727  do {
1728  if (Token.isNot(MIToken::HexLiteral))
1729  return error("expected a hexadecimal literal");
1730  unsigned Value;
1731  if (getUnsigned(Value))
1732  return true;
1733  if (Value > UINT8_MAX)
1734  return error("expected a 8-bit integer (too large)");
1735  Values.push_back(static_cast<uint8_t>(Value));
1736  lex();
1737  } while (consumeIfPresent(MIToken::comma));
1738  return false;
1739 }
1740 
1741 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
1742  auto Kind = Token.kind();
1743  lex();
1744  int Offset;
1745  unsigned Reg;
1746  unsigned CFIIndex;
1747  switch (Kind) {
1749  if (parseCFIRegister(Reg))
1750  return true;
1751  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
1752  break;
1754  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1755  parseCFIOffset(Offset))
1756  return true;
1757  CFIIndex =
1758  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
1759  break;
1761  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1762  parseCFIOffset(Offset))
1763  return true;
1764  CFIIndex = MF.addFrameInst(
1765  MCCFIInstruction::createRelOffset(nullptr, Reg, Offset));
1766  break;
1768  if (parseCFIRegister(Reg))
1769  return true;
1770  CFIIndex =
1772  break;
1774  if (parseCFIOffset(Offset))
1775  return true;
1776  // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
1777  CFIIndex = MF.addFrameInst(
1778  MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
1779  break;
1781  if (parseCFIOffset(Offset))
1782  return true;
1783  CFIIndex = MF.addFrameInst(
1784  MCCFIInstruction::createAdjustCfaOffset(nullptr, Offset));
1785  break;
1787  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1788  parseCFIOffset(Offset))
1789  return true;
1790  // NB: MCCFIInstruction::createDefCfa negates the offset.
1791  CFIIndex =
1792  MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
1793  break;
1796  break;
1798  if (parseCFIRegister(Reg))
1799  return true;
1800  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
1801  break;
1804  break;
1806  if (parseCFIRegister(Reg))
1807  return true;
1808  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
1809  break;
1810  case MIToken::kw_cfi_register: {
1811  unsigned Reg2;
1812  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1813  parseCFIRegister(Reg2))
1814  return true;
1815 
1816  CFIIndex =
1817  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
1818  break;
1819  }
1821  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
1822  break;
1823  case MIToken::kw_cfi_escape: {
1824  std::string Values;
1825  if (parseCFIEscapeValues(Values))
1826  return true;
1827  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
1828  break;
1829  }
1830  default:
1831  // TODO: Parse the other CFI operands.
1832  llvm_unreachable("The current token should be a cfi operand");
1833  }
1834  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
1835  return false;
1836 }
1837 
1838 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
1839  switch (Token.kind()) {
1840  case MIToken::NamedIRBlock: {
1841  BB = dyn_cast_or_null<BasicBlock>(
1842  F.getValueSymbolTable()->lookup(Token.stringValue()));
1843  if (!BB)
1844  return error(Twine("use of undefined IR block '") + Token.range() + "'");
1845  break;
1846  }
1847  case MIToken::IRBlock: {
1848  unsigned SlotNumber = 0;
1849  if (getUnsigned(SlotNumber))
1850  return true;
1851  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
1852  if (!BB)
1853  return error(Twine("use of undefined IR block '%ir-block.") +
1854  Twine(SlotNumber) + "'");
1855  break;
1856  }
1857  default:
1858  llvm_unreachable("The current token should be an IR block reference");
1859  }
1860  return false;
1861 }
1862 
1863 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
1864  assert(Token.is(MIToken::kw_blockaddress));
1865  lex();
1866  if (expectAndConsume(MIToken::lparen))
1867  return true;
1868  if (Token.isNot(MIToken::GlobalValue) &&
1869  Token.isNot(MIToken::NamedGlobalValue))
1870  return error("expected a global value");
1871  GlobalValue *GV = nullptr;
1872  if (parseGlobalValue(GV))
1873  return true;
1874  auto *F = dyn_cast<Function>(GV);
1875  if (!F)
1876  return error("expected an IR function reference");
1877  lex();
1878  if (expectAndConsume(MIToken::comma))
1879  return true;
1880  BasicBlock *BB = nullptr;
1881  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
1882  return error("expected an IR block reference");
1883  if (parseIRBlock(BB, *F))
1884  return true;
1885  lex();
1886  if (expectAndConsume(MIToken::rparen))
1887  return true;
1888  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
1889  if (parseOperandsOffset(Dest))
1890  return true;
1891  return false;
1892 }
1893 
1894 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
1895  assert(Token.is(MIToken::kw_intrinsic));
1896  lex();
1897  if (expectAndConsume(MIToken::lparen))
1898  return error("expected syntax intrinsic(@llvm.whatever)");
1899 
1900  if (Token.isNot(MIToken::NamedGlobalValue))
1901  return error("expected syntax intrinsic(@llvm.whatever)");
1902 
1903  std::string Name = Token.stringValue();
1904  lex();
1905 
1906  if (expectAndConsume(MIToken::rparen))
1907  return error("expected ')' to terminate intrinsic name");
1908 
1909  // Find out what intrinsic we're dealing with, first try the global namespace
1910  // and then the target's private intrinsics if that fails.
1913  if (ID == Intrinsic::not_intrinsic && TII)
1914  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
1915 
1916  if (ID == Intrinsic::not_intrinsic)
1917  return error("unknown intrinsic name");
1919 
1920  return false;
1921 }
1922 
1923 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
1924  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
1925  bool IsFloat = Token.is(MIToken::kw_floatpred);
1926  lex();
1927 
1928  if (expectAndConsume(MIToken::lparen))
1929  return error("expected syntax intpred(whatever) or floatpred(whatever");
1930 
1931  if (Token.isNot(MIToken::Identifier))
1932  return error("whatever");
1933 
1934  CmpInst::Predicate Pred;
1935  if (IsFloat) {
1936  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
1937  .Case("false", CmpInst::FCMP_FALSE)
1938  .Case("oeq", CmpInst::FCMP_OEQ)
1939  .Case("ogt", CmpInst::FCMP_OGT)
1940  .Case("oge", CmpInst::FCMP_OGE)
1941  .Case("olt", CmpInst::FCMP_OLT)
1942  .Case("ole", CmpInst::FCMP_OLE)
1943  .Case("one", CmpInst::FCMP_ONE)
1944  .Case("ord", CmpInst::FCMP_ORD)
1945  .Case("uno", CmpInst::FCMP_UNO)
1946  .Case("ueq", CmpInst::FCMP_UEQ)
1947  .Case("ugt", CmpInst::FCMP_UGT)
1948  .Case("uge", CmpInst::FCMP_UGE)
1949  .Case("ult", CmpInst::FCMP_ULT)
1950  .Case("ule", CmpInst::FCMP_ULE)
1951  .Case("une", CmpInst::FCMP_UNE)
1952  .Case("true", CmpInst::FCMP_TRUE)
1954  if (!CmpInst::isFPPredicate(Pred))
1955  return error("invalid floating-point predicate");
1956  } else {
1957  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
1958  .Case("eq", CmpInst::ICMP_EQ)
1959  .Case("ne", CmpInst::ICMP_NE)
1960  .Case("sgt", CmpInst::ICMP_SGT)
1961  .Case("sge", CmpInst::ICMP_SGE)
1962  .Case("slt", CmpInst::ICMP_SLT)
1963  .Case("sle", CmpInst::ICMP_SLE)
1964  .Case("ugt", CmpInst::ICMP_UGT)
1965  .Case("uge", CmpInst::ICMP_UGE)
1966  .Case("ult", CmpInst::ICMP_ULT)
1967  .Case("ule", CmpInst::ICMP_ULE)
1969  if (!CmpInst::isIntPredicate(Pred))
1970  return error("invalid integer predicate");
1971  }
1972 
1973  lex();
1974  Dest = MachineOperand::CreatePredicate(Pred);
1975  if (expectAndConsume(MIToken::rparen))
1976  return error("predicate should be terminated by ')'.");
1977 
1978  return false;
1979 }
1980 
1981 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
1982  assert(Token.is(MIToken::kw_target_index));
1983  lex();
1984  if (expectAndConsume(MIToken::lparen))
1985  return true;
1986  if (Token.isNot(MIToken::Identifier))
1987  return error("expected the name of the target index");
1988  int Index = 0;
1989  if (getTargetIndex(Token.stringValue(), Index))
1990  return error("use of undefined target index '" + Token.stringValue() + "'");
1991  lex();
1992  if (expectAndConsume(MIToken::rparen))
1993  return true;
1994  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
1995  if (parseOperandsOffset(Dest))
1996  return true;
1997  return false;
1998 }
1999 
2000 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
2001  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
2002  lex();
2003  if (expectAndConsume(MIToken::lparen))
2004  return true;
2005 
2007  while (true) {
2008  if (Token.isNot(MIToken::NamedRegister))
2009  return error("expected a named register");
2010  unsigned Reg;
2011  if (parseNamedRegister(Reg))
2012  return true;
2013  lex();
2014  Mask[Reg / 32] |= 1U << (Reg % 32);
2015  // TODO: Report an error if the same register is used more than once.
2016  if (Token.isNot(MIToken::comma))
2017  break;
2018  lex();
2019  }
2020 
2021  if (expectAndConsume(MIToken::rparen))
2022  return true;
2023  Dest = MachineOperand::CreateRegMask(Mask);
2024  return false;
2025 }
2026 
2027 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
2028  assert(Token.is(MIToken::kw_liveout));
2030  lex();
2031  if (expectAndConsume(MIToken::lparen))
2032  return true;
2033  while (true) {
2034  if (Token.isNot(MIToken::NamedRegister))
2035  return error("expected a named register");
2036  unsigned Reg;
2037  if (parseNamedRegister(Reg))
2038  return true;
2039  lex();
2040  Mask[Reg / 32] |= 1U << (Reg % 32);
2041  // TODO: Report an error if the same register is used more than once.
2042  if (Token.isNot(MIToken::comma))
2043  break;
2044  lex();
2045  }
2046  if (expectAndConsume(MIToken::rparen))
2047  return true;
2048  Dest = MachineOperand::CreateRegLiveOut(Mask);
2049  return false;
2050 }
2051 
2052 bool MIParser::parseMachineOperand(MachineOperand &Dest,
2053  Optional<unsigned> &TiedDefIdx) {
2054  switch (Token.kind()) {
2055  case MIToken::kw_implicit:
2057  case MIToken::kw_def:
2058  case MIToken::kw_dead:
2059  case MIToken::kw_killed:
2060  case MIToken::kw_undef:
2061  case MIToken::kw_internal:
2063  case MIToken::kw_debug_use:
2064  case MIToken::kw_renamable:
2065  case MIToken::underscore:
2069  return parseRegisterOperand(Dest, TiedDefIdx);
2071  return parseImmediateOperand(Dest);
2072  case MIToken::kw_half:
2073  case MIToken::kw_float:
2074  case MIToken::kw_double:
2075  case MIToken::kw_x86_fp80:
2076  case MIToken::kw_fp128:
2077  case MIToken::kw_ppc_fp128:
2078  return parseFPImmediateOperand(Dest);
2080  return parseMBBOperand(Dest);
2081  case MIToken::StackObject:
2082  return parseStackObjectOperand(Dest);
2084  return parseFixedStackObjectOperand(Dest);
2085  case MIToken::GlobalValue:
2087  return parseGlobalAddressOperand(Dest);
2089  return parseConstantPoolIndexOperand(Dest);
2091  return parseJumpTableIndexOperand(Dest);
2093  return parseExternalSymbolOperand(Dest);
2094  case MIToken::MCSymbol:
2095  return parseMCSymbolOperand(Dest);
2097  return parseSubRegisterIndexOperand(Dest);
2098  case MIToken::md_diexpr:
2099  case MIToken::exclaim:
2100  return parseMetadataOperand(Dest);
2115  return parseCFIOperand(Dest);
2117  return parseBlockAddressOperand(Dest);
2118  case MIToken::kw_intrinsic:
2119  return parseIntrinsicOperand(Dest);
2121  return parseTargetIndexOperand(Dest);
2122  case MIToken::kw_liveout:
2123  return parseLiveoutRegisterMaskOperand(Dest);
2124  case MIToken::kw_floatpred:
2125  case MIToken::kw_intpred:
2126  return parsePredicateOperand(Dest);
2127  case MIToken::Error:
2128  return true;
2129  case MIToken::Identifier:
2130  if (const auto *RegMask = getRegMask(Token.stringValue())) {
2131  Dest = MachineOperand::CreateRegMask(RegMask);
2132  lex();
2133  break;
2134  } else if (Token.stringValue() == "CustomRegMask") {
2135  return parseCustomRegisterMaskOperand(Dest);
2136  } else
2137  return parseTypedImmediateOperand(Dest);
2138  default:
2139  // FIXME: Parse the MCSymbol machine operand.
2140  return error("expected a machine operand");
2141  }
2142  return false;
2143 }
2144 
2145 bool MIParser::parseMachineOperandAndTargetFlags(
2146  MachineOperand &Dest, Optional<unsigned> &TiedDefIdx) {
2147  unsigned TF = 0;
2148  bool HasTargetFlags = false;
2149  if (Token.is(MIToken::kw_target_flags)) {
2150  HasTargetFlags = true;
2151  lex();
2152  if (expectAndConsume(MIToken::lparen))
2153  return true;
2154  if (Token.isNot(MIToken::Identifier))
2155  return error("expected the name of the target flag");
2156  if (getDirectTargetFlag(Token.stringValue(), TF)) {
2157  if (getBitmaskTargetFlag(Token.stringValue(), TF))
2158  return error("use of undefined target flag '" + Token.stringValue() +
2159  "'");
2160  }
2161  lex();
2162  while (Token.is(MIToken::comma)) {
2163  lex();
2164  if (Token.isNot(MIToken::Identifier))
2165  return error("expected the name of the target flag");
2166  unsigned BitFlag = 0;
2167  if (getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2168  return error("use of undefined target flag '" + Token.stringValue() +
2169  "'");
2170  // TODO: Report an error when using a duplicate bit target flag.
2171  TF |= BitFlag;
2172  lex();
2173  }
2174  if (expectAndConsume(MIToken::rparen))
2175  return true;
2176  }
2177  auto Loc = Token.location();
2178  if (parseMachineOperand(Dest, TiedDefIdx))
2179  return true;
2180  if (!HasTargetFlags)
2181  return false;
2182  if (Dest.isReg())
2183  return error(Loc, "register operands can't have target flags");
2184  Dest.setTargetFlags(TF);
2185  return false;
2186 }
2187 
2188 bool MIParser::parseOffset(int64_t &Offset) {
2189  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2190  return false;
2191  StringRef Sign = Token.range();
2192  bool IsNegative = Token.is(MIToken::minus);
2193  lex();
2194  if (Token.isNot(MIToken::IntegerLiteral))
2195  return error("expected an integer literal after '" + Sign + "'");
2196  if (Token.integerValue().getMinSignedBits() > 64)
2197  return error("expected 64-bit integer (too large)");
2198  Offset = Token.integerValue().getExtValue();
2199  if (IsNegative)
2200  Offset = -Offset;
2201  lex();
2202  return false;
2203 }
2204 
2205 bool MIParser::parseAlignment(unsigned &Alignment) {
2206  assert(Token.is(MIToken::kw_align));
2207  lex();
2208  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2209  return error("expected an integer literal after 'align'");
2210  if (getUnsigned(Alignment))
2211  return true;
2212  lex();
2213  return false;
2214 }
2215 
2216 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2217  assert(Token.is(MIToken::kw_addrspace));
2218  lex();
2219  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2220  return error("expected an integer literal after 'addrspace'");
2221  if (getUnsigned(Addrspace))
2222  return true;
2223  lex();
2224  return false;
2225 }
2226 
2227 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2228  int64_t Offset = 0;
2229  if (parseOffset(Offset))
2230  return true;
2231  Op.setOffset(Offset);
2232  return false;
2233 }
2234 
2235 bool MIParser::parseIRValue(const Value *&V) {
2236  switch (Token.kind()) {
2237  case MIToken::NamedIRValue: {
2238  V = MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
2239  break;
2240  }
2241  case MIToken::IRValue: {
2242  unsigned SlotNumber = 0;
2243  if (getUnsigned(SlotNumber))
2244  return true;
2245  V = getIRValue(SlotNumber);
2246  break;
2247  }
2249  case MIToken::GlobalValue: {
2250  GlobalValue *GV = nullptr;
2251  if (parseGlobalValue(GV))
2252  return true;
2253  V = GV;
2254  break;
2255  }
2256  case MIToken::QuotedIRValue: {
2257  const Constant *C = nullptr;
2258  if (parseIRConstant(Token.location(), Token.stringValue(), C))
2259  return true;
2260  V = C;
2261  break;
2262  }
2263  default:
2264  llvm_unreachable("The current token should be an IR block reference");
2265  }
2266  if (!V)
2267  return error(Twine("use of undefined IR value '") + Token.range() + "'");
2268  return false;
2269 }
2270 
2271 bool MIParser::getUint64(uint64_t &Result) {
2272  if (Token.hasIntegerValue()) {
2273  if (Token.integerValue().getActiveBits() > 64)
2274  return error("expected 64-bit integer (too large)");
2275  Result = Token.integerValue().getZExtValue();
2276  return false;
2277  }
2278  if (Token.is(MIToken::HexLiteral)) {
2279  APInt A;
2280  if (getHexUint(A))
2281  return true;
2282  if (A.getBitWidth() > 64)
2283  return error("expected 64-bit integer (too large)");
2284  Result = A.getZExtValue();
2285  return false;
2286  }
2287  return true;
2288 }
2289 
2290 bool MIParser::getHexUint(APInt &Result) {
2291  assert(Token.is(MIToken::HexLiteral));
2292  StringRef S = Token.range();
2293  assert(S[0] == '0' && tolower(S[1]) == 'x');
2294  // This could be a floating point literal with a special prefix.
2295  if (!isxdigit(S[2]))
2296  return true;
2297  StringRef V = S.substr(2);
2298  APInt A(V.size()*4, V, 16);
2299 
2300  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
2301  // sure it isn't the case before constructing result.
2302  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
2303  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
2304  return false;
2305 }
2306 
2307 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
2308  const auto OldFlags = Flags;
2309  switch (Token.kind()) {
2310  case MIToken::kw_volatile:
2312  break;
2315  break;
2318  break;
2319  case MIToken::kw_invariant:
2321  break;
2322  case MIToken::StringConstant: {
2324  if (getMMOTargetFlag(Token.stringValue(), TF))
2325  return error("use of undefined target MMO flag '" + Token.stringValue() +
2326  "'");
2327  Flags |= TF;
2328  break;
2329  }
2330  default:
2331  llvm_unreachable("The current token should be a memory operand flag");
2332  }
2333  if (OldFlags == Flags)
2334  // We know that the same flag is specified more than once when the flags
2335  // weren't modified.
2336  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
2337  lex();
2338  return false;
2339 }
2340 
2341 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
2342  switch (Token.kind()) {
2343  case MIToken::kw_stack:
2344  PSV = MF.getPSVManager().getStack();
2345  break;
2346  case MIToken::kw_got:
2347  PSV = MF.getPSVManager().getGOT();
2348  break;
2350  PSV = MF.getPSVManager().getJumpTable();
2351  break;
2353  PSV = MF.getPSVManager().getConstantPool();
2354  break;
2356  int FI;
2357  if (parseFixedStackFrameIndex(FI))
2358  return true;
2359  PSV = MF.getPSVManager().getFixedStack(FI);
2360  // The token was already consumed, so use return here instead of break.
2361  return false;
2362  }
2363  case MIToken::StackObject: {
2364  int FI;
2365  if (parseStackFrameIndex(FI))
2366  return true;
2367  PSV = MF.getPSVManager().getFixedStack(FI);
2368  // The token was already consumed, so use return here instead of break.
2369  return false;
2370  }
2372  lex();
2373  switch (Token.kind()) {
2374  case MIToken::GlobalValue:
2376  GlobalValue *GV = nullptr;
2377  if (parseGlobalValue(GV))
2378  return true;
2380  break;
2381  }
2384  MF.createExternalSymbolName(Token.stringValue()));
2385  break;
2386  default:
2387  return error(
2388  "expected a global value or an external symbol after 'call-entry'");
2389  }
2390  break;
2391  default:
2392  llvm_unreachable("The current token should be pseudo source value");
2393  }
2394  lex();
2395  return false;
2396 }
2397 
2398 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
2399  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
2400  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
2401  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
2402  Token.is(MIToken::kw_call_entry)) {
2403  const PseudoSourceValue *PSV = nullptr;
2404  if (parseMemoryPseudoSourceValue(PSV))
2405  return true;
2406  int64_t Offset = 0;
2407  if (parseOffset(Offset))
2408  return true;
2409  Dest = MachinePointerInfo(PSV, Offset);
2410  return false;
2411  }
2412  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
2413  Token.isNot(MIToken::GlobalValue) &&
2414  Token.isNot(MIToken::NamedGlobalValue) &&
2415  Token.isNot(MIToken::QuotedIRValue))
2416  return error("expected an IR value reference");
2417  const Value *V = nullptr;
2418  if (parseIRValue(V))
2419  return true;
2420  if (!V->getType()->isPointerTy())
2421  return error("expected a pointer IR value");
2422  lex();
2423  int64_t Offset = 0;
2424  if (parseOffset(Offset))
2425  return true;
2426  Dest = MachinePointerInfo(V, Offset);
2427  return false;
2428 }
2429 
2430 bool MIParser::parseOptionalScope(LLVMContext &Context,
2431  SyncScope::ID &SSID) {
2432  SSID = SyncScope::System;
2433  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
2434  lex();
2435  if (expectAndConsume(MIToken::lparen))
2436  return error("expected '(' in syncscope");
2437 
2438  std::string SSN;
2439  if (parseStringConstant(SSN))
2440  return true;
2441 
2442  SSID = Context.getOrInsertSyncScopeID(SSN);
2443  if (expectAndConsume(MIToken::rparen))
2444  return error("expected ')' in syncscope");
2445  }
2446 
2447  return false;
2448 }
2449 
2450 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
2451  Order = AtomicOrdering::NotAtomic;
2452  if (Token.isNot(MIToken::Identifier))
2453  return false;
2454 
2455  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
2456  .Case("unordered", AtomicOrdering::Unordered)
2457  .Case("monotonic", AtomicOrdering::Monotonic)
2458  .Case("acquire", AtomicOrdering::Acquire)
2459  .Case("release", AtomicOrdering::Release)
2463 
2464  if (Order != AtomicOrdering::NotAtomic) {
2465  lex();
2466  return false;
2467  }
2468 
2469  return error("expected an atomic scope, ordering or a size specification");
2470 }
2471 
2472 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
2473  if (expectAndConsume(MIToken::lparen))
2474  return true;
2476  while (Token.isMemoryOperandFlag()) {
2477  if (parseMemoryOperandFlag(Flags))
2478  return true;
2479  }
2480  if (Token.isNot(MIToken::Identifier) ||
2481  (Token.stringValue() != "load" && Token.stringValue() != "store"))
2482  return error("expected 'load' or 'store' memory operation");
2483  if (Token.stringValue() == "load")
2484  Flags |= MachineMemOperand::MOLoad;
2485  else
2486  Flags |= MachineMemOperand::MOStore;
2487  lex();
2488 
2489  // Optional 'store' for operands that both load and store.
2490  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
2491  Flags |= MachineMemOperand::MOStore;
2492  lex();
2493  }
2494 
2495  // Optional synchronization scope.
2496  SyncScope::ID SSID;
2497  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
2498  return true;
2499 
2500  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
2501  AtomicOrdering Order, FailureOrder;
2502  if (parseOptionalAtomicOrdering(Order))
2503  return true;
2504 
2505  if (parseOptionalAtomicOrdering(FailureOrder))
2506  return true;
2507 
2508  if (Token.isNot(MIToken::IntegerLiteral) &&
2509  Token.isNot(MIToken::kw_unknown_size))
2510  return error("expected the size integer literal or 'unknown-size' after "
2511  "memory operation");
2512  uint64_t Size;
2513  if (Token.is(MIToken::IntegerLiteral)) {
2514  if (getUint64(Size))
2515  return true;
2516  } else if (Token.is(MIToken::kw_unknown_size)) {
2518  }
2519  lex();
2520 
2522  if (Token.is(MIToken::Identifier)) {
2523  const char *Word =
2524  ((Flags & MachineMemOperand::MOLoad) &&
2525  (Flags & MachineMemOperand::MOStore))
2526  ? "on"
2527  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
2528  if (Token.stringValue() != Word)
2529  return error(Twine("expected '") + Word + "'");
2530  lex();
2531 
2532  if (parseMachinePointerInfo(Ptr))
2533  return true;
2534  }
2535  unsigned BaseAlignment = (Size != MemoryLocation::UnknownSize ? Size : 1);
2536  AAMDNodes AAInfo;
2537  MDNode *Range = nullptr;
2538  while (consumeIfPresent(MIToken::comma)) {
2539  switch (Token.kind()) {
2540  case MIToken::kw_align:
2541  if (parseAlignment(BaseAlignment))
2542  return true;
2543  break;
2544  case MIToken::kw_addrspace:
2545  if (parseAddrspace(Ptr.AddrSpace))
2546  return true;
2547  break;
2548  case MIToken::md_tbaa:
2549  lex();
2550  if (parseMDNode(AAInfo.TBAA))
2551  return true;
2552  break;
2554  lex();
2555  if (parseMDNode(AAInfo.Scope))
2556  return true;
2557  break;
2558  case MIToken::md_noalias:
2559  lex();
2560  if (parseMDNode(AAInfo.NoAlias))
2561  return true;
2562  break;
2563  case MIToken::md_range:
2564  lex();
2565  if (parseMDNode(Range))
2566  return true;
2567  break;
2568  // TODO: Report an error on duplicate metadata nodes.
2569  default:
2570  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
2571  "'!noalias' or '!range'");
2572  }
2573  }
2574  if (expectAndConsume(MIToken::rparen))
2575  return true;
2576  Dest = MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment, AAInfo, Range,
2577  SSID, Order, FailureOrder);
2578  return false;
2579 }
2580 
2581 bool MIParser::parsePreOrPostInstrSymbol(MCSymbol *&Symbol) {
2582  assert((Token.is(MIToken::kw_pre_instr_symbol) ||
2583  Token.is(MIToken::kw_post_instr_symbol)) &&
2584  "Invalid token for a pre- post-instruction symbol!");
2585  lex();
2586  if (Token.isNot(MIToken::MCSymbol))
2587  return error("expected a symbol after 'pre-instr-symbol'");
2588  Symbol = getOrCreateMCSymbol(Token.stringValue());
2589  lex();
2590  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
2591  Token.is(MIToken::lbrace))
2592  return false;
2593  if (Token.isNot(MIToken::comma))
2594  return error("expected ',' before the next machine operand");
2595  lex();
2596  return false;
2597 }
2598 
2599 void MIParser::initNames2InstrOpCodes() {
2600  if (!Names2InstrOpCodes.empty())
2601  return;
2602  const auto *TII = MF.getSubtarget().getInstrInfo();
2603  assert(TII && "Expected target instruction info");
2604  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
2605  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
2606 }
2607 
2608 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
2609  initNames2InstrOpCodes();
2610  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
2611  if (InstrInfo == Names2InstrOpCodes.end())
2612  return true;
2613  OpCode = InstrInfo->getValue();
2614  return false;
2615 }
2616 
2617 void MIParser::initNames2Regs() {
2618  if (!Names2Regs.empty())
2619  return;
2620  // The '%noreg' register is the register 0.
2621  Names2Regs.insert(std::make_pair("noreg", 0));
2622  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2623  assert(TRI && "Expected target register info");
2624  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
2625  bool WasInserted =
2626  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
2627  .second;
2628  (void)WasInserted;
2629  assert(WasInserted && "Expected registers to be unique case-insensitively");
2630  }
2631 }
2632 
2633 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
2634  initNames2Regs();
2635  auto RegInfo = Names2Regs.find(RegName);
2636  if (RegInfo == Names2Regs.end())
2637  return true;
2638  Reg = RegInfo->getValue();
2639  return false;
2640 }
2641 
2642 void MIParser::initNames2RegMasks() {
2643  if (!Names2RegMasks.empty())
2644  return;
2645  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2646  assert(TRI && "Expected target register info");
2647  ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
2648  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
2649  assert(RegMasks.size() == RegMaskNames.size());
2650  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
2651  Names2RegMasks.insert(
2652  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
2653 }
2654 
2655 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
2656  initNames2RegMasks();
2657  auto RegMaskInfo = Names2RegMasks.find(Identifier);
2658  if (RegMaskInfo == Names2RegMasks.end())
2659  return nullptr;
2660  return RegMaskInfo->getValue();
2661 }
2662 
2663 void MIParser::initNames2SubRegIndices() {
2664  if (!Names2SubRegIndices.empty())
2665  return;
2667  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
2668  Names2SubRegIndices.insert(
2669  std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
2670 }
2671 
2672 unsigned MIParser::getSubRegIndex(StringRef Name) {
2673  initNames2SubRegIndices();
2674  auto SubRegInfo = Names2SubRegIndices.find(Name);
2675  if (SubRegInfo == Names2SubRegIndices.end())
2676  return 0;
2677  return SubRegInfo->getValue();
2678 }
2679 
2681  const Function &F,
2682  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2683  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2684  MST.incorporateFunction(F);
2685  for (auto &BB : F) {
2686  if (BB.hasName())
2687  continue;
2688  int Slot = MST.getLocalSlot(&BB);
2689  if (Slot == -1)
2690  continue;
2691  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
2692  }
2693 }
2694 
2696  unsigned Slot,
2697  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2698  auto BlockInfo = Slots2BasicBlocks.find(Slot);
2699  if (BlockInfo == Slots2BasicBlocks.end())
2700  return nullptr;
2701  return BlockInfo->second;
2702 }
2703 
2704 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
2705  if (Slots2BasicBlocks.empty())
2706  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
2707  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
2708 }
2709 
2710 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
2711  if (&F == &MF.getFunction())
2712  return getIRBlock(Slot);
2713  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
2714  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
2715  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
2716 }
2717 
2718 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
2719  DenseMap<unsigned, const Value *> &Slots2Values) {
2720  int Slot = MST.getLocalSlot(V);
2721  if (Slot == -1)
2722  return;
2723  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
2724 }
2725 
2726 /// Creates the mapping from slot numbers to function's unnamed IR values.
2727 static void initSlots2Values(const Function &F,
2728  DenseMap<unsigned, const Value *> &Slots2Values) {
2729  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2730  MST.incorporateFunction(F);
2731  for (const auto &Arg : F.args())
2732  mapValueToSlot(&Arg, MST, Slots2Values);
2733  for (const auto &BB : F) {
2734  mapValueToSlot(&BB, MST, Slots2Values);
2735  for (const auto &I : BB)
2736  mapValueToSlot(&I, MST, Slots2Values);
2737  }
2738 }
2739 
2740 const Value *MIParser::getIRValue(unsigned Slot) {
2741  if (Slots2Values.empty())
2742  initSlots2Values(MF.getFunction(), Slots2Values);
2743  auto ValueInfo = Slots2Values.find(Slot);
2744  if (ValueInfo == Slots2Values.end())
2745  return nullptr;
2746  return ValueInfo->second;
2747 }
2748 
2749 void MIParser::initNames2TargetIndices() {
2750  if (!Names2TargetIndices.empty())
2751  return;
2752  const auto *TII = MF.getSubtarget().getInstrInfo();
2753  assert(TII && "Expected target instruction info");
2754  auto Indices = TII->getSerializableTargetIndices();
2755  for (const auto &I : Indices)
2756  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
2757 }
2758 
2759 bool MIParser::getTargetIndex(StringRef Name, int &Index) {
2760  initNames2TargetIndices();
2761  auto IndexInfo = Names2TargetIndices.find(Name);
2762  if (IndexInfo == Names2TargetIndices.end())
2763  return true;
2764  Index = IndexInfo->second;
2765  return false;
2766 }
2767 
2768 void MIParser::initNames2DirectTargetFlags() {
2769  if (!Names2DirectTargetFlags.empty())
2770  return;
2771  const auto *TII = MF.getSubtarget().getInstrInfo();
2772  assert(TII && "Expected target instruction info");
2774  for (const auto &I : Flags)
2775  Names2DirectTargetFlags.insert(
2776  std::make_pair(StringRef(I.second), I.first));
2777 }
2778 
2779 bool MIParser::getDirectTargetFlag(StringRef Name, unsigned &Flag) {
2780  initNames2DirectTargetFlags();
2781  auto FlagInfo = Names2DirectTargetFlags.find(Name);
2782  if (FlagInfo == Names2DirectTargetFlags.end())
2783  return true;
2784  Flag = FlagInfo->second;
2785  return false;
2786 }
2787 
2788 void MIParser::initNames2BitmaskTargetFlags() {
2789  if (!Names2BitmaskTargetFlags.empty())
2790  return;
2791  const auto *TII = MF.getSubtarget().getInstrInfo();
2792  assert(TII && "Expected target instruction info");
2794  for (const auto &I : Flags)
2795  Names2BitmaskTargetFlags.insert(
2796  std::make_pair(StringRef(I.second), I.first));
2797 }
2798 
2799 bool MIParser::getBitmaskTargetFlag(StringRef Name, unsigned &Flag) {
2800  initNames2BitmaskTargetFlags();
2801  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
2802  if (FlagInfo == Names2BitmaskTargetFlags.end())
2803  return true;
2804  Flag = FlagInfo->second;
2805  return false;
2806 }
2807 
2808 void MIParser::initNames2MMOTargetFlags() {
2809  if (!Names2MMOTargetFlags.empty())
2810  return;
2811  const auto *TII = MF.getSubtarget().getInstrInfo();
2812  assert(TII && "Expected target instruction info");
2813  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
2814  for (const auto &I : Flags)
2815  Names2MMOTargetFlags.insert(
2816  std::make_pair(StringRef(I.second), I.first));
2817 }
2818 
2819 bool MIParser::getMMOTargetFlag(StringRef Name,
2820  MachineMemOperand::Flags &Flag) {
2821  initNames2MMOTargetFlags();
2822  auto FlagInfo = Names2MMOTargetFlags.find(Name);
2823  if (FlagInfo == Names2MMOTargetFlags.end())
2824  return true;
2825  Flag = FlagInfo->second;
2826  return false;
2827 }
2828 
2829 MCSymbol *MIParser::getOrCreateMCSymbol(StringRef Name) {
2830  // FIXME: Currently we can't recognize temporary or local symbols and call all
2831  // of the appropriate forms to create them. However, this handles basic cases
2832  // well as most of the special aspects are recognized by a prefix on their
2833  // name, and the input names should already be unique. For test cases, keeping
2834  // the symbol name out of the symbol table isn't terribly important.
2835  return MF.getContext().getOrCreateSymbol(Name);
2836 }
2837 
2838 bool MIParser::parseStringConstant(std::string &Result) {
2839  if (Token.isNot(MIToken::StringConstant))
2840  return error("expected string constant");
2841  Result = Token.stringValue();
2842  lex();
2843  return false;
2844 }
2845 
2847  StringRef Src,
2848  SMDiagnostic &Error) {
2849  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
2850 }
2851 
2853  StringRef Src, SMDiagnostic &Error) {
2854  return MIParser(PFS, Error, Src).parseBasicBlocks();
2855 }
2856 
2858  MachineBasicBlock *&MBB, StringRef Src,
2859  SMDiagnostic &Error) {
2860  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
2861 }
2862 
2864  unsigned &Reg, StringRef Src,
2865  SMDiagnostic &Error) {
2866  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
2867 }
2868 
2870  unsigned &Reg, StringRef Src,
2871  SMDiagnostic &Error) {
2872  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
2873 }
2874 
2876  VRegInfo *&Info, StringRef Src,
2877  SMDiagnostic &Error) {
2878  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
2879 }
2880 
2882  int &FI, StringRef Src,
2883  SMDiagnostic &Error) {
2884  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
2885 }
2886 
2888  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
2889  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
2890 }
bool isFPPredicate() const
Definition: InstrTypes.h:734
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
uint64_t CallInst * C
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:70
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:2846
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2680
A common definition of LaneBitmask for use in TableGen and CodeGen.
uint64_t getZExtValue() const
Get zero extended value.
Definition: APInt.h:1563
static MachineOperand CreateCImm(const ConstantInt *CI)
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
DenseMap< unsigned, unsigned > JumpTableSlots
Definition: MIParser.h:63
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:228
LLVMContext & Context
const T & back() const
back - Get the last element.
Definition: ArrayRef.h:158
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:661
Atomic ordering constants.
DenseMap< unsigned, unsigned > ConstantPoolSlots
Definition: MIParser.h:62
This class represents lattice values for constants.
Definition: AllocatorList.h:24
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:658
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:148
static MachineOperand CreateMCSymbol(MCSymbol *Sym, unsigned char TargetFlags=0)
void setTargetFlags(unsigned F)
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:64
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
static BranchProbability getRaw(uint32_t N)
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:532
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction...
Definition: MCInstrDesc.h:524
static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags=0)
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:164
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
Definition: StringRef.h:138
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:487
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
unsigned Reg
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID...
This file contains the declarations for metadata subclasses.
unsigned less or equal
Definition: InstrTypes.h:668
unsigned less than
Definition: InstrTypes.h:667
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:856
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:648
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
iterator find(StringRef Key)
Definition: StringMap.h:333
DenseMap< unsigned, int > StackObjectSlots
Definition: MIParser.h:61
LLT getType(unsigned Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register...
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:658
#define error(X)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:1180
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:360
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:864
F(f)
DenseMap< unsigned, VRegInfo * > VRegInfos
Definition: MIParser.h:58
Manage lifetime of a slot tracker for printing IR.
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2857
const TargetRegisterClass * RC
Definition: MIParser.h:39
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:474
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp=false)
CreateMachineInstr - Allocate a new MachineInstr.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:481
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE const char * data() const
data - Get a pointer to the start of the string (which may not be null terminated).
Definition: StringRef.h:128
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1509
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can&#39;t be restored anymore.
Definition: MCDwarf.h:521
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:221
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:653
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Result, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:503
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:652
std::map< unsigned, TrackingMDNodeRef > MetadataNodes
Definition: SlotMapping.h:35
A description of a memory reference used in the backend.
amdgpu Simplify well known AMD library false Value Value const Twine & Name
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:967
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
const HexagonInstrInfo * TII
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2695
VRegInfo & getVRegInfoNamed(StringRef RegName)
Definition: MIParser.cpp:103
support::ulittle32_t Word
Definition: IRSymtab.h:51
unsigned SubReg
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:649
const Name2RegBankMap & Names2RegBanks
Definition: MIParser.h:55
The memory access is dereferenceable (i.e., doesn&#39;t trap).
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE R Default(T Value)
Definition: StringSwitch.h:203
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
This file implements a class to represent arbitrary precision integral constant values and operations...
AtomicOrdering
Atomic ordering for LLVM&#39;s memory model.
DenseMap< unsigned, int > FixedStackObjectSlots
Definition: MIParser.h:60
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:913
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:131
#define UINT64_MAX
Definition: DataTypes.h:83
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
union llvm::VRegInfo::@345 D
PseudoSourceValueManager & getPSVManager() const
virtual unsigned lookupName(const char *Name, unsigned Len) const =0
Look up target intrinsic by name.
GlobalValue * getNamedValue(StringRef Name) const
Return the global value in the module with the specified name, of arbitrary type. ...
Definition: Module.cpp:113
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
void setPostInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just after the instruction itself.
virtual const TargetInstrInfo * getInstrInfo() const
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2875
static MachineOperand CreatePredicate(unsigned Pred)
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot...
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
const char * getName(unsigned RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:118
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:176
unsigned getMainFileID() const
Definition: SourceMgr.h:140
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
MCContext & getContext() const
The memory access is volatile.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:527
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1166
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:43
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2881
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction...
Definition: MCInstrDesc.h:546
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
unsigned const MachineRegisterInfo * MRI
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:908
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:460
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:536
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned char TargetFlags=0)
bool hasName() const
Definition: Value.h:251
LLVM Basic Block Representation.
Definition: BasicBlock.h:58
const PseudoSourceValue * getExternalSymbolCallEntry(const char *ES)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:467
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1434
static MachineOperand CreateFPImm(const ConstantFP *CFP)
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:149
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:508
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
This file contains the declarations for the subclasses of Constant, which represent the different fla...
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:224
StringMap< VRegInfo * > VRegInfosNamed
Definition: MIParser.h:59
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:151
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:174
void setType(unsigned VReg, LLT Ty)
Set the low-level type of VReg to Ty.
BumpPtrAllocator Allocator
Definition: MIParser.h:50
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2869
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:300
bool isValid() const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:642
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register...
Definition: MCDwarf.h:495
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:515
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:651
The memory access is non-temporal.
llvm::Expected< Value > parse(llvm::StringRef JSON)
Parses the provided JSON source, or returns a ParseError.
Definition: JSON.cpp:505
MachineFunction & MF
Definition: MIParser.h:51
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:34
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling...
Definition: SourceMgr.h:42
void setOffset(int64_t Offset)
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:659
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:842
const SlotMapping & IRSlots
Definition: MIParser.h:53
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:537
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:657
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges=None, ArrayRef< SMFixIt > FixIts=None) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:169
signed greater than
Definition: InstrTypes.h:669
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:2852
TargetIntrinsicInfo - Interface to description of machine instruction set.
Struct that holds a reference to a particular GUID in a global value summary.
The memory access writes data.
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE StringRef drop_front(size_t N=1) const
Return a StringRef equal to &#39;this&#39; but with the first N elements dropped.
Definition: StringRef.h:645
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:646
const Name2RegClassMap & Names2RegClasses
Definition: MIParser.h:54
unsigned createIncompleteVirtualRegister(StringRef Name="")
Creates a new virtual register that has no register class, register bank or size assigned yet...
static MachineOperand CreateMetadata(const MDNode *Meta)
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
void setFlags(unsigned flags)
Definition: MachineInstr.h:304
enum llvm::VRegInfo::uint8_t Kind
MachineOperand class - Representation of each machine instruction operand.
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:656
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
Module.h This file contains the declarations for the Module class.
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:920
StringRef getMessage() const
Definition: SourceMgr.h:291
signed less than
Definition: InstrTypes.h:671
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:644
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:664
uint32_t * allocateRegMask()
Allocate and initialize a register mask with NumRegister bits.
This class implements the register bank concept.
Definition: RegisterBank.h:29
const Function & getFunction() const
Return the LLVM function that this machine code represents.
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:42
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:648
bool isIntPredicate() const
Definition: InstrTypes.h:735
signed less or equal
Definition: InstrTypes.h:672
StringMap - This is an unconventional map that is specialized for handling keys that are "strings"...
Definition: StringMap.h:220
Class for arbitrary precision integers.
Definition: APInt.h:70
Special value supplied for machine level alias analysis.
const PseudoSourceValue * getJumpTable()
Return a pseudo source value referencing a jump table.
const PseudoSourceValue * getGlobalValueCallEntry(const GlobalValue *GV)
static MachineOperand CreateES(const char *SymName, unsigned char TargetFlags=0)
const PseudoSourceValue * getGOT()
Return a pseudo source value referencing the global offset table (or something the like)...
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Case(StringLiteral S, T Value)
Definition: StringSwitch.h:70
This struct contains the mappings from the slot numbers to unnamed metadata nodes, global values and types.
Definition: SlotMapping.h:33
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2887
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:37
Flags
Flags values. These may be or&#39;d together.
amdgpu Simplify well known AMD library false Value Value * Arg
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:37
Representation of each machine instruction.
Definition: MachineInstr.h:64
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
const char * getBufferEnd() const
Definition: MemoryBuffer.h:61
int getColumnNo() const
Definition: SourceMgr.h:289
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
void setPreInstrSymbol(MachineFunction &MF, MCSymbol *Symbol)
Set a symbol that will be emitted just prior to the instruction itself.
MCSymbol * getOrCreateSymbol(const Twine &Name)
Lookup the symbol inside with the specified Name.
Definition: MCContext.cpp:123
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:56
unsigned greater or equal
Definition: InstrTypes.h:666
This file provides utility analysis objects describing memory locations.
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
unsigned VReg
Definition: MIParser.h:42
static MachineOperand CreateImm(int64_t Val)
VRegInfo & getVRegInfo(unsigned Num)
Definition: MIParser.cpp:92
#define I(x, y, z)
Definition: MD5.cpp:58
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:59
The memory access always returns the same value (or traps).
iterator end()
Definition: DenseMap.h:109
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:258
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:650
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:57
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
uint32_t Size
Definition: Profile.cpp:47
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:654
const char * getBufferStart() const
Definition: MemoryBuffer.h:60
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
std::string str() const
Return the twine contents as a std::string.
Definition: Twine.cpp:18
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const unsigned Kind
const PseudoSourceValue * getStack()
Return a pseudo source value referencing the area below the stack frame of a function, e.g., the argument space.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
void setMemRefs(MachineFunction &MF, ArrayRef< MachineMemOperand *> MemRefs)
Assign this MachineInstr&#39;s memory reference descriptor list.
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:645
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:566
LLVM Value Representation.
Definition: Value.h:73
static LLT pointer(uint16_t AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space (defaulting to 0).
A token produced by the machine instruction lexer.
Definition: MILexer.h:28
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:655
Lightweight error class with error context and mandatory checking.
Definition: Error.h:158
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
IRTranslator LLVM IR MI
unsigned greater than
Definition: InstrTypes.h:665
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
static LLT vector(uint16_t NumElements, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
const RegisterBank * RegBank
Definition: MIParser.h:40
Represents a location in source code.
Definition: SMLoc.h:24
void setIsDebug(bool Val=true)
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals)
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:543
bool parseRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2863
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:647
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value *> &Slots2Values)
Definition: MIParser.cpp:2718
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value *> &Slots2Values)
Creates the mapping from slot numbers to function&#39;s unnamed IR values.
Definition: MIParser.cpp:2727
static MachineOperand CreateFI(int Idx)
const PseudoSourceValue * getConstantPool()
Return a pseudo source value referencing the constant pool.
iterator end()
Definition: StringMap.h:318
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:502
iterator_range< arg_iterator > args()
Definition: Function.h:689
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:644
signed greater or equal
Definition: InstrTypes.h:670
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:144
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:173
bool isImplicit() const
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:260
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, const Name2RegClassMap &Names2RegClasses, const Name2RegBankMap &Names2RegBanks)
Definition: MIParser.cpp:84
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.