LLVM  6.0.0svn
MIParser.cpp
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1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the parsing of machine instructions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MIParser.h"
15 #include "MILexer.h"
16 #include "llvm/ADT/APInt.h"
17 #include "llvm/ADT/APSInt.h"
18 #include "llvm/ADT/ArrayRef.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/None.h"
21 #include "llvm/ADT/Optional.h"
22 #include "llvm/ADT/SmallVector.h"
23 #include "llvm/ADT/StringMap.h"
24 #include "llvm/ADT/StringRef.h"
25 #include "llvm/ADT/StringSwitch.h"
26 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
42 #include "llvm/IR/BasicBlock.h"
43 #include "llvm/IR/Constants.h"
44 #include "llvm/IR/DataLayout.h"
46 #include "llvm/IR/DebugLoc.h"
47 #include "llvm/IR/Function.h"
48 #include "llvm/IR/InstrTypes.h"
49 #include "llvm/IR/Instructions.h"
50 #include "llvm/IR/Intrinsics.h"
51 #include "llvm/IR/Metadata.h"
52 #include "llvm/IR/Module.h"
54 #include "llvm/IR/Type.h"
55 #include "llvm/IR/Value.h"
57 #include "llvm/MC/LaneBitmask.h"
58 #include "llvm/MC/MCDwarf.h"
59 #include "llvm/MC/MCInstrDesc.h"
60 #include "llvm/MC/MCRegisterInfo.h"
63 #include "llvm/Support/Casting.h"
67 #include "llvm/Support/SMLoc.h"
68 #include "llvm/Support/SourceMgr.h"
72 #include <algorithm>
73 #include <cassert>
74 #include <cctype>
75 #include <cstddef>
76 #include <cstdint>
77 #include <limits>
78 #include <string>
79 #include <utility>
80 
81 using namespace llvm;
82 
84  SourceMgr &SM, const SlotMapping &IRSlots,
85  const Name2RegClassMap &Names2RegClasses,
86  const Name2RegBankMap &Names2RegBanks)
87  : MF(MF), SM(&SM), IRSlots(IRSlots), Names2RegClasses(Names2RegClasses),
88  Names2RegBanks(Names2RegBanks) {
89 }
90 
92  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
93  if (I.second) {
95  VRegInfo *Info = new (Allocator) VRegInfo;
97  I.first->second = Info;
98  }
99  return *I.first->second;
100 }
101 
102 namespace {
103 
104 /// A wrapper struct around the 'MachineOperand' struct that includes a source
105 /// range and other attributes.
106 struct ParsedMachineOperand {
107  MachineOperand Operand;
108  StringRef::iterator Begin;
110  Optional<unsigned> TiedDefIdx;
111 
112  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
113  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
114  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
115  if (TiedDefIdx)
116  assert(Operand.isReg() && Operand.isUse() &&
117  "Only used register operands can be tied");
118  }
119 };
120 
121 class MIParser {
124  StringRef Source, CurrentSource;
125  MIToken Token;
127  /// Maps from instruction names to op codes.
128  StringMap<unsigned> Names2InstrOpCodes;
129  /// Maps from register names to registers.
130  StringMap<unsigned> Names2Regs;
131  /// Maps from register mask names to register masks.
132  StringMap<const uint32_t *> Names2RegMasks;
133  /// Maps from subregister names to subregister indices.
134  StringMap<unsigned> Names2SubRegIndices;
135  /// Maps from slot numbers to function's unnamed basic blocks.
136  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
137  /// Maps from slot numbers to function's unnamed values.
139  /// Maps from target index names to target indices.
140  StringMap<int> Names2TargetIndices;
141  /// Maps from direct target flag names to the direct target flag values.
142  StringMap<unsigned> Names2DirectTargetFlags;
143  /// Maps from direct target flag names to the bitmask target flag values.
144  StringMap<unsigned> Names2BitmaskTargetFlags;
145  /// Maps from MMO target flag names to MMO target flag values.
146  StringMap<MachineMemOperand::Flags> Names2MMOTargetFlags;
147 
148 public:
149  MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
150  StringRef Source);
151 
152  /// \p SkipChar gives the number of characters to skip before looking
153  /// for the next token.
154  void lex(unsigned SkipChar = 0);
155 
156  /// Report an error at the current location with the given message.
157  ///
158  /// This function always return true.
159  bool error(const Twine &Msg);
160 
161  /// Report an error at the given location with the given message.
162  ///
163  /// This function always return true.
164  bool error(StringRef::iterator Loc, const Twine &Msg);
165 
166  bool
167  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
168  bool parseBasicBlocks();
169  bool parse(MachineInstr *&MI);
170  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
171  bool parseStandaloneNamedRegister(unsigned &Reg);
172  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
173  bool parseStandaloneRegister(unsigned &Reg);
174  bool parseStandaloneStackObject(int &FI);
175  bool parseStandaloneMDNode(MDNode *&Node);
176 
177  bool
178  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
179  bool parseBasicBlock(MachineBasicBlock &MBB,
180  MachineBasicBlock *&AddFalthroughFrom);
181  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
182  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
183 
184  bool parseNamedRegister(unsigned &Reg);
185  bool parseVirtualRegister(VRegInfo *&Info);
186  bool parseRegister(unsigned &Reg, VRegInfo *&VRegInfo);
187  bool parseRegisterFlag(unsigned &Flags);
188  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
189  bool parseSubRegisterIndex(unsigned &SubReg);
190  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
191  bool parseRegisterOperand(MachineOperand &Dest,
192  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
193  bool parseImmediateOperand(MachineOperand &Dest);
194  bool parseIRConstant(StringRef::iterator Loc, StringRef Source,
195  const Constant *&C);
196  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
197  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
198  bool parseTypedImmediateOperand(MachineOperand &Dest);
199  bool parseFPImmediateOperand(MachineOperand &Dest);
201  bool parseMBBOperand(MachineOperand &Dest);
202  bool parseStackFrameIndex(int &FI);
203  bool parseStackObjectOperand(MachineOperand &Dest);
204  bool parseFixedStackFrameIndex(int &FI);
205  bool parseFixedStackObjectOperand(MachineOperand &Dest);
206  bool parseGlobalValue(GlobalValue *&GV);
207  bool parseGlobalAddressOperand(MachineOperand &Dest);
208  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
209  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
210  bool parseJumpTableIndexOperand(MachineOperand &Dest);
211  bool parseExternalSymbolOperand(MachineOperand &Dest);
212  bool parseMDNode(MDNode *&Node);
213  bool parseDIExpression(MDNode *&Node);
214  bool parseMetadataOperand(MachineOperand &Dest);
215  bool parseCFIOffset(int &Offset);
216  bool parseCFIRegister(unsigned &Reg);
217  bool parseCFIOperand(MachineOperand &Dest);
218  bool parseIRBlock(BasicBlock *&BB, const Function &F);
219  bool parseBlockAddressOperand(MachineOperand &Dest);
220  bool parseIntrinsicOperand(MachineOperand &Dest);
221  bool parsePredicateOperand(MachineOperand &Dest);
222  bool parseTargetIndexOperand(MachineOperand &Dest);
223  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
224  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
225  bool parseMachineOperand(MachineOperand &Dest,
226  Optional<unsigned> &TiedDefIdx);
227  bool parseMachineOperandAndTargetFlags(MachineOperand &Dest,
228  Optional<unsigned> &TiedDefIdx);
229  bool parseOffset(int64_t &Offset);
230  bool parseAlignment(unsigned &Alignment);
231  bool parseOperandsOffset(MachineOperand &Op);
232  bool parseIRValue(const Value *&V);
233  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
234  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
235  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
236  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
237  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
238  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
239 
240 private:
241  /// Convert the integer literal in the current token into an unsigned integer.
242  ///
243  /// Return true if an error occurred.
244  bool getUnsigned(unsigned &Result);
245 
246  /// Convert the integer literal in the current token into an uint64.
247  ///
248  /// Return true if an error occurred.
249  bool getUint64(uint64_t &Result);
250 
251  /// Convert the hexadecimal literal in the current token into an unsigned
252  /// APInt with a minimum bitwidth required to represent the value.
253  ///
254  /// Return true if the literal does not represent an integer value.
255  bool getHexUint(APInt &Result);
256 
257  /// If the current token is of the given kind, consume it and return false.
258  /// Otherwise report an error and return true.
259  bool expectAndConsume(MIToken::TokenKind TokenKind);
260 
261  /// If the current token is of the given kind, consume it and return true.
262  /// Otherwise return false.
263  bool consumeIfPresent(MIToken::TokenKind TokenKind);
264 
265  void initNames2InstrOpCodes();
266 
267  /// Try to convert an instruction name to an opcode. Return true if the
268  /// instruction name is invalid.
269  bool parseInstrName(StringRef InstrName, unsigned &OpCode);
270 
271  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
272 
273  bool assignRegisterTies(MachineInstr &MI,
275 
276  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
277  const MCInstrDesc &MCID);
278 
279  void initNames2Regs();
280 
281  /// Try to convert a register name to a register number. Return true if the
282  /// register name is invalid.
283  bool getRegisterByName(StringRef RegName, unsigned &Reg);
284 
285  void initNames2RegMasks();
286 
287  /// Check if the given identifier is a name of a register mask.
288  ///
289  /// Return null if the identifier isn't a register mask.
290  const uint32_t *getRegMask(StringRef Identifier);
291 
292  void initNames2SubRegIndices();
293 
294  /// Check if the given identifier is a name of a subregister index.
295  ///
296  /// Return 0 if the name isn't a subregister index class.
297  unsigned getSubRegIndex(StringRef Name);
298 
299  const BasicBlock *getIRBlock(unsigned Slot);
300  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
301 
302  const Value *getIRValue(unsigned Slot);
303 
304  void initNames2TargetIndices();
305 
306  /// Try to convert a name of target index to the corresponding target index.
307  ///
308  /// Return true if the name isn't a name of a target index.
309  bool getTargetIndex(StringRef Name, int &Index);
310 
311  void initNames2DirectTargetFlags();
312 
313  /// Try to convert a name of a direct target flag to the corresponding
314  /// target flag.
315  ///
316  /// Return true if the name isn't a name of a direct flag.
317  bool getDirectTargetFlag(StringRef Name, unsigned &Flag);
318 
319  void initNames2BitmaskTargetFlags();
320 
321  /// Try to convert a name of a bitmask target flag to the corresponding
322  /// target flag.
323  ///
324  /// Return true if the name isn't a name of a bitmask target flag.
325  bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag);
326 
327  void initNames2MMOTargetFlags();
328 
329  /// Try to convert a name of a MachineMemOperand target flag to the
330  /// corresponding target flag.
331  ///
332  /// Return true if the name isn't a name of a target MMO flag.
333  bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag);
334 
335  /// parseStringConstant
336  /// ::= StringConstant
337  bool parseStringConstant(std::string &Result);
338 };
339 
340 } // end anonymous namespace
341 
342 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
344  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
345 {}
346 
347 void MIParser::lex(unsigned SkipChar) {
348  CurrentSource = lexMIToken(
349  CurrentSource.data() + SkipChar, Token,
350  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
351 }
352 
353 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
354 
355 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
356  const SourceMgr &SM = *PFS.SM;
357  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
358  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
359  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
360  // Create an ordinary diagnostic when the source manager's buffer is the
361  // source string.
363  return true;
364  }
365  // Create a diagnostic for a YAML string literal.
366  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
367  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
368  Source, None, None);
369  return true;
370 }
371 
372 static const char *toString(MIToken::TokenKind TokenKind) {
373  switch (TokenKind) {
374  case MIToken::comma:
375  return "','";
376  case MIToken::equal:
377  return "'='";
378  case MIToken::colon:
379  return "':'";
380  case MIToken::lparen:
381  return "'('";
382  case MIToken::rparen:
383  return "')'";
384  default:
385  return "<unknown token>";
386  }
387 }
388 
389 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
390  if (Token.isNot(TokenKind))
391  return error(Twine("expected ") + toString(TokenKind));
392  lex();
393  return false;
394 }
395 
396 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
397  if (Token.isNot(TokenKind))
398  return false;
399  lex();
400  return true;
401 }
402 
403 bool MIParser::parseBasicBlockDefinition(
406  unsigned ID = 0;
407  if (getUnsigned(ID))
408  return true;
409  auto Loc = Token.location();
410  auto Name = Token.stringValue();
411  lex();
412  bool HasAddressTaken = false;
413  bool IsLandingPad = false;
414  unsigned Alignment = 0;
415  BasicBlock *BB = nullptr;
416  if (consumeIfPresent(MIToken::lparen)) {
417  do {
418  // TODO: Report an error when multiple same attributes are specified.
419  switch (Token.kind()) {
421  HasAddressTaken = true;
422  lex();
423  break;
425  IsLandingPad = true;
426  lex();
427  break;
428  case MIToken::kw_align:
429  if (parseAlignment(Alignment))
430  return true;
431  break;
432  case MIToken::IRBlock:
433  // TODO: Report an error when both name and ir block are specified.
434  if (parseIRBlock(BB, *MF.getFunction()))
435  return true;
436  lex();
437  break;
438  default:
439  break;
440  }
441  } while (consumeIfPresent(MIToken::comma));
442  if (expectAndConsume(MIToken::rparen))
443  return true;
444  }
445  if (expectAndConsume(MIToken::colon))
446  return true;
447 
448  if (!Name.empty()) {
449  BB = dyn_cast_or_null<BasicBlock>(
451  if (!BB)
452  return error(Loc, Twine("basic block '") + Name +
453  "' is not defined in the function '" +
454  MF.getName() + "'");
455  }
456  auto *MBB = MF.CreateMachineBasicBlock(BB);
457  MF.insert(MF.end(), MBB);
458  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
459  if (!WasInserted)
460  return error(Loc, Twine("redefinition of machine basic block with id #") +
461  Twine(ID));
462  if (Alignment)
463  MBB->setAlignment(Alignment);
464  if (HasAddressTaken)
465  MBB->setHasAddressTaken();
466  MBB->setIsEHPad(IsLandingPad);
467  return false;
468 }
469 
470 bool MIParser::parseBasicBlockDefinitions(
472  lex();
473  // Skip until the first machine basic block.
474  while (Token.is(MIToken::Newline))
475  lex();
476  if (Token.isErrorOrEOF())
477  return Token.isError();
478  if (Token.isNot(MIToken::MachineBasicBlockLabel))
479  return error("expected a basic block definition before instructions");
480  unsigned BraceDepth = 0;
481  do {
482  if (parseBasicBlockDefinition(MBBSlots))
483  return true;
484  bool IsAfterNewline = false;
485  // Skip until the next machine basic block.
486  while (true) {
487  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
488  Token.isErrorOrEOF())
489  break;
490  else if (Token.is(MIToken::MachineBasicBlockLabel))
491  return error("basic block definition should be located at the start of "
492  "the line");
493  else if (consumeIfPresent(MIToken::Newline)) {
494  IsAfterNewline = true;
495  continue;
496  }
497  IsAfterNewline = false;
498  if (Token.is(MIToken::lbrace))
499  ++BraceDepth;
500  if (Token.is(MIToken::rbrace)) {
501  if (!BraceDepth)
502  return error("extraneous closing brace ('}')");
503  --BraceDepth;
504  }
505  lex();
506  }
507  // Verify that we closed all of the '{' at the end of a file or a block.
508  if (!Token.isError() && BraceDepth)
509  return error("expected '}'"); // FIXME: Report a note that shows '{'.
510  } while (!Token.isErrorOrEOF());
511  return Token.isError();
512 }
513 
514 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
515  assert(Token.is(MIToken::kw_liveins));
516  lex();
517  if (expectAndConsume(MIToken::colon))
518  return true;
519  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
520  return false;
521  do {
522  if (Token.isNot(MIToken::NamedRegister))
523  return error("expected a named register");
524  unsigned Reg = 0;
525  if (parseNamedRegister(Reg))
526  return true;
527  lex();
529  if (consumeIfPresent(MIToken::colon)) {
530  // Parse lane mask.
531  if (Token.isNot(MIToken::IntegerLiteral) &&
532  Token.isNot(MIToken::HexLiteral))
533  return error("expected a lane mask");
534  static_assert(sizeof(LaneBitmask::Type) == sizeof(unsigned),
535  "Use correct get-function for lane mask");
537  if (getUnsigned(V))
538  return error("invalid lane mask value");
539  Mask = LaneBitmask(V);
540  lex();
541  }
542  MBB.addLiveIn(Reg, Mask);
543  } while (consumeIfPresent(MIToken::comma));
544  return false;
545 }
546 
547 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
548  assert(Token.is(MIToken::kw_successors));
549  lex();
550  if (expectAndConsume(MIToken::colon))
551  return true;
552  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
553  return false;
554  do {
555  if (Token.isNot(MIToken::MachineBasicBlock))
556  return error("expected a machine basic block reference");
557  MachineBasicBlock *SuccMBB = nullptr;
558  if (parseMBBReference(SuccMBB))
559  return true;
560  lex();
561  unsigned Weight = 0;
562  if (consumeIfPresent(MIToken::lparen)) {
563  if (Token.isNot(MIToken::IntegerLiteral) &&
564  Token.isNot(MIToken::HexLiteral))
565  return error("expected an integer literal after '('");
566  if (getUnsigned(Weight))
567  return true;
568  lex();
569  if (expectAndConsume(MIToken::rparen))
570  return true;
571  }
572  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
573  } while (consumeIfPresent(MIToken::comma));
574  MBB.normalizeSuccProbs();
575  return false;
576 }
577 
578 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
579  MachineBasicBlock *&AddFalthroughFrom) {
580  // Skip the definition.
582  lex();
583  if (consumeIfPresent(MIToken::lparen)) {
584  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
585  lex();
586  consumeIfPresent(MIToken::rparen);
587  }
588  consumeIfPresent(MIToken::colon);
589 
590  // Parse the liveins and successors.
591  // N.B: Multiple lists of successors and liveins are allowed and they're
592  // merged into one.
593  // Example:
594  // liveins: %edi
595  // liveins: %esi
596  //
597  // is equivalent to
598  // liveins: %edi, %esi
599  bool ExplicitSuccessors = false;
600  while (true) {
601  if (Token.is(MIToken::kw_successors)) {
602  if (parseBasicBlockSuccessors(MBB))
603  return true;
604  ExplicitSuccessors = true;
605  } else if (Token.is(MIToken::kw_liveins)) {
606  if (parseBasicBlockLiveins(MBB))
607  return true;
608  } else if (consumeIfPresent(MIToken::Newline)) {
609  continue;
610  } else
611  break;
612  if (!Token.isNewlineOrEOF())
613  return error("expected line break at the end of a list");
614  lex();
615  }
616 
617  // Parse the instructions.
618  bool IsInBundle = false;
619  MachineInstr *PrevMI = nullptr;
620  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
621  !Token.is(MIToken::Eof)) {
622  if (consumeIfPresent(MIToken::Newline))
623  continue;
624  if (consumeIfPresent(MIToken::rbrace)) {
625  // The first parsing pass should verify that all closing '}' have an
626  // opening '{'.
627  assert(IsInBundle);
628  IsInBundle = false;
629  continue;
630  }
631  MachineInstr *MI = nullptr;
632  if (parse(MI))
633  return true;
634  MBB.insert(MBB.end(), MI);
635  if (IsInBundle) {
638  }
639  PrevMI = MI;
640  if (Token.is(MIToken::lbrace)) {
641  if (IsInBundle)
642  return error("nested instruction bundles are not allowed");
643  lex();
644  // This instruction is the start of the bundle.
646  IsInBundle = true;
647  if (!Token.is(MIToken::Newline))
648  // The next instruction can be on the same line.
649  continue;
650  }
651  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
652  lex();
653  }
654 
655  // Construct successor list by searching for basic block machine operands.
656  if (!ExplicitSuccessors) {
658  bool IsFallthrough;
659  guessSuccessors(MBB, Successors, IsFallthrough);
660  for (MachineBasicBlock *Succ : Successors)
661  MBB.addSuccessor(Succ);
662 
663  if (IsFallthrough) {
664  AddFalthroughFrom = &MBB;
665  } else {
666  MBB.normalizeSuccProbs();
667  }
668  }
669 
670  return false;
671 }
672 
673 bool MIParser::parseBasicBlocks() {
674  lex();
675  // Skip until the first machine basic block.
676  while (Token.is(MIToken::Newline))
677  lex();
678  if (Token.isErrorOrEOF())
679  return Token.isError();
680  // The first parsing pass should have verified that this token is a MBB label
681  // in the 'parseBasicBlockDefinitions' method.
683  MachineBasicBlock *AddFalthroughFrom = nullptr;
684  do {
685  MachineBasicBlock *MBB = nullptr;
686  if (parseMBBReference(MBB))
687  return true;
688  if (AddFalthroughFrom) {
689  if (!AddFalthroughFrom->isSuccessor(MBB))
690  AddFalthroughFrom->addSuccessor(MBB);
691  AddFalthroughFrom->normalizeSuccProbs();
692  AddFalthroughFrom = nullptr;
693  }
694  if (parseBasicBlock(*MBB, AddFalthroughFrom))
695  return true;
696  // The method 'parseBasicBlock' should parse the whole block until the next
697  // block or the end of file.
698  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
699  } while (Token.isNot(MIToken::Eof));
700  return false;
701 }
702 
703 bool MIParser::parse(MachineInstr *&MI) {
704  // Parse any register operands before '='
707  while (Token.isRegister() || Token.isRegisterFlag()) {
708  auto Loc = Token.location();
709  Optional<unsigned> TiedDefIdx;
710  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
711  return true;
712  Operands.push_back(
713  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
714  if (Token.isNot(MIToken::comma))
715  break;
716  lex();
717  }
718  if (!Operands.empty() && expectAndConsume(MIToken::equal))
719  return true;
720 
721  unsigned OpCode, Flags = 0;
722  if (Token.isError() || parseInstruction(OpCode, Flags))
723  return true;
724 
725  // Parse the remaining machine operands.
726  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_debug_location) &&
727  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
728  auto Loc = Token.location();
729  Optional<unsigned> TiedDefIdx;
730  if (parseMachineOperandAndTargetFlags(MO, TiedDefIdx))
731  return true;
732  Operands.push_back(
733  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
734  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
735  Token.is(MIToken::lbrace))
736  break;
737  if (Token.isNot(MIToken::comma))
738  return error("expected ',' before the next machine operand");
739  lex();
740  }
741 
742  DebugLoc DebugLocation;
743  if (Token.is(MIToken::kw_debug_location)) {
744  lex();
745  if (Token.isNot(MIToken::exclaim))
746  return error("expected a metadata node after 'debug-location'");
747  MDNode *Node = nullptr;
748  if (parseMDNode(Node))
749  return true;
750  DebugLocation = DebugLoc(Node);
751  }
752 
753  // Parse the machine memory operands.
755  if (Token.is(MIToken::coloncolon)) {
756  lex();
757  while (!Token.isNewlineOrEOF()) {
758  MachineMemOperand *MemOp = nullptr;
759  if (parseMachineMemoryOperand(MemOp))
760  return true;
761  MemOperands.push_back(MemOp);
762  if (Token.isNewlineOrEOF())
763  break;
764  if (Token.isNot(MIToken::comma))
765  return error("expected ',' before the next machine memory operand");
766  lex();
767  }
768  }
769 
770  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
771  if (!MCID.isVariadic()) {
772  // FIXME: Move the implicit operand verification to the machine verifier.
773  if (verifyImplicitOperands(Operands, MCID))
774  return true;
775  }
776 
777  // TODO: Check for extraneous machine operands.
778  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
779  MI->setFlags(Flags);
780  for (const auto &Operand : Operands)
781  MI->addOperand(MF, Operand.Operand);
782  if (assignRegisterTies(*MI, Operands))
783  return true;
784  if (MemOperands.empty())
785  return false;
787  MF.allocateMemRefsArray(MemOperands.size());
788  std::copy(MemOperands.begin(), MemOperands.end(), MemRefs);
789  MI->setMemRefs(MemRefs, MemRefs + MemOperands.size());
790  return false;
791 }
792 
793 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
794  lex();
795  if (Token.isNot(MIToken::MachineBasicBlock))
796  return error("expected a machine basic block reference");
797  if (parseMBBReference(MBB))
798  return true;
799  lex();
800  if (Token.isNot(MIToken::Eof))
801  return error(
802  "expected end of string after the machine basic block reference");
803  return false;
804 }
805 
806 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
807  lex();
808  if (Token.isNot(MIToken::NamedRegister))
809  return error("expected a named register");
810  if (parseNamedRegister(Reg))
811  return true;
812  lex();
813  if (Token.isNot(MIToken::Eof))
814  return error("expected end of string after the register reference");
815  return false;
816 }
817 
818 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
819  lex();
820  if (Token.isNot(MIToken::VirtualRegister))
821  return error("expected a virtual register");
822  if (parseVirtualRegister(Info))
823  return true;
824  lex();
825  if (Token.isNot(MIToken::Eof))
826  return error("expected end of string after the register reference");
827  return false;
828 }
829 
830 bool MIParser::parseStandaloneRegister(unsigned &Reg) {
831  lex();
832  if (Token.isNot(MIToken::NamedRegister) &&
833  Token.isNot(MIToken::VirtualRegister))
834  return error("expected either a named or virtual register");
835 
836  VRegInfo *Info;
837  if (parseRegister(Reg, Info))
838  return true;
839 
840  lex();
841  if (Token.isNot(MIToken::Eof))
842  return error("expected end of string after the register reference");
843  return false;
844 }
845 
846 bool MIParser::parseStandaloneStackObject(int &FI) {
847  lex();
848  if (Token.isNot(MIToken::StackObject))
849  return error("expected a stack object");
850  if (parseStackFrameIndex(FI))
851  return true;
852  if (Token.isNot(MIToken::Eof))
853  return error("expected end of string after the stack object reference");
854  return false;
855 }
856 
857 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
858  lex();
859  if (Token.is(MIToken::exclaim)) {
860  if (parseMDNode(Node))
861  return true;
862  } else if (Token.is(MIToken::md_diexpr)) {
863  if (parseDIExpression(Node))
864  return true;
865  } else
866  return error("expected a metadata node");
867  if (Token.isNot(MIToken::Eof))
868  return error("expected end of string after the metadata node");
869  return false;
870 }
871 
872 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
873  assert(MO.isImplicit());
874  return MO.isDef() ? "implicit-def" : "implicit";
875 }
876 
877 static std::string getRegisterName(const TargetRegisterInfo *TRI,
878  unsigned Reg) {
879  assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
880  return StringRef(TRI->getName(Reg)).lower();
881 }
882 
883 /// Return true if the parsed machine operands contain a given machine operand.
884 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
886  for (const auto &I : Operands) {
887  if (ImplicitOperand.isIdenticalTo(I.Operand))
888  return true;
889  }
890  return false;
891 }
892 
893 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
894  const MCInstrDesc &MCID) {
895  if (MCID.isCall())
896  // We can't verify call instructions as they can contain arbitrary implicit
897  // register and register mask operands.
898  return false;
899 
900  // Gather all the expected implicit operands.
901  SmallVector<MachineOperand, 4> ImplicitOperands;
902  if (MCID.ImplicitDefs)
903  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
904  ImplicitOperands.push_back(
905  MachineOperand::CreateReg(*ImpDefs, true, true));
906  if (MCID.ImplicitUses)
907  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
908  ImplicitOperands.push_back(
909  MachineOperand::CreateReg(*ImpUses, false, true));
910 
911  const auto *TRI = MF.getSubtarget().getRegisterInfo();
912  assert(TRI && "Expected target register info");
913  for (const auto &I : ImplicitOperands) {
914  if (isImplicitOperandIn(I, Operands))
915  continue;
916  return error(Operands.empty() ? Token.location() : Operands.back().End,
917  Twine("missing implicit register operand '") +
918  printImplicitRegisterFlag(I) + " %" +
919  getRegisterName(TRI, I.getReg()) + "'");
920  }
921  return false;
922 }
923 
924 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
925  if (Token.is(MIToken::kw_frame_setup)) {
926  Flags |= MachineInstr::FrameSetup;
927  lex();
928  }
929  if (Token.isNot(MIToken::Identifier))
930  return error("expected a machine instruction");
931  StringRef InstrName = Token.stringValue();
932  if (parseInstrName(InstrName, OpCode))
933  return error(Twine("unknown machine instruction name '") + InstrName + "'");
934  lex();
935  return false;
936 }
937 
938 bool MIParser::parseNamedRegister(unsigned &Reg) {
939  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
940  StringRef Name = Token.stringValue();
941  if (getRegisterByName(Name, Reg))
942  return error(Twine("unknown register name '") + Name + "'");
943  return false;
944 }
945 
946 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
947  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
948  unsigned ID;
949  if (getUnsigned(ID))
950  return true;
951  Info = &PFS.getVRegInfo(ID);
952  return false;
953 }
954 
955 bool MIParser::parseRegister(unsigned &Reg, VRegInfo *&Info) {
956  switch (Token.kind()) {
957  case MIToken::underscore:
958  Reg = 0;
959  return false;
961  return parseNamedRegister(Reg);
963  if (parseVirtualRegister(Info))
964  return true;
965  Reg = Info->VReg;
966  return false;
967  // TODO: Parse other register kinds.
968  default:
969  llvm_unreachable("The current token should be a register");
970  }
971 }
972 
973 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
974  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
975  return error("expected '_', register class, or register bank name");
976  StringRef::iterator Loc = Token.location();
977  StringRef Name = Token.stringValue();
978 
979  // Was it a register class?
980  auto RCNameI = PFS.Names2RegClasses.find(Name);
981  if (RCNameI != PFS.Names2RegClasses.end()) {
982  lex();
983  const TargetRegisterClass &RC = *RCNameI->getValue();
984 
985  switch (RegInfo.Kind) {
986  case VRegInfo::UNKNOWN:
987  case VRegInfo::NORMAL:
988  RegInfo.Kind = VRegInfo::NORMAL;
989  if (RegInfo.Explicit && RegInfo.D.RC != &RC) {
991  return error(Loc, Twine("conflicting register classes, previously: ") +
992  Twine(TRI.getRegClassName(RegInfo.D.RC)));
993  }
994  RegInfo.D.RC = &RC;
995  RegInfo.Explicit = true;
996  return false;
997 
998  case VRegInfo::GENERIC:
999  case VRegInfo::REGBANK:
1000  return error(Loc, "register class specification on generic register");
1001  }
1002  llvm_unreachable("Unexpected register kind");
1003  }
1004 
1005  // Should be a register bank or a generic register.
1006  const RegisterBank *RegBank = nullptr;
1007  if (Name != "_") {
1008  auto RBNameI = PFS.Names2RegBanks.find(Name);
1009  if (RBNameI == PFS.Names2RegBanks.end())
1010  return error(Loc, "expected '_', register class, or register bank name");
1011  RegBank = RBNameI->getValue();
1012  }
1013 
1014  lex();
1015 
1016  switch (RegInfo.Kind) {
1017  case VRegInfo::UNKNOWN:
1018  case VRegInfo::GENERIC:
1019  case VRegInfo::REGBANK:
1020  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1021  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1022  return error(Loc, "conflicting generic register banks");
1023  RegInfo.D.RegBank = RegBank;
1024  RegInfo.Explicit = true;
1025  return false;
1026 
1027  case VRegInfo::NORMAL:
1028  return error(Loc, "register bank specification on normal register");
1029  }
1030  llvm_unreachable("Unexpected register kind");
1031 }
1032 
1033 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1034  const unsigned OldFlags = Flags;
1035  switch (Token.kind()) {
1036  case MIToken::kw_implicit:
1037  Flags |= RegState::Implicit;
1038  break;
1040  Flags |= RegState::ImplicitDefine;
1041  break;
1042  case MIToken::kw_def:
1043  Flags |= RegState::Define;
1044  break;
1045  case MIToken::kw_dead:
1046  Flags |= RegState::Dead;
1047  break;
1048  case MIToken::kw_killed:
1049  Flags |= RegState::Kill;
1050  break;
1051  case MIToken::kw_undef:
1052  Flags |= RegState::Undef;
1053  break;
1054  case MIToken::kw_internal:
1055  Flags |= RegState::InternalRead;
1056  break;
1058  Flags |= RegState::EarlyClobber;
1059  break;
1060  case MIToken::kw_debug_use:
1061  Flags |= RegState::Debug;
1062  break;
1063  default:
1064  llvm_unreachable("The current token should be a register flag");
1065  }
1066  if (OldFlags == Flags)
1067  // We know that the same flag is specified more than once when the flags
1068  // weren't modified.
1069  return error("duplicate '" + Token.stringValue() + "' register flag");
1070  lex();
1071  return false;
1072 }
1073 
1074 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1075  assert(Token.is(MIToken::dot));
1076  lex();
1077  if (Token.isNot(MIToken::Identifier))
1078  return error("expected a subregister index after '.'");
1079  auto Name = Token.stringValue();
1080  SubReg = getSubRegIndex(Name);
1081  if (!SubReg)
1082  return error(Twine("use of unknown subregister index '") + Name + "'");
1083  lex();
1084  return false;
1085 }
1086 
1087 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1088  if (!consumeIfPresent(MIToken::kw_tied_def))
1089  return true;
1090  if (Token.isNot(MIToken::IntegerLiteral))
1091  return error("expected an integer literal after 'tied-def'");
1092  if (getUnsigned(TiedDefIdx))
1093  return true;
1094  lex();
1095  if (expectAndConsume(MIToken::rparen))
1096  return true;
1097  return false;
1098 }
1099 
1100 bool MIParser::assignRegisterTies(MachineInstr &MI,
1101  ArrayRef<ParsedMachineOperand> Operands) {
1102  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1103  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1104  if (!Operands[I].TiedDefIdx)
1105  continue;
1106  // The parser ensures that this operand is a register use, so we just have
1107  // to check the tied-def operand.
1108  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1109  if (DefIdx >= E)
1110  return error(Operands[I].Begin,
1111  Twine("use of invalid tied-def operand index '" +
1112  Twine(DefIdx) + "'; instruction has only ") +
1113  Twine(E) + " operands");
1114  const auto &DefOperand = Operands[DefIdx].Operand;
1115  if (!DefOperand.isReg() || !DefOperand.isDef())
1116  // FIXME: add note with the def operand.
1117  return error(Operands[I].Begin,
1118  Twine("use of invalid tied-def operand index '") +
1119  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1120  " isn't a defined register");
1121  // Check that the tied-def operand wasn't tied elsewhere.
1122  for (const auto &TiedPair : TiedRegisterPairs) {
1123  if (TiedPair.first == DefIdx)
1124  return error(Operands[I].Begin,
1125  Twine("the tied-def operand #") + Twine(DefIdx) +
1126  " is already tied with another register operand");
1127  }
1128  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1129  }
1130  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1131  // indices must be less than tied max.
1132  for (const auto &TiedPair : TiedRegisterPairs)
1133  MI.tieOperands(TiedPair.first, TiedPair.second);
1134  return false;
1135 }
1136 
1137 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1138  Optional<unsigned> &TiedDefIdx,
1139  bool IsDef) {
1140  unsigned Flags = IsDef ? RegState::Define : 0;
1141  while (Token.isRegisterFlag()) {
1142  if (parseRegisterFlag(Flags))
1143  return true;
1144  }
1145  if (!Token.isRegister())
1146  return error("expected a register after register flags");
1147  unsigned Reg;
1148  VRegInfo *RegInfo;
1149  if (parseRegister(Reg, RegInfo))
1150  return true;
1151  lex();
1152  unsigned SubReg = 0;
1153  if (Token.is(MIToken::dot)) {
1154  if (parseSubRegisterIndex(SubReg))
1155  return true;
1157  return error("subregister index expects a virtual register");
1158  }
1159  if (Token.is(MIToken::colon)) {
1161  return error("register class specification expects a virtual register");
1162  lex();
1163  if (parseRegisterClassOrBank(*RegInfo))
1164  return true;
1165  }
1167  if ((Flags & RegState::Define) == 0) {
1168  if (consumeIfPresent(MIToken::lparen)) {
1169  unsigned Idx;
1170  if (!parseRegisterTiedDefIndex(Idx))
1171  TiedDefIdx = Idx;
1172  else {
1173  // Try a redundant low-level type.
1174  LLT Ty;
1175  if (parseLowLevelType(Token.location(), Ty))
1176  return error("expected tied-def or low-level type after '('");
1177 
1178  if (expectAndConsume(MIToken::rparen))
1179  return true;
1180 
1181  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1182  return error("inconsistent type for generic virtual register");
1183 
1184  MRI.setType(Reg, Ty);
1185  }
1186  }
1187  } else if (consumeIfPresent(MIToken::lparen)) {
1188  // Virtual registers may have a tpe with GlobalISel.
1190  return error("unexpected type on physical register");
1191 
1192  LLT Ty;
1193  if (parseLowLevelType(Token.location(), Ty))
1194  return true;
1195 
1196  if (expectAndConsume(MIToken::rparen))
1197  return true;
1198 
1199  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1200  return error("inconsistent type for generic virtual register");
1201 
1202  MRI.setType(Reg, Ty);
1203  } else if (TargetRegisterInfo::isVirtualRegister(Reg)) {
1204  // Generic virtual registers must have a type.
1205  // If we end up here this means the type hasn't been specified and
1206  // this is bad!
1207  if (RegInfo->Kind == VRegInfo::GENERIC ||
1208  RegInfo->Kind == VRegInfo::REGBANK)
1209  return error("generic virtual registers must have a type");
1210  }
1212  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1213  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1214  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1215  Flags & RegState::InternalRead);
1216  return false;
1217 }
1218 
1219 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1220  assert(Token.is(MIToken::IntegerLiteral));
1221  const APSInt &Int = Token.integerValue();
1222  if (Int.getMinSignedBits() > 64)
1223  return error("integer literal is too large to be an immediate operand");
1224  Dest = MachineOperand::CreateImm(Int.getExtValue());
1225  lex();
1226  return false;
1227 }
1228 
1229 bool MIParser::parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1230  const Constant *&C) {
1231  auto Source = StringValue.str(); // The source has to be null terminated.
1232  SMDiagnostic Err;
1233  C = parseConstantValue(Source, Err, *MF.getFunction()->getParent(),
1234  &PFS.IRSlots);
1235  if (!C)
1236  return error(Loc + Err.getColumnNo(), Err.getMessage());
1237  return false;
1238 }
1239 
1240 bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
1241  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1242  return true;
1243  lex();
1244  return false;
1245 }
1246 
1247 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1248  if (Token.is(MIToken::ScalarType)) {
1249  Ty = LLT::scalar(APSInt(Token.range().drop_front()).getZExtValue());
1250  lex();
1251  return false;
1252  } else if (Token.is(MIToken::PointerType)) {
1253  const DataLayout &DL = MF.getFunction()->getParent()->getDataLayout();
1254  unsigned AS = APSInt(Token.range().drop_front()).getZExtValue();
1255  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1256  lex();
1257  return false;
1258  }
1259 
1260  // Now we're looking for a vector.
1261  if (Token.isNot(MIToken::less))
1262  return error(Loc,
1263  "expected unsized, pN, sN or <N x sM> for GlobalISel type");
1264 
1265  lex();
1266 
1267  if (Token.isNot(MIToken::IntegerLiteral))
1268  return error(Loc, "expected <N x sM> for vctor type");
1269  uint64_t NumElements = Token.integerValue().getZExtValue();
1270  lex();
1271 
1272  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1273  return error(Loc, "expected '<N x sM>' for vector type");
1274  lex();
1275 
1276  if (Token.isNot(MIToken::ScalarType))
1277  return error(Loc, "expected '<N x sM>' for vector type");
1278  uint64_t ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1279  lex();
1280 
1281  if (Token.isNot(MIToken::greater))
1282  return error(Loc, "expected '<N x sM>' for vector type");
1283  lex();
1284 
1285  Ty = LLT::vector(NumElements, ScalarSize);
1286  return false;
1287 }
1288 
1289 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1290  assert(Token.is(MIToken::IntegerType));
1291  auto Loc = Token.location();
1292  lex();
1293  if (Token.isNot(MIToken::IntegerLiteral))
1294  return error("expected an integer literal");
1295  const Constant *C = nullptr;
1296  if (parseIRConstant(Loc, C))
1297  return true;
1298  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1299  return false;
1300 }
1301 
1302 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1303  auto Loc = Token.location();
1304  lex();
1305  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1306  Token.isNot(MIToken::HexLiteral))
1307  return error("expected a floating point literal");
1308  const Constant *C = nullptr;
1309  if (parseIRConstant(Loc, C))
1310  return true;
1311  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1312  return false;
1313 }
1314 
1315 bool MIParser::getUnsigned(unsigned &Result) {
1316  if (Token.hasIntegerValue()) {
1317  const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
1318  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1319  if (Val64 == Limit)
1320  return error("expected 32-bit integer (too large)");
1321  Result = Val64;
1322  return false;
1323  }
1324  if (Token.is(MIToken::HexLiteral)) {
1325  APInt A;
1326  if (getHexUint(A))
1327  return true;
1328  if (A.getBitWidth() > 32)
1329  return error("expected 32-bit integer (too large)");
1330  Result = A.getZExtValue();
1331  return false;
1332  }
1333  return true;
1334 }
1335 
1337  assert(Token.is(MIToken::MachineBasicBlock) ||
1339  unsigned Number;
1340  if (getUnsigned(Number))
1341  return true;
1342  auto MBBInfo = PFS.MBBSlots.find(Number);
1343  if (MBBInfo == PFS.MBBSlots.end())
1344  return error(Twine("use of undefined machine basic block #") +
1345  Twine(Number));
1346  MBB = MBBInfo->second;
1347  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
1348  return error(Twine("the name of machine basic block #") + Twine(Number) +
1349  " isn't '" + Token.stringValue() + "'");
1350  return false;
1351 }
1352 
1353 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
1354  MachineBasicBlock *MBB;
1355  if (parseMBBReference(MBB))
1356  return true;
1357  Dest = MachineOperand::CreateMBB(MBB);
1358  lex();
1359  return false;
1360 }
1361 
1362 bool MIParser::parseStackFrameIndex(int &FI) {
1363  assert(Token.is(MIToken::StackObject));
1364  unsigned ID;
1365  if (getUnsigned(ID))
1366  return true;
1367  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
1368  if (ObjectInfo == PFS.StackObjectSlots.end())
1369  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
1370  "'");
1371  StringRef Name;
1372  if (const auto *Alloca =
1373  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
1374  Name = Alloca->getName();
1375  if (!Token.stringValue().empty() && Token.stringValue() != Name)
1376  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
1377  "' isn't '" + Token.stringValue() + "'");
1378  lex();
1379  FI = ObjectInfo->second;
1380  return false;
1381 }
1382 
1383 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
1384  int FI;
1385  if (parseStackFrameIndex(FI))
1386  return true;
1387  Dest = MachineOperand::CreateFI(FI);
1388  return false;
1389 }
1390 
1391 bool MIParser::parseFixedStackFrameIndex(int &FI) {
1392  assert(Token.is(MIToken::FixedStackObject));
1393  unsigned ID;
1394  if (getUnsigned(ID))
1395  return true;
1396  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
1397  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
1398  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
1399  Twine(ID) + "'");
1400  lex();
1401  FI = ObjectInfo->second;
1402  return false;
1403 }
1404 
1405 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
1406  int FI;
1407  if (parseFixedStackFrameIndex(FI))
1408  return true;
1409  Dest = MachineOperand::CreateFI(FI);
1410  return false;
1411 }
1412 
1413 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
1414  switch (Token.kind()) {
1416  const Module *M = MF.getFunction()->getParent();
1417  GV = M->getNamedValue(Token.stringValue());
1418  if (!GV)
1419  return error(Twine("use of undefined global value '") + Token.range() +
1420  "'");
1421  break;
1422  }
1423  case MIToken::GlobalValue: {
1424  unsigned GVIdx;
1425  if (getUnsigned(GVIdx))
1426  return true;
1427  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
1428  return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
1429  "'");
1430  GV = PFS.IRSlots.GlobalValues[GVIdx];
1431  break;
1432  }
1433  default:
1434  llvm_unreachable("The current token should be a global value");
1435  }
1436  return false;
1437 }
1438 
1439 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
1440  GlobalValue *GV = nullptr;
1441  if (parseGlobalValue(GV))
1442  return true;
1443  lex();
1444  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
1445  if (parseOperandsOffset(Dest))
1446  return true;
1447  return false;
1448 }
1449 
1450 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
1451  assert(Token.is(MIToken::ConstantPoolItem));
1452  unsigned ID;
1453  if (getUnsigned(ID))
1454  return true;
1455  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
1456  if (ConstantInfo == PFS.ConstantPoolSlots.end())
1457  return error("use of undefined constant '%const." + Twine(ID) + "'");
1458  lex();
1459  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
1460  if (parseOperandsOffset(Dest))
1461  return true;
1462  return false;
1463 }
1464 
1465 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
1466  assert(Token.is(MIToken::JumpTableIndex));
1467  unsigned ID;
1468  if (getUnsigned(ID))
1469  return true;
1470  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
1471  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
1472  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
1473  lex();
1474  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
1475  return false;
1476 }
1477 
1478 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
1479  assert(Token.is(MIToken::ExternalSymbol));
1480  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
1481  lex();
1482  Dest = MachineOperand::CreateES(Symbol);
1483  if (parseOperandsOffset(Dest))
1484  return true;
1485  return false;
1486 }
1487 
1488 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
1489  assert(Token.is(MIToken::SubRegisterIndex));
1490  StringRef Name = Token.stringValue();
1491  unsigned SubRegIndex = getSubRegIndex(Token.stringValue());
1492  if (SubRegIndex == 0)
1493  return error(Twine("unknown subregister index '") + Name + "'");
1494  lex();
1495  Dest = MachineOperand::CreateImm(SubRegIndex);
1496  return false;
1497 }
1498 
1499 bool MIParser::parseMDNode(MDNode *&Node) {
1500  assert(Token.is(MIToken::exclaim));
1501 
1502  auto Loc = Token.location();
1503  lex();
1504  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1505  return error("expected metadata id after '!'");
1506  unsigned ID;
1507  if (getUnsigned(ID))
1508  return true;
1509  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1510  if (NodeInfo == PFS.IRSlots.MetadataNodes.end())
1511  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
1512  lex();
1513  Node = NodeInfo->second.get();
1514  return false;
1515 }
1516 
1517 bool MIParser::parseDIExpression(MDNode *&Expr) {
1518  assert(Token.is(MIToken::md_diexpr));
1519  lex();
1520 
1521  // FIXME: Share this parsing with the IL parser.
1522  SmallVector<uint64_t, 8> Elements;
1523 
1524  if (expectAndConsume(MIToken::lparen))
1525  return true;
1526 
1527  if (Token.isNot(MIToken::rparen)) {
1528  do {
1529  if (Token.is(MIToken::Identifier)) {
1530  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
1531  lex();
1532  Elements.push_back(Op);
1533  continue;
1534  }
1535  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
1536  }
1537 
1538  if (Token.isNot(MIToken::IntegerLiteral) ||
1539  Token.integerValue().isSigned())
1540  return error("expected unsigned integer");
1541 
1542  auto &U = Token.integerValue();
1543  if (U.ugt(UINT64_MAX))
1544  return error("element too large, limit is " + Twine(UINT64_MAX));
1545  Elements.push_back(U.getZExtValue());
1546  lex();
1547 
1548  } while (consumeIfPresent(MIToken::comma));
1549  }
1550 
1551  if (expectAndConsume(MIToken::rparen))
1552  return true;
1553 
1554  Expr = DIExpression::get(MF.getFunction()->getContext(), Elements);
1555  return false;
1556 }
1557 
1558 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
1559  MDNode *Node = nullptr;
1560  if (Token.is(MIToken::exclaim)) {
1561  if (parseMDNode(Node))
1562  return true;
1563  } else if (Token.is(MIToken::md_diexpr)) {
1564  if (parseDIExpression(Node))
1565  return true;
1566  }
1567  Dest = MachineOperand::CreateMetadata(Node);
1568  return false;
1569 }
1570 
1571 bool MIParser::parseCFIOffset(int &Offset) {
1572  if (Token.isNot(MIToken::IntegerLiteral))
1573  return error("expected a cfi offset");
1574  if (Token.integerValue().getMinSignedBits() > 32)
1575  return error("expected a 32 bit integer (the cfi offset is too large)");
1576  Offset = (int)Token.integerValue().getExtValue();
1577  lex();
1578  return false;
1579 }
1580 
1581 bool MIParser::parseCFIRegister(unsigned &Reg) {
1582  if (Token.isNot(MIToken::NamedRegister))
1583  return error("expected a cfi register");
1584  unsigned LLVMReg;
1585  if (parseNamedRegister(LLVMReg))
1586  return true;
1587  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1588  assert(TRI && "Expected target register info");
1589  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
1590  if (DwarfReg < 0)
1591  return error("invalid DWARF register");
1592  Reg = (unsigned)DwarfReg;
1593  lex();
1594  return false;
1595 }
1596 
1597 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
1598  auto Kind = Token.kind();
1599  lex();
1600  int Offset;
1601  unsigned Reg;
1602  unsigned CFIIndex;
1603  switch (Kind) {
1605  if (parseCFIRegister(Reg))
1606  return true;
1607  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
1608  break;
1610  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1611  parseCFIOffset(Offset))
1612  return true;
1613  CFIIndex =
1614  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
1615  break;
1617  if (parseCFIRegister(Reg))
1618  return true;
1619  CFIIndex =
1621  break;
1623  if (parseCFIOffset(Offset))
1624  return true;
1625  // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
1626  CFIIndex = MF.addFrameInst(
1627  MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
1628  break;
1630  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1631  parseCFIOffset(Offset))
1632  return true;
1633  // NB: MCCFIInstruction::createDefCfa negates the offset.
1634  CFIIndex =
1635  MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
1636  break;
1638  if (parseCFIRegister(Reg))
1639  return true;
1640  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
1641  break;
1642 
1643  default:
1644  // TODO: Parse the other CFI operands.
1645  llvm_unreachable("The current token should be a cfi operand");
1646  }
1647  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
1648  return false;
1649 }
1650 
1651 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
1652  switch (Token.kind()) {
1653  case MIToken::NamedIRBlock: {
1654  BB = dyn_cast_or_null<BasicBlock>(
1655  F.getValueSymbolTable()->lookup(Token.stringValue()));
1656  if (!BB)
1657  return error(Twine("use of undefined IR block '") + Token.range() + "'");
1658  break;
1659  }
1660  case MIToken::IRBlock: {
1661  unsigned SlotNumber = 0;
1662  if (getUnsigned(SlotNumber))
1663  return true;
1664  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
1665  if (!BB)
1666  return error(Twine("use of undefined IR block '%ir-block.") +
1667  Twine(SlotNumber) + "'");
1668  break;
1669  }
1670  default:
1671  llvm_unreachable("The current token should be an IR block reference");
1672  }
1673  return false;
1674 }
1675 
1676 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
1677  assert(Token.is(MIToken::kw_blockaddress));
1678  lex();
1679  if (expectAndConsume(MIToken::lparen))
1680  return true;
1681  if (Token.isNot(MIToken::GlobalValue) &&
1682  Token.isNot(MIToken::NamedGlobalValue))
1683  return error("expected a global value");
1684  GlobalValue *GV = nullptr;
1685  if (parseGlobalValue(GV))
1686  return true;
1687  auto *F = dyn_cast<Function>(GV);
1688  if (!F)
1689  return error("expected an IR function reference");
1690  lex();
1691  if (expectAndConsume(MIToken::comma))
1692  return true;
1693  BasicBlock *BB = nullptr;
1694  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
1695  return error("expected an IR block reference");
1696  if (parseIRBlock(BB, *F))
1697  return true;
1698  lex();
1699  if (expectAndConsume(MIToken::rparen))
1700  return true;
1701  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
1702  if (parseOperandsOffset(Dest))
1703  return true;
1704  return false;
1705 }
1706 
1707 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
1708  assert(Token.is(MIToken::kw_intrinsic));
1709  lex();
1710  if (expectAndConsume(MIToken::lparen))
1711  return error("expected syntax intrinsic(@llvm.whatever)");
1712 
1713  if (Token.isNot(MIToken::NamedGlobalValue))
1714  return error("expected syntax intrinsic(@llvm.whatever)");
1715 
1716  std::string Name = Token.stringValue();
1717  lex();
1718 
1719  if (expectAndConsume(MIToken::rparen))
1720  return error("expected ')' to terminate intrinsic name");
1721 
1722  // Find out what intrinsic we're dealing with, first try the global namespace
1723  // and then the target's private intrinsics if that fails.
1726  if (ID == Intrinsic::not_intrinsic && TII)
1727  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
1728 
1729  if (ID == Intrinsic::not_intrinsic)
1730  return error("unknown intrinsic name");
1732 
1733  return false;
1734 }
1735 
1736 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
1737  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
1738  bool IsFloat = Token.is(MIToken::kw_floatpred);
1739  lex();
1740 
1741  if (expectAndConsume(MIToken::lparen))
1742  return error("expected syntax intpred(whatever) or floatpred(whatever");
1743 
1744  if (Token.isNot(MIToken::Identifier))
1745  return error("whatever");
1746 
1747  CmpInst::Predicate Pred;
1748  if (IsFloat) {
1749  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
1750  .Case("false", CmpInst::FCMP_FALSE)
1751  .Case("oeq", CmpInst::FCMP_OEQ)
1752  .Case("ogt", CmpInst::FCMP_OGT)
1753  .Case("oge", CmpInst::FCMP_OGE)
1754  .Case("olt", CmpInst::FCMP_OLT)
1755  .Case("ole", CmpInst::FCMP_OLE)
1756  .Case("one", CmpInst::FCMP_ONE)
1757  .Case("ord", CmpInst::FCMP_ORD)
1758  .Case("uno", CmpInst::FCMP_UNO)
1759  .Case("ueq", CmpInst::FCMP_UEQ)
1760  .Case("ugt", CmpInst::FCMP_UGT)
1761  .Case("uge", CmpInst::FCMP_UGE)
1762  .Case("ult", CmpInst::FCMP_ULT)
1763  .Case("ule", CmpInst::FCMP_ULE)
1764  .Case("une", CmpInst::FCMP_UNE)
1765  .Case("true", CmpInst::FCMP_TRUE)
1767  if (!CmpInst::isFPPredicate(Pred))
1768  return error("invalid floating-point predicate");
1769  } else {
1770  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
1771  .Case("eq", CmpInst::ICMP_EQ)
1772  .Case("ne", CmpInst::ICMP_NE)
1773  .Case("sgt", CmpInst::ICMP_SGT)
1774  .Case("sge", CmpInst::ICMP_SGE)
1775  .Case("slt", CmpInst::ICMP_SLT)
1776  .Case("sle", CmpInst::ICMP_SLE)
1777  .Case("ugt", CmpInst::ICMP_UGT)
1778  .Case("uge", CmpInst::ICMP_UGE)
1779  .Case("ult", CmpInst::ICMP_ULT)
1780  .Case("ule", CmpInst::ICMP_ULE)
1782  if (!CmpInst::isIntPredicate(Pred))
1783  return error("invalid integer predicate");
1784  }
1785 
1786  lex();
1787  Dest = MachineOperand::CreatePredicate(Pred);
1788  if (expectAndConsume(MIToken::rparen))
1789  return error("predicate should be terminated by ')'.");
1790 
1791  return false;
1792 }
1793 
1794 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
1795  assert(Token.is(MIToken::kw_target_index));
1796  lex();
1797  if (expectAndConsume(MIToken::lparen))
1798  return true;
1799  if (Token.isNot(MIToken::Identifier))
1800  return error("expected the name of the target index");
1801  int Index = 0;
1802  if (getTargetIndex(Token.stringValue(), Index))
1803  return error("use of undefined target index '" + Token.stringValue() + "'");
1804  lex();
1805  if (expectAndConsume(MIToken::rparen))
1806  return true;
1807  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
1808  if (parseOperandsOffset(Dest))
1809  return true;
1810  return false;
1811 }
1812 
1813 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
1814  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
1816  assert(TRI && "Expected target register info");
1817  lex();
1818  if (expectAndConsume(MIToken::lparen))
1819  return true;
1820 
1821  uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs());
1822  while (true) {
1823  if (Token.isNot(MIToken::NamedRegister))
1824  return error("expected a named register");
1825  unsigned Reg;
1826  if (parseNamedRegister(Reg))
1827  return true;
1828  lex();
1829  Mask[Reg / 32] |= 1U << (Reg % 32);
1830  // TODO: Report an error if the same register is used more than once.
1831  if (Token.isNot(MIToken::comma))
1832  break;
1833  lex();
1834  }
1835 
1836  if (expectAndConsume(MIToken::rparen))
1837  return true;
1838  Dest = MachineOperand::CreateRegMask(Mask);
1839  return false;
1840 }
1841 
1842 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
1843  assert(Token.is(MIToken::kw_liveout));
1844  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1845  assert(TRI && "Expected target register info");
1846  uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs());
1847  lex();
1848  if (expectAndConsume(MIToken::lparen))
1849  return true;
1850  while (true) {
1851  if (Token.isNot(MIToken::NamedRegister))
1852  return error("expected a named register");
1853  unsigned Reg;
1854  if (parseNamedRegister(Reg))
1855  return true;
1856  lex();
1857  Mask[Reg / 32] |= 1U << (Reg % 32);
1858  // TODO: Report an error if the same register is used more than once.
1859  if (Token.isNot(MIToken::comma))
1860  break;
1861  lex();
1862  }
1863  if (expectAndConsume(MIToken::rparen))
1864  return true;
1865  Dest = MachineOperand::CreateRegLiveOut(Mask);
1866  return false;
1867 }
1868 
1869 bool MIParser::parseMachineOperand(MachineOperand &Dest,
1870  Optional<unsigned> &TiedDefIdx) {
1871  switch (Token.kind()) {
1872  case MIToken::kw_implicit:
1874  case MIToken::kw_def:
1875  case MIToken::kw_dead:
1876  case MIToken::kw_killed:
1877  case MIToken::kw_undef:
1878  case MIToken::kw_internal:
1880  case MIToken::kw_debug_use:
1881  case MIToken::underscore:
1884  return parseRegisterOperand(Dest, TiedDefIdx);
1886  return parseImmediateOperand(Dest);
1887  case MIToken::IntegerType:
1888  return parseTypedImmediateOperand(Dest);
1889  case MIToken::kw_half:
1890  case MIToken::kw_float:
1891  case MIToken::kw_double:
1892  case MIToken::kw_x86_fp80:
1893  case MIToken::kw_fp128:
1894  case MIToken::kw_ppc_fp128:
1895  return parseFPImmediateOperand(Dest);
1897  return parseMBBOperand(Dest);
1898  case MIToken::StackObject:
1899  return parseStackObjectOperand(Dest);
1901  return parseFixedStackObjectOperand(Dest);
1902  case MIToken::GlobalValue:
1904  return parseGlobalAddressOperand(Dest);
1906  return parseConstantPoolIndexOperand(Dest);
1908  return parseJumpTableIndexOperand(Dest);
1910  return parseExternalSymbolOperand(Dest);
1912  return parseSubRegisterIndexOperand(Dest);
1913  case MIToken::md_diexpr:
1914  case MIToken::exclaim:
1915  return parseMetadataOperand(Dest);
1922  return parseCFIOperand(Dest);
1924  return parseBlockAddressOperand(Dest);
1925  case MIToken::kw_intrinsic:
1926  return parseIntrinsicOperand(Dest);
1928  return parseTargetIndexOperand(Dest);
1929  case MIToken::kw_liveout:
1930  return parseLiveoutRegisterMaskOperand(Dest);
1931  case MIToken::kw_floatpred:
1932  case MIToken::kw_intpred:
1933  return parsePredicateOperand(Dest);
1934  case MIToken::Error:
1935  return true;
1936  case MIToken::Identifier:
1937  if (const auto *RegMask = getRegMask(Token.stringValue())) {
1938  Dest = MachineOperand::CreateRegMask(RegMask);
1939  lex();
1940  break;
1941  } else
1942  return parseCustomRegisterMaskOperand(Dest);
1943  default:
1944  // FIXME: Parse the MCSymbol machine operand.
1945  return error("expected a machine operand");
1946  }
1947  return false;
1948 }
1949 
1950 bool MIParser::parseMachineOperandAndTargetFlags(
1951  MachineOperand &Dest, Optional<unsigned> &TiedDefIdx) {
1952  unsigned TF = 0;
1953  bool HasTargetFlags = false;
1954  if (Token.is(MIToken::kw_target_flags)) {
1955  HasTargetFlags = true;
1956  lex();
1957  if (expectAndConsume(MIToken::lparen))
1958  return true;
1959  if (Token.isNot(MIToken::Identifier))
1960  return error("expected the name of the target flag");
1961  if (getDirectTargetFlag(Token.stringValue(), TF)) {
1962  if (getBitmaskTargetFlag(Token.stringValue(), TF))
1963  return error("use of undefined target flag '" + Token.stringValue() +
1964  "'");
1965  }
1966  lex();
1967  while (Token.is(MIToken::comma)) {
1968  lex();
1969  if (Token.isNot(MIToken::Identifier))
1970  return error("expected the name of the target flag");
1971  unsigned BitFlag = 0;
1972  if (getBitmaskTargetFlag(Token.stringValue(), BitFlag))
1973  return error("use of undefined target flag '" + Token.stringValue() +
1974  "'");
1975  // TODO: Report an error when using a duplicate bit target flag.
1976  TF |= BitFlag;
1977  lex();
1978  }
1979  if (expectAndConsume(MIToken::rparen))
1980  return true;
1981  }
1982  auto Loc = Token.location();
1983  if (parseMachineOperand(Dest, TiedDefIdx))
1984  return true;
1985  if (!HasTargetFlags)
1986  return false;
1987  if (Dest.isReg())
1988  return error(Loc, "register operands can't have target flags");
1989  Dest.setTargetFlags(TF);
1990  return false;
1991 }
1992 
1993 bool MIParser::parseOffset(int64_t &Offset) {
1994  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
1995  return false;
1996  StringRef Sign = Token.range();
1997  bool IsNegative = Token.is(MIToken::minus);
1998  lex();
1999  if (Token.isNot(MIToken::IntegerLiteral))
2000  return error("expected an integer literal after '" + Sign + "'");
2001  if (Token.integerValue().getMinSignedBits() > 64)
2002  return error("expected 64-bit integer (too large)");
2003  Offset = Token.integerValue().getExtValue();
2004  if (IsNegative)
2005  Offset = -Offset;
2006  lex();
2007  return false;
2008 }
2009 
2010 bool MIParser::parseAlignment(unsigned &Alignment) {
2011  assert(Token.is(MIToken::kw_align));
2012  lex();
2013  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2014  return error("expected an integer literal after 'align'");
2015  if (getUnsigned(Alignment))
2016  return true;
2017  lex();
2018  return false;
2019 }
2020 
2021 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2022  int64_t Offset = 0;
2023  if (parseOffset(Offset))
2024  return true;
2025  Op.setOffset(Offset);
2026  return false;
2027 }
2028 
2029 bool MIParser::parseIRValue(const Value *&V) {
2030  switch (Token.kind()) {
2031  case MIToken::NamedIRValue: {
2032  V = MF.getFunction()->getValueSymbolTable()->lookup(Token.stringValue());
2033  break;
2034  }
2035  case MIToken::IRValue: {
2036  unsigned SlotNumber = 0;
2037  if (getUnsigned(SlotNumber))
2038  return true;
2039  V = getIRValue(SlotNumber);
2040  break;
2041  }
2043  case MIToken::GlobalValue: {
2044  GlobalValue *GV = nullptr;
2045  if (parseGlobalValue(GV))
2046  return true;
2047  V = GV;
2048  break;
2049  }
2050  case MIToken::QuotedIRValue: {
2051  const Constant *C = nullptr;
2052  if (parseIRConstant(Token.location(), Token.stringValue(), C))
2053  return true;
2054  V = C;
2055  break;
2056  }
2057  default:
2058  llvm_unreachable("The current token should be an IR block reference");
2059  }
2060  if (!V)
2061  return error(Twine("use of undefined IR value '") + Token.range() + "'");
2062  return false;
2063 }
2064 
2065 bool MIParser::getUint64(uint64_t &Result) {
2066  if (Token.hasIntegerValue()) {
2067  if (Token.integerValue().getActiveBits() > 64)
2068  return error("expected 64-bit integer (too large)");
2069  Result = Token.integerValue().getZExtValue();
2070  return false;
2071  }
2072  if (Token.is(MIToken::HexLiteral)) {
2073  APInt A;
2074  if (getHexUint(A))
2075  return true;
2076  if (A.getBitWidth() > 64)
2077  return error("expected 64-bit integer (too large)");
2078  Result = A.getZExtValue();
2079  return false;
2080  }
2081  return true;
2082 }
2083 
2084 bool MIParser::getHexUint(APInt &Result) {
2085  assert(Token.is(MIToken::HexLiteral));
2086  StringRef S = Token.range();
2087  assert(S[0] == '0' && tolower(S[1]) == 'x');
2088  // This could be a floating point literal with a special prefix.
2089  if (!isxdigit(S[2]))
2090  return true;
2091  StringRef V = S.substr(2);
2092  APInt A(V.size()*4, V, 16);
2093 
2094  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
2095  // sure it isn't the case before constructing result.
2096  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
2097  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
2098  return false;
2099 }
2100 
2101 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
2102  const auto OldFlags = Flags;
2103  switch (Token.kind()) {
2104  case MIToken::kw_volatile:
2106  break;
2109  break;
2112  break;
2113  case MIToken::kw_invariant:
2115  break;
2116  case MIToken::StringConstant: {
2118  if (getMMOTargetFlag(Token.stringValue(), TF))
2119  return error("use of undefined target MMO flag '" + Token.stringValue() +
2120  "'");
2121  Flags |= TF;
2122  break;
2123  }
2124  default:
2125  llvm_unreachable("The current token should be a memory operand flag");
2126  }
2127  if (OldFlags == Flags)
2128  // We know that the same flag is specified more than once when the flags
2129  // weren't modified.
2130  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
2131  lex();
2132  return false;
2133 }
2134 
2135 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
2136  switch (Token.kind()) {
2137  case MIToken::kw_stack:
2138  PSV = MF.getPSVManager().getStack();
2139  break;
2140  case MIToken::kw_got:
2141  PSV = MF.getPSVManager().getGOT();
2142  break;
2144  PSV = MF.getPSVManager().getJumpTable();
2145  break;
2147  PSV = MF.getPSVManager().getConstantPool();
2148  break;
2150  int FI;
2151  if (parseFixedStackFrameIndex(FI))
2152  return true;
2153  PSV = MF.getPSVManager().getFixedStack(FI);
2154  // The token was already consumed, so use return here instead of break.
2155  return false;
2156  }
2157  case MIToken::StackObject: {
2158  int FI;
2159  if (parseStackFrameIndex(FI))
2160  return true;
2161  PSV = MF.getPSVManager().getFixedStack(FI);
2162  // The token was already consumed, so use return here instead of break.
2163  return false;
2164  }
2166  lex();
2167  switch (Token.kind()) {
2168  case MIToken::GlobalValue:
2170  GlobalValue *GV = nullptr;
2171  if (parseGlobalValue(GV))
2172  return true;
2174  break;
2175  }
2178  MF.createExternalSymbolName(Token.stringValue()));
2179  break;
2180  default:
2181  return error(
2182  "expected a global value or an external symbol after 'call-entry'");
2183  }
2184  break;
2185  default:
2186  llvm_unreachable("The current token should be pseudo source value");
2187  }
2188  lex();
2189  return false;
2190 }
2191 
2192 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
2193  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
2194  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
2195  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
2196  Token.is(MIToken::kw_call_entry)) {
2197  const PseudoSourceValue *PSV = nullptr;
2198  if (parseMemoryPseudoSourceValue(PSV))
2199  return true;
2200  int64_t Offset = 0;
2201  if (parseOffset(Offset))
2202  return true;
2203  Dest = MachinePointerInfo(PSV, Offset);
2204  return false;
2205  }
2206  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
2207  Token.isNot(MIToken::GlobalValue) &&
2208  Token.isNot(MIToken::NamedGlobalValue) &&
2209  Token.isNot(MIToken::QuotedIRValue))
2210  return error("expected an IR value reference");
2211  const Value *V = nullptr;
2212  if (parseIRValue(V))
2213  return true;
2214  if (!V->getType()->isPointerTy())
2215  return error("expected a pointer IR value");
2216  lex();
2217  int64_t Offset = 0;
2218  if (parseOffset(Offset))
2219  return true;
2220  Dest = MachinePointerInfo(V, Offset);
2221  return false;
2222 }
2223 
2224 bool MIParser::parseOptionalScope(LLVMContext &Context,
2225  SyncScope::ID &SSID) {
2226  SSID = SyncScope::System;
2227  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
2228  lex();
2229  if (expectAndConsume(MIToken::lparen))
2230  return error("expected '(' in syncscope");
2231 
2232  std::string SSN;
2233  if (parseStringConstant(SSN))
2234  return true;
2235 
2236  SSID = Context.getOrInsertSyncScopeID(SSN);
2237  if (expectAndConsume(MIToken::rparen))
2238  return error("expected ')' in syncscope");
2239  }
2240 
2241  return false;
2242 }
2243 
2244 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
2245  Order = AtomicOrdering::NotAtomic;
2246  if (Token.isNot(MIToken::Identifier))
2247  return false;
2248 
2249  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
2250  .Case("unordered", AtomicOrdering::Unordered)
2251  .Case("monotonic", AtomicOrdering::Monotonic)
2252  .Case("acquire", AtomicOrdering::Acquire)
2253  .Case("release", AtomicOrdering::Release)
2257 
2258  if (Order != AtomicOrdering::NotAtomic) {
2259  lex();
2260  return false;
2261  }
2262 
2263  return error("expected an atomic scope, ordering or a size integer literal");
2264 }
2265 
2266 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
2267  if (expectAndConsume(MIToken::lparen))
2268  return true;
2270  while (Token.isMemoryOperandFlag()) {
2271  if (parseMemoryOperandFlag(Flags))
2272  return true;
2273  }
2274  if (Token.isNot(MIToken::Identifier) ||
2275  (Token.stringValue() != "load" && Token.stringValue() != "store"))
2276  return error("expected 'load' or 'store' memory operation");
2277  if (Token.stringValue() == "load")
2278  Flags |= MachineMemOperand::MOLoad;
2279  else
2280  Flags |= MachineMemOperand::MOStore;
2281  lex();
2282 
2283  // Optional synchronization scope.
2284  SyncScope::ID SSID;
2285  if (parseOptionalScope(MF.getFunction()->getContext(), SSID))
2286  return true;
2287 
2288  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
2289  AtomicOrdering Order, FailureOrder;
2290  if (parseOptionalAtomicOrdering(Order))
2291  return true;
2292 
2293  if (parseOptionalAtomicOrdering(FailureOrder))
2294  return true;
2295 
2296  if (Token.isNot(MIToken::IntegerLiteral))
2297  return error("expected the size integer literal after memory operation");
2298  uint64_t Size;
2299  if (getUint64(Size))
2300  return true;
2301  lex();
2302 
2304  if (Token.is(MIToken::Identifier)) {
2305  const char *Word = Flags & MachineMemOperand::MOLoad ? "from" : "into";
2306  if (Token.stringValue() != Word)
2307  return error(Twine("expected '") + Word + "'");
2308  lex();
2309 
2310  if (parseMachinePointerInfo(Ptr))
2311  return true;
2312  }
2313  unsigned BaseAlignment = Size;
2314  AAMDNodes AAInfo;
2315  MDNode *Range = nullptr;
2316  while (consumeIfPresent(MIToken::comma)) {
2317  switch (Token.kind()) {
2318  case MIToken::kw_align:
2319  if (parseAlignment(BaseAlignment))
2320  return true;
2321  break;
2322  case MIToken::md_tbaa:
2323  lex();
2324  if (parseMDNode(AAInfo.TBAA))
2325  return true;
2326  break;
2328  lex();
2329  if (parseMDNode(AAInfo.Scope))
2330  return true;
2331  break;
2332  case MIToken::md_noalias:
2333  lex();
2334  if (parseMDNode(AAInfo.NoAlias))
2335  return true;
2336  break;
2337  case MIToken::md_range:
2338  lex();
2339  if (parseMDNode(Range))
2340  return true;
2341  break;
2342  // TODO: Report an error on duplicate metadata nodes.
2343  default:
2344  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
2345  "'!noalias' or '!range'");
2346  }
2347  }
2348  if (expectAndConsume(MIToken::rparen))
2349  return true;
2350  Dest = MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment, AAInfo, Range,
2351  SSID, Order, FailureOrder);
2352  return false;
2353 }
2354 
2355 void MIParser::initNames2InstrOpCodes() {
2356  if (!Names2InstrOpCodes.empty())
2357  return;
2358  const auto *TII = MF.getSubtarget().getInstrInfo();
2359  assert(TII && "Expected target instruction info");
2360  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
2361  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
2362 }
2363 
2364 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
2365  initNames2InstrOpCodes();
2366  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
2367  if (InstrInfo == Names2InstrOpCodes.end())
2368  return true;
2369  OpCode = InstrInfo->getValue();
2370  return false;
2371 }
2372 
2373 void MIParser::initNames2Regs() {
2374  if (!Names2Regs.empty())
2375  return;
2376  // The '%noreg' register is the register 0.
2377  Names2Regs.insert(std::make_pair("noreg", 0));
2378  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2379  assert(TRI && "Expected target register info");
2380  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
2381  bool WasInserted =
2382  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
2383  .second;
2384  (void)WasInserted;
2385  assert(WasInserted && "Expected registers to be unique case-insensitively");
2386  }
2387 }
2388 
2389 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
2390  initNames2Regs();
2391  auto RegInfo = Names2Regs.find(RegName);
2392  if (RegInfo == Names2Regs.end())
2393  return true;
2394  Reg = RegInfo->getValue();
2395  return false;
2396 }
2397 
2398 void MIParser::initNames2RegMasks() {
2399  if (!Names2RegMasks.empty())
2400  return;
2401  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2402  assert(TRI && "Expected target register info");
2403  ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
2404  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
2405  assert(RegMasks.size() == RegMaskNames.size());
2406  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
2407  Names2RegMasks.insert(
2408  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
2409 }
2410 
2411 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
2412  initNames2RegMasks();
2413  auto RegMaskInfo = Names2RegMasks.find(Identifier);
2414  if (RegMaskInfo == Names2RegMasks.end())
2415  return nullptr;
2416  return RegMaskInfo->getValue();
2417 }
2418 
2419 void MIParser::initNames2SubRegIndices() {
2420  if (!Names2SubRegIndices.empty())
2421  return;
2423  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
2424  Names2SubRegIndices.insert(
2425  std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
2426 }
2427 
2428 unsigned MIParser::getSubRegIndex(StringRef Name) {
2429  initNames2SubRegIndices();
2430  auto SubRegInfo = Names2SubRegIndices.find(Name);
2431  if (SubRegInfo == Names2SubRegIndices.end())
2432  return 0;
2433  return SubRegInfo->getValue();
2434 }
2435 
2437  const Function &F,
2438  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2439  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2440  MST.incorporateFunction(F);
2441  for (auto &BB : F) {
2442  if (BB.hasName())
2443  continue;
2444  int Slot = MST.getLocalSlot(&BB);
2445  if (Slot == -1)
2446  continue;
2447  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
2448  }
2449 }
2450 
2452  unsigned Slot,
2453  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2454  auto BlockInfo = Slots2BasicBlocks.find(Slot);
2455  if (BlockInfo == Slots2BasicBlocks.end())
2456  return nullptr;
2457  return BlockInfo->second;
2458 }
2459 
2460 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
2461  if (Slots2BasicBlocks.empty())
2462  initSlots2BasicBlocks(*MF.getFunction(), Slots2BasicBlocks);
2463  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
2464 }
2465 
2466 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
2467  if (&F == MF.getFunction())
2468  return getIRBlock(Slot);
2469  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
2470  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
2471  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
2472 }
2473 
2474 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
2475  DenseMap<unsigned, const Value *> &Slots2Values) {
2476  int Slot = MST.getLocalSlot(V);
2477  if (Slot == -1)
2478  return;
2479  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
2480 }
2481 
2482 /// Creates the mapping from slot numbers to function's unnamed IR values.
2483 static void initSlots2Values(const Function &F,
2484  DenseMap<unsigned, const Value *> &Slots2Values) {
2485  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2486  MST.incorporateFunction(F);
2487  for (const auto &Arg : F.args())
2488  mapValueToSlot(&Arg, MST, Slots2Values);
2489  for (const auto &BB : F) {
2490  mapValueToSlot(&BB, MST, Slots2Values);
2491  for (const auto &I : BB)
2492  mapValueToSlot(&I, MST, Slots2Values);
2493  }
2494 }
2495 
2496 const Value *MIParser::getIRValue(unsigned Slot) {
2497  if (Slots2Values.empty())
2498  initSlots2Values(*MF.getFunction(), Slots2Values);
2499  auto ValueInfo = Slots2Values.find(Slot);
2500  if (ValueInfo == Slots2Values.end())
2501  return nullptr;
2502  return ValueInfo->second;
2503 }
2504 
2505 void MIParser::initNames2TargetIndices() {
2506  if (!Names2TargetIndices.empty())
2507  return;
2508  const auto *TII = MF.getSubtarget().getInstrInfo();
2509  assert(TII && "Expected target instruction info");
2510  auto Indices = TII->getSerializableTargetIndices();
2511  for (const auto &I : Indices)
2512  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
2513 }
2514 
2515 bool MIParser::getTargetIndex(StringRef Name, int &Index) {
2516  initNames2TargetIndices();
2517  auto IndexInfo = Names2TargetIndices.find(Name);
2518  if (IndexInfo == Names2TargetIndices.end())
2519  return true;
2520  Index = IndexInfo->second;
2521  return false;
2522 }
2523 
2524 void MIParser::initNames2DirectTargetFlags() {
2525  if (!Names2DirectTargetFlags.empty())
2526  return;
2527  const auto *TII = MF.getSubtarget().getInstrInfo();
2528  assert(TII && "Expected target instruction info");
2530  for (const auto &I : Flags)
2531  Names2DirectTargetFlags.insert(
2532  std::make_pair(StringRef(I.second), I.first));
2533 }
2534 
2535 bool MIParser::getDirectTargetFlag(StringRef Name, unsigned &Flag) {
2536  initNames2DirectTargetFlags();
2537  auto FlagInfo = Names2DirectTargetFlags.find(Name);
2538  if (FlagInfo == Names2DirectTargetFlags.end())
2539  return true;
2540  Flag = FlagInfo->second;
2541  return false;
2542 }
2543 
2544 void MIParser::initNames2BitmaskTargetFlags() {
2545  if (!Names2BitmaskTargetFlags.empty())
2546  return;
2547  const auto *TII = MF.getSubtarget().getInstrInfo();
2548  assert(TII && "Expected target instruction info");
2550  for (const auto &I : Flags)
2551  Names2BitmaskTargetFlags.insert(
2552  std::make_pair(StringRef(I.second), I.first));
2553 }
2554 
2555 bool MIParser::getBitmaskTargetFlag(StringRef Name, unsigned &Flag) {
2556  initNames2BitmaskTargetFlags();
2557  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
2558  if (FlagInfo == Names2BitmaskTargetFlags.end())
2559  return true;
2560  Flag = FlagInfo->second;
2561  return false;
2562 }
2563 
2564 void MIParser::initNames2MMOTargetFlags() {
2565  if (!Names2MMOTargetFlags.empty())
2566  return;
2567  const auto *TII = MF.getSubtarget().getInstrInfo();
2568  assert(TII && "Expected target instruction info");
2569  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
2570  for (const auto &I : Flags)
2571  Names2MMOTargetFlags.insert(
2572  std::make_pair(StringRef(I.second), I.first));
2573 }
2574 
2575 bool MIParser::getMMOTargetFlag(StringRef Name,
2576  MachineMemOperand::Flags &Flag) {
2577  initNames2MMOTargetFlags();
2578  auto FlagInfo = Names2MMOTargetFlags.find(Name);
2579  if (FlagInfo == Names2MMOTargetFlags.end())
2580  return true;
2581  Flag = FlagInfo->second;
2582  return false;
2583 }
2584 
2585 bool MIParser::parseStringConstant(std::string &Result) {
2586  if (Token.isNot(MIToken::StringConstant))
2587  return error("expected string constant");
2588  Result = Token.stringValue();
2589  lex();
2590  return false;
2591 }
2592 
2594  StringRef Src,
2595  SMDiagnostic &Error) {
2596  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
2597 }
2598 
2600  StringRef Src, SMDiagnostic &Error) {
2601  return MIParser(PFS, Error, Src).parseBasicBlocks();
2602 }
2603 
2605  MachineBasicBlock *&MBB, StringRef Src,
2606  SMDiagnostic &Error) {
2607  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
2608 }
2609 
2611  unsigned &Reg, StringRef Src,
2612  SMDiagnostic &Error) {
2613  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
2614 }
2615 
2617  unsigned &Reg, StringRef Src,
2618  SMDiagnostic &Error) {
2619  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
2620 }
2621 
2623  VRegInfo *&Info, StringRef Src,
2624  SMDiagnostic &Error) {
2625  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
2626 }
2627 
2629  int &FI, StringRef Src,
2630  SMDiagnostic &Error) {
2631  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
2632 }
2633 
2635  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
2636  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
2637 }
bool isFPPredicate() const
Definition: InstrTypes.h:944
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
uint64_t CallInst * C
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:65
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:109
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:2593
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2436
A common definition of LaneBitmask for use in TableGen and CodeGen.
uint64_t getZExtValue() const
Get zero extended value.
Definition: APInt.h:1542
static MachineOperand CreateCImm(const ConstantInt *CI)
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
DenseMap< unsigned, unsigned > JumpTableSlots
Definition: MIParser.h:62
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:228
LLVMContext & Context
const T & back() const
back - Get the last element.
Definition: ArrayRef.h:158
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:659
Atomic ordering constants.
DenseMap< unsigned, unsigned > ConstantPoolSlots
Definition: MIParser.h:61
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:656
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:72
void setTargetFlags(unsigned F)
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
static BranchProbability getRaw(uint32_t N)
static LaneBitmask getAll()
Definition: LaneBitmask.h:84
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction...
Definition: MCInstrDesc.h:512
static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags=0)
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:163
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
Definition: StringRef.h:138
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:404
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID...
This file contains the declarations for metadata subclasses.
unsigned less or equal
Definition: InstrTypes.h:879
unsigned less than
Definition: InstrTypes.h:878
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:785
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:859
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
iterator find(StringRef Key)
Definition: StringMap.h:337
DenseMap< unsigned, int > StackObjectSlots
Definition: MIParser.h:60
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:869
#define error(X)
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:344
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:862
F(f)
DenseMap< unsigned, VRegInfo * > VRegInfos
Definition: MIParser.h:58
Manage lifetime of a slot tracker for printing IR.
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2604
const TargetRegisterClass * RC
Definition: MIParser.h:39
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:391
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp=false)
CreateMachineInstr - Allocate a new MachineInstr.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE const char * data() const
data - Get a pointer to the start of the string (which may not be null terminated).
Definition: StringRef.h:128
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1488
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:191
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:864
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:863
std::map< unsigned, TrackingMDNodeRef > MetadataNodes
Definition: SlotMapping.h:35
A description of a memory reference used in the backend.
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:947
const DataLayout & getDataLayout() const
Get the data layout for the module&#39;s target platform.
Definition: Module.cpp:361
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
const HexagonInstrInfo * TII
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2451
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
union llvm::VRegInfo::@310 D
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
support::ulittle32_t Word
Definition: IRSymtab.h:51
unsigned SubReg
Reg
All possible values of the reg field in the ModR/M byte.
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:860
const Name2RegBankMap & Names2RegBanks
Definition: MIParser.h:55
The memory access is dereferenceable (i.e., doesn&#39;t trap).
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Definition: regcomp.c:196
This file implements a class to represent arbitrary precision integral constant values and operations...
AtomicOrdering
Atomic ordering for LLVM&#39;s memory model.
DenseMap< unsigned, int > FixedStackObjectSlots
Definition: MIParser.h:59
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:877
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Case(const char(&S)[N], const T &Value)
Definition: StringSwitch.h:74
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:104
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
PseudoSourceValueManager & getPSVManager() const
virtual unsigned lookupName(const char *Name, unsigned Len) const =0
Look up target intrinsic by name.
GlobalValue * getNamedValue(StringRef Name) const
Return the global value in the module with the specified name, of arbitrary type. ...
Definition: Module.cpp:112
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
virtual const TargetInstrInfo * getInstrInfo() const
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2622
static MachineOperand CreatePredicate(unsigned Pred)
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot...
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
const char * getName(unsigned RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:121
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:146
unsigned getMainFileID() const
Definition: SourceMgr.h:113
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
VRegInfo & getVRegInfo(unsigned VReg)
Definition: MIParser.cpp:91
The memory access is volatile.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:444
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1164
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:43
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2628
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction...
Definition: MCInstrDesc.h:534
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
unsigned const MachineRegisterInfo * MRI
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:872
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:377
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:514
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned char TargetFlags=0)
bool hasName() const
Definition: Value.h:251
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
const PseudoSourceValue * getExternalSymbolCallEntry(const char *ES)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:384
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1339
static MachineOperand CreateFPImm(const ConstantFP *CFP)
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:149
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:116
This file contains the declarations for the subclasses of Constant, which represent the different fla...
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:221
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:151
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:173
void setType(unsigned VReg, LLT Ty)
Set the low-level type of VReg to Ty.
BumpPtrAllocator Allocator
Definition: MIParser.h:50
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2616
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:185
unsigned createIncompleteVirtualRegister()
Creates a new virtual register that has no register class, register bank or size assigned yet...
bool isValid() const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:853
static const unsigned End
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:432
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:862
The memory access is non-temporal.
MachineFunction & MF
Definition: MIParser.h:51
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:34
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling...
Definition: SourceMgr.h:41
void setOffset(int64_t Offset)
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:870
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:771
const SlotMapping & IRSlots
Definition: MIParser.h:53
uint32_t * allocateRegisterMask(unsigned NumRegister)
Allocate and initialize a register mask with NumRegister bits.
const AMDGPUAS & AS
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:868
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges=None, ArrayRef< SMFixIt > FixIts=None) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:146
LLVM_ATTRIBUTE_ALWAYS_INLINE R Default(const T &Value) const
Definition: StringSwitch.h:244
signed greater than
Definition: InstrTypes.h:880
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:59
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:2599
TargetIntrinsicInfo - Interface to description of machine instruction set.
Struct that holds a reference to a particular GUID in a global value summary.
The memory access writes data.
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:857
const Name2RegClassMap & Names2RegClasses
Definition: MIParser.h:54
static MachineOperand CreateMetadata(const MDNode *Meta)
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
void setFlags(unsigned flags)
Definition: MachineInstr.h:189
enum llvm::VRegInfo::uint8_t Kind
MachineOperand class - Representation of each machine instruction operand.
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:867
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
Module.h This file contains the declarations for the Module class.
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:884
StringRef getMessage() const
Definition: SourceMgr.h:264
signed less than
Definition: InstrTypes.h:882
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:642
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:662
This class implements the register bank concept.
Definition: RegisterBank.h:29
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:40
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:580
bool isIntPredicate() const
Definition: InstrTypes.h:945
signed less or equal
Definition: InstrTypes.h:883
StringMap - This is an unconventional map that is specialized for handling keys that are "strings"...
Definition: StringMap.h:224
Class for arbitrary precision integers.
Definition: APInt.h:69
Special value supplied for machine level alias analysis.
const PseudoSourceValue * getJumpTable()
Return a pseudo source value referencing a jump table.
const PseudoSourceValue * getGlobalValueCallEntry(const GlobalValue *GV)
static MachineOperand CreateES(const char *SymName, unsigned char TargetFlags=0)
const PseudoSourceValue * getGOT()
Return a pseudo source value referencing the global offset table (or something the like)...
This struct contains the mappings from the slot numbers to unnamed metadata nodes, global values and types.
Definition: SlotMapping.h:33
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2634
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:37
Flags
Flags values. These may be or&#39;d together.
amdgpu Simplify well known AMD library false Value Value * Arg
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:37
Representation of each machine instruction.
Definition: MachineInstr.h:59
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
Definition: SmallVector.h:120
const char * getBufferEnd() const
Definition: MemoryBuffer.h:56
int getColumnNo() const
Definition: SourceMgr.h:262
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:61
unsigned greater or equal
Definition: InstrTypes.h:877
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
unsigned VReg
Definition: MIParser.h:42
static MachineOperand CreateImm(int64_t Val)
#define I(x, y, z)
Definition: MD5.cpp:58
The memory access always returns the same value (or traps).
iterator end()
Definition: DenseMap.h:79
LLT getType(unsigned VReg) const
Get the low-level type of VReg or LLT{} if VReg is not a generic (target independent) virtual registe...
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:251
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:861
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:57
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:865
const char * getBufferStart() const
Definition: MemoryBuffer.h:55
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
std::string str() const
Return the twine contents as a std::string.
Definition: Twine.cpp:17
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
const unsigned Kind
const PseudoSourceValue * getStack()
Return a pseudo source value referencing the area below the stack frame of a function, e.g., the argument space.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:856
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:556
LLVM Value Representation.
Definition: Value.h:73
static LLT pointer(uint16_t AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space (defaulting to 0).
A token produced by the machine instruction lexer.
Definition: MILexer.h:28
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:866
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
Lightweight error class with error context and mandatory checking.
Definition: Error.h:156
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
IRTranslator LLVM IR MI
unsigned greater than
Definition: InstrTypes.h:876
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
static LLT vector(uint16_t NumElements, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
const RegisterBank * RegBank
Definition: MIParser.h:40
Represents a location in source code.
Definition: SMLoc.h:24
bool parseRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2610
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:858
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value *> &Slots2Values)
Definition: MIParser.cpp:2474
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value *> &Slots2Values)
Creates the mapping from slot numbers to function&#39;s unnamed IR values.
Definition: MIParser.cpp:2483
MachineInstr::mmo_iterator allocateMemRefsArray(unsigned long Num)
allocateMemRefsArray - Allocate an array to hold MachineMemOperand pointers.
static MachineOperand CreateFI(int Idx)
const PseudoSourceValue * getConstantPool()
Return a pseudo source value referencing the constant pool.
void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd)
Assign this MachineInstr&#39;s memory reference descriptor list.
iterator end()
Definition: StringMap.h:322
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Successors, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:524
iterator_range< arg_iterator > args()
Definition: Function.h:621
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:855
signed greater or equal
Definition: InstrTypes.h:881
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:144
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:172
bool isImplicit() const
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:233
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, const Name2RegClassMap &Names2RegClasses, const Name2RegBankMap &Names2RegBanks)
Definition: MIParser.cpp:83
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.