LLVM  7.0.0svn
MIParser.cpp
Go to the documentation of this file.
1 //===- MIParser.cpp - Machine instructions parser implementation ----------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the parsing of machine instructions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "MIParser.h"
15 #include "MILexer.h"
16 #include "llvm/ADT/APInt.h"
17 #include "llvm/ADT/APSInt.h"
18 #include "llvm/ADT/ArrayRef.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/None.h"
21 #include "llvm/ADT/Optional.h"
22 #include "llvm/ADT/SmallVector.h"
23 #include "llvm/ADT/StringMap.h"
24 #include "llvm/ADT/StringRef.h"
25 #include "llvm/ADT/StringSwitch.h"
26 #include "llvm/ADT/Twine.h"
27 #include "llvm/AsmParser/Parser.h"
41 #include "llvm/IR/BasicBlock.h"
42 #include "llvm/IR/Constants.h"
43 #include "llvm/IR/DataLayout.h"
45 #include "llvm/IR/DebugLoc.h"
46 #include "llvm/IR/Function.h"
47 #include "llvm/IR/InstrTypes.h"
48 #include "llvm/IR/Instructions.h"
49 #include "llvm/IR/Intrinsics.h"
50 #include "llvm/IR/Metadata.h"
51 #include "llvm/IR/Module.h"
53 #include "llvm/IR/Type.h"
54 #include "llvm/IR/Value.h"
56 #include "llvm/MC/LaneBitmask.h"
57 #include "llvm/MC/MCDwarf.h"
58 #include "llvm/MC/MCInstrDesc.h"
59 #include "llvm/MC/MCRegisterInfo.h"
62 #include "llvm/Support/Casting.h"
66 #include "llvm/Support/SMLoc.h"
67 #include "llvm/Support/SourceMgr.h"
71 #include <algorithm>
72 #include <cassert>
73 #include <cctype>
74 #include <cstddef>
75 #include <cstdint>
76 #include <limits>
77 #include <string>
78 #include <utility>
79 
80 using namespace llvm;
81 
83  SourceMgr &SM, const SlotMapping &IRSlots,
84  const Name2RegClassMap &Names2RegClasses,
85  const Name2RegBankMap &Names2RegBanks)
86  : MF(MF), SM(&SM), IRSlots(IRSlots), Names2RegClasses(Names2RegClasses),
87  Names2RegBanks(Names2RegBanks) {
88 }
89 
91  auto I = VRegInfos.insert(std::make_pair(Num, nullptr));
92  if (I.second) {
94  VRegInfo *Info = new (Allocator) VRegInfo;
96  I.first->second = Info;
97  }
98  return *I.first->second;
99 }
100 
101 namespace {
102 
103 /// A wrapper struct around the 'MachineOperand' struct that includes a source
104 /// range and other attributes.
105 struct ParsedMachineOperand {
106  MachineOperand Operand;
107  StringRef::iterator Begin;
109  Optional<unsigned> TiedDefIdx;
110 
111  ParsedMachineOperand(const MachineOperand &Operand, StringRef::iterator Begin,
112  StringRef::iterator End, Optional<unsigned> &TiedDefIdx)
113  : Operand(Operand), Begin(Begin), End(End), TiedDefIdx(TiedDefIdx) {
114  if (TiedDefIdx)
115  assert(Operand.isReg() && Operand.isUse() &&
116  "Only used register operands can be tied");
117  }
118 };
119 
120 class MIParser {
123  StringRef Source, CurrentSource;
124  MIToken Token;
126  /// Maps from instruction names to op codes.
127  StringMap<unsigned> Names2InstrOpCodes;
128  /// Maps from register names to registers.
129  StringMap<unsigned> Names2Regs;
130  /// Maps from register mask names to register masks.
131  StringMap<const uint32_t *> Names2RegMasks;
132  /// Maps from subregister names to subregister indices.
133  StringMap<unsigned> Names2SubRegIndices;
134  /// Maps from slot numbers to function's unnamed basic blocks.
135  DenseMap<unsigned, const BasicBlock *> Slots2BasicBlocks;
136  /// Maps from slot numbers to function's unnamed values.
138  /// Maps from target index names to target indices.
139  StringMap<int> Names2TargetIndices;
140  /// Maps from direct target flag names to the direct target flag values.
141  StringMap<unsigned> Names2DirectTargetFlags;
142  /// Maps from direct target flag names to the bitmask target flag values.
143  StringMap<unsigned> Names2BitmaskTargetFlags;
144  /// Maps from MMO target flag names to MMO target flag values.
145  StringMap<MachineMemOperand::Flags> Names2MMOTargetFlags;
146 
147 public:
148  MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
149  StringRef Source);
150 
151  /// \p SkipChar gives the number of characters to skip before looking
152  /// for the next token.
153  void lex(unsigned SkipChar = 0);
154 
155  /// Report an error at the current location with the given message.
156  ///
157  /// This function always return true.
158  bool error(const Twine &Msg);
159 
160  /// Report an error at the given location with the given message.
161  ///
162  /// This function always return true.
163  bool error(StringRef::iterator Loc, const Twine &Msg);
164 
165  bool
166  parseBasicBlockDefinitions(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
167  bool parseBasicBlocks();
168  bool parse(MachineInstr *&MI);
169  bool parseStandaloneMBB(MachineBasicBlock *&MBB);
170  bool parseStandaloneNamedRegister(unsigned &Reg);
171  bool parseStandaloneVirtualRegister(VRegInfo *&Info);
172  bool parseStandaloneRegister(unsigned &Reg);
173  bool parseStandaloneStackObject(int &FI);
174  bool parseStandaloneMDNode(MDNode *&Node);
175 
176  bool
177  parseBasicBlockDefinition(DenseMap<unsigned, MachineBasicBlock *> &MBBSlots);
178  bool parseBasicBlock(MachineBasicBlock &MBB,
179  MachineBasicBlock *&AddFalthroughFrom);
180  bool parseBasicBlockLiveins(MachineBasicBlock &MBB);
181  bool parseBasicBlockSuccessors(MachineBasicBlock &MBB);
182 
183  bool parseNamedRegister(unsigned &Reg);
184  bool parseVirtualRegister(VRegInfo *&Info);
185  bool parseRegister(unsigned &Reg, VRegInfo *&VRegInfo);
186  bool parseRegisterFlag(unsigned &Flags);
187  bool parseRegisterClassOrBank(VRegInfo &RegInfo);
188  bool parseSubRegisterIndex(unsigned &SubReg);
189  bool parseRegisterTiedDefIndex(unsigned &TiedDefIdx);
190  bool parseRegisterOperand(MachineOperand &Dest,
191  Optional<unsigned> &TiedDefIdx, bool IsDef = false);
192  bool parseImmediateOperand(MachineOperand &Dest);
193  bool parseIRConstant(StringRef::iterator Loc, StringRef Source,
194  const Constant *&C);
195  bool parseIRConstant(StringRef::iterator Loc, const Constant *&C);
196  bool parseLowLevelType(StringRef::iterator Loc, LLT &Ty);
197  bool parseTypedImmediateOperand(MachineOperand &Dest);
198  bool parseFPImmediateOperand(MachineOperand &Dest);
200  bool parseMBBOperand(MachineOperand &Dest);
201  bool parseStackFrameIndex(int &FI);
202  bool parseStackObjectOperand(MachineOperand &Dest);
203  bool parseFixedStackFrameIndex(int &FI);
204  bool parseFixedStackObjectOperand(MachineOperand &Dest);
205  bool parseGlobalValue(GlobalValue *&GV);
206  bool parseGlobalAddressOperand(MachineOperand &Dest);
207  bool parseConstantPoolIndexOperand(MachineOperand &Dest);
208  bool parseSubRegisterIndexOperand(MachineOperand &Dest);
209  bool parseJumpTableIndexOperand(MachineOperand &Dest);
210  bool parseExternalSymbolOperand(MachineOperand &Dest);
211  bool parseMDNode(MDNode *&Node);
212  bool parseDIExpression(MDNode *&Node);
213  bool parseMetadataOperand(MachineOperand &Dest);
214  bool parseCFIOffset(int &Offset);
215  bool parseCFIRegister(unsigned &Reg);
216  bool parseCFIEscapeValues(std::string& Values);
217  bool parseCFIOperand(MachineOperand &Dest);
218  bool parseIRBlock(BasicBlock *&BB, const Function &F);
219  bool parseBlockAddressOperand(MachineOperand &Dest);
220  bool parseIntrinsicOperand(MachineOperand &Dest);
221  bool parsePredicateOperand(MachineOperand &Dest);
222  bool parseTargetIndexOperand(MachineOperand &Dest);
223  bool parseCustomRegisterMaskOperand(MachineOperand &Dest);
224  bool parseLiveoutRegisterMaskOperand(MachineOperand &Dest);
225  bool parseMachineOperand(MachineOperand &Dest,
226  Optional<unsigned> &TiedDefIdx);
227  bool parseMachineOperandAndTargetFlags(MachineOperand &Dest,
228  Optional<unsigned> &TiedDefIdx);
229  bool parseOffset(int64_t &Offset);
230  bool parseAlignment(unsigned &Alignment);
231  bool parseAddrspace(unsigned &Addrspace);
232  bool parseOperandsOffset(MachineOperand &Op);
233  bool parseIRValue(const Value *&V);
234  bool parseMemoryOperandFlag(MachineMemOperand::Flags &Flags);
235  bool parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV);
236  bool parseMachinePointerInfo(MachinePointerInfo &Dest);
237  bool parseOptionalScope(LLVMContext &Context, SyncScope::ID &SSID);
238  bool parseOptionalAtomicOrdering(AtomicOrdering &Order);
239  bool parseMachineMemoryOperand(MachineMemOperand *&Dest);
240 
241 private:
242  /// Convert the integer literal in the current token into an unsigned integer.
243  ///
244  /// Return true if an error occurred.
245  bool getUnsigned(unsigned &Result);
246 
247  /// Convert the integer literal in the current token into an uint64.
248  ///
249  /// Return true if an error occurred.
250  bool getUint64(uint64_t &Result);
251 
252  /// Convert the hexadecimal literal in the current token into an unsigned
253  /// APInt with a minimum bitwidth required to represent the value.
254  ///
255  /// Return true if the literal does not represent an integer value.
256  bool getHexUint(APInt &Result);
257 
258  /// If the current token is of the given kind, consume it and return false.
259  /// Otherwise report an error and return true.
260  bool expectAndConsume(MIToken::TokenKind TokenKind);
261 
262  /// If the current token is of the given kind, consume it and return true.
263  /// Otherwise return false.
264  bool consumeIfPresent(MIToken::TokenKind TokenKind);
265 
266  void initNames2InstrOpCodes();
267 
268  /// Try to convert an instruction name to an opcode. Return true if the
269  /// instruction name is invalid.
270  bool parseInstrName(StringRef InstrName, unsigned &OpCode);
271 
272  bool parseInstruction(unsigned &OpCode, unsigned &Flags);
273 
274  bool assignRegisterTies(MachineInstr &MI,
276 
277  bool verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
278  const MCInstrDesc &MCID);
279 
280  void initNames2Regs();
281 
282  /// Try to convert a register name to a register number. Return true if the
283  /// register name is invalid.
284  bool getRegisterByName(StringRef RegName, unsigned &Reg);
285 
286  void initNames2RegMasks();
287 
288  /// Check if the given identifier is a name of a register mask.
289  ///
290  /// Return null if the identifier isn't a register mask.
291  const uint32_t *getRegMask(StringRef Identifier);
292 
293  void initNames2SubRegIndices();
294 
295  /// Check if the given identifier is a name of a subregister index.
296  ///
297  /// Return 0 if the name isn't a subregister index class.
298  unsigned getSubRegIndex(StringRef Name);
299 
300  const BasicBlock *getIRBlock(unsigned Slot);
301  const BasicBlock *getIRBlock(unsigned Slot, const Function &F);
302 
303  const Value *getIRValue(unsigned Slot);
304 
305  void initNames2TargetIndices();
306 
307  /// Try to convert a name of target index to the corresponding target index.
308  ///
309  /// Return true if the name isn't a name of a target index.
310  bool getTargetIndex(StringRef Name, int &Index);
311 
312  void initNames2DirectTargetFlags();
313 
314  /// Try to convert a name of a direct target flag to the corresponding
315  /// target flag.
316  ///
317  /// Return true if the name isn't a name of a direct flag.
318  bool getDirectTargetFlag(StringRef Name, unsigned &Flag);
319 
320  void initNames2BitmaskTargetFlags();
321 
322  /// Try to convert a name of a bitmask target flag to the corresponding
323  /// target flag.
324  ///
325  /// Return true if the name isn't a name of a bitmask target flag.
326  bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag);
327 
328  void initNames2MMOTargetFlags();
329 
330  /// Try to convert a name of a MachineMemOperand target flag to the
331  /// corresponding target flag.
332  ///
333  /// Return true if the name isn't a name of a target MMO flag.
334  bool getMMOTargetFlag(StringRef Name, MachineMemOperand::Flags &Flag);
335 
336  /// parseStringConstant
337  /// ::= StringConstant
338  bool parseStringConstant(std::string &Result);
339 };
340 
341 } // end anonymous namespace
342 
343 MIParser::MIParser(PerFunctionMIParsingState &PFS, SMDiagnostic &Error,
345  : MF(PFS.MF), Error(Error), Source(Source), CurrentSource(Source), PFS(PFS)
346 {}
347 
348 void MIParser::lex(unsigned SkipChar) {
349  CurrentSource = lexMIToken(
350  CurrentSource.data() + SkipChar, Token,
351  [this](StringRef::iterator Loc, const Twine &Msg) { error(Loc, Msg); });
352 }
353 
354 bool MIParser::error(const Twine &Msg) { return error(Token.location(), Msg); }
355 
356 bool MIParser::error(StringRef::iterator Loc, const Twine &Msg) {
357  const SourceMgr &SM = *PFS.SM;
358  assert(Loc >= Source.data() && Loc <= (Source.data() + Source.size()));
359  const MemoryBuffer &Buffer = *SM.getMemoryBuffer(SM.getMainFileID());
360  if (Loc >= Buffer.getBufferStart() && Loc <= Buffer.getBufferEnd()) {
361  // Create an ordinary diagnostic when the source manager's buffer is the
362  // source string.
364  return true;
365  }
366  // Create a diagnostic for a YAML string literal.
367  Error = SMDiagnostic(SM, SMLoc(), Buffer.getBufferIdentifier(), 1,
368  Loc - Source.data(), SourceMgr::DK_Error, Msg.str(),
369  Source, None, None);
370  return true;
371 }
372 
373 static const char *toString(MIToken::TokenKind TokenKind) {
374  switch (TokenKind) {
375  case MIToken::comma:
376  return "','";
377  case MIToken::equal:
378  return "'='";
379  case MIToken::colon:
380  return "':'";
381  case MIToken::lparen:
382  return "'('";
383  case MIToken::rparen:
384  return "')'";
385  default:
386  return "<unknown token>";
387  }
388 }
389 
390 bool MIParser::expectAndConsume(MIToken::TokenKind TokenKind) {
391  if (Token.isNot(TokenKind))
392  return error(Twine("expected ") + toString(TokenKind));
393  lex();
394  return false;
395 }
396 
397 bool MIParser::consumeIfPresent(MIToken::TokenKind TokenKind) {
398  if (Token.isNot(TokenKind))
399  return false;
400  lex();
401  return true;
402 }
403 
404 bool MIParser::parseBasicBlockDefinition(
407  unsigned ID = 0;
408  if (getUnsigned(ID))
409  return true;
410  auto Loc = Token.location();
411  auto Name = Token.stringValue();
412  lex();
413  bool HasAddressTaken = false;
414  bool IsLandingPad = false;
415  unsigned Alignment = 0;
416  BasicBlock *BB = nullptr;
417  if (consumeIfPresent(MIToken::lparen)) {
418  do {
419  // TODO: Report an error when multiple same attributes are specified.
420  switch (Token.kind()) {
422  HasAddressTaken = true;
423  lex();
424  break;
426  IsLandingPad = true;
427  lex();
428  break;
429  case MIToken::kw_align:
430  if (parseAlignment(Alignment))
431  return true;
432  break;
433  case MIToken::IRBlock:
434  // TODO: Report an error when both name and ir block are specified.
435  if (parseIRBlock(BB, MF.getFunction()))
436  return true;
437  lex();
438  break;
439  default:
440  break;
441  }
442  } while (consumeIfPresent(MIToken::comma));
443  if (expectAndConsume(MIToken::rparen))
444  return true;
445  }
446  if (expectAndConsume(MIToken::colon))
447  return true;
448 
449  if (!Name.empty()) {
450  BB = dyn_cast_or_null<BasicBlock>(
452  if (!BB)
453  return error(Loc, Twine("basic block '") + Name +
454  "' is not defined in the function '" +
455  MF.getName() + "'");
456  }
457  auto *MBB = MF.CreateMachineBasicBlock(BB);
458  MF.insert(MF.end(), MBB);
459  bool WasInserted = MBBSlots.insert(std::make_pair(ID, MBB)).second;
460  if (!WasInserted)
461  return error(Loc, Twine("redefinition of machine basic block with id #") +
462  Twine(ID));
463  if (Alignment)
464  MBB->setAlignment(Alignment);
465  if (HasAddressTaken)
466  MBB->setHasAddressTaken();
467  MBB->setIsEHPad(IsLandingPad);
468  return false;
469 }
470 
471 bool MIParser::parseBasicBlockDefinitions(
473  lex();
474  // Skip until the first machine basic block.
475  while (Token.is(MIToken::Newline))
476  lex();
477  if (Token.isErrorOrEOF())
478  return Token.isError();
479  if (Token.isNot(MIToken::MachineBasicBlockLabel))
480  return error("expected a basic block definition before instructions");
481  unsigned BraceDepth = 0;
482  do {
483  if (parseBasicBlockDefinition(MBBSlots))
484  return true;
485  bool IsAfterNewline = false;
486  // Skip until the next machine basic block.
487  while (true) {
488  if ((Token.is(MIToken::MachineBasicBlockLabel) && IsAfterNewline) ||
489  Token.isErrorOrEOF())
490  break;
491  else if (Token.is(MIToken::MachineBasicBlockLabel))
492  return error("basic block definition should be located at the start of "
493  "the line");
494  else if (consumeIfPresent(MIToken::Newline)) {
495  IsAfterNewline = true;
496  continue;
497  }
498  IsAfterNewline = false;
499  if (Token.is(MIToken::lbrace))
500  ++BraceDepth;
501  if (Token.is(MIToken::rbrace)) {
502  if (!BraceDepth)
503  return error("extraneous closing brace ('}')");
504  --BraceDepth;
505  }
506  lex();
507  }
508  // Verify that we closed all of the '{' at the end of a file or a block.
509  if (!Token.isError() && BraceDepth)
510  return error("expected '}'"); // FIXME: Report a note that shows '{'.
511  } while (!Token.isErrorOrEOF());
512  return Token.isError();
513 }
514 
515 bool MIParser::parseBasicBlockLiveins(MachineBasicBlock &MBB) {
516  assert(Token.is(MIToken::kw_liveins));
517  lex();
518  if (expectAndConsume(MIToken::colon))
519  return true;
520  if (Token.isNewlineOrEOF()) // Allow an empty list of liveins.
521  return false;
522  do {
523  if (Token.isNot(MIToken::NamedRegister))
524  return error("expected a named register");
525  unsigned Reg = 0;
526  if (parseNamedRegister(Reg))
527  return true;
528  lex();
530  if (consumeIfPresent(MIToken::colon)) {
531  // Parse lane mask.
532  if (Token.isNot(MIToken::IntegerLiteral) &&
533  Token.isNot(MIToken::HexLiteral))
534  return error("expected a lane mask");
535  static_assert(sizeof(LaneBitmask::Type) == sizeof(unsigned),
536  "Use correct get-function for lane mask");
538  if (getUnsigned(V))
539  return error("invalid lane mask value");
540  Mask = LaneBitmask(V);
541  lex();
542  }
543  MBB.addLiveIn(Reg, Mask);
544  } while (consumeIfPresent(MIToken::comma));
545  return false;
546 }
547 
548 bool MIParser::parseBasicBlockSuccessors(MachineBasicBlock &MBB) {
549  assert(Token.is(MIToken::kw_successors));
550  lex();
551  if (expectAndConsume(MIToken::colon))
552  return true;
553  if (Token.isNewlineOrEOF()) // Allow an empty list of successors.
554  return false;
555  do {
556  if (Token.isNot(MIToken::MachineBasicBlock))
557  return error("expected a machine basic block reference");
558  MachineBasicBlock *SuccMBB = nullptr;
559  if (parseMBBReference(SuccMBB))
560  return true;
561  lex();
562  unsigned Weight = 0;
563  if (consumeIfPresent(MIToken::lparen)) {
564  if (Token.isNot(MIToken::IntegerLiteral) &&
565  Token.isNot(MIToken::HexLiteral))
566  return error("expected an integer literal after '('");
567  if (getUnsigned(Weight))
568  return true;
569  lex();
570  if (expectAndConsume(MIToken::rparen))
571  return true;
572  }
573  MBB.addSuccessor(SuccMBB, BranchProbability::getRaw(Weight));
574  } while (consumeIfPresent(MIToken::comma));
575  MBB.normalizeSuccProbs();
576  return false;
577 }
578 
579 bool MIParser::parseBasicBlock(MachineBasicBlock &MBB,
580  MachineBasicBlock *&AddFalthroughFrom) {
581  // Skip the definition.
583  lex();
584  if (consumeIfPresent(MIToken::lparen)) {
585  while (Token.isNot(MIToken::rparen) && !Token.isErrorOrEOF())
586  lex();
587  consumeIfPresent(MIToken::rparen);
588  }
589  consumeIfPresent(MIToken::colon);
590 
591  // Parse the liveins and successors.
592  // N.B: Multiple lists of successors and liveins are allowed and they're
593  // merged into one.
594  // Example:
595  // liveins: %edi
596  // liveins: %esi
597  //
598  // is equivalent to
599  // liveins: %edi, %esi
600  bool ExplicitSuccessors = false;
601  while (true) {
602  if (Token.is(MIToken::kw_successors)) {
603  if (parseBasicBlockSuccessors(MBB))
604  return true;
605  ExplicitSuccessors = true;
606  } else if (Token.is(MIToken::kw_liveins)) {
607  if (parseBasicBlockLiveins(MBB))
608  return true;
609  } else if (consumeIfPresent(MIToken::Newline)) {
610  continue;
611  } else
612  break;
613  if (!Token.isNewlineOrEOF())
614  return error("expected line break at the end of a list");
615  lex();
616  }
617 
618  // Parse the instructions.
619  bool IsInBundle = false;
620  MachineInstr *PrevMI = nullptr;
621  while (!Token.is(MIToken::MachineBasicBlockLabel) &&
622  !Token.is(MIToken::Eof)) {
623  if (consumeIfPresent(MIToken::Newline))
624  continue;
625  if (consumeIfPresent(MIToken::rbrace)) {
626  // The first parsing pass should verify that all closing '}' have an
627  // opening '{'.
628  assert(IsInBundle);
629  IsInBundle = false;
630  continue;
631  }
632  MachineInstr *MI = nullptr;
633  if (parse(MI))
634  return true;
635  MBB.insert(MBB.end(), MI);
636  if (IsInBundle) {
639  }
640  PrevMI = MI;
641  if (Token.is(MIToken::lbrace)) {
642  if (IsInBundle)
643  return error("nested instruction bundles are not allowed");
644  lex();
645  // This instruction is the start of the bundle.
647  IsInBundle = true;
648  if (!Token.is(MIToken::Newline))
649  // The next instruction can be on the same line.
650  continue;
651  }
652  assert(Token.isNewlineOrEOF() && "MI is not fully parsed");
653  lex();
654  }
655 
656  // Construct successor list by searching for basic block machine operands.
657  if (!ExplicitSuccessors) {
659  bool IsFallthrough;
660  guessSuccessors(MBB, Successors, IsFallthrough);
661  for (MachineBasicBlock *Succ : Successors)
662  MBB.addSuccessor(Succ);
663 
664  if (IsFallthrough) {
665  AddFalthroughFrom = &MBB;
666  } else {
667  MBB.normalizeSuccProbs();
668  }
669  }
670 
671  return false;
672 }
673 
674 bool MIParser::parseBasicBlocks() {
675  lex();
676  // Skip until the first machine basic block.
677  while (Token.is(MIToken::Newline))
678  lex();
679  if (Token.isErrorOrEOF())
680  return Token.isError();
681  // The first parsing pass should have verified that this token is a MBB label
682  // in the 'parseBasicBlockDefinitions' method.
684  MachineBasicBlock *AddFalthroughFrom = nullptr;
685  do {
686  MachineBasicBlock *MBB = nullptr;
687  if (parseMBBReference(MBB))
688  return true;
689  if (AddFalthroughFrom) {
690  if (!AddFalthroughFrom->isSuccessor(MBB))
691  AddFalthroughFrom->addSuccessor(MBB);
692  AddFalthroughFrom->normalizeSuccProbs();
693  AddFalthroughFrom = nullptr;
694  }
695  if (parseBasicBlock(*MBB, AddFalthroughFrom))
696  return true;
697  // The method 'parseBasicBlock' should parse the whole block until the next
698  // block or the end of file.
699  assert(Token.is(MIToken::MachineBasicBlockLabel) || Token.is(MIToken::Eof));
700  } while (Token.isNot(MIToken::Eof));
701  return false;
702 }
703 
704 bool MIParser::parse(MachineInstr *&MI) {
705  // Parse any register operands before '='
708  while (Token.isRegister() || Token.isRegisterFlag()) {
709  auto Loc = Token.location();
710  Optional<unsigned> TiedDefIdx;
711  if (parseRegisterOperand(MO, TiedDefIdx, /*IsDef=*/true))
712  return true;
713  Operands.push_back(
714  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
715  if (Token.isNot(MIToken::comma))
716  break;
717  lex();
718  }
719  if (!Operands.empty() && expectAndConsume(MIToken::equal))
720  return true;
721 
722  unsigned OpCode, Flags = 0;
723  if (Token.isError() || parseInstruction(OpCode, Flags))
724  return true;
725 
726  // Parse the remaining machine operands.
727  while (!Token.isNewlineOrEOF() && Token.isNot(MIToken::kw_debug_location) &&
728  Token.isNot(MIToken::coloncolon) && Token.isNot(MIToken::lbrace)) {
729  auto Loc = Token.location();
730  Optional<unsigned> TiedDefIdx;
731  if (parseMachineOperandAndTargetFlags(MO, TiedDefIdx))
732  return true;
733  Operands.push_back(
734  ParsedMachineOperand(MO, Loc, Token.location(), TiedDefIdx));
735  if (Token.isNewlineOrEOF() || Token.is(MIToken::coloncolon) ||
736  Token.is(MIToken::lbrace))
737  break;
738  if (Token.isNot(MIToken::comma))
739  return error("expected ',' before the next machine operand");
740  lex();
741  }
742 
743  DebugLoc DebugLocation;
744  if (Token.is(MIToken::kw_debug_location)) {
745  lex();
746  if (Token.isNot(MIToken::exclaim))
747  return error("expected a metadata node after 'debug-location'");
748  MDNode *Node = nullptr;
749  if (parseMDNode(Node))
750  return true;
751  DebugLocation = DebugLoc(Node);
752  }
753 
754  // Parse the machine memory operands.
756  if (Token.is(MIToken::coloncolon)) {
757  lex();
758  while (!Token.isNewlineOrEOF()) {
759  MachineMemOperand *MemOp = nullptr;
760  if (parseMachineMemoryOperand(MemOp))
761  return true;
762  MemOperands.push_back(MemOp);
763  if (Token.isNewlineOrEOF())
764  break;
765  if (Token.isNot(MIToken::comma))
766  return error("expected ',' before the next machine memory operand");
767  lex();
768  }
769  }
770 
771  const auto &MCID = MF.getSubtarget().getInstrInfo()->get(OpCode);
772  if (!MCID.isVariadic()) {
773  // FIXME: Move the implicit operand verification to the machine verifier.
774  if (verifyImplicitOperands(Operands, MCID))
775  return true;
776  }
777 
778  // TODO: Check for extraneous machine operands.
779  MI = MF.CreateMachineInstr(MCID, DebugLocation, /*NoImplicit=*/true);
780  MI->setFlags(Flags);
781  for (const auto &Operand : Operands)
782  MI->addOperand(MF, Operand.Operand);
783  if (assignRegisterTies(*MI, Operands))
784  return true;
785  if (MemOperands.empty())
786  return false;
788  MF.allocateMemRefsArray(MemOperands.size());
789  std::copy(MemOperands.begin(), MemOperands.end(), MemRefs);
790  MI->setMemRefs(MemRefs, MemRefs + MemOperands.size());
791  return false;
792 }
793 
794 bool MIParser::parseStandaloneMBB(MachineBasicBlock *&MBB) {
795  lex();
796  if (Token.isNot(MIToken::MachineBasicBlock))
797  return error("expected a machine basic block reference");
798  if (parseMBBReference(MBB))
799  return true;
800  lex();
801  if (Token.isNot(MIToken::Eof))
802  return error(
803  "expected end of string after the machine basic block reference");
804  return false;
805 }
806 
807 bool MIParser::parseStandaloneNamedRegister(unsigned &Reg) {
808  lex();
809  if (Token.isNot(MIToken::NamedRegister))
810  return error("expected a named register");
811  if (parseNamedRegister(Reg))
812  return true;
813  lex();
814  if (Token.isNot(MIToken::Eof))
815  return error("expected end of string after the register reference");
816  return false;
817 }
818 
819 bool MIParser::parseStandaloneVirtualRegister(VRegInfo *&Info) {
820  lex();
821  if (Token.isNot(MIToken::VirtualRegister))
822  return error("expected a virtual register");
823  if (parseVirtualRegister(Info))
824  return true;
825  lex();
826  if (Token.isNot(MIToken::Eof))
827  return error("expected end of string after the register reference");
828  return false;
829 }
830 
831 bool MIParser::parseStandaloneRegister(unsigned &Reg) {
832  lex();
833  if (Token.isNot(MIToken::NamedRegister) &&
834  Token.isNot(MIToken::VirtualRegister))
835  return error("expected either a named or virtual register");
836 
837  VRegInfo *Info;
838  if (parseRegister(Reg, Info))
839  return true;
840 
841  lex();
842  if (Token.isNot(MIToken::Eof))
843  return error("expected end of string after the register reference");
844  return false;
845 }
846 
847 bool MIParser::parseStandaloneStackObject(int &FI) {
848  lex();
849  if (Token.isNot(MIToken::StackObject))
850  return error("expected a stack object");
851  if (parseStackFrameIndex(FI))
852  return true;
853  if (Token.isNot(MIToken::Eof))
854  return error("expected end of string after the stack object reference");
855  return false;
856 }
857 
858 bool MIParser::parseStandaloneMDNode(MDNode *&Node) {
859  lex();
860  if (Token.is(MIToken::exclaim)) {
861  if (parseMDNode(Node))
862  return true;
863  } else if (Token.is(MIToken::md_diexpr)) {
864  if (parseDIExpression(Node))
865  return true;
866  } else
867  return error("expected a metadata node");
868  if (Token.isNot(MIToken::Eof))
869  return error("expected end of string after the metadata node");
870  return false;
871 }
872 
873 static const char *printImplicitRegisterFlag(const MachineOperand &MO) {
874  assert(MO.isImplicit());
875  return MO.isDef() ? "implicit-def" : "implicit";
876 }
877 
878 static std::string getRegisterName(const TargetRegisterInfo *TRI,
879  unsigned Reg) {
880  assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "expected phys reg");
881  return StringRef(TRI->getName(Reg)).lower();
882 }
883 
884 /// Return true if the parsed machine operands contain a given machine operand.
885 static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand,
887  for (const auto &I : Operands) {
888  if (ImplicitOperand.isIdenticalTo(I.Operand))
889  return true;
890  }
891  return false;
892 }
893 
894 bool MIParser::verifyImplicitOperands(ArrayRef<ParsedMachineOperand> Operands,
895  const MCInstrDesc &MCID) {
896  if (MCID.isCall())
897  // We can't verify call instructions as they can contain arbitrary implicit
898  // register and register mask operands.
899  return false;
900 
901  // Gather all the expected implicit operands.
902  SmallVector<MachineOperand, 4> ImplicitOperands;
903  if (MCID.ImplicitDefs)
904  for (const MCPhysReg *ImpDefs = MCID.getImplicitDefs(); *ImpDefs; ++ImpDefs)
905  ImplicitOperands.push_back(
906  MachineOperand::CreateReg(*ImpDefs, true, true));
907  if (MCID.ImplicitUses)
908  for (const MCPhysReg *ImpUses = MCID.getImplicitUses(); *ImpUses; ++ImpUses)
909  ImplicitOperands.push_back(
910  MachineOperand::CreateReg(*ImpUses, false, true));
911 
912  const auto *TRI = MF.getSubtarget().getRegisterInfo();
913  assert(TRI && "Expected target register info");
914  for (const auto &I : ImplicitOperands) {
915  if (isImplicitOperandIn(I, Operands))
916  continue;
917  return error(Operands.empty() ? Token.location() : Operands.back().End,
918  Twine("missing implicit register operand '") +
919  printImplicitRegisterFlag(I) + " %" +
920  getRegisterName(TRI, I.getReg()) + "'");
921  }
922  return false;
923 }
924 
925 bool MIParser::parseInstruction(unsigned &OpCode, unsigned &Flags) {
926  if (Token.is(MIToken::kw_frame_setup)) {
927  Flags |= MachineInstr::FrameSetup;
928  lex();
929  } else if (Token.is(MIToken::kw_frame_destroy)) {
931  lex();
932  }
933  if (Token.isNot(MIToken::Identifier))
934  return error("expected a machine instruction");
935  StringRef InstrName = Token.stringValue();
936  if (parseInstrName(InstrName, OpCode))
937  return error(Twine("unknown machine instruction name '") + InstrName + "'");
938  lex();
939  return false;
940 }
941 
942 bool MIParser::parseNamedRegister(unsigned &Reg) {
943  assert(Token.is(MIToken::NamedRegister) && "Needs NamedRegister token");
944  StringRef Name = Token.stringValue();
945  if (getRegisterByName(Name, Reg))
946  return error(Twine("unknown register name '") + Name + "'");
947  return false;
948 }
949 
950 bool MIParser::parseVirtualRegister(VRegInfo *&Info) {
951  assert(Token.is(MIToken::VirtualRegister) && "Needs VirtualRegister token");
952  unsigned ID;
953  if (getUnsigned(ID))
954  return true;
955  Info = &PFS.getVRegInfo(ID);
956  return false;
957 }
958 
959 bool MIParser::parseRegister(unsigned &Reg, VRegInfo *&Info) {
960  switch (Token.kind()) {
961  case MIToken::underscore:
962  Reg = 0;
963  return false;
965  return parseNamedRegister(Reg);
967  if (parseVirtualRegister(Info))
968  return true;
969  Reg = Info->VReg;
970  return false;
971  // TODO: Parse other register kinds.
972  default:
973  llvm_unreachable("The current token should be a register");
974  }
975 }
976 
977 bool MIParser::parseRegisterClassOrBank(VRegInfo &RegInfo) {
978  if (Token.isNot(MIToken::Identifier) && Token.isNot(MIToken::underscore))
979  return error("expected '_', register class, or register bank name");
980  StringRef::iterator Loc = Token.location();
981  StringRef Name = Token.stringValue();
982 
983  // Was it a register class?
984  auto RCNameI = PFS.Names2RegClasses.find(Name);
985  if (RCNameI != PFS.Names2RegClasses.end()) {
986  lex();
987  const TargetRegisterClass &RC = *RCNameI->getValue();
988 
989  switch (RegInfo.Kind) {
990  case VRegInfo::UNKNOWN:
991  case VRegInfo::NORMAL:
992  RegInfo.Kind = VRegInfo::NORMAL;
993  if (RegInfo.Explicit && RegInfo.D.RC != &RC) {
995  return error(Loc, Twine("conflicting register classes, previously: ") +
996  Twine(TRI.getRegClassName(RegInfo.D.RC)));
997  }
998  RegInfo.D.RC = &RC;
999  RegInfo.Explicit = true;
1000  return false;
1001 
1002  case VRegInfo::GENERIC:
1003  case VRegInfo::REGBANK:
1004  return error(Loc, "register class specification on generic register");
1005  }
1006  llvm_unreachable("Unexpected register kind");
1007  }
1008 
1009  // Should be a register bank or a generic register.
1010  const RegisterBank *RegBank = nullptr;
1011  if (Name != "_") {
1012  auto RBNameI = PFS.Names2RegBanks.find(Name);
1013  if (RBNameI == PFS.Names2RegBanks.end())
1014  return error(Loc, "expected '_', register class, or register bank name");
1015  RegBank = RBNameI->getValue();
1016  }
1017 
1018  lex();
1019 
1020  switch (RegInfo.Kind) {
1021  case VRegInfo::UNKNOWN:
1022  case VRegInfo::GENERIC:
1023  case VRegInfo::REGBANK:
1024  RegInfo.Kind = RegBank ? VRegInfo::REGBANK : VRegInfo::GENERIC;
1025  if (RegInfo.Explicit && RegInfo.D.RegBank != RegBank)
1026  return error(Loc, "conflicting generic register banks");
1027  RegInfo.D.RegBank = RegBank;
1028  RegInfo.Explicit = true;
1029  return false;
1030 
1031  case VRegInfo::NORMAL:
1032  return error(Loc, "register bank specification on normal register");
1033  }
1034  llvm_unreachable("Unexpected register kind");
1035 }
1036 
1037 bool MIParser::parseRegisterFlag(unsigned &Flags) {
1038  const unsigned OldFlags = Flags;
1039  switch (Token.kind()) {
1040  case MIToken::kw_implicit:
1041  Flags |= RegState::Implicit;
1042  break;
1044  Flags |= RegState::ImplicitDefine;
1045  break;
1046  case MIToken::kw_def:
1047  Flags |= RegState::Define;
1048  break;
1049  case MIToken::kw_dead:
1050  Flags |= RegState::Dead;
1051  break;
1052  case MIToken::kw_killed:
1053  Flags |= RegState::Kill;
1054  break;
1055  case MIToken::kw_undef:
1056  Flags |= RegState::Undef;
1057  break;
1058  case MIToken::kw_internal:
1059  Flags |= RegState::InternalRead;
1060  break;
1062  Flags |= RegState::EarlyClobber;
1063  break;
1064  case MIToken::kw_debug_use:
1065  Flags |= RegState::Debug;
1066  break;
1067  case MIToken::kw_renamable:
1068  Flags |= RegState::Renamable;
1069  break;
1070  default:
1071  llvm_unreachable("The current token should be a register flag");
1072  }
1073  if (OldFlags == Flags)
1074  // We know that the same flag is specified more than once when the flags
1075  // weren't modified.
1076  return error("duplicate '" + Token.stringValue() + "' register flag");
1077  lex();
1078  return false;
1079 }
1080 
1081 bool MIParser::parseSubRegisterIndex(unsigned &SubReg) {
1082  assert(Token.is(MIToken::dot));
1083  lex();
1084  if (Token.isNot(MIToken::Identifier))
1085  return error("expected a subregister index after '.'");
1086  auto Name = Token.stringValue();
1087  SubReg = getSubRegIndex(Name);
1088  if (!SubReg)
1089  return error(Twine("use of unknown subregister index '") + Name + "'");
1090  lex();
1091  return false;
1092 }
1093 
1094 bool MIParser::parseRegisterTiedDefIndex(unsigned &TiedDefIdx) {
1095  if (!consumeIfPresent(MIToken::kw_tied_def))
1096  return true;
1097  if (Token.isNot(MIToken::IntegerLiteral))
1098  return error("expected an integer literal after 'tied-def'");
1099  if (getUnsigned(TiedDefIdx))
1100  return true;
1101  lex();
1102  if (expectAndConsume(MIToken::rparen))
1103  return true;
1104  return false;
1105 }
1106 
1107 bool MIParser::assignRegisterTies(MachineInstr &MI,
1108  ArrayRef<ParsedMachineOperand> Operands) {
1109  SmallVector<std::pair<unsigned, unsigned>, 4> TiedRegisterPairs;
1110  for (unsigned I = 0, E = Operands.size(); I != E; ++I) {
1111  if (!Operands[I].TiedDefIdx)
1112  continue;
1113  // The parser ensures that this operand is a register use, so we just have
1114  // to check the tied-def operand.
1115  unsigned DefIdx = Operands[I].TiedDefIdx.getValue();
1116  if (DefIdx >= E)
1117  return error(Operands[I].Begin,
1118  Twine("use of invalid tied-def operand index '" +
1119  Twine(DefIdx) + "'; instruction has only ") +
1120  Twine(E) + " operands");
1121  const auto &DefOperand = Operands[DefIdx].Operand;
1122  if (!DefOperand.isReg() || !DefOperand.isDef())
1123  // FIXME: add note with the def operand.
1124  return error(Operands[I].Begin,
1125  Twine("use of invalid tied-def operand index '") +
1126  Twine(DefIdx) + "'; the operand #" + Twine(DefIdx) +
1127  " isn't a defined register");
1128  // Check that the tied-def operand wasn't tied elsewhere.
1129  for (const auto &TiedPair : TiedRegisterPairs) {
1130  if (TiedPair.first == DefIdx)
1131  return error(Operands[I].Begin,
1132  Twine("the tied-def operand #") + Twine(DefIdx) +
1133  " is already tied with another register operand");
1134  }
1135  TiedRegisterPairs.push_back(std::make_pair(DefIdx, I));
1136  }
1137  // FIXME: Verify that for non INLINEASM instructions, the def and use tied
1138  // indices must be less than tied max.
1139  for (const auto &TiedPair : TiedRegisterPairs)
1140  MI.tieOperands(TiedPair.first, TiedPair.second);
1141  return false;
1142 }
1143 
1144 bool MIParser::parseRegisterOperand(MachineOperand &Dest,
1145  Optional<unsigned> &TiedDefIdx,
1146  bool IsDef) {
1147  unsigned Flags = IsDef ? RegState::Define : 0;
1148  while (Token.isRegisterFlag()) {
1149  if (parseRegisterFlag(Flags))
1150  return true;
1151  }
1152  if (!Token.isRegister())
1153  return error("expected a register after register flags");
1154  unsigned Reg;
1155  VRegInfo *RegInfo;
1156  if (parseRegister(Reg, RegInfo))
1157  return true;
1158  lex();
1159  unsigned SubReg = 0;
1160  if (Token.is(MIToken::dot)) {
1161  if (parseSubRegisterIndex(SubReg))
1162  return true;
1164  return error("subregister index expects a virtual register");
1165  }
1166  if (Token.is(MIToken::colon)) {
1168  return error("register class specification expects a virtual register");
1169  lex();
1170  if (parseRegisterClassOrBank(*RegInfo))
1171  return true;
1172  }
1174  if ((Flags & RegState::Define) == 0) {
1175  if (consumeIfPresent(MIToken::lparen)) {
1176  unsigned Idx;
1177  if (!parseRegisterTiedDefIndex(Idx))
1178  TiedDefIdx = Idx;
1179  else {
1180  // Try a redundant low-level type.
1181  LLT Ty;
1182  if (parseLowLevelType(Token.location(), Ty))
1183  return error("expected tied-def or low-level type after '('");
1184 
1185  if (expectAndConsume(MIToken::rparen))
1186  return true;
1187 
1188  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1189  return error("inconsistent type for generic virtual register");
1190 
1191  MRI.setType(Reg, Ty);
1192  }
1193  }
1194  } else if (consumeIfPresent(MIToken::lparen)) {
1195  // Virtual registers may have a tpe with GlobalISel.
1197  return error("unexpected type on physical register");
1198 
1199  LLT Ty;
1200  if (parseLowLevelType(Token.location(), Ty))
1201  return true;
1202 
1203  if (expectAndConsume(MIToken::rparen))
1204  return true;
1205 
1206  if (MRI.getType(Reg).isValid() && MRI.getType(Reg) != Ty)
1207  return error("inconsistent type for generic virtual register");
1208 
1209  MRI.setType(Reg, Ty);
1210  } else if (TargetRegisterInfo::isVirtualRegister(Reg)) {
1211  // Generic virtual registers must have a type.
1212  // If we end up here this means the type hasn't been specified and
1213  // this is bad!
1214  if (RegInfo->Kind == VRegInfo::GENERIC ||
1215  RegInfo->Kind == VRegInfo::REGBANK)
1216  return error("generic virtual registers must have a type");
1217  }
1219  Reg, Flags & RegState::Define, Flags & RegState::Implicit,
1220  Flags & RegState::Kill, Flags & RegState::Dead, Flags & RegState::Undef,
1221  Flags & RegState::EarlyClobber, SubReg, Flags & RegState::Debug,
1222  Flags & RegState::InternalRead, Flags & RegState::Renamable);
1223 
1224  return false;
1225 }
1226 
1227 bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
1228  assert(Token.is(MIToken::IntegerLiteral));
1229  const APSInt &Int = Token.integerValue();
1230  if (Int.getMinSignedBits() > 64)
1231  return error("integer literal is too large to be an immediate operand");
1232  Dest = MachineOperand::CreateImm(Int.getExtValue());
1233  lex();
1234  return false;
1235 }
1236 
1237 bool MIParser::parseIRConstant(StringRef::iterator Loc, StringRef StringValue,
1238  const Constant *&C) {
1239  auto Source = StringValue.str(); // The source has to be null terminated.
1240  SMDiagnostic Err;
1241  C = parseConstantValue(Source, Err, *MF.getFunction().getParent(),
1242  &PFS.IRSlots);
1243  if (!C)
1244  return error(Loc + Err.getColumnNo(), Err.getMessage());
1245  return false;
1246 }
1247 
1248 bool MIParser::parseIRConstant(StringRef::iterator Loc, const Constant *&C) {
1249  if (parseIRConstant(Loc, StringRef(Loc, Token.range().end() - Loc), C))
1250  return true;
1251  lex();
1252  return false;
1253 }
1254 
1255 bool MIParser::parseLowLevelType(StringRef::iterator Loc, LLT &Ty) {
1256  if (Token.is(MIToken::ScalarType)) {
1257  Ty = LLT::scalar(APSInt(Token.range().drop_front()).getZExtValue());
1258  lex();
1259  return false;
1260  } else if (Token.is(MIToken::PointerType)) {
1261  const DataLayout &DL = MF.getDataLayout();
1262  unsigned AS = APSInt(Token.range().drop_front()).getZExtValue();
1263  Ty = LLT::pointer(AS, DL.getPointerSizeInBits(AS));
1264  lex();
1265  return false;
1266  }
1267 
1268  // Now we're looking for a vector.
1269  if (Token.isNot(MIToken::less))
1270  return error(Loc,
1271  "expected unsized, pN, sN or <N x sM> for GlobalISel type");
1272 
1273  lex();
1274 
1275  if (Token.isNot(MIToken::IntegerLiteral))
1276  return error(Loc, "expected <N x sM> for vctor type");
1277  uint64_t NumElements = Token.integerValue().getZExtValue();
1278  lex();
1279 
1280  if (Token.isNot(MIToken::Identifier) || Token.stringValue() != "x")
1281  return error(Loc, "expected '<N x sM>' for vector type");
1282  lex();
1283 
1284  if (Token.isNot(MIToken::ScalarType))
1285  return error(Loc, "expected '<N x sM>' for vector type");
1286  uint64_t ScalarSize = APSInt(Token.range().drop_front()).getZExtValue();
1287  lex();
1288 
1289  if (Token.isNot(MIToken::greater))
1290  return error(Loc, "expected '<N x sM>' for vector type");
1291  lex();
1292 
1293  Ty = LLT::vector(NumElements, ScalarSize);
1294  return false;
1295 }
1296 
1297 bool MIParser::parseTypedImmediateOperand(MachineOperand &Dest) {
1298  assert(Token.is(MIToken::IntegerType));
1299  auto Loc = Token.location();
1300  lex();
1301  if (Token.isNot(MIToken::IntegerLiteral))
1302  return error("expected an integer literal");
1303  const Constant *C = nullptr;
1304  if (parseIRConstant(Loc, C))
1305  return true;
1306  Dest = MachineOperand::CreateCImm(cast<ConstantInt>(C));
1307  return false;
1308 }
1309 
1310 bool MIParser::parseFPImmediateOperand(MachineOperand &Dest) {
1311  auto Loc = Token.location();
1312  lex();
1313  if (Token.isNot(MIToken::FloatingPointLiteral) &&
1314  Token.isNot(MIToken::HexLiteral))
1315  return error("expected a floating point literal");
1316  const Constant *C = nullptr;
1317  if (parseIRConstant(Loc, C))
1318  return true;
1319  Dest = MachineOperand::CreateFPImm(cast<ConstantFP>(C));
1320  return false;
1321 }
1322 
1323 bool MIParser::getUnsigned(unsigned &Result) {
1324  if (Token.hasIntegerValue()) {
1325  const uint64_t Limit = uint64_t(std::numeric_limits<unsigned>::max()) + 1;
1326  uint64_t Val64 = Token.integerValue().getLimitedValue(Limit);
1327  if (Val64 == Limit)
1328  return error("expected 32-bit integer (too large)");
1329  Result = Val64;
1330  return false;
1331  }
1332  if (Token.is(MIToken::HexLiteral)) {
1333  APInt A;
1334  if (getHexUint(A))
1335  return true;
1336  if (A.getBitWidth() > 32)
1337  return error("expected 32-bit integer (too large)");
1338  Result = A.getZExtValue();
1339  return false;
1340  }
1341  return true;
1342 }
1343 
1345  assert(Token.is(MIToken::MachineBasicBlock) ||
1347  unsigned Number;
1348  if (getUnsigned(Number))
1349  return true;
1350  auto MBBInfo = PFS.MBBSlots.find(Number);
1351  if (MBBInfo == PFS.MBBSlots.end())
1352  return error(Twine("use of undefined machine basic block #") +
1353  Twine(Number));
1354  MBB = MBBInfo->second;
1355  // TODO: Only parse the name if it's a MachineBasicBlockLabel. Deprecate once
1356  // we drop the <irname> from the bb.<id>.<irname> format.
1357  if (!Token.stringValue().empty() && Token.stringValue() != MBB->getName())
1358  return error(Twine("the name of machine basic block #") + Twine(Number) +
1359  " isn't '" + Token.stringValue() + "'");
1360  return false;
1361 }
1362 
1363 bool MIParser::parseMBBOperand(MachineOperand &Dest) {
1364  MachineBasicBlock *MBB;
1365  if (parseMBBReference(MBB))
1366  return true;
1367  Dest = MachineOperand::CreateMBB(MBB);
1368  lex();
1369  return false;
1370 }
1371 
1372 bool MIParser::parseStackFrameIndex(int &FI) {
1373  assert(Token.is(MIToken::StackObject));
1374  unsigned ID;
1375  if (getUnsigned(ID))
1376  return true;
1377  auto ObjectInfo = PFS.StackObjectSlots.find(ID);
1378  if (ObjectInfo == PFS.StackObjectSlots.end())
1379  return error(Twine("use of undefined stack object '%stack.") + Twine(ID) +
1380  "'");
1381  StringRef Name;
1382  if (const auto *Alloca =
1383  MF.getFrameInfo().getObjectAllocation(ObjectInfo->second))
1384  Name = Alloca->getName();
1385  if (!Token.stringValue().empty() && Token.stringValue() != Name)
1386  return error(Twine("the name of the stack object '%stack.") + Twine(ID) +
1387  "' isn't '" + Token.stringValue() + "'");
1388  lex();
1389  FI = ObjectInfo->second;
1390  return false;
1391 }
1392 
1393 bool MIParser::parseStackObjectOperand(MachineOperand &Dest) {
1394  int FI;
1395  if (parseStackFrameIndex(FI))
1396  return true;
1397  Dest = MachineOperand::CreateFI(FI);
1398  return false;
1399 }
1400 
1401 bool MIParser::parseFixedStackFrameIndex(int &FI) {
1402  assert(Token.is(MIToken::FixedStackObject));
1403  unsigned ID;
1404  if (getUnsigned(ID))
1405  return true;
1406  auto ObjectInfo = PFS.FixedStackObjectSlots.find(ID);
1407  if (ObjectInfo == PFS.FixedStackObjectSlots.end())
1408  return error(Twine("use of undefined fixed stack object '%fixed-stack.") +
1409  Twine(ID) + "'");
1410  lex();
1411  FI = ObjectInfo->second;
1412  return false;
1413 }
1414 
1415 bool MIParser::parseFixedStackObjectOperand(MachineOperand &Dest) {
1416  int FI;
1417  if (parseFixedStackFrameIndex(FI))
1418  return true;
1419  Dest = MachineOperand::CreateFI(FI);
1420  return false;
1421 }
1422 
1423 bool MIParser::parseGlobalValue(GlobalValue *&GV) {
1424  switch (Token.kind()) {
1426  const Module *M = MF.getFunction().getParent();
1427  GV = M->getNamedValue(Token.stringValue());
1428  if (!GV)
1429  return error(Twine("use of undefined global value '") + Token.range() +
1430  "'");
1431  break;
1432  }
1433  case MIToken::GlobalValue: {
1434  unsigned GVIdx;
1435  if (getUnsigned(GVIdx))
1436  return true;
1437  if (GVIdx >= PFS.IRSlots.GlobalValues.size())
1438  return error(Twine("use of undefined global value '@") + Twine(GVIdx) +
1439  "'");
1440  GV = PFS.IRSlots.GlobalValues[GVIdx];
1441  break;
1442  }
1443  default:
1444  llvm_unreachable("The current token should be a global value");
1445  }
1446  return false;
1447 }
1448 
1449 bool MIParser::parseGlobalAddressOperand(MachineOperand &Dest) {
1450  GlobalValue *GV = nullptr;
1451  if (parseGlobalValue(GV))
1452  return true;
1453  lex();
1454  Dest = MachineOperand::CreateGA(GV, /*Offset=*/0);
1455  if (parseOperandsOffset(Dest))
1456  return true;
1457  return false;
1458 }
1459 
1460 bool MIParser::parseConstantPoolIndexOperand(MachineOperand &Dest) {
1461  assert(Token.is(MIToken::ConstantPoolItem));
1462  unsigned ID;
1463  if (getUnsigned(ID))
1464  return true;
1465  auto ConstantInfo = PFS.ConstantPoolSlots.find(ID);
1466  if (ConstantInfo == PFS.ConstantPoolSlots.end())
1467  return error("use of undefined constant '%const." + Twine(ID) + "'");
1468  lex();
1469  Dest = MachineOperand::CreateCPI(ID, /*Offset=*/0);
1470  if (parseOperandsOffset(Dest))
1471  return true;
1472  return false;
1473 }
1474 
1475 bool MIParser::parseJumpTableIndexOperand(MachineOperand &Dest) {
1476  assert(Token.is(MIToken::JumpTableIndex));
1477  unsigned ID;
1478  if (getUnsigned(ID))
1479  return true;
1480  auto JumpTableEntryInfo = PFS.JumpTableSlots.find(ID);
1481  if (JumpTableEntryInfo == PFS.JumpTableSlots.end())
1482  return error("use of undefined jump table '%jump-table." + Twine(ID) + "'");
1483  lex();
1484  Dest = MachineOperand::CreateJTI(JumpTableEntryInfo->second);
1485  return false;
1486 }
1487 
1488 bool MIParser::parseExternalSymbolOperand(MachineOperand &Dest) {
1489  assert(Token.is(MIToken::ExternalSymbol));
1490  const char *Symbol = MF.createExternalSymbolName(Token.stringValue());
1491  lex();
1492  Dest = MachineOperand::CreateES(Symbol);
1493  if (parseOperandsOffset(Dest))
1494  return true;
1495  return false;
1496 }
1497 
1498 bool MIParser::parseSubRegisterIndexOperand(MachineOperand &Dest) {
1499  assert(Token.is(MIToken::SubRegisterIndex));
1500  StringRef Name = Token.stringValue();
1501  unsigned SubRegIndex = getSubRegIndex(Token.stringValue());
1502  if (SubRegIndex == 0)
1503  return error(Twine("unknown subregister index '") + Name + "'");
1504  lex();
1505  Dest = MachineOperand::CreateImm(SubRegIndex);
1506  return false;
1507 }
1508 
1509 bool MIParser::parseMDNode(MDNode *&Node) {
1510  assert(Token.is(MIToken::exclaim));
1511 
1512  auto Loc = Token.location();
1513  lex();
1514  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
1515  return error("expected metadata id after '!'");
1516  unsigned ID;
1517  if (getUnsigned(ID))
1518  return true;
1519  auto NodeInfo = PFS.IRSlots.MetadataNodes.find(ID);
1520  if (NodeInfo == PFS.IRSlots.MetadataNodes.end())
1521  return error(Loc, "use of undefined metadata '!" + Twine(ID) + "'");
1522  lex();
1523  Node = NodeInfo->second.get();
1524  return false;
1525 }
1526 
1527 bool MIParser::parseDIExpression(MDNode *&Expr) {
1528  assert(Token.is(MIToken::md_diexpr));
1529  lex();
1530 
1531  // FIXME: Share this parsing with the IL parser.
1532  SmallVector<uint64_t, 8> Elements;
1533 
1534  if (expectAndConsume(MIToken::lparen))
1535  return true;
1536 
1537  if (Token.isNot(MIToken::rparen)) {
1538  do {
1539  if (Token.is(MIToken::Identifier)) {
1540  if (unsigned Op = dwarf::getOperationEncoding(Token.stringValue())) {
1541  lex();
1542  Elements.push_back(Op);
1543  continue;
1544  }
1545  return error(Twine("invalid DWARF op '") + Token.stringValue() + "'");
1546  }
1547 
1548  if (Token.isNot(MIToken::IntegerLiteral) ||
1549  Token.integerValue().isSigned())
1550  return error("expected unsigned integer");
1551 
1552  auto &U = Token.integerValue();
1553  if (U.ugt(UINT64_MAX))
1554  return error("element too large, limit is " + Twine(UINT64_MAX));
1555  Elements.push_back(U.getZExtValue());
1556  lex();
1557 
1558  } while (consumeIfPresent(MIToken::comma));
1559  }
1560 
1561  if (expectAndConsume(MIToken::rparen))
1562  return true;
1563 
1564  Expr = DIExpression::get(MF.getFunction().getContext(), Elements);
1565  return false;
1566 }
1567 
1568 bool MIParser::parseMetadataOperand(MachineOperand &Dest) {
1569  MDNode *Node = nullptr;
1570  if (Token.is(MIToken::exclaim)) {
1571  if (parseMDNode(Node))
1572  return true;
1573  } else if (Token.is(MIToken::md_diexpr)) {
1574  if (parseDIExpression(Node))
1575  return true;
1576  }
1577  Dest = MachineOperand::CreateMetadata(Node);
1578  return false;
1579 }
1580 
1581 bool MIParser::parseCFIOffset(int &Offset) {
1582  if (Token.isNot(MIToken::IntegerLiteral))
1583  return error("expected a cfi offset");
1584  if (Token.integerValue().getMinSignedBits() > 32)
1585  return error("expected a 32 bit integer (the cfi offset is too large)");
1586  Offset = (int)Token.integerValue().getExtValue();
1587  lex();
1588  return false;
1589 }
1590 
1591 bool MIParser::parseCFIRegister(unsigned &Reg) {
1592  if (Token.isNot(MIToken::NamedRegister))
1593  return error("expected a cfi register");
1594  unsigned LLVMReg;
1595  if (parseNamedRegister(LLVMReg))
1596  return true;
1597  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1598  assert(TRI && "Expected target register info");
1599  int DwarfReg = TRI->getDwarfRegNum(LLVMReg, true);
1600  if (DwarfReg < 0)
1601  return error("invalid DWARF register");
1602  Reg = (unsigned)DwarfReg;
1603  lex();
1604  return false;
1605 }
1606 
1607 bool MIParser::parseCFIEscapeValues(std::string &Values) {
1608  do {
1609  if (Token.isNot(MIToken::HexLiteral))
1610  return error("expected a hexadecimal literal");
1611  unsigned Value;
1612  if (getUnsigned(Value))
1613  return true;
1614  if (Value > UINT8_MAX)
1615  return error("expected a 8-bit integer (too large)");
1616  Values.push_back(static_cast<uint8_t>(Value));
1617  lex();
1618  } while (consumeIfPresent(MIToken::comma));
1619  return false;
1620 }
1621 
1622 bool MIParser::parseCFIOperand(MachineOperand &Dest) {
1623  auto Kind = Token.kind();
1624  lex();
1625  int Offset;
1626  unsigned Reg;
1627  unsigned CFIIndex;
1628  switch (Kind) {
1630  if (parseCFIRegister(Reg))
1631  return true;
1632  CFIIndex = MF.addFrameInst(MCCFIInstruction::createSameValue(nullptr, Reg));
1633  break;
1635  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1636  parseCFIOffset(Offset))
1637  return true;
1638  CFIIndex =
1639  MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, Reg, Offset));
1640  break;
1642  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1643  parseCFIOffset(Offset))
1644  return true;
1645  CFIIndex = MF.addFrameInst(
1646  MCCFIInstruction::createRelOffset(nullptr, Reg, Offset));
1647  break;
1649  if (parseCFIRegister(Reg))
1650  return true;
1651  CFIIndex =
1653  break;
1655  if (parseCFIOffset(Offset))
1656  return true;
1657  // NB: MCCFIInstruction::createDefCfaOffset negates the offset.
1658  CFIIndex = MF.addFrameInst(
1659  MCCFIInstruction::createDefCfaOffset(nullptr, -Offset));
1660  break;
1662  if (parseCFIOffset(Offset))
1663  return true;
1664  CFIIndex = MF.addFrameInst(
1665  MCCFIInstruction::createAdjustCfaOffset(nullptr, Offset));
1666  break;
1668  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1669  parseCFIOffset(Offset))
1670  return true;
1671  // NB: MCCFIInstruction::createDefCfa negates the offset.
1672  CFIIndex =
1673  MF.addFrameInst(MCCFIInstruction::createDefCfa(nullptr, Reg, -Offset));
1674  break;
1677  break;
1679  if (parseCFIRegister(Reg))
1680  return true;
1681  CFIIndex = MF.addFrameInst(MCCFIInstruction::createRestore(nullptr, Reg));
1682  break;
1685  break;
1687  if (parseCFIRegister(Reg))
1688  return true;
1689  CFIIndex = MF.addFrameInst(MCCFIInstruction::createUndefined(nullptr, Reg));
1690  break;
1691  case MIToken::kw_cfi_register: {
1692  unsigned Reg2;
1693  if (parseCFIRegister(Reg) || expectAndConsume(MIToken::comma) ||
1694  parseCFIRegister(Reg2))
1695  return true;
1696 
1697  CFIIndex =
1698  MF.addFrameInst(MCCFIInstruction::createRegister(nullptr, Reg, Reg2));
1699  break;
1700  }
1702  CFIIndex = MF.addFrameInst(MCCFIInstruction::createWindowSave(nullptr));
1703  break;
1704  case MIToken::kw_cfi_escape: {
1705  std::string Values;
1706  if (parseCFIEscapeValues(Values))
1707  return true;
1708  CFIIndex = MF.addFrameInst(MCCFIInstruction::createEscape(nullptr, Values));
1709  break;
1710  }
1711  default:
1712  // TODO: Parse the other CFI operands.
1713  llvm_unreachable("The current token should be a cfi operand");
1714  }
1715  Dest = MachineOperand::CreateCFIIndex(CFIIndex);
1716  return false;
1717 }
1718 
1719 bool MIParser::parseIRBlock(BasicBlock *&BB, const Function &F) {
1720  switch (Token.kind()) {
1721  case MIToken::NamedIRBlock: {
1722  BB = dyn_cast_or_null<BasicBlock>(
1723  F.getValueSymbolTable()->lookup(Token.stringValue()));
1724  if (!BB)
1725  return error(Twine("use of undefined IR block '") + Token.range() + "'");
1726  break;
1727  }
1728  case MIToken::IRBlock: {
1729  unsigned SlotNumber = 0;
1730  if (getUnsigned(SlotNumber))
1731  return true;
1732  BB = const_cast<BasicBlock *>(getIRBlock(SlotNumber, F));
1733  if (!BB)
1734  return error(Twine("use of undefined IR block '%ir-block.") +
1735  Twine(SlotNumber) + "'");
1736  break;
1737  }
1738  default:
1739  llvm_unreachable("The current token should be an IR block reference");
1740  }
1741  return false;
1742 }
1743 
1744 bool MIParser::parseBlockAddressOperand(MachineOperand &Dest) {
1745  assert(Token.is(MIToken::kw_blockaddress));
1746  lex();
1747  if (expectAndConsume(MIToken::lparen))
1748  return true;
1749  if (Token.isNot(MIToken::GlobalValue) &&
1750  Token.isNot(MIToken::NamedGlobalValue))
1751  return error("expected a global value");
1752  GlobalValue *GV = nullptr;
1753  if (parseGlobalValue(GV))
1754  return true;
1755  auto *F = dyn_cast<Function>(GV);
1756  if (!F)
1757  return error("expected an IR function reference");
1758  lex();
1759  if (expectAndConsume(MIToken::comma))
1760  return true;
1761  BasicBlock *BB = nullptr;
1762  if (Token.isNot(MIToken::IRBlock) && Token.isNot(MIToken::NamedIRBlock))
1763  return error("expected an IR block reference");
1764  if (parseIRBlock(BB, *F))
1765  return true;
1766  lex();
1767  if (expectAndConsume(MIToken::rparen))
1768  return true;
1769  Dest = MachineOperand::CreateBA(BlockAddress::get(F, BB), /*Offset=*/0);
1770  if (parseOperandsOffset(Dest))
1771  return true;
1772  return false;
1773 }
1774 
1775 bool MIParser::parseIntrinsicOperand(MachineOperand &Dest) {
1776  assert(Token.is(MIToken::kw_intrinsic));
1777  lex();
1778  if (expectAndConsume(MIToken::lparen))
1779  return error("expected syntax intrinsic(@llvm.whatever)");
1780 
1781  if (Token.isNot(MIToken::NamedGlobalValue))
1782  return error("expected syntax intrinsic(@llvm.whatever)");
1783 
1784  std::string Name = Token.stringValue();
1785  lex();
1786 
1787  if (expectAndConsume(MIToken::rparen))
1788  return error("expected ')' to terminate intrinsic name");
1789 
1790  // Find out what intrinsic we're dealing with, first try the global namespace
1791  // and then the target's private intrinsics if that fails.
1794  if (ID == Intrinsic::not_intrinsic && TII)
1795  ID = static_cast<Intrinsic::ID>(TII->lookupName(Name));
1796 
1797  if (ID == Intrinsic::not_intrinsic)
1798  return error("unknown intrinsic name");
1800 
1801  return false;
1802 }
1803 
1804 bool MIParser::parsePredicateOperand(MachineOperand &Dest) {
1805  assert(Token.is(MIToken::kw_intpred) || Token.is(MIToken::kw_floatpred));
1806  bool IsFloat = Token.is(MIToken::kw_floatpred);
1807  lex();
1808 
1809  if (expectAndConsume(MIToken::lparen))
1810  return error("expected syntax intpred(whatever) or floatpred(whatever");
1811 
1812  if (Token.isNot(MIToken::Identifier))
1813  return error("whatever");
1814 
1815  CmpInst::Predicate Pred;
1816  if (IsFloat) {
1817  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
1818  .Case("false", CmpInst::FCMP_FALSE)
1819  .Case("oeq", CmpInst::FCMP_OEQ)
1820  .Case("ogt", CmpInst::FCMP_OGT)
1821  .Case("oge", CmpInst::FCMP_OGE)
1822  .Case("olt", CmpInst::FCMP_OLT)
1823  .Case("ole", CmpInst::FCMP_OLE)
1824  .Case("one", CmpInst::FCMP_ONE)
1825  .Case("ord", CmpInst::FCMP_ORD)
1826  .Case("uno", CmpInst::FCMP_UNO)
1827  .Case("ueq", CmpInst::FCMP_UEQ)
1828  .Case("ugt", CmpInst::FCMP_UGT)
1829  .Case("uge", CmpInst::FCMP_UGE)
1830  .Case("ult", CmpInst::FCMP_ULT)
1831  .Case("ule", CmpInst::FCMP_ULE)
1832  .Case("une", CmpInst::FCMP_UNE)
1833  .Case("true", CmpInst::FCMP_TRUE)
1835  if (!CmpInst::isFPPredicate(Pred))
1836  return error("invalid floating-point predicate");
1837  } else {
1838  Pred = StringSwitch<CmpInst::Predicate>(Token.stringValue())
1839  .Case("eq", CmpInst::ICMP_EQ)
1840  .Case("ne", CmpInst::ICMP_NE)
1841  .Case("sgt", CmpInst::ICMP_SGT)
1842  .Case("sge", CmpInst::ICMP_SGE)
1843  .Case("slt", CmpInst::ICMP_SLT)
1844  .Case("sle", CmpInst::ICMP_SLE)
1845  .Case("ugt", CmpInst::ICMP_UGT)
1846  .Case("uge", CmpInst::ICMP_UGE)
1847  .Case("ult", CmpInst::ICMP_ULT)
1848  .Case("ule", CmpInst::ICMP_ULE)
1850  if (!CmpInst::isIntPredicate(Pred))
1851  return error("invalid integer predicate");
1852  }
1853 
1854  lex();
1855  Dest = MachineOperand::CreatePredicate(Pred);
1856  if (expectAndConsume(MIToken::rparen))
1857  return error("predicate should be terminated by ')'.");
1858 
1859  return false;
1860 }
1861 
1862 bool MIParser::parseTargetIndexOperand(MachineOperand &Dest) {
1863  assert(Token.is(MIToken::kw_target_index));
1864  lex();
1865  if (expectAndConsume(MIToken::lparen))
1866  return true;
1867  if (Token.isNot(MIToken::Identifier))
1868  return error("expected the name of the target index");
1869  int Index = 0;
1870  if (getTargetIndex(Token.stringValue(), Index))
1871  return error("use of undefined target index '" + Token.stringValue() + "'");
1872  lex();
1873  if (expectAndConsume(MIToken::rparen))
1874  return true;
1875  Dest = MachineOperand::CreateTargetIndex(unsigned(Index), /*Offset=*/0);
1876  if (parseOperandsOffset(Dest))
1877  return true;
1878  return false;
1879 }
1880 
1881 bool MIParser::parseCustomRegisterMaskOperand(MachineOperand &Dest) {
1882  assert(Token.stringValue() == "CustomRegMask" && "Expected a custom RegMask");
1884  assert(TRI && "Expected target register info");
1885  lex();
1886  if (expectAndConsume(MIToken::lparen))
1887  return true;
1888 
1889  uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs());
1890  while (true) {
1891  if (Token.isNot(MIToken::NamedRegister))
1892  return error("expected a named register");
1893  unsigned Reg;
1894  if (parseNamedRegister(Reg))
1895  return true;
1896  lex();
1897  Mask[Reg / 32] |= 1U << (Reg % 32);
1898  // TODO: Report an error if the same register is used more than once.
1899  if (Token.isNot(MIToken::comma))
1900  break;
1901  lex();
1902  }
1903 
1904  if (expectAndConsume(MIToken::rparen))
1905  return true;
1906  Dest = MachineOperand::CreateRegMask(Mask);
1907  return false;
1908 }
1909 
1910 bool MIParser::parseLiveoutRegisterMaskOperand(MachineOperand &Dest) {
1911  assert(Token.is(MIToken::kw_liveout));
1912  const auto *TRI = MF.getSubtarget().getRegisterInfo();
1913  assert(TRI && "Expected target register info");
1914  uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs());
1915  lex();
1916  if (expectAndConsume(MIToken::lparen))
1917  return true;
1918  while (true) {
1919  if (Token.isNot(MIToken::NamedRegister))
1920  return error("expected a named register");
1921  unsigned Reg;
1922  if (parseNamedRegister(Reg))
1923  return true;
1924  lex();
1925  Mask[Reg / 32] |= 1U << (Reg % 32);
1926  // TODO: Report an error if the same register is used more than once.
1927  if (Token.isNot(MIToken::comma))
1928  break;
1929  lex();
1930  }
1931  if (expectAndConsume(MIToken::rparen))
1932  return true;
1933  Dest = MachineOperand::CreateRegLiveOut(Mask);
1934  return false;
1935 }
1936 
1937 bool MIParser::parseMachineOperand(MachineOperand &Dest,
1938  Optional<unsigned> &TiedDefIdx) {
1939  switch (Token.kind()) {
1940  case MIToken::kw_implicit:
1942  case MIToken::kw_def:
1943  case MIToken::kw_dead:
1944  case MIToken::kw_killed:
1945  case MIToken::kw_undef:
1946  case MIToken::kw_internal:
1948  case MIToken::kw_debug_use:
1949  case MIToken::kw_renamable:
1950  case MIToken::underscore:
1953  return parseRegisterOperand(Dest, TiedDefIdx);
1955  return parseImmediateOperand(Dest);
1956  case MIToken::IntegerType:
1957  return parseTypedImmediateOperand(Dest);
1958  case MIToken::kw_half:
1959  case MIToken::kw_float:
1960  case MIToken::kw_double:
1961  case MIToken::kw_x86_fp80:
1962  case MIToken::kw_fp128:
1963  case MIToken::kw_ppc_fp128:
1964  return parseFPImmediateOperand(Dest);
1966  return parseMBBOperand(Dest);
1967  case MIToken::StackObject:
1968  return parseStackObjectOperand(Dest);
1970  return parseFixedStackObjectOperand(Dest);
1971  case MIToken::GlobalValue:
1973  return parseGlobalAddressOperand(Dest);
1975  return parseConstantPoolIndexOperand(Dest);
1977  return parseJumpTableIndexOperand(Dest);
1979  return parseExternalSymbolOperand(Dest);
1981  return parseSubRegisterIndexOperand(Dest);
1982  case MIToken::md_diexpr:
1983  case MIToken::exclaim:
1984  return parseMetadataOperand(Dest);
1999  return parseCFIOperand(Dest);
2001  return parseBlockAddressOperand(Dest);
2002  case MIToken::kw_intrinsic:
2003  return parseIntrinsicOperand(Dest);
2005  return parseTargetIndexOperand(Dest);
2006  case MIToken::kw_liveout:
2007  return parseLiveoutRegisterMaskOperand(Dest);
2008  case MIToken::kw_floatpred:
2009  case MIToken::kw_intpred:
2010  return parsePredicateOperand(Dest);
2011  case MIToken::Error:
2012  return true;
2013  case MIToken::Identifier:
2014  if (const auto *RegMask = getRegMask(Token.stringValue())) {
2015  Dest = MachineOperand::CreateRegMask(RegMask);
2016  lex();
2017  break;
2018  } else
2019  return parseCustomRegisterMaskOperand(Dest);
2020  default:
2021  // FIXME: Parse the MCSymbol machine operand.
2022  return error("expected a machine operand");
2023  }
2024  return false;
2025 }
2026 
2027 bool MIParser::parseMachineOperandAndTargetFlags(
2028  MachineOperand &Dest, Optional<unsigned> &TiedDefIdx) {
2029  unsigned TF = 0;
2030  bool HasTargetFlags = false;
2031  if (Token.is(MIToken::kw_target_flags)) {
2032  HasTargetFlags = true;
2033  lex();
2034  if (expectAndConsume(MIToken::lparen))
2035  return true;
2036  if (Token.isNot(MIToken::Identifier))
2037  return error("expected the name of the target flag");
2038  if (getDirectTargetFlag(Token.stringValue(), TF)) {
2039  if (getBitmaskTargetFlag(Token.stringValue(), TF))
2040  return error("use of undefined target flag '" + Token.stringValue() +
2041  "'");
2042  }
2043  lex();
2044  while (Token.is(MIToken::comma)) {
2045  lex();
2046  if (Token.isNot(MIToken::Identifier))
2047  return error("expected the name of the target flag");
2048  unsigned BitFlag = 0;
2049  if (getBitmaskTargetFlag(Token.stringValue(), BitFlag))
2050  return error("use of undefined target flag '" + Token.stringValue() +
2051  "'");
2052  // TODO: Report an error when using a duplicate bit target flag.
2053  TF |= BitFlag;
2054  lex();
2055  }
2056  if (expectAndConsume(MIToken::rparen))
2057  return true;
2058  }
2059  auto Loc = Token.location();
2060  if (parseMachineOperand(Dest, TiedDefIdx))
2061  return true;
2062  if (!HasTargetFlags)
2063  return false;
2064  if (Dest.isReg())
2065  return error(Loc, "register operands can't have target flags");
2066  Dest.setTargetFlags(TF);
2067  return false;
2068 }
2069 
2070 bool MIParser::parseOffset(int64_t &Offset) {
2071  if (Token.isNot(MIToken::plus) && Token.isNot(MIToken::minus))
2072  return false;
2073  StringRef Sign = Token.range();
2074  bool IsNegative = Token.is(MIToken::minus);
2075  lex();
2076  if (Token.isNot(MIToken::IntegerLiteral))
2077  return error("expected an integer literal after '" + Sign + "'");
2078  if (Token.integerValue().getMinSignedBits() > 64)
2079  return error("expected 64-bit integer (too large)");
2080  Offset = Token.integerValue().getExtValue();
2081  if (IsNegative)
2082  Offset = -Offset;
2083  lex();
2084  return false;
2085 }
2086 
2087 bool MIParser::parseAlignment(unsigned &Alignment) {
2088  assert(Token.is(MIToken::kw_align));
2089  lex();
2090  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2091  return error("expected an integer literal after 'align'");
2092  if (getUnsigned(Alignment))
2093  return true;
2094  lex();
2095  return false;
2096 }
2097 
2098 bool MIParser::parseAddrspace(unsigned &Addrspace) {
2099  assert(Token.is(MIToken::kw_addrspace));
2100  lex();
2101  if (Token.isNot(MIToken::IntegerLiteral) || Token.integerValue().isSigned())
2102  return error("expected an integer literal after 'addrspace'");
2103  if (getUnsigned(Addrspace))
2104  return true;
2105  lex();
2106  return false;
2107 }
2108 
2109 bool MIParser::parseOperandsOffset(MachineOperand &Op) {
2110  int64_t Offset = 0;
2111  if (parseOffset(Offset))
2112  return true;
2113  Op.setOffset(Offset);
2114  return false;
2115 }
2116 
2117 bool MIParser::parseIRValue(const Value *&V) {
2118  switch (Token.kind()) {
2119  case MIToken::NamedIRValue: {
2120  V = MF.getFunction().getValueSymbolTable()->lookup(Token.stringValue());
2121  break;
2122  }
2123  case MIToken::IRValue: {
2124  unsigned SlotNumber = 0;
2125  if (getUnsigned(SlotNumber))
2126  return true;
2127  V = getIRValue(SlotNumber);
2128  break;
2129  }
2131  case MIToken::GlobalValue: {
2132  GlobalValue *GV = nullptr;
2133  if (parseGlobalValue(GV))
2134  return true;
2135  V = GV;
2136  break;
2137  }
2138  case MIToken::QuotedIRValue: {
2139  const Constant *C = nullptr;
2140  if (parseIRConstant(Token.location(), Token.stringValue(), C))
2141  return true;
2142  V = C;
2143  break;
2144  }
2145  default:
2146  llvm_unreachable("The current token should be an IR block reference");
2147  }
2148  if (!V)
2149  return error(Twine("use of undefined IR value '") + Token.range() + "'");
2150  return false;
2151 }
2152 
2153 bool MIParser::getUint64(uint64_t &Result) {
2154  if (Token.hasIntegerValue()) {
2155  if (Token.integerValue().getActiveBits() > 64)
2156  return error("expected 64-bit integer (too large)");
2157  Result = Token.integerValue().getZExtValue();
2158  return false;
2159  }
2160  if (Token.is(MIToken::HexLiteral)) {
2161  APInt A;
2162  if (getHexUint(A))
2163  return true;
2164  if (A.getBitWidth() > 64)
2165  return error("expected 64-bit integer (too large)");
2166  Result = A.getZExtValue();
2167  return false;
2168  }
2169  return true;
2170 }
2171 
2172 bool MIParser::getHexUint(APInt &Result) {
2173  assert(Token.is(MIToken::HexLiteral));
2174  StringRef S = Token.range();
2175  assert(S[0] == '0' && tolower(S[1]) == 'x');
2176  // This could be a floating point literal with a special prefix.
2177  if (!isxdigit(S[2]))
2178  return true;
2179  StringRef V = S.substr(2);
2180  APInt A(V.size()*4, V, 16);
2181 
2182  // If A is 0, then A.getActiveBits() is 0. This isn't a valid bitwidth. Make
2183  // sure it isn't the case before constructing result.
2184  unsigned NumBits = (A == 0) ? 32 : A.getActiveBits();
2185  Result = APInt(NumBits, ArrayRef<uint64_t>(A.getRawData(), A.getNumWords()));
2186  return false;
2187 }
2188 
2189 bool MIParser::parseMemoryOperandFlag(MachineMemOperand::Flags &Flags) {
2190  const auto OldFlags = Flags;
2191  switch (Token.kind()) {
2192  case MIToken::kw_volatile:
2194  break;
2197  break;
2200  break;
2201  case MIToken::kw_invariant:
2203  break;
2204  case MIToken::StringConstant: {
2206  if (getMMOTargetFlag(Token.stringValue(), TF))
2207  return error("use of undefined target MMO flag '" + Token.stringValue() +
2208  "'");
2209  Flags |= TF;
2210  break;
2211  }
2212  default:
2213  llvm_unreachable("The current token should be a memory operand flag");
2214  }
2215  if (OldFlags == Flags)
2216  // We know that the same flag is specified more than once when the flags
2217  // weren't modified.
2218  return error("duplicate '" + Token.stringValue() + "' memory operand flag");
2219  lex();
2220  return false;
2221 }
2222 
2223 bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
2224  switch (Token.kind()) {
2225  case MIToken::kw_stack:
2226  PSV = MF.getPSVManager().getStack();
2227  break;
2228  case MIToken::kw_got:
2229  PSV = MF.getPSVManager().getGOT();
2230  break;
2232  PSV = MF.getPSVManager().getJumpTable();
2233  break;
2235  PSV = MF.getPSVManager().getConstantPool();
2236  break;
2238  int FI;
2239  if (parseFixedStackFrameIndex(FI))
2240  return true;
2241  PSV = MF.getPSVManager().getFixedStack(FI);
2242  // The token was already consumed, so use return here instead of break.
2243  return false;
2244  }
2245  case MIToken::StackObject: {
2246  int FI;
2247  if (parseStackFrameIndex(FI))
2248  return true;
2249  PSV = MF.getPSVManager().getFixedStack(FI);
2250  // The token was already consumed, so use return here instead of break.
2251  return false;
2252  }
2254  lex();
2255  switch (Token.kind()) {
2256  case MIToken::GlobalValue:
2258  GlobalValue *GV = nullptr;
2259  if (parseGlobalValue(GV))
2260  return true;
2262  break;
2263  }
2266  MF.createExternalSymbolName(Token.stringValue()));
2267  break;
2268  default:
2269  return error(
2270  "expected a global value or an external symbol after 'call-entry'");
2271  }
2272  break;
2273  default:
2274  llvm_unreachable("The current token should be pseudo source value");
2275  }
2276  lex();
2277  return false;
2278 }
2279 
2280 bool MIParser::parseMachinePointerInfo(MachinePointerInfo &Dest) {
2281  if (Token.is(MIToken::kw_constant_pool) || Token.is(MIToken::kw_stack) ||
2282  Token.is(MIToken::kw_got) || Token.is(MIToken::kw_jump_table) ||
2283  Token.is(MIToken::FixedStackObject) || Token.is(MIToken::StackObject) ||
2284  Token.is(MIToken::kw_call_entry)) {
2285  const PseudoSourceValue *PSV = nullptr;
2286  if (parseMemoryPseudoSourceValue(PSV))
2287  return true;
2288  int64_t Offset = 0;
2289  if (parseOffset(Offset))
2290  return true;
2291  Dest = MachinePointerInfo(PSV, Offset);
2292  return false;
2293  }
2294  if (Token.isNot(MIToken::NamedIRValue) && Token.isNot(MIToken::IRValue) &&
2295  Token.isNot(MIToken::GlobalValue) &&
2296  Token.isNot(MIToken::NamedGlobalValue) &&
2297  Token.isNot(MIToken::QuotedIRValue))
2298  return error("expected an IR value reference");
2299  const Value *V = nullptr;
2300  if (parseIRValue(V))
2301  return true;
2302  if (!V->getType()->isPointerTy())
2303  return error("expected a pointer IR value");
2304  lex();
2305  int64_t Offset = 0;
2306  if (parseOffset(Offset))
2307  return true;
2308  Dest = MachinePointerInfo(V, Offset);
2309  return false;
2310 }
2311 
2312 bool MIParser::parseOptionalScope(LLVMContext &Context,
2313  SyncScope::ID &SSID) {
2314  SSID = SyncScope::System;
2315  if (Token.is(MIToken::Identifier) && Token.stringValue() == "syncscope") {
2316  lex();
2317  if (expectAndConsume(MIToken::lparen))
2318  return error("expected '(' in syncscope");
2319 
2320  std::string SSN;
2321  if (parseStringConstant(SSN))
2322  return true;
2323 
2324  SSID = Context.getOrInsertSyncScopeID(SSN);
2325  if (expectAndConsume(MIToken::rparen))
2326  return error("expected ')' in syncscope");
2327  }
2328 
2329  return false;
2330 }
2331 
2332 bool MIParser::parseOptionalAtomicOrdering(AtomicOrdering &Order) {
2333  Order = AtomicOrdering::NotAtomic;
2334  if (Token.isNot(MIToken::Identifier))
2335  return false;
2336 
2337  Order = StringSwitch<AtomicOrdering>(Token.stringValue())
2338  .Case("unordered", AtomicOrdering::Unordered)
2339  .Case("monotonic", AtomicOrdering::Monotonic)
2340  .Case("acquire", AtomicOrdering::Acquire)
2341  .Case("release", AtomicOrdering::Release)
2345 
2346  if (Order != AtomicOrdering::NotAtomic) {
2347  lex();
2348  return false;
2349  }
2350 
2351  return error("expected an atomic scope, ordering or a size integer literal");
2352 }
2353 
2354 bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
2355  if (expectAndConsume(MIToken::lparen))
2356  return true;
2358  while (Token.isMemoryOperandFlag()) {
2359  if (parseMemoryOperandFlag(Flags))
2360  return true;
2361  }
2362  if (Token.isNot(MIToken::Identifier) ||
2363  (Token.stringValue() != "load" && Token.stringValue() != "store"))
2364  return error("expected 'load' or 'store' memory operation");
2365  if (Token.stringValue() == "load")
2366  Flags |= MachineMemOperand::MOLoad;
2367  else
2368  Flags |= MachineMemOperand::MOStore;
2369  lex();
2370 
2371  // Optional 'store' for operands that both load and store.
2372  if (Token.is(MIToken::Identifier) && Token.stringValue() == "store") {
2373  Flags |= MachineMemOperand::MOStore;
2374  lex();
2375  }
2376 
2377  // Optional synchronization scope.
2378  SyncScope::ID SSID;
2379  if (parseOptionalScope(MF.getFunction().getContext(), SSID))
2380  return true;
2381 
2382  // Up to two atomic orderings (cmpxchg provides guarantees on failure).
2383  AtomicOrdering Order, FailureOrder;
2384  if (parseOptionalAtomicOrdering(Order))
2385  return true;
2386 
2387  if (parseOptionalAtomicOrdering(FailureOrder))
2388  return true;
2389 
2390  if (Token.isNot(MIToken::IntegerLiteral))
2391  return error("expected the size integer literal after memory operation");
2392  uint64_t Size;
2393  if (getUint64(Size))
2394  return true;
2395  lex();
2396 
2398  if (Token.is(MIToken::Identifier)) {
2399  const char *Word =
2400  ((Flags & MachineMemOperand::MOLoad) &&
2401  (Flags & MachineMemOperand::MOStore))
2402  ? "on"
2403  : Flags & MachineMemOperand::MOLoad ? "from" : "into";
2404  if (Token.stringValue() != Word)
2405  return error(Twine("expected '") + Word + "'");
2406  lex();
2407 
2408  if (parseMachinePointerInfo(Ptr))
2409  return true;
2410  }
2411  unsigned BaseAlignment = Size;
2412  AAMDNodes AAInfo;
2413  MDNode *Range = nullptr;
2414  while (consumeIfPresent(MIToken::comma)) {
2415  switch (Token.kind()) {
2416  case MIToken::kw_align:
2417  if (parseAlignment(BaseAlignment))
2418  return true;
2419  break;
2420  case MIToken::kw_addrspace:
2421  if (parseAddrspace(Ptr.AddrSpace))
2422  return true;
2423  break;
2424  case MIToken::md_tbaa:
2425  lex();
2426  if (parseMDNode(AAInfo.TBAA))
2427  return true;
2428  break;
2430  lex();
2431  if (parseMDNode(AAInfo.Scope))
2432  return true;
2433  break;
2434  case MIToken::md_noalias:
2435  lex();
2436  if (parseMDNode(AAInfo.NoAlias))
2437  return true;
2438  break;
2439  case MIToken::md_range:
2440  lex();
2441  if (parseMDNode(Range))
2442  return true;
2443  break;
2444  // TODO: Report an error on duplicate metadata nodes.
2445  default:
2446  return error("expected 'align' or '!tbaa' or '!alias.scope' or "
2447  "'!noalias' or '!range'");
2448  }
2449  }
2450  if (expectAndConsume(MIToken::rparen))
2451  return true;
2452  Dest = MF.getMachineMemOperand(Ptr, Flags, Size, BaseAlignment, AAInfo, Range,
2453  SSID, Order, FailureOrder);
2454  return false;
2455 }
2456 
2457 void MIParser::initNames2InstrOpCodes() {
2458  if (!Names2InstrOpCodes.empty())
2459  return;
2460  const auto *TII = MF.getSubtarget().getInstrInfo();
2461  assert(TII && "Expected target instruction info");
2462  for (unsigned I = 0, E = TII->getNumOpcodes(); I < E; ++I)
2463  Names2InstrOpCodes.insert(std::make_pair(StringRef(TII->getName(I)), I));
2464 }
2465 
2466 bool MIParser::parseInstrName(StringRef InstrName, unsigned &OpCode) {
2467  initNames2InstrOpCodes();
2468  auto InstrInfo = Names2InstrOpCodes.find(InstrName);
2469  if (InstrInfo == Names2InstrOpCodes.end())
2470  return true;
2471  OpCode = InstrInfo->getValue();
2472  return false;
2473 }
2474 
2475 void MIParser::initNames2Regs() {
2476  if (!Names2Regs.empty())
2477  return;
2478  // The '%noreg' register is the register 0.
2479  Names2Regs.insert(std::make_pair("noreg", 0));
2480  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2481  assert(TRI && "Expected target register info");
2482  for (unsigned I = 0, E = TRI->getNumRegs(); I < E; ++I) {
2483  bool WasInserted =
2484  Names2Regs.insert(std::make_pair(StringRef(TRI->getName(I)).lower(), I))
2485  .second;
2486  (void)WasInserted;
2487  assert(WasInserted && "Expected registers to be unique case-insensitively");
2488  }
2489 }
2490 
2491 bool MIParser::getRegisterByName(StringRef RegName, unsigned &Reg) {
2492  initNames2Regs();
2493  auto RegInfo = Names2Regs.find(RegName);
2494  if (RegInfo == Names2Regs.end())
2495  return true;
2496  Reg = RegInfo->getValue();
2497  return false;
2498 }
2499 
2500 void MIParser::initNames2RegMasks() {
2501  if (!Names2RegMasks.empty())
2502  return;
2503  const auto *TRI = MF.getSubtarget().getRegisterInfo();
2504  assert(TRI && "Expected target register info");
2505  ArrayRef<const uint32_t *> RegMasks = TRI->getRegMasks();
2506  ArrayRef<const char *> RegMaskNames = TRI->getRegMaskNames();
2507  assert(RegMasks.size() == RegMaskNames.size());
2508  for (size_t I = 0, E = RegMasks.size(); I < E; ++I)
2509  Names2RegMasks.insert(
2510  std::make_pair(StringRef(RegMaskNames[I]).lower(), RegMasks[I]));
2511 }
2512 
2513 const uint32_t *MIParser::getRegMask(StringRef Identifier) {
2514  initNames2RegMasks();
2515  auto RegMaskInfo = Names2RegMasks.find(Identifier);
2516  if (RegMaskInfo == Names2RegMasks.end())
2517  return nullptr;
2518  return RegMaskInfo->getValue();
2519 }
2520 
2521 void MIParser::initNames2SubRegIndices() {
2522  if (!Names2SubRegIndices.empty())
2523  return;
2525  for (unsigned I = 1, E = TRI->getNumSubRegIndices(); I < E; ++I)
2526  Names2SubRegIndices.insert(
2527  std::make_pair(StringRef(TRI->getSubRegIndexName(I)).lower(), I));
2528 }
2529 
2530 unsigned MIParser::getSubRegIndex(StringRef Name) {
2531  initNames2SubRegIndices();
2532  auto SubRegInfo = Names2SubRegIndices.find(Name);
2533  if (SubRegInfo == Names2SubRegIndices.end())
2534  return 0;
2535  return SubRegInfo->getValue();
2536 }
2537 
2539  const Function &F,
2540  DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2541  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2542  MST.incorporateFunction(F);
2543  for (auto &BB : F) {
2544  if (BB.hasName())
2545  continue;
2546  int Slot = MST.getLocalSlot(&BB);
2547  if (Slot == -1)
2548  continue;
2549  Slots2BasicBlocks.insert(std::make_pair(unsigned(Slot), &BB));
2550  }
2551 }
2552 
2554  unsigned Slot,
2555  const DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
2556  auto BlockInfo = Slots2BasicBlocks.find(Slot);
2557  if (BlockInfo == Slots2BasicBlocks.end())
2558  return nullptr;
2559  return BlockInfo->second;
2560 }
2561 
2562 const BasicBlock *MIParser::getIRBlock(unsigned Slot) {
2563  if (Slots2BasicBlocks.empty())
2564  initSlots2BasicBlocks(MF.getFunction(), Slots2BasicBlocks);
2565  return getIRBlockFromSlot(Slot, Slots2BasicBlocks);
2566 }
2567 
2568 const BasicBlock *MIParser::getIRBlock(unsigned Slot, const Function &F) {
2569  if (&F == &MF.getFunction())
2570  return getIRBlock(Slot);
2571  DenseMap<unsigned, const BasicBlock *> CustomSlots2BasicBlocks;
2572  initSlots2BasicBlocks(F, CustomSlots2BasicBlocks);
2573  return getIRBlockFromSlot(Slot, CustomSlots2BasicBlocks);
2574 }
2575 
2576 static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST,
2577  DenseMap<unsigned, const Value *> &Slots2Values) {
2578  int Slot = MST.getLocalSlot(V);
2579  if (Slot == -1)
2580  return;
2581  Slots2Values.insert(std::make_pair(unsigned(Slot), V));
2582 }
2583 
2584 /// Creates the mapping from slot numbers to function's unnamed IR values.
2585 static void initSlots2Values(const Function &F,
2586  DenseMap<unsigned, const Value *> &Slots2Values) {
2587  ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
2588  MST.incorporateFunction(F);
2589  for (const auto &Arg : F.args())
2590  mapValueToSlot(&Arg, MST, Slots2Values);
2591  for (const auto &BB : F) {
2592  mapValueToSlot(&BB, MST, Slots2Values);
2593  for (const auto &I : BB)
2594  mapValueToSlot(&I, MST, Slots2Values);
2595  }
2596 }
2597 
2598 const Value *MIParser::getIRValue(unsigned Slot) {
2599  if (Slots2Values.empty())
2600  initSlots2Values(MF.getFunction(), Slots2Values);
2601  auto ValueInfo = Slots2Values.find(Slot);
2602  if (ValueInfo == Slots2Values.end())
2603  return nullptr;
2604  return ValueInfo->second;
2605 }
2606 
2607 void MIParser::initNames2TargetIndices() {
2608  if (!Names2TargetIndices.empty())
2609  return;
2610  const auto *TII = MF.getSubtarget().getInstrInfo();
2611  assert(TII && "Expected target instruction info");
2612  auto Indices = TII->getSerializableTargetIndices();
2613  for (const auto &I : Indices)
2614  Names2TargetIndices.insert(std::make_pair(StringRef(I.second), I.first));
2615 }
2616 
2617 bool MIParser::getTargetIndex(StringRef Name, int &Index) {
2618  initNames2TargetIndices();
2619  auto IndexInfo = Names2TargetIndices.find(Name);
2620  if (IndexInfo == Names2TargetIndices.end())
2621  return true;
2622  Index = IndexInfo->second;
2623  return false;
2624 }
2625 
2626 void MIParser::initNames2DirectTargetFlags() {
2627  if (!Names2DirectTargetFlags.empty())
2628  return;
2629  const auto *TII = MF.getSubtarget().getInstrInfo();
2630  assert(TII && "Expected target instruction info");
2632  for (const auto &I : Flags)
2633  Names2DirectTargetFlags.insert(
2634  std::make_pair(StringRef(I.second), I.first));
2635 }
2636 
2637 bool MIParser::getDirectTargetFlag(StringRef Name, unsigned &Flag) {
2638  initNames2DirectTargetFlags();
2639  auto FlagInfo = Names2DirectTargetFlags.find(Name);
2640  if (FlagInfo == Names2DirectTargetFlags.end())
2641  return true;
2642  Flag = FlagInfo->second;
2643  return false;
2644 }
2645 
2646 void MIParser::initNames2BitmaskTargetFlags() {
2647  if (!Names2BitmaskTargetFlags.empty())
2648  return;
2649  const auto *TII = MF.getSubtarget().getInstrInfo();
2650  assert(TII && "Expected target instruction info");
2652  for (const auto &I : Flags)
2653  Names2BitmaskTargetFlags.insert(
2654  std::make_pair(StringRef(I.second), I.first));
2655 }
2656 
2657 bool MIParser::getBitmaskTargetFlag(StringRef Name, unsigned &Flag) {
2658  initNames2BitmaskTargetFlags();
2659  auto FlagInfo = Names2BitmaskTargetFlags.find(Name);
2660  if (FlagInfo == Names2BitmaskTargetFlags.end())
2661  return true;
2662  Flag = FlagInfo->second;
2663  return false;
2664 }
2665 
2666 void MIParser::initNames2MMOTargetFlags() {
2667  if (!Names2MMOTargetFlags.empty())
2668  return;
2669  const auto *TII = MF.getSubtarget().getInstrInfo();
2670  assert(TII && "Expected target instruction info");
2671  auto Flags = TII->getSerializableMachineMemOperandTargetFlags();
2672  for (const auto &I : Flags)
2673  Names2MMOTargetFlags.insert(
2674  std::make_pair(StringRef(I.second), I.first));
2675 }
2676 
2677 bool MIParser::getMMOTargetFlag(StringRef Name,
2678  MachineMemOperand::Flags &Flag) {
2679  initNames2MMOTargetFlags();
2680  auto FlagInfo = Names2MMOTargetFlags.find(Name);
2681  if (FlagInfo == Names2MMOTargetFlags.end())
2682  return true;
2683  Flag = FlagInfo->second;
2684  return false;
2685 }
2686 
2687 bool MIParser::parseStringConstant(std::string &Result) {
2688  if (Token.isNot(MIToken::StringConstant))
2689  return error("expected string constant");
2690  Result = Token.stringValue();
2691  lex();
2692  return false;
2693 }
2694 
2696  StringRef Src,
2697  SMDiagnostic &Error) {
2698  return MIParser(PFS, Error, Src).parseBasicBlockDefinitions(PFS.MBBSlots);
2699 }
2700 
2702  StringRef Src, SMDiagnostic &Error) {
2703  return MIParser(PFS, Error, Src).parseBasicBlocks();
2704 }
2705 
2707  MachineBasicBlock *&MBB, StringRef Src,
2708  SMDiagnostic &Error) {
2709  return MIParser(PFS, Error, Src).parseStandaloneMBB(MBB);
2710 }
2711 
2713  unsigned &Reg, StringRef Src,
2714  SMDiagnostic &Error) {
2715  return MIParser(PFS, Error, Src).parseStandaloneRegister(Reg);
2716 }
2717 
2719  unsigned &Reg, StringRef Src,
2720  SMDiagnostic &Error) {
2721  return MIParser(PFS, Error, Src).parseStandaloneNamedRegister(Reg);
2722 }
2723 
2725  VRegInfo *&Info, StringRef Src,
2726  SMDiagnostic &Error) {
2727  return MIParser(PFS, Error, Src).parseStandaloneVirtualRegister(Info);
2728 }
2729 
2731  int &FI, StringRef Src,
2732  SMDiagnostic &Error) {
2733  return MIParser(PFS, Error, Src).parseStandaloneStackObject(FI);
2734 }
2735 
2737  MDNode *&Node, StringRef Src, SMDiagnostic &Error) {
2738  return MIParser(PFS, Error, Src).parseStandaloneMDNode(Node);
2739 }
bool isFPPredicate() const
Definition: InstrTypes.h:944
ArrayRef< std::pair< unsigned, const char * > > getSerializableDirectMachineOperandTargetFlags() const override
Return an array that contains the direct target flag values and their names.
uint64_t CallInst * C
virtual StringRef getBufferIdentifier() const
Return an identifier for this buffer, typically the filename it was read from.
Definition: MemoryBuffer.h:69
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine basic block definitions, and skip the machine instructions.
Definition: MIParser.cpp:2695
static void initSlots2BasicBlocks(const Function &F, DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2538
A common definition of LaneBitmask for use in TableGen and CodeGen.
uint64_t getZExtValue() const
Get zero extended value.
Definition: APInt.h:1542
static MachineOperand CreateCImm(const ConstantInt *CI)
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
DenseMap< unsigned, unsigned > JumpTableSlots
Definition: MIParser.h:62
LLVM_NODISCARD std::string str() const
str - Get the contents as an std::string.
Definition: StringRef.h:228
LLVMContext & Context
const T & back() const
back - Get the last element.
Definition: ArrayRef.h:158
MDNode * Scope
The tag for alias scope specification (used with noalias).
Definition: Metadata.h:659
Atomic ordering constants.
DenseMap< unsigned, unsigned > ConstantPoolSlots
Definition: MIParser.h:61
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
MDNode * TBAA
The tag for type-based alias analysis.
Definition: Metadata.h:656
Constant * parseConstantValue(StringRef Asm, SMDiagnostic &Err, const Module &M, const SlotMapping *Slots=nullptr)
Parse a type and a constant value in the given string.
Definition: Parser.cpp:75
void setTargetFlags(unsigned F)
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
static BranchProbability getRaw(uint32_t N)
static MCCFIInstruction createRememberState(MCSymbol *L)
.cfi_remember_state Save all current rules for all registers.
Definition: MCDwarf.h:465
const MCPhysReg * getImplicitUses() const
Return a list of registers that are potentially read by any instance of this machine instruction...
Definition: MCInstrDesc.h:512
static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags=0)
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:163
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t size() const
size - Get the string size.
Definition: StringRef.h:138
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:420
static bool isVirtualRegister(unsigned Reg)
Return true if the specified register number is in the virtual register namespace.
SyncScope::ID getOrInsertSyncScopeID(StringRef SSN)
getOrInsertSyncScopeID - Maps synchronization scope name to synchronization scope ID...
This file contains the declarations for metadata subclasses.
unsigned less or equal
Definition: InstrTypes.h:879
unsigned less than
Definition: InstrTypes.h:878
int getLocalSlot(const Value *V)
Return the slot number of the specified local value.
Definition: AsmWriter.cpp:775
0 1 0 0 True if ordered and less than
Definition: InstrTypes.h:859
ArrayRef< std::pair< unsigned, const char * > > getSerializableBitmaskMachineOperandTargetFlags() const override
Return an array that contains the bitmask target flag values and their names.
iterator find(StringRef Key)
Definition: StringMap.h:335
DenseMap< unsigned, int > StackObjectSlots
Definition: MIParser.h:60
1 1 1 0 True if unordered or not equal
Definition: InstrTypes.h:869
#define error(X)
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:350
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:862
F(f)
DenseMap< unsigned, VRegInfo * > VRegInfos
Definition: MIParser.h:58
Manage lifetime of a slot tracker for printing IR.
bool parseMBBReference(PerFunctionMIParsingState &PFS, MachineBasicBlock *&MBB, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2706
const TargetRegisterClass * RC
Definition: MIParser.h:39
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:407
MachineInstr * CreateMachineInstr(const MCInstrDesc &MCID, const DebugLoc &DL, bool NoImp=false)
CreateMachineInstr - Allocate a new MachineInstr.
StringRef lexMIToken(StringRef Source, MIToken &Token, function_ref< void(StringRef::iterator, const Twine &)> ErrorCallback)
Consume a single machine instruction token in the given source and return the remaining source string...
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:414
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE const char * data() const
data - Get a pointer to the start of the string (which may not be null terminated).
Definition: StringRef.h:128
static MachineOperand CreateIntrinsicID(Intrinsic::ID ID)
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1488
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false, bool isRenamable=false)
static MCCFIInstruction createUndefined(MCSymbol *L, unsigned Register)
.cfi_undefined From now on the previous value of Register can&#39;t be restored anymore.
Definition: MCDwarf.h:454
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition: DenseMap.h:191
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
1 0 0 1 True if unordered or equal
Definition: InstrTypes.h:864
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:863
std::map< unsigned, TrackingMDNodeRef > MetadataNodes
Definition: SlotMapping.h:35
A description of a memory reference used in the backend.
std::string toString(Error E)
Write all error messages (if any) in E to a string.
Definition: Error.h:947
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
const HexagonInstrInfo * TII
static const BasicBlock * getIRBlockFromSlot(unsigned Slot, const DenseMap< unsigned, const BasicBlock *> &Slots2BasicBlocks)
Definition: MIParser.cpp:2553
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
support::ulittle32_t Word
Definition: IRSymtab.h:51
unsigned SubReg
static constexpr LaneBitmask getAll()
Definition: LaneBitmask.h:84
Reg
All possible values of the reg field in the ModR/M byte.
0 1 0 1 True if ordered and less than or equal
Definition: InstrTypes.h:860
const Name2RegBankMap & Names2RegBanks
Definition: MIParser.h:55
The memory access is dereferenceable (i.e., doesn&#39;t trap).
static MachineOperand CreateRegMask(const uint32_t *Mask)
CreateRegMask - Creates a register mask operand referencing Mask.
static MachineOperand CreateRegLiveOut(const uint32_t *Mask)
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
Definition: regcomp.c:196
This file implements a class to represent arbitrary precision integral constant values and operations...
AtomicOrdering
Atomic ordering for LLVM&#39;s memory model.
DenseMap< unsigned, int > FixedStackObjectSlots
Definition: MIParser.h:59
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:878
LLVM_ATTRIBUTE_ALWAYS_INLINE StringSwitch & Case(const char(&S)[N], const T &Value)
Definition: StringSwitch.h:74
const MemoryBuffer * getMemoryBuffer(unsigned i) const
Definition: SourceMgr.h:104
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:245
PseudoSourceValueManager & getPSVManager() const
virtual unsigned lookupName(const char *Name, unsigned Len) const =0
Look up target intrinsic by name.
GlobalValue * getNamedValue(StringRef Name) const
Return the global value in the module with the specified name, of arbitrary type. ...
Definition: Module.cpp:112
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
const char * getSubRegIndexName(unsigned SubIdx) const
Return the human-readable symbolic target-specific name for the specified SubRegIndex.
virtual const TargetInstrInfo * getInstrInfo() const
static LLT scalar(unsigned SizeInBits)
Get a low-level scalar or aggregate "bag of bits".
bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS, VRegInfo *&Info, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2724
static MachineOperand CreatePredicate(unsigned Pred)
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const PseudoSourceValue * getFixedStack(int FI)
Return a pseudo source value referencing a fixed stack frame entry, e.g., a spill slot...
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
void normalizeSuccProbs()
Normalize probabilities of all successors so that the sum of them becomes one.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
const char * getName(unsigned RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:121
iterator find(const_arg_type_t< KeyT > Val)
Definition: DenseMap.h:146
unsigned getMainFileID() const
Definition: SourceMgr.h:113
bool isIdenticalTo(const MachineOperand &Other) const
Returns true if this operand is identical to the specified operand except for liveness related flags ...
Synchronized with respect to all concurrently executing threads.
Definition: LLVMContext.h:59
VRegInfo & getVRegInfo(unsigned VReg)
Definition: MIParser.cpp:90
The memory access is volatile.
static MCCFIInstruction createSameValue(MCSymbol *L, unsigned Register)
.cfi_same_value Current value of Register is the same as in the previous frame.
Definition: MCDwarf.h:460
static MDTuple * get(LLVMContext &Context, ArrayRef< Metadata *> MDs)
Definition: Metadata.h:1164
A switch()-like statement whose cases are string literals.
Definition: StringSwitch.h:43
bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2730
const MCPhysReg * getImplicitDefs() const
Return a list of registers that are potentially written by any instance of this machine instruction...
Definition: MCInstrDesc.h:534
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
unsigned const MachineRegisterInfo * MRI
StringRef getName() const
Return the name of the corresponding LLVM basic block, or an empty string.
static const char * printImplicitRegisterFlag(const MachineOperand &MO)
Definition: MIParser.cpp:873
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:393
static Intrinsic::ID lookupIntrinsicID(StringRef Name)
This does the actual lookup of an intrinsic ID which matches the given function name.
Definition: Function.cpp:514
static MachineOperand CreateCPI(unsigned Idx, int Offset, unsigned char TargetFlags=0)
bool hasName() const
Definition: Value.h:251
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
const PseudoSourceValue * getExternalSymbolCallEntry(const char *ES)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:400
static BlockAddress * get(Function *F, BasicBlock *BB)
Return a BlockAddress for the specified function and basic block.
Definition: Constants.cpp:1375
static MachineOperand CreateFPImm(const ConstantFP *CFP)
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:149
static MCCFIInstruction createWindowSave(MCSymbol *L)
.cfi_window_save SPARC register window is saved.
Definition: MCDwarf.h:441
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:116
This file contains the declarations for the subclasses of Constant, which represent the different fla...
bool isPointerTy() const
True if this is an instance of PointerType.
Definition: Type.h:221
unsigned getOperationEncoding(StringRef OperationEncodingString)
Definition: Dwarf.cpp:151
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:173
void setType(unsigned VReg, LLT Ty)
Set the low-level type of VReg to Ty.
BumpPtrAllocator Allocator
Definition: MIParser.h:50
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2718
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:188
unsigned createIncompleteVirtualRegister()
Creates a new virtual register that has no register class, register bank or size assigned yet...
bool isValid() const
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:853
static const unsigned End
static MCCFIInstruction createRelOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_rel_offset Previous value of Register is saved at offset Offset from the current CFA register...
Definition: MCDwarf.h:428
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register)
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
Definition: MCDwarf.h:448
0 1 1 1 True if ordered (no nans)
Definition: InstrTypes.h:862
The memory access is non-temporal.
MachineFunction & MF
Definition: MIParser.h:51
std::vector< GlobalValue * > GlobalValues
Definition: SlotMapping.h:34
This owns the files read by a parser, handles include stacks, and handles diagnostic wrangling...
Definition: SourceMgr.h:41
void setOffset(int64_t Offset)
1 1 1 1 Always true (always folded)
Definition: InstrTypes.h:870
LLVMContext & getContext() const
getContext - Return a reference to the LLVMContext associated with this function. ...
Definition: Function.cpp:194
void incorporateFunction(const Function &F)
Incorporate the given function.
Definition: AsmWriter.cpp:761
const SlotMapping & IRSlots
Definition: MIParser.h:53
uint32_t * allocateRegisterMask(unsigned NumRegister)
Allocate and initialize a register mask with NumRegister bits.
static MCCFIInstruction createRestoreState(MCSymbol *L)
.cfi_restore_state Restore the previously saved state.
Definition: MCDwarf.h:470
const AMDGPUAS & AS
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
1 1 0 1 True if unordered, less than, or equal
Definition: InstrTypes.h:868
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
SMDiagnostic GetMessage(SMLoc Loc, DiagKind Kind, const Twine &Msg, ArrayRef< SMRange > Ranges=None, ArrayRef< SMFixIt > FixIts=None) const
Return an SMDiagnostic at the specified location with the specified string.
Definition: SourceMgr.cpp:146
LLVM_ATTRIBUTE_ALWAYS_INLINE R Default(const T &Value) const
Definition: StringSwitch.h:244
signed greater than
Definition: InstrTypes.h:880
bool parseMachineInstructions(PerFunctionMIParsingState &PFS, StringRef Src, SMDiagnostic &Error)
Parse the machine instructions.
Definition: MIParser.cpp:2701
TargetIntrinsicInfo - Interface to description of machine instruction set.
Struct that holds a reference to a particular GUID in a global value summary.
The memory access writes data.
0 0 1 0 True if ordered and greater than
Definition: InstrTypes.h:857
const Name2RegClassMap & Names2RegClasses
Definition: MIParser.h:54
static MachineOperand CreateMetadata(const MDNode *Meta)
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
void setFlags(unsigned flags)
Definition: MachineInstr.h:192
enum llvm::VRegInfo::uint8_t Kind
MachineOperand class - Representation of each machine instruction operand.
1 1 0 0 True if unordered or less than
Definition: InstrTypes.h:867
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:862
Module.h This file contains the declarations for the Module class.
static bool isImplicitOperandIn(const MachineOperand &ImplicitOperand, ArrayRef< ParsedMachineOperand > Operands)
Return true if the parsed machine operands contain a given machine operand.
Definition: MIParser.cpp:885
StringRef getMessage() const
Definition: SourceMgr.h:264
signed less than
Definition: InstrTypes.h:882
A collection of metadata nodes that might be associated with a memory access used by the alias-analys...
Definition: Metadata.h:642
MDNode * NoAlias
The tag specifying the noalias scope.
Definition: Metadata.h:662
This class implements the register bank concept.
Definition: RegisterBank.h:29
const Function & getFunction() const
Return the LLVM function that this machine code represents.
This interface provides simple read-only access to a block of memory, and provides simple methods for...
Definition: MemoryBuffer.h:41
ValueSymbolTable * getValueSymbolTable()
getSymbolTable() - Return the symbol table if any, otherwise nullptr.
Definition: Function.h:626
bool isIntPredicate() const
Definition: InstrTypes.h:945
signed less or equal
Definition: InstrTypes.h:883
StringMap - This is an unconventional map that is specialized for handling keys that are "strings"...
Definition: StringMap.h:222
Class for arbitrary precision integers.
Definition: APInt.h:69
Special value supplied for machine level alias analysis.
const PseudoSourceValue * getJumpTable()
Return a pseudo source value referencing a jump table.
const PseudoSourceValue * getGlobalValueCallEntry(const GlobalValue *GV)
static MachineOperand CreateES(const char *SymName, unsigned char TargetFlags=0)
const PseudoSourceValue * getGOT()
Return a pseudo source value referencing the global offset table (or something the like)...
This struct contains the mappings from the slot numbers to unnamed metadata nodes, global values and types.
Definition: SlotMapping.h:33
bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2736
static SMLoc getFromPointer(const char *Ptr)
Definition: SMLoc.h:37
Flags
Flags values. These may be or&#39;d together.
amdgpu Simplify well known AMD library false Value Value * Arg
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
bool Explicit
VReg was explicitly specified in the .mir file.
Definition: MIParser.h:37
Representation of each machine instruction.
Definition: MachineInstr.h:60
const AllocaInst * getObjectAllocation(int ObjectIdx) const
Return the underlying Alloca of the specified stack object if it exists.
static bool isPhysicalRegister(unsigned Reg)
Return true if the specified register number is in the physical register namespace.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
Definition: SmallVector.h:120
const char * getBufferEnd() const
Definition: MemoryBuffer.h:60
int getColumnNo() const
Definition: SourceMgr.h:262
static MachineOperand CreateMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:61
unsigned greater or equal
Definition: InstrTypes.h:877
const MCInstrDesc & get(unsigned Opcode) const
Return the machine instruction descriptor that corresponds to the specified instruction opcode...
Definition: MCInstrInfo.h:45
virtual const TargetIntrinsicInfo * getIntrinsicInfo() const
If intrinsic information is available, return it. If not, return null.
static MachineOperand CreateCFIIndex(unsigned CFIIndex)
unsigned VReg
Definition: MIParser.h:42
static MachineOperand CreateImm(int64_t Val)
#define I(x, y, z)
Definition: MD5.cpp:58
The memory access always returns the same value (or traps).
iterator end()
Definition: DenseMap.h:79
LLT getType(unsigned VReg) const
Get the low-level type of VReg or LLT{} if VReg is not a generic (target independent) virtual registe...
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:251
0 1 1 0 True if ordered and operands are unequal
Definition: InstrTypes.h:861
DenseMap< unsigned, MachineBasicBlock * > MBBSlots
Definition: MIParser.h:57
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
unsigned getNumSubRegIndices() const
Return the number of sub-register indices understood by the target.
1 0 1 0 True if unordered or greater than
Definition: InstrTypes.h:865
const char * getBufferStart() const
Definition: MemoryBuffer.h:59
Value * lookup(StringRef Name) const
This method finds the value with the given Name in the the symbol table.
std::string str() const
Return the twine contents as a std::string.
Definition: Twine.cpp:17
bool isReg() const
isReg - Tests if this is a MO_Register operand.
const unsigned Kind
const PseudoSourceValue * getStack()
Return a pseudo source value referencing the area below the stack frame of a function, e.g., the argument space.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void insert(iterator MBBI, MachineBasicBlock *MBB)
union llvm::VRegInfo::@315 D
0 0 0 1 True if ordered and equal
Definition: InstrTypes.h:856
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
LLVM Value Representation.
Definition: Value.h:73
static LLT pointer(uint16_t AddressSpace, unsigned SizeInBits)
Get a low-level pointer in the given address space (defaulting to 0).
A token produced by the machine instruction lexer.
Definition: MILexer.h:28
1 0 1 1 True if unordered, greater than, or equal
Definition: InstrTypes.h:866
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
Lightweight error class with error context and mandatory checking.
Definition: Error.h:156
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
IRTranslator LLVM IR MI
unsigned greater than
Definition: InstrTypes.h:876
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
static LLT vector(uint16_t NumElements, unsigned ScalarSizeInBits)
Get a low-level vector of some number of elements and element width.
const RegisterBank * RegBank
Definition: MIParser.h:40
Represents a location in source code.
Definition: SMLoc.h:24
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals)
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
Definition: MCDwarf.h:476
OutputIt copy(R &&Range, OutputIt Out)
Definition: STLExtras.h:866
bool parseRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg, StringRef Src, SMDiagnostic &Error)
Definition: MIParser.cpp:2712
0 0 1 1 True if ordered and greater than or equal
Definition: InstrTypes.h:858
static void mapValueToSlot(const Value *V, ModuleSlotTracker &MST, DenseMap< unsigned, const Value *> &Slots2Values)
Definition: MIParser.cpp:2576
static void initSlots2Values(const Function &F, DenseMap< unsigned, const Value *> &Slots2Values)
Creates the mapping from slot numbers to function&#39;s unnamed IR values.
Definition: MIParser.cpp:2585
MachineInstr::mmo_iterator allocateMemRefsArray(unsigned long Num)
allocateMemRefsArray - Allocate an array to hold MachineMemOperand pointers.
static MachineOperand CreateFI(int Idx)
const PseudoSourceValue * getConstantPool()
Return a pseudo source value referencing the constant pool.
void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd)
Assign this MachineInstr&#39;s memory reference descriptor list.
iterator end()
Definition: StringMap.h:320
void guessSuccessors(const MachineBasicBlock &MBB, SmallVectorImpl< MachineBasicBlock *> &Successors, bool &IsFallthrough)
Determine a possible list of successors of a basic block based on the basic block machine operand bei...
Definition: MIRPrinter.cpp:489
static MCCFIInstruction createRegister(MCSymbol *L, unsigned Register1, unsigned Register2)
.cfi_register Previous value of Register1 is saved in register Register2.
Definition: MCDwarf.h:435
iterator_range< arg_iterator > args()
Definition: Function.h:667
0 0 0 0 Always false (always folded)
Definition: InstrTypes.h:855
signed greater or equal
Definition: InstrTypes.h:881
bool empty() const
empty - Check if the array is empty.
Definition: ArrayRef.h:144
const MCPhysReg * ImplicitUses
Definition: MCInstrDesc.h:172
bool isImplicit() const
Instances of this class encapsulate one diagnostic report, allowing printing to a raw_ostream as a ca...
Definition: SourceMgr.h:233
PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM, const SlotMapping &IRSlots, const Name2RegClassMap &Names2RegClasses, const Name2RegBankMap &Names2RegBanks)
Definition: MIParser.cpp:82
void tieOperands(unsigned DefIdx, unsigned UseIdx)
Add a tie between the register operands at DefIdx and UseIdx.