LLVM  7.0.0svn
X86FrameLowering.cpp
Go to the documentation of this file.
1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the X86 implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "X86TargetMachine.h"
20 #include "llvm/ADT/SmallSet.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
32 #include "llvm/Support/Debug.h"
34 #include <cstdlib>
35 
36 using namespace llvm;
37 
39  unsigned StackAlignOverride)
40  : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
41  STI.is64Bit() ? -8 : -4),
42  STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
43  // Cache a bunch of frame-related predicates for this subtarget.
45  Is64Bit = STI.is64Bit();
46  IsLP64 = STI.isTarget64BitLP64();
47  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
50 }
51 
53  return !MF.getFrameInfo().hasVarSizedObjects() &&
54  !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
55 }
56 
57 /// canSimplifyCallFramePseudos - If there is a reserved call frame, the
58 /// call frame pseudos can be simplified. Having a FP, as in the default
59 /// implementation, is not sufficient here since we can't always use it.
60 /// Use a more nuanced condition.
61 bool
63  return hasReservedCallFrame(MF) ||
64  (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
65  TRI->hasBasePointer(MF);
66 }
67 
68 // needsFrameIndexResolution - Do we need to perform FI resolution for
69 // this function. Normally, this is required only when the function
70 // has any stack objects. However, FI resolution actually has another job,
71 // not apparent from the title - it resolves callframesetup/destroy
72 // that were not simplified earlier.
73 // So, this is required for x86 functions that have push sequences even
74 // when there are no stack objects.
75 bool
77  return MF.getFrameInfo().hasStackObjects() ||
78  MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
79 }
80 
81 /// hasFP - Return true if the specified function should have a dedicated frame
82 /// pointer register. This is true if the function has variable sized allocas
83 /// or if frame pointer elimination is disabled.
85  const MachineFrameInfo &MFI = MF.getFrameInfo();
86  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
87  TRI->needsStackRealignment(MF) ||
88  MFI.hasVarSizedObjects() ||
90  MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
91  MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
92  MFI.hasStackMap() || MFI.hasPatchPoint() ||
94 }
95 
96 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
97  if (IsLP64) {
98  if (isInt<8>(Imm))
99  return X86::SUB64ri8;
100  return X86::SUB64ri32;
101  } else {
102  if (isInt<8>(Imm))
103  return X86::SUB32ri8;
104  return X86::SUB32ri;
105  }
106 }
107 
108 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
109  if (IsLP64) {
110  if (isInt<8>(Imm))
111  return X86::ADD64ri8;
112  return X86::ADD64ri32;
113  } else {
114  if (isInt<8>(Imm))
115  return X86::ADD32ri8;
116  return X86::ADD32ri;
117  }
118 }
119 
120 static unsigned getSUBrrOpcode(unsigned isLP64) {
121  return isLP64 ? X86::SUB64rr : X86::SUB32rr;
122 }
123 
124 static unsigned getADDrrOpcode(unsigned isLP64) {
125  return isLP64 ? X86::ADD64rr : X86::ADD32rr;
126 }
127 
128 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
129  if (IsLP64) {
130  if (isInt<8>(Imm))
131  return X86::AND64ri8;
132  return X86::AND64ri32;
133  }
134  if (isInt<8>(Imm))
135  return X86::AND32ri8;
136  return X86::AND32ri;
137 }
138 
139 static unsigned getLEArOpcode(unsigned IsLP64) {
140  return IsLP64 ? X86::LEA64r : X86::LEA32r;
141 }
142 
143 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
144 /// when it reaches the "return" instruction. We can then pop a stack object
145 /// to this register without worry about clobbering it.
148  const X86RegisterInfo *TRI,
149  bool Is64Bit) {
150  const MachineFunction *MF = MBB.getParent();
151  if (MF->callsEHReturn())
152  return 0;
153 
154  const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF);
155 
156  if (MBBI == MBB.end())
157  return 0;
158 
159  switch (MBBI->getOpcode()) {
160  default: return 0;
161  case TargetOpcode::PATCHABLE_RET:
162  case X86::RET:
163  case X86::RETL:
164  case X86::RETQ:
165  case X86::RETIL:
166  case X86::RETIQ:
167  case X86::TCRETURNdi:
168  case X86::TCRETURNri:
169  case X86::TCRETURNmi:
170  case X86::TCRETURNdi64:
171  case X86::TCRETURNri64:
172  case X86::TCRETURNmi64:
173  case X86::EH_RETURN:
174  case X86::EH_RETURN64: {
176  for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
177  MachineOperand &MO = MBBI->getOperand(i);
178  if (!MO.isReg() || MO.isDef())
179  continue;
180  unsigned Reg = MO.getReg();
181  if (!Reg)
182  continue;
183  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
184  Uses.insert(*AI);
185  }
186 
187  for (auto CS : AvailableRegs)
188  if (!Uses.count(CS) && CS != X86::RIP)
189  return CS;
190  }
191  }
192 
193  return 0;
194 }
195 
196 static bool isEAXLiveIn(MachineBasicBlock &MBB) {
197  for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) {
198  unsigned Reg = RegMask.PhysReg;
199 
200  if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
201  Reg == X86::AH || Reg == X86::AL)
202  return true;
203  }
204 
205  return false;
206 }
207 
208 /// Check if the flags need to be preserved before the terminators.
209 /// This would be the case, if the eflags is live-in of the region
210 /// composed by the terminators or live-out of that region, without
211 /// being defined by a terminator.
212 static bool
214  for (const MachineInstr &MI : MBB.terminators()) {
215  bool BreakNext = false;
216  for (const MachineOperand &MO : MI.operands()) {
217  if (!MO.isReg())
218  continue;
219  unsigned Reg = MO.getReg();
220  if (Reg != X86::EFLAGS)
221  continue;
222 
223  // This terminator needs an eflags that is not defined
224  // by a previous another terminator:
225  // EFLAGS is live-in of the region composed by the terminators.
226  if (!MO.isDef())
227  return true;
228  // This terminator defines the eflags, i.e., we don't need to preserve it.
229  // However, we still need to check this specific terminator does not
230  // read a live-in value.
231  BreakNext = true;
232  }
233  // We found a definition of the eflags, no need to preserve them.
234  if (BreakNext)
235  return false;
236  }
237 
238  // None of the terminators use or define the eflags.
239  // Check if they are live-out, that would imply we need to preserve them.
240  for (const MachineBasicBlock *Succ : MBB.successors())
241  if (Succ->isLiveIn(X86::EFLAGS))
242  return true;
243 
244  return false;
245 }
246 
247 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
248 /// stack pointer by a constant value.
251  int64_t NumBytes, bool InEpilogue) const {
252  bool isSub = NumBytes < 0;
253  uint64_t Offset = isSub ? -NumBytes : NumBytes;
256 
257  uint64_t Chunk = (1LL << 31) - 1;
258  DebugLoc DL = MBB.findDebugLoc(MBBI);
259 
260  if (Offset > Chunk) {
261  // Rather than emit a long series of instructions for large offsets,
262  // load the offset into a register and do one sub/add
263  unsigned Reg = 0;
264  unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
265 
266  if (isSub && !isEAXLiveIn(MBB))
267  Reg = Rax;
268  else
269  Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
270 
271  unsigned MovRIOpc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
272  unsigned AddSubRROpc =
274  if (Reg) {
275  BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg)
276  .addImm(Offset)
277  .setMIFlag(Flag);
278  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr)
279  .addReg(StackPtr)
280  .addReg(Reg);
281  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
282  return;
283  } else if (Offset > 8 * Chunk) {
284  // If we would need more than 8 add or sub instructions (a >16GB stack
285  // frame), it's worth spilling RAX to materialize this immediate.
286  // pushq %rax
287  // movabsq +-$Offset+-SlotSize, %rax
288  // addq %rsp, %rax
289  // xchg %rax, (%rsp)
290  // movq (%rsp), %rsp
291  assert(Is64Bit && "can't have 32-bit 16GB stack frame");
292  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
293  .addReg(Rax, RegState::Kill)
294  .setMIFlag(Flag);
295  // Subtract is not commutative, so negate the offset and always use add.
296  // Subtract 8 less and add 8 more to account for the PUSH we just did.
297  if (isSub)
298  Offset = -(Offset - SlotSize);
299  else
300  Offset = Offset + SlotSize;
301  BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax)
302  .addImm(Offset)
303  .setMIFlag(Flag);
304  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax)
305  .addReg(Rax)
306  .addReg(StackPtr);
307  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
308  // Exchange the new SP in RAX with the top of the stack.
309  addRegOffset(
310  BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax),
311  StackPtr, false, 0);
312  // Load new SP from the top of the stack into RSP.
313  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),
314  StackPtr, false, 0);
315  return;
316  }
317  }
318 
319  while (Offset) {
320  uint64_t ThisVal = std::min(Offset, Chunk);
321  if (ThisVal == SlotSize) {
322  // Use push / pop for slot sized adjustments as a size optimization. We
323  // need to find a dead register when using pop.
324  unsigned Reg = isSub
325  ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
326  : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
327  if (Reg) {
328  unsigned Opc = isSub
329  ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
330  : (Is64Bit ? X86::POP64r : X86::POP32r);
331  BuildMI(MBB, MBBI, DL, TII.get(Opc))
332  .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))
333  .setMIFlag(Flag);
334  Offset -= ThisVal;
335  continue;
336  }
337  }
338 
339  BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue)
340  .setMIFlag(Flag);
341 
342  Offset -= ThisVal;
343  }
344 }
345 
346 MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
348  const DebugLoc &DL, int64_t Offset, bool InEpilogue) const {
349  assert(Offset != 0 && "zero offset stack adjustment requested");
350 
351  // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue
352  // is tricky.
353  bool UseLEA;
354  if (!InEpilogue) {
355  // Check if inserting the prologue at the beginning
356  // of MBB would require to use LEA operations.
357  // We need to use LEA operations if EFLAGS is live in, because
358  // it means an instruction will read it before it gets defined.
359  UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);
360  } else {
361  // If we can use LEA for SP but we shouldn't, check that none
362  // of the terminators uses the eflags. Otherwise we will insert
363  // a ADD that will redefine the eflags and break the condition.
364  // Alternatively, we could move the ADD, but this may not be possible
365  // and is an optimization anyway.
366  UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent());
367  if (UseLEA && !STI.useLeaForSP())
369  // If that assert breaks, that means we do not do the right thing
370  // in canUseAsEpilogue.
372  "We shouldn't have allowed this insertion point");
373  }
374 
376  if (UseLEA) {
377  MI = addRegOffset(BuildMI(MBB, MBBI, DL,
379  StackPtr),
380  StackPtr, false, Offset);
381  } else {
382  bool IsSub = Offset < 0;
383  uint64_t AbsOffset = IsSub ? -Offset : Offset;
384  unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset)
385  : getADDriOpcode(Uses64BitFramePtr, AbsOffset);
386  MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
387  .addReg(StackPtr)
388  .addImm(AbsOffset);
389  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
390  }
391  return MI;
392 }
393 
396  bool doMergeWithPrevious) const {
397  if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
398  (!doMergeWithPrevious && MBBI == MBB.end()))
399  return 0;
400 
401  MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
402  MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr
403  : std::next(MBBI);
404  PI = skipDebugInstructionsBackward(PI, MBB.begin());
405  if (NI != nullptr)
406  NI = skipDebugInstructionsForward(NI, MBB.end());
407 
408  unsigned Opc = PI->getOpcode();
409  int Offset = 0;
410 
411  if (!doMergeWithPrevious && NI != MBB.end() &&
412  NI->getOpcode() == TargetOpcode::CFI_INSTRUCTION) {
413  // Don't merge with the next instruction if it has CFI.
414  return Offset;
415  }
416 
417  if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
418  Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
419  PI->getOperand(0).getReg() == StackPtr){
420  assert(PI->getOperand(1).getReg() == StackPtr);
421  Offset += PI->getOperand(2).getImm();
422  MBB.erase(PI);
423  if (!doMergeWithPrevious) MBBI = NI;
424  } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
425  PI->getOperand(0).getReg() == StackPtr &&
426  PI->getOperand(1).getReg() == StackPtr &&
427  PI->getOperand(2).getImm() == 1 &&
428  PI->getOperand(3).getReg() == X86::NoRegister &&
429  PI->getOperand(5).getReg() == X86::NoRegister) {
430  // For LEAs we have: def = lea SP, FI, noreg, Offset, noreg.
431  Offset += PI->getOperand(4).getImm();
432  MBB.erase(PI);
433  if (!doMergeWithPrevious) MBBI = NI;
434  } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
435  Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
436  PI->getOperand(0).getReg() == StackPtr) {
437  assert(PI->getOperand(1).getReg() == StackPtr);
438  Offset -= PI->getOperand(2).getImm();
439  MBB.erase(PI);
440  if (!doMergeWithPrevious) MBBI = NI;
441  }
442 
443  return Offset;
444 }
445 
448  const DebugLoc &DL,
449  const MCCFIInstruction &CFIInst) const {
450  MachineFunction &MF = *MBB.getParent();
451  unsigned CFIIndex = MF.addFrameInst(CFIInst);
452  BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
453  .addCFIIndex(CFIIndex);
454 }
455 
458  const DebugLoc &DL) const {
459  MachineFunction &MF = *MBB.getParent();
460  MachineFrameInfo &MFI = MF.getFrameInfo();
461  MachineModuleInfo &MMI = MF.getMMI();
462  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
463 
464  // Add callee saved registers to move list.
465  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
466  if (CSI.empty()) return;
467 
468  // Calculate offsets.
469  for (std::vector<CalleeSavedInfo>::const_iterator
470  I = CSI.begin(), E = CSI.end(); I != E; ++I) {
471  int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
472  unsigned Reg = I->getReg();
473 
474  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
475  BuildCFI(MBB, MBBI, DL,
476  MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
477  }
478 }
479 
481  MachineBasicBlock &MBB,
483  const DebugLoc &DL, bool InProlog) const {
484  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
485  if (STI.isTargetWindowsCoreCLR()) {
486  if (InProlog) {
487  emitStackProbeInlineStub(MF, MBB, MBBI, DL, true);
488  } else {
489  emitStackProbeInline(MF, MBB, MBBI, DL, false);
490  }
491  } else {
492  emitStackProbeCall(MF, MBB, MBBI, DL, InProlog);
493  }
494 }
495 
497  MachineBasicBlock &PrologMBB) const {
498  const StringRef ChkStkStubSymbol = "__chkstk_stub";
499  MachineInstr *ChkStkStub = nullptr;
500 
501  for (MachineInstr &MI : PrologMBB) {
502  if (MI.isCall() && MI.getOperand(0).isSymbol() &&
503  ChkStkStubSymbol == MI.getOperand(0).getSymbolName()) {
504  ChkStkStub = &MI;
505  break;
506  }
507  }
508 
509  if (ChkStkStub != nullptr) {
510  assert(!ChkStkStub->isBundled() &&
511  "Not expecting bundled instructions here");
512  MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
513  assert(std::prev(MBBI) == ChkStkStub &&
514  "MBBI expected after __chkstk_stub.");
515  DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
516  emitStackProbeInline(MF, PrologMBB, MBBI, DL, true);
517  ChkStkStub->eraseFromParent();
518  }
519 }
520 
521 void X86FrameLowering::emitStackProbeInline(MachineFunction &MF,
522  MachineBasicBlock &MBB,
524  const DebugLoc &DL,
525  bool InProlog) const {
526  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
527  assert(STI.is64Bit() && "different expansion needed for 32 bit");
528  assert(STI.isTargetWindowsCoreCLR() && "custom expansion expects CoreCLR");
529  const TargetInstrInfo &TII = *STI.getInstrInfo();
530  const BasicBlock *LLVM_BB = MBB.getBasicBlock();
531 
532  // RAX contains the number of bytes of desired stack adjustment.
533  // The handling here assumes this value has already been updated so as to
534  // maintain stack alignment.
535  //
536  // We need to exit with RSP modified by this amount and execute suitable
537  // page touches to notify the OS that we're growing the stack responsibly.
538  // All stack probing must be done without modifying RSP.
539  //
540  // MBB:
541  // SizeReg = RAX;
542  // ZeroReg = 0
543  // CopyReg = RSP
544  // Flags, TestReg = CopyReg - SizeReg
545  // FinalReg = !Flags.Ovf ? TestReg : ZeroReg
546  // LimitReg = gs magic thread env access
547  // if FinalReg >= LimitReg goto ContinueMBB
548  // RoundBB:
549  // RoundReg = page address of FinalReg
550  // LoopMBB:
551  // LoopReg = PHI(LimitReg,ProbeReg)
552  // ProbeReg = LoopReg - PageSize
553  // [ProbeReg] = 0
554  // if (ProbeReg > RoundReg) goto LoopMBB
555  // ContinueMBB:
556  // RSP = RSP - RAX
557  // [rest of original MBB]
558 
559  // Set up the new basic blocks
560  MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB);
561  MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB);
562  MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB);
563 
564  MachineFunction::iterator MBBIter = std::next(MBB.getIterator());
565  MF.insert(MBBIter, RoundMBB);
566  MF.insert(MBBIter, LoopMBB);
567  MF.insert(MBBIter, ContinueMBB);
568 
569  // Split MBB and move the tail portion down to ContinueMBB.
570  MachineBasicBlock::iterator BeforeMBBI = std::prev(MBBI);
571  ContinueMBB->splice(ContinueMBB->begin(), &MBB, MBBI, MBB.end());
572  ContinueMBB->transferSuccessorsAndUpdatePHIs(&MBB);
573 
574  // Some useful constants
575  const int64_t ThreadEnvironmentStackLimit = 0x10;
576  const int64_t PageSize = 0x1000;
577  const int64_t PageMask = ~(PageSize - 1);
578 
579  // Registers we need. For the normal case we use virtual
580  // registers. For the prolog expansion we use RAX, RCX and RDX.
582  const TargetRegisterClass *RegClass = &X86::GR64RegClass;
583  const unsigned SizeReg = InProlog ? (unsigned)X86::RAX
584  : MRI.createVirtualRegister(RegClass),
585  ZeroReg = InProlog ? (unsigned)X86::RCX
586  : MRI.createVirtualRegister(RegClass),
587  CopyReg = InProlog ? (unsigned)X86::RDX
588  : MRI.createVirtualRegister(RegClass),
589  TestReg = InProlog ? (unsigned)X86::RDX
590  : MRI.createVirtualRegister(RegClass),
591  FinalReg = InProlog ? (unsigned)X86::RDX
592  : MRI.createVirtualRegister(RegClass),
593  RoundedReg = InProlog ? (unsigned)X86::RDX
594  : MRI.createVirtualRegister(RegClass),
595  LimitReg = InProlog ? (unsigned)X86::RCX
596  : MRI.createVirtualRegister(RegClass),
597  JoinReg = InProlog ? (unsigned)X86::RCX
598  : MRI.createVirtualRegister(RegClass),
599  ProbeReg = InProlog ? (unsigned)X86::RCX
600  : MRI.createVirtualRegister(RegClass);
601 
602  // SP-relative offsets where we can save RCX and RDX.
603  int64_t RCXShadowSlot = 0;
604  int64_t RDXShadowSlot = 0;
605 
606  // If inlining in the prolog, save RCX and RDX.
607  // Future optimization: don't save or restore if not live in.
608  if (InProlog) {
609  // Compute the offsets. We need to account for things already
610  // pushed onto the stack at this point: return address, frame
611  // pointer (if used), and callee saves.
613  const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize();
614  const bool HasFP = hasFP(MF);
615  RCXShadowSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0);
616  RDXShadowSlot = RCXShadowSlot + 8;
617  // Emit the saves.
618  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
619  RCXShadowSlot)
620  .addReg(X86::RCX);
621  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
622  RDXShadowSlot)
623  .addReg(X86::RDX);
624  } else {
625  // Not in the prolog. Copy RAX to a virtual reg.
626  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX);
627  }
628 
629  // Add code to MBB to check for overflow and set the new target stack pointer
630  // to zero if so.
631  BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)
632  .addReg(ZeroReg, RegState::Undef)
633  .addReg(ZeroReg, RegState::Undef);
634  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);
635  BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)
636  .addReg(CopyReg)
637  .addReg(SizeReg);
638  BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg)
639  .addReg(TestReg)
640  .addReg(ZeroReg);
641 
642  // FinalReg now holds final stack pointer value, or zero if
643  // allocation would overflow. Compare against the current stack
644  // limit from the thread environment block. Note this limit is the
645  // lowest touched page on the stack, not the point at which the OS
646  // will cause an overflow exception, so this is just an optimization
647  // to avoid unnecessarily touching pages that are below the current
648  // SP but already committed to the stack by the OS.
649  BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg)
650  .addReg(0)
651  .addImm(1)
652  .addReg(0)
653  .addImm(ThreadEnvironmentStackLimit)
654  .addReg(X86::GS);
655  BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg);
656  // Jump if the desired stack pointer is at or above the stack limit.
657  BuildMI(&MBB, DL, TII.get(X86::JAE_1)).addMBB(ContinueMBB);
658 
659  // Add code to roundMBB to round the final stack pointer to a page boundary.
660  BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)
661  .addReg(FinalReg)
662  .addImm(PageMask);
663  BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB);
664 
665  // LimitReg now holds the current stack limit, RoundedReg page-rounded
666  // final RSP value. Add code to loopMBB to decrement LimitReg page-by-page
667  // and probe until we reach RoundedReg.
668  if (!InProlog) {
669  BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg)
670  .addReg(LimitReg)
671  .addMBB(RoundMBB)
672  .addReg(ProbeReg)
673  .addMBB(LoopMBB);
674  }
675 
676  addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,
677  false, -PageSize);
678 
679  // Probe by storing a byte onto the stack.
680  BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi))
681  .addReg(ProbeReg)
682  .addImm(1)
683  .addReg(0)
684  .addImm(0)
685  .addReg(0)
686  .addImm(0);
687  BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))
688  .addReg(RoundedReg)
689  .addReg(ProbeReg);
690  BuildMI(LoopMBB, DL, TII.get(X86::JNE_1)).addMBB(LoopMBB);
691 
692  MachineBasicBlock::iterator ContinueMBBI = ContinueMBB->getFirstNonPHI();
693 
694  // If in prolog, restore RDX and RCX.
695  if (InProlog) {
696  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
697  X86::RCX),
698  X86::RSP, false, RCXShadowSlot);
699  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
700  X86::RDX),
701  X86::RSP, false, RDXShadowSlot);
702  }
703 
704  // Now that the probing is done, add code to continueMBB to update
705  // the stack pointer for real.
706  BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
707  .addReg(X86::RSP)
708  .addReg(SizeReg);
709 
710  // Add the control flow edges we need.
711  MBB.addSuccessor(ContinueMBB);
712  MBB.addSuccessor(RoundMBB);
713  RoundMBB->addSuccessor(LoopMBB);
714  LoopMBB->addSuccessor(ContinueMBB);
715  LoopMBB->addSuccessor(LoopMBB);
716 
717  // Mark all the instructions added to the prolog as frame setup.
718  if (InProlog) {
719  for (++BeforeMBBI; BeforeMBBI != MBB.end(); ++BeforeMBBI) {
720  BeforeMBBI->setFlag(MachineInstr::FrameSetup);
721  }
722  for (MachineInstr &MI : *RoundMBB) {
723  MI.setFlag(MachineInstr::FrameSetup);
724  }
725  for (MachineInstr &MI : *LoopMBB) {
726  MI.setFlag(MachineInstr::FrameSetup);
727  }
728  for (MachineBasicBlock::iterator CMBBI = ContinueMBB->begin();
729  CMBBI != ContinueMBBI; ++CMBBI) {
730  CMBBI->setFlag(MachineInstr::FrameSetup);
731  }
732  }
733 
734  // Possible TODO: physreg liveness for InProlog case.
735 }
736 
737 void X86FrameLowering::emitStackProbeCall(MachineFunction &MF,
738  MachineBasicBlock &MBB,
740  const DebugLoc &DL,
741  bool InProlog) const {
742  bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
743 
744  unsigned CallOp;
745  if (Is64Bit)
746  CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
747  else
748  CallOp = X86::CALLpcrel32;
749 
751 
753  MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI);
754 
755  // All current stack probes take AX and SP as input, clobber flags, and
756  // preserve all registers. x86_64 probes leave RSP unmodified.
757  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
758  // For the large code model, we have to call through a register. Use R11,
759  // as it is scratch in all supported calling conventions.
760  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
761  .addExternalSymbol(MF.createExternalSymbolName(Symbol));
762  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
763  } else {
764  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp))
765  .addExternalSymbol(MF.createExternalSymbolName(Symbol));
766  }
767 
768  unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
769  unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
770  CI.addReg(AX, RegState::Implicit)
774  .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
775 
776  if (STI.isTargetWin64() || !STI.isOSWindows()) {
777  // MSVC x32's _chkstk and cygwin/mingw's _alloca adjust %esp themselves.
778  // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
779  // themselves. They also does not clobber %rax so we can reuse it when
780  // adjusting %rsp.
781  // All other platforms do not specify a particular ABI for the stack probe
782  // function, so we arbitrarily define it to not adjust %esp/%rsp itself.
783  BuildMI(MBB, MBBI, DL, TII.get(getSUBrrOpcode(Is64Bit)), SP)
784  .addReg(SP)
785  .addReg(AX);
786  }
787 
788  if (InProlog) {
789  // Apply the frame setup flag to all inserted instrs.
790  for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI)
791  ExpansionMBBI->setFlag(MachineInstr::FrameSetup);
792  }
793 }
794 
795 void X86FrameLowering::emitStackProbeInlineStub(
797  MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const {
798 
799  assert(InProlog && "ChkStkStub called outside prolog!");
800 
801  BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32))
802  .addExternalSymbol("__chkstk_stub");
803 }
804 
805 static unsigned calculateSetFPREG(uint64_t SPAdjust) {
806  // Win64 ABI has a less restrictive limitation of 240; 128 works equally well
807  // and might require smaller successive adjustments.
808  const uint64_t Win64MaxSEHOffset = 128;
809  uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
810  // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode.
811  return SEHFrameOffset & -16;
812 }
813 
814 // If we're forcing a stack realignment we can't rely on just the frame
815 // info, we need to know the ABI stack alignment as well in case we
816 // have a call out. Otherwise just make sure we have some alignment - we'll
817 // go with the minimum SlotSize.
818 uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const {
819  const MachineFrameInfo &MFI = MF.getFrameInfo();
820  uint64_t MaxAlign = MFI.getMaxAlignment(); // Desired stack alignment.
821  unsigned StackAlign = getStackAlignment();
822  if (MF.getFunction().hasFnAttribute("stackrealign")) {
823  if (MFI.hasCalls())
824  MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
825  else if (MaxAlign < SlotSize)
826  MaxAlign = SlotSize;
827  }
828  return MaxAlign;
829 }
830 
831 void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
833  const DebugLoc &DL, unsigned Reg,
834  uint64_t MaxAlign) const {
835  uint64_t Val = -MaxAlign;
836  unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
837  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
838  .addReg(Reg)
839  .addImm(Val)
841 
842  // The EFLAGS implicit def is dead.
843  MI->getOperand(3).setIsDead();
844 }
845 
846 /// emitPrologue - Push callee-saved registers onto the stack, which
847 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
848 /// space for local variables. Also emit labels used by the exception handler to
849 /// generate the exception handling frames.
850 
851 /*
852  Here's a gist of what gets emitted:
853 
854  ; Establish frame pointer, if needed
855  [if needs FP]
856  push %rbp
857  .cfi_def_cfa_offset 16
858  .cfi_offset %rbp, -16
859  .seh_pushreg %rpb
860  mov %rsp, %rbp
861  .cfi_def_cfa_register %rbp
862 
863  ; Spill general-purpose registers
864  [for all callee-saved GPRs]
865  pushq %<reg>
866  [if not needs FP]
867  .cfi_def_cfa_offset (offset from RETADDR)
868  .seh_pushreg %<reg>
869 
870  ; If the required stack alignment > default stack alignment
871  ; rsp needs to be re-aligned. This creates a "re-alignment gap"
872  ; of unknown size in the stack frame.
873  [if stack needs re-alignment]
874  and $MASK, %rsp
875 
876  ; Allocate space for locals
877  [if target is Windows and allocated space > 4096 bytes]
878  ; Windows needs special care for allocations larger
879  ; than one page.
880  mov $NNN, %rax
881  call ___chkstk_ms/___chkstk
882  sub %rax, %rsp
883  [else]
884  sub $NNN, %rsp
885 
886  [if needs FP]
887  .seh_stackalloc (size of XMM spill slots)
888  .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
889  [else]
890  .seh_stackalloc NNN
891 
892  ; Spill XMMs
893  ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved,
894  ; they may get spilled on any platform, if the current function
895  ; calls @llvm.eh.unwind.init
896  [if needs FP]
897  [for all callee-saved XMM registers]
898  movaps %<xmm reg>, -MMM(%rbp)
899  [for all callee-saved XMM registers]
900  .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
901  ; i.e. the offset relative to (%rbp - SEHFrameOffset)
902  [else]
903  [for all callee-saved XMM registers]
904  movaps %<xmm reg>, KKK(%rsp)
905  [for all callee-saved XMM registers]
906  .seh_savexmm %<xmm reg>, KKK
907 
908  .seh_endprologue
909 
910  [if needs base pointer]
911  mov %rsp, %rbx
912  [if needs to restore base pointer]
913  mov %rsp, -MMM(%rbp)
914 
915  ; Emit CFI info
916  [if needs FP]
917  [for all callee-saved registers]
918  .cfi_offset %<reg>, (offset from %rbp)
919  [else]
920  .cfi_def_cfa_offset (offset from RETADDR)
921  [for all callee-saved registers]
922  .cfi_offset %<reg>, (offset from %rsp)
923 
924  Notes:
925  - .seh directives are emitted only for Windows 64 ABI
926  - .cv_fpo directives are emitted on win32 when emitting CodeView
927  - .cfi directives are emitted for all other ABIs
928  - for 32-bit code, substitute %e?? registers for %r??
929 */
930 
932  MachineBasicBlock &MBB) const {
933  assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
934  "MF used frame lowering for wrong subtarget");
935  MachineBasicBlock::iterator MBBI = MBB.begin();
936  MachineFrameInfo &MFI = MF.getFrameInfo();
937  const Function &Fn = MF.getFunction();
938  MachineModuleInfo &MMI = MF.getMMI();
940  uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
941  uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate.
942  bool IsFunclet = MBB.isEHFuncletEntry();
944  if (Fn.hasPersonalityFn())
945  Personality = classifyEHPersonality(Fn.getPersonalityFn());
946  bool FnHasClrFunclet =
947  MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
948  bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
949  bool HasFP = hasFP(MF);
950  bool IsWin64CC = STI.isCallingConvWin64(Fn.getCallingConv());
951  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
952  bool NeedsWin64CFI = IsWin64Prologue && Fn.needsUnwindTableEntry();
953  // FIXME: Emit FPO data for EH funclets.
954  bool NeedsWinFPO =
955  !IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag();
956  bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
957  bool NeedsDwarfCFI =
958  !IsWin64Prologue && (MMI.hasDebugInfo() || Fn.needsUnwindTableEntry());
959  unsigned FramePtr = TRI->getFrameRegister(MF);
960  const unsigned MachineFramePtr =
962  ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
963  unsigned BasePtr = TRI->getBaseRegister();
964  bool HasWinCFI = false;
965 
966  // Debug location must be unknown since the first debug location is used
967  // to determine the end of the prologue.
968  DebugLoc DL;
969 
970  // Add RETADDR move area to callee saved frame size.
971  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
972  if (TailCallReturnAddrDelta && IsWin64Prologue)
973  report_fatal_error("Can't handle guaranteed tail call under win64 yet");
974 
975  if (TailCallReturnAddrDelta < 0)
977  X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
978 
979  bool UseStackProbe = !STI.getTargetLowering()->getStackProbeSymbolName(MF).empty();
980 
981  // The default stack probe size is 4096 if the function has no stackprobesize
982  // attribute.
983  unsigned StackProbeSize = 4096;
984  if (Fn.hasFnAttribute("stack-probe-size"))
985  Fn.getFnAttribute("stack-probe-size")
987  .getAsInteger(0, StackProbeSize);
988 
989  // Re-align the stack on 64-bit if the x86-interrupt calling convention is
990  // used and an error code was pushed, since the x86-64 ABI requires a 16-byte
991  // stack alignment.
993  Fn.arg_size() == 2) {
994  StackSize += 8;
995  MFI.setStackSize(StackSize);
996  emitSPUpdate(MBB, MBBI, -8, /*InEpilogue=*/false);
997  }
998 
999  // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
1000  // function, and use up to 128 bytes of stack space, don't have a frame
1001  // pointer, calls, or dynamic alloca then we do not need to adjust the
1002  // stack pointer (we fit in the Red Zone). We also check that we don't
1003  // push and pop from the stack.
1004  if (Is64Bit && !Fn.hasFnAttribute(Attribute::NoRedZone) &&
1005  !TRI->needsStackRealignment(MF) &&
1006  !MFI.hasVarSizedObjects() && // No dynamic alloca.
1007  !MFI.adjustsStack() && // No calls.
1008  !UseStackProbe && // No stack probes.
1009  !IsWin64CC && // Win64 has no Red Zone
1010  !MFI.hasCopyImplyingStackAdjustment() && // Don't push and pop.
1011  !MF.shouldSplitStack()) { // Regular stack
1012  uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
1013  if (HasFP) MinSize += SlotSize;
1014  X86FI->setUsesRedZone(MinSize > 0 || StackSize > 0);
1015  StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
1016  MFI.setStackSize(StackSize);
1017  }
1018 
1019  // Insert stack pointer adjustment for later moving of return addr. Only
1020  // applies to tail call optimized functions where the callee argument stack
1021  // size is bigger than the callers.
1022  if (TailCallReturnAddrDelta < 0) {
1023  BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta,
1024  /*InEpilogue=*/false)
1026  }
1027 
1028  // Mapping for machine moves:
1029  //
1030  // DST: VirtualFP AND
1031  // SRC: VirtualFP => DW_CFA_def_cfa_offset
1032  // ELSE => DW_CFA_def_cfa
1033  //
1034  // SRC: VirtualFP AND
1035  // DST: Register => DW_CFA_def_cfa_register
1036  //
1037  // ELSE
1038  // OFFSET < 0 => DW_CFA_offset_extended_sf
1039  // REG < 64 => DW_CFA_offset + Reg
1040  // ELSE => DW_CFA_offset_extended
1041 
1042  uint64_t NumBytes = 0;
1043  int stackGrowth = -SlotSize;
1044 
1045  // Find the funclet establisher parameter
1046  unsigned Establisher = X86::NoRegister;
1047  if (IsClrFunclet)
1048  Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
1049  else if (IsFunclet)
1050  Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
1051 
1052  if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1053  // Immediately spill establisher into the home slot.
1054  // The runtime cares about this.
1055  // MOV64mr %rdx, 16(%rsp)
1056  unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1057  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)
1058  .addReg(Establisher)
1060  MBB.addLiveIn(Establisher);
1061  }
1062 
1063  if (HasFP) {
1064  assert(MF.getRegInfo().isReserved(MachineFramePtr) && "FP reserved");
1065 
1066  // Calculate required stack adjustment.
1067  uint64_t FrameSize = StackSize - SlotSize;
1068  // If required, include space for extra hidden slot for stashing base pointer.
1069  if (X86FI->getRestoreBasePointer())
1070  FrameSize += SlotSize;
1071 
1072  NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
1073 
1074  // Callee-saved registers are pushed on stack before the stack is realigned.
1075  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1076  NumBytes = alignTo(NumBytes, MaxAlign);
1077 
1078  // Get the offset of the stack slot for the EBP register, which is
1079  // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
1080  // Update the frame offset adjustment.
1081  if (!IsFunclet)
1082  MFI.setOffsetAdjustment(-NumBytes);
1083  else
1084  assert(MFI.getOffsetAdjustment() == -(int)NumBytes &&
1085  "should calculate same local variable offset for funclets");
1086 
1087  // Save EBP/RBP into the appropriate stack slot.
1088  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
1089  .addReg(MachineFramePtr, RegState::Kill)
1091 
1092  if (NeedsDwarfCFI) {
1093  // Mark the place where EBP/RBP was saved.
1094  // Define the current CFA rule to use the provided offset.
1095  assert(StackSize);
1096  BuildCFI(MBB, MBBI, DL,
1097  MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth));
1098 
1099  // Change the rule for the FramePtr to be an "offset" rule.
1100  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1102  nullptr, DwarfFramePtr, 2 * stackGrowth));
1103  }
1104 
1105  if (NeedsWinCFI) {
1106  HasWinCFI = true;
1107  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1108  .addImm(FramePtr)
1110  }
1111 
1112  if (!IsWin64Prologue && !IsFunclet) {
1113  // Update EBP with the new base value.
1114  BuildMI(MBB, MBBI, DL,
1115  TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),
1116  FramePtr)
1117  .addReg(StackPtr)
1119 
1120  if (NeedsDwarfCFI) {
1121  // Mark effective beginning of when frame pointer becomes valid.
1122  // Define the current CFA to use the EBP/RBP register.
1123  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1125  nullptr, DwarfFramePtr));
1126  }
1127 
1128  if (NeedsWinFPO) {
1129  // .cv_fpo_setframe $FramePtr
1130  HasWinCFI = true;
1131  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1132  .addImm(FramePtr)
1133  .addImm(0)
1135  }
1136  }
1137  } else {
1138  assert(!IsFunclet && "funclets without FPs not yet implemented");
1139  NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
1140  }
1141 
1142  // For EH funclets, only allocate enough space for outgoing calls. Save the
1143  // NumBytes value that we would've used for the parent frame.
1144  unsigned ParentFrameNumBytes = NumBytes;
1145  if (IsFunclet)
1146  NumBytes = getWinEHFuncletFrameSize(MF);
1147 
1148  // Skip the callee-saved push instructions.
1149  bool PushedRegs = false;
1150  int StackOffset = 2 * stackGrowth;
1151 
1152  while (MBBI != MBB.end() &&
1153  MBBI->getFlag(MachineInstr::FrameSetup) &&
1154  (MBBI->getOpcode() == X86::PUSH32r ||
1155  MBBI->getOpcode() == X86::PUSH64r)) {
1156  PushedRegs = true;
1157  unsigned Reg = MBBI->getOperand(0).getReg();
1158  ++MBBI;
1159 
1160  if (!HasFP && NeedsDwarfCFI) {
1161  // Mark callee-saved push instruction.
1162  // Define the current CFA rule to use the provided offset.
1163  assert(StackSize);
1164  BuildCFI(MBB, MBBI, DL,
1165  MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
1166  StackOffset += stackGrowth;
1167  }
1168 
1169  if (NeedsWinCFI) {
1170  HasWinCFI = true;
1171  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1172  .addImm(Reg)
1174  }
1175  }
1176 
1177  // Realign stack after we pushed callee-saved registers (so that we'll be
1178  // able to calculate their offsets from the frame pointer).
1179  // Don't do this for Win64, it needs to realign the stack after the prologue.
1180  if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
1181  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1182  BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
1183  }
1184 
1185  // If there is an SUB32ri of ESP immediately before this instruction, merge
1186  // the two. This can be the case when tail call elimination is enabled and
1187  // the callee has more arguments then the caller.
1188  NumBytes -= mergeSPUpdates(MBB, MBBI, true);
1189 
1190  // Adjust stack pointer: ESP -= numbytes.
1191 
1192  // Windows and cygwin/mingw require a prologue helper routine when allocating
1193  // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
1194  // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
1195  // stack and adjust the stack pointer in one go. The 64-bit version of
1196  // __chkstk is only responsible for probing the stack. The 64-bit prologue is
1197  // responsible for adjusting the stack pointer. Touching the stack at 4K
1198  // increments is necessary to ensure that the guard pages used by the OS
1199  // virtual memory manager are allocated in correct sequence.
1200  uint64_t AlignedNumBytes = NumBytes;
1201  if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
1202  AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
1203  if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
1204  assert(!X86FI->getUsesRedZone() &&
1205  "The Red Zone is not accounted for in stack probes");
1206 
1207  // Check whether EAX is livein for this block.
1208  bool isEAXAlive = isEAXLiveIn(MBB);
1209 
1210  if (isEAXAlive) {
1211  // Sanity check that EAX is not livein for this function.
1212  // It should not be, so throw an assert.
1213  assert(!Is64Bit && "EAX is livein in x64 case!");
1214 
1215  // Save EAX
1216  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
1217  .addReg(X86::EAX, RegState::Kill)
1219  }
1220 
1221  if (Is64Bit) {
1222  // Handle the 64-bit Windows ABI case where we need to call __chkstk.
1223  // Function prologue is responsible for adjusting the stack pointer.
1224  if (isUInt<32>(NumBytes)) {
1225  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1226  .addImm(NumBytes)
1228  } else if (isInt<32>(NumBytes)) {
1229  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)
1230  .addImm(NumBytes)
1232  } else {
1233  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
1234  .addImm(NumBytes)
1236  }
1237  } else {
1238  // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
1239  // We'll also use 4 already allocated bytes for EAX.
1240  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1241  .addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
1243  }
1244 
1245  // Call __chkstk, __chkstk_ms, or __alloca.
1246  emitStackProbe(MF, MBB, MBBI, DL, true);
1247 
1248  if (isEAXAlive) {
1249  // Restore EAX
1250  MachineInstr *MI =
1251  addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),
1252  StackPtr, false, NumBytes - 4);
1254  MBB.insert(MBBI, MI);
1255  }
1256  } else if (NumBytes) {
1257  emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
1258  }
1259 
1260  if (NeedsWinCFI && NumBytes) {
1261  HasWinCFI = true;
1262  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))
1263  .addImm(NumBytes)
1265  }
1266 
1267  int SEHFrameOffset = 0;
1268  unsigned SPOrEstablisher;
1269  if (IsFunclet) {
1270  if (IsClrFunclet) {
1271  // The establisher parameter passed to a CLR funclet is actually a pointer
1272  // to the (mostly empty) frame of its nearest enclosing funclet; we have
1273  // to find the root function establisher frame by loading the PSPSym from
1274  // the intermediate frame.
1275  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1276  MachinePointerInfo NoInfo;
1277  MBB.addLiveIn(Establisher);
1278  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),
1279  Establisher, false, PSPSlotOffset)
1282  ;
1283  // Save the root establisher back into the current funclet's (mostly
1284  // empty) frame, in case a sub-funclet or the GC needs it.
1285  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,
1286  false, PSPSlotOffset)
1287  .addReg(Establisher)
1288  .addMemOperand(
1291  SlotSize, SlotSize));
1292  }
1293  SPOrEstablisher = Establisher;
1294  } else {
1295  SPOrEstablisher = StackPtr;
1296  }
1297 
1298  if (IsWin64Prologue && HasFP) {
1299  // Set RBP to a small fixed offset from RSP. In the funclet case, we base
1300  // this calculation on the incoming establisher, which holds the value of
1301  // RSP from the parent frame at the end of the prologue.
1302  SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes);
1303  if (SEHFrameOffset)
1304  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
1305  SPOrEstablisher, false, SEHFrameOffset);
1306  else
1307  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
1308  .addReg(SPOrEstablisher);
1309 
1310  // If this is not a funclet, emit the CFI describing our frame pointer.
1311  if (NeedsWinCFI && !IsFunclet) {
1312  assert(!NeedsWinFPO && "this setframe incompatible with FPO data");
1313  HasWinCFI = true;
1314  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1315  .addImm(FramePtr)
1316  .addImm(SEHFrameOffset)
1318  if (isAsynchronousEHPersonality(Personality))
1319  MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset;
1320  }
1321  } else if (IsFunclet && STI.is32Bit()) {
1322  // Reset EBP / ESI to something good for funclets.
1323  MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL);
1324  // If we're a catch funclet, we can be returned to via catchret. Save ESP
1325  // into the registration node so that the runtime will restore it for us.
1326  if (!MBB.isCleanupFuncletEntry()) {
1327  assert(Personality == EHPersonality::MSVC_CXX);
1328  unsigned FrameReg;
1329  int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex;
1330  int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1331  // ESP is the first field, so no extra displacement is needed.
1332  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
1333  false, EHRegOffset)
1334  .addReg(X86::ESP);
1335  }
1336  }
1337 
1338  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
1339  const MachineInstr &FrameInstr = *MBBI;
1340  ++MBBI;
1341 
1342  if (NeedsWinCFI) {
1343  int FI;
1344  if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
1345  if (X86::FR64RegClass.contains(Reg)) {
1346  unsigned IgnoredFrameReg;
1347  int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
1348  Offset += SEHFrameOffset;
1349 
1350  HasWinCFI = true;
1351  assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data");
1352  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
1353  .addImm(Reg)
1354  .addImm(Offset)
1356  }
1357  }
1358  }
1359  }
1360 
1361  if (NeedsWinCFI && HasWinCFI)
1362  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))
1363  .setMIFlag(MachineInstr::FrameSetup);
1364 
1365  if (FnHasClrFunclet && !IsFunclet) {
1366  // Save the so-called Initial-SP (i.e. the value of the stack pointer
1367  // immediately after the prolog) into the PSPSlot so that funclets
1368  // and the GC can recover it.
1369  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1370  auto PSPInfo = MachinePointerInfo::getFixedStack(
1371  MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx);
1372  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,
1373  PSPSlotOffset)
1374  .addReg(StackPtr)
1377  SlotSize, SlotSize));
1378  }
1379 
1380  // Realign stack after we spilled callee-saved registers (so that we'll be
1381  // able to calculate their offsets from the frame pointer).
1382  // Win64 requires aligning the stack after the prologue.
1383  if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
1384  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1385  BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
1386  }
1387 
1388  // We already dealt with stack realignment and funclets above.
1389  if (IsFunclet && STI.is32Bit())
1390  return;
1391 
1392  // If we need a base pointer, set it up here. It's whatever the value
1393  // of the stack pointer is at this point. Any variable size objects
1394  // will be allocated after this, so we can still use the base pointer
1395  // to reference locals.
1396  if (TRI->hasBasePointer(MF)) {
1397  // Update the base pointer with the current stack pointer.
1398  unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;
1399  BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1400  .addReg(SPOrEstablisher)
1402  if (X86FI->getRestoreBasePointer()) {
1403  // Stash value of base pointer. Saving RSP instead of EBP shortens
1404  // dependence chain. Used by SjLj EH.
1405  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1406  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)),
1407  FramePtr, true, X86FI->getRestoreBasePointerOffset())
1408  .addReg(SPOrEstablisher)
1410  }
1411 
1412  if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) {
1413  // Stash the value of the frame pointer relative to the base pointer for
1414  // Win32 EH. This supports Win32 EH, which does the inverse of the above:
1415  // it recovers the frame pointer from the base pointer rather than the
1416  // other way around.
1417  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1418  unsigned UsedReg;
1419  int Offset =
1420  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
1421  assert(UsedReg == BasePtr);
1422  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
1423  .addReg(FramePtr)
1425  }
1426  }
1427 
1428  if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
1429  // Mark end of stack pointer adjustment.
1430  if (!HasFP && NumBytes) {
1431  // Define the current CFA rule to use the provided offset.
1432  assert(StackSize);
1434  nullptr, -StackSize + stackGrowth));
1435  }
1436 
1437  // Emit DWARF info specifying the offsets of the callee-saved registers.
1438  emitCalleeSavedFrameMoves(MBB, MBBI, DL);
1439  }
1440 
1441  // X86 Interrupt handling function cannot assume anything about the direction
1442  // flag (DF in EFLAGS register). Clear this flag by creating "cld" instruction
1443  // in each prologue of interrupt handler function.
1444  //
1445  // FIXME: Create "cld" instruction only in these cases:
1446  // 1. The interrupt handling function uses any of the "rep" instructions.
1447  // 2. Interrupt handling function calls another function.
1448  //
1450  BuildMI(MBB, MBBI, DL, TII.get(X86::CLD))
1451  .setMIFlag(MachineInstr::FrameSetup);
1452 
1453  // At this point we know if the function has WinCFI or not.
1454  MF.setHasWinCFI(HasWinCFI);
1455 }
1456 
1458  const MachineFunction &MF) const {
1459  // We can't use LEA instructions for adjusting the stack pointer if we don't
1460  // have a frame pointer in the Win64 ABI. Only ADD instructions may be used
1461  // to deallocate the stack.
1462  // This means that we can use LEA for SP in two situations:
1463  // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.
1464  // 2. We *have* a frame pointer which means we are permitted to use LEA.
1465  return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
1466 }
1467 
1469  switch (MI.getOpcode()) {
1470  case X86::CATCHRET:
1471  case X86::CLEANUPRET:
1472  return true;
1473  default:
1474  return false;
1475  }
1476  llvm_unreachable("impossible");
1477 }
1478 
1479 // CLR funclets use a special "Previous Stack Pointer Symbol" slot on the
1480 // stack. It holds a pointer to the bottom of the root function frame. The
1481 // establisher frame pointer passed to a nested funclet may point to the
1482 // (mostly empty) frame of its parent funclet, but it will need to find
1483 // the frame of the root function to access locals. To facilitate this,
1484 // every funclet copies the pointer to the bottom of the root function
1485 // frame into a PSPSym slot in its own (mostly empty) stack frame. Using the
1486 // same offset for the PSPSym in the root function frame that's used in the
1487 // funclets' frames allows each funclet to dynamically accept any ancestor
1488 // frame as its establisher argument (the runtime doesn't guarantee the
1489 // immediate parent for some reason lost to history), and also allows the GC,
1490 // which uses the PSPSym for some bookkeeping, to find it in any funclet's
1491 // frame with only a single offset reported for the entire method.
1492 unsigned
1493 X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const {
1494  const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo();
1495  unsigned SPReg;
1497  /*IgnoreSPUpdates*/ true);
1498  assert(Offset >= 0 && SPReg == TRI->getStackRegister());
1499  return static_cast<unsigned>(Offset);
1500 }
1501 
1502 unsigned
1503 X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const {
1504  // This is the size of the pushed CSRs.
1505  unsigned CSSize =
1506  MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
1507  // This is the amount of stack a funclet needs to allocate.
1508  unsigned UsedSize;
1509  EHPersonality Personality =
1511  if (Personality == EHPersonality::CoreCLR) {
1512  // CLR funclets need to hold enough space to include the PSPSym, at the
1513  // same offset from the stack pointer (immediately after the prolog) as it
1514  // resides at in the main function.
1515  UsedSize = getPSPSlotOffsetFromSP(MF) + SlotSize;
1516  } else {
1517  // Other funclets just need enough stack for outgoing call arguments.
1518  UsedSize = MF.getFrameInfo().getMaxCallFrameSize();
1519  }
1520  // RBP is not included in the callee saved register block. After pushing RBP,
1521  // everything is 16 byte aligned. Everything we allocate before an outgoing
1522  // call must also be 16 byte aligned.
1523  unsigned FrameSizeMinusRBP = alignTo(CSSize + UsedSize, getStackAlignment());
1524  // Subtract out the size of the callee saved registers. This is how much stack
1525  // each funclet will allocate.
1526  return FrameSizeMinusRBP - CSSize;
1527 }
1528 
1529 static bool isTailCallOpcode(unsigned Opc) {
1530  return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
1531  Opc == X86::TCRETURNmi ||
1532  Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNdi64 ||
1533  Opc == X86::TCRETURNmi64;
1534 }
1535 
1537  MachineBasicBlock &MBB) const {
1538  const MachineFrameInfo &MFI = MF.getFrameInfo();
1542  DebugLoc DL;
1543  if (MBBI != MBB.end())
1544  DL = MBBI->getDebugLoc();
1545  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
1546  const bool Is64BitILP32 = STI.isTarget64BitILP32();
1547  unsigned FramePtr = TRI->getFrameRegister(MF);
1548  unsigned MachineFramePtr =
1549  Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
1550 
1551  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1552  bool NeedsWin64CFI =
1553  IsWin64Prologue && MF.getFunction().needsUnwindTableEntry();
1554  bool IsFunclet = MBBI == MBB.end() ? false : isFuncletReturnInstr(*MBBI);
1555 
1556  // Get the number of bytes to allocate from the FrameInfo.
1557  uint64_t StackSize = MFI.getStackSize();
1558  uint64_t MaxAlign = calculateMaxStackAlign(MF);
1559  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1560  bool HasFP = hasFP(MF);
1561  uint64_t NumBytes = 0;
1562 
1563  if (IsFunclet) {
1564  assert(HasFP && "EH funclets without FP not yet implemented");
1565  NumBytes = getWinEHFuncletFrameSize(MF);
1566  } else if (HasFP) {
1567  // Calculate required stack adjustment.
1568  uint64_t FrameSize = StackSize - SlotSize;
1569  NumBytes = FrameSize - CSSize;
1570 
1571  // Callee-saved registers were pushed on stack before the stack was
1572  // realigned.
1573  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1574  NumBytes = alignTo(FrameSize, MaxAlign);
1575  } else {
1576  NumBytes = StackSize - CSSize;
1577  }
1578  uint64_t SEHStackAllocAmt = NumBytes;
1579 
1580  if (HasFP) {
1581  // Pop EBP.
1582  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1583  MachineFramePtr)
1584  .setMIFlag(MachineInstr::FrameDestroy);
1585  }
1586 
1587  MachineBasicBlock::iterator FirstCSPop = MBBI;
1588  // Skip the callee-saved pop instructions.
1589  while (MBBI != MBB.begin()) {
1590  MachineBasicBlock::iterator PI = std::prev(MBBI);
1591  unsigned Opc = PI->getOpcode();
1592 
1593  if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
1594  if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1595  (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
1596  break;
1597  FirstCSPop = PI;
1598  }
1599 
1600  --MBBI;
1601  }
1602  MBBI = FirstCSPop;
1603 
1604  if (IsFunclet && Terminator->getOpcode() == X86::CATCHRET)
1605  emitCatchRetReturnValue(MBB, FirstCSPop, &*Terminator);
1606 
1607  if (MBBI != MBB.end())
1608  DL = MBBI->getDebugLoc();
1609 
1610  // If there is an ADD32ri or SUB32ri of ESP immediately before this
1611  // instruction, merge the two instructions.
1612  if (NumBytes || MFI.hasVarSizedObjects())
1613  NumBytes += mergeSPUpdates(MBB, MBBI, true);
1614 
1615  // If dynamic alloca is used, then reset esp to point to the last callee-saved
1616  // slot before popping them off! Same applies for the case, when stack was
1617  // realigned. Don't do this if this was a funclet epilogue, since the funclets
1618  // will not do realignment or dynamic stack allocation.
1619  if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) &&
1620  !IsFunclet) {
1621  if (TRI->needsStackRealignment(MF))
1622  MBBI = FirstCSPop;
1623  unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
1624  uint64_t LEAAmount =
1625  IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
1626 
1627  // There are only two legal forms of epilogue:
1628  // - add SEHAllocationSize, %rsp
1629  // - lea SEHAllocationSize(%FramePtr), %rsp
1630  //
1631  // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
1632  // However, we may use this sequence if we have a frame pointer because the
1633  // effects of the prologue can safely be undone.
1634  if (LEAAmount != 0) {
1635  unsigned Opc = getLEArOpcode(Uses64BitFramePtr);
1636  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
1637  FramePtr, false, LEAAmount);
1638  --MBBI;
1639  } else {
1640  unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);
1641  BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
1642  .addReg(FramePtr);
1643  --MBBI;
1644  }
1645  } else if (NumBytes) {
1646  // Adjust stack pointer back: ESP += numbytes.
1647  emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
1648  --MBBI;
1649  }
1650 
1651  // Windows unwinder will not invoke function's exception handler if IP is
1652  // either in prologue or in epilogue. This behavior causes a problem when a
1653  // call immediately precedes an epilogue, because the return address points
1654  // into the epilogue. To cope with that, we insert an epilogue marker here,
1655  // then replace it with a 'nop' if it ends up immediately after a CALL in the
1656  // final emitted code.
1657  if (NeedsWin64CFI && MF.hasWinCFI())
1658  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1659 
1660  if (Terminator == MBB.end() || !isTailCallOpcode(Terminator->getOpcode())) {
1661  // Add the return addr area delta back since we are not tail calling.
1662  int Offset = -1 * X86FI->getTCReturnAddrDelta();
1663  assert(Offset >= 0 && "TCDelta should never be positive");
1664  if (Offset) {
1665  // Check for possible merge with preceding ADD instruction.
1666  Offset += mergeSPUpdates(MBB, Terminator, true);
1667  emitSPUpdate(MBB, Terminator, Offset, /*InEpilogue=*/true);
1668  }
1669  }
1670 }
1671 
1673  unsigned &FrameReg) const {
1674  const MachineFrameInfo &MFI = MF.getFrameInfo();
1675 
1676  bool IsFixed = MFI.isFixedObjectIndex(FI);
1677  // We can't calculate offset from frame pointer if the stack is realigned,
1678  // so enforce usage of stack/base pointer. The base pointer is used when we
1679  // have dynamic allocas in addition to dynamic realignment.
1680  if (TRI->hasBasePointer(MF))
1681  FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister();
1682  else if (TRI->needsStackRealignment(MF))
1683  FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister();
1684  else
1685  FrameReg = TRI->getFrameRegister(MF);
1686 
1687  // Offset will hold the offset from the stack pointer at function entry to the
1688  // object.
1689  // We need to factor in additional offsets applied during the prologue to the
1690  // frame, base, and stack pointer depending on which is used.
1691  int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
1693  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1694  uint64_t StackSize = MFI.getStackSize();
1695  bool HasFP = hasFP(MF);
1696  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1697  int64_t FPDelta = 0;
1698 
1699  if (IsWin64Prologue) {
1700  assert(!MFI.hasCalls() || (StackSize % 16) == 8);
1701 
1702  // Calculate required stack adjustment.
1703  uint64_t FrameSize = StackSize - SlotSize;
1704  // If required, include space for extra hidden slot for stashing base pointer.
1705  if (X86FI->getRestoreBasePointer())
1706  FrameSize += SlotSize;
1707  uint64_t NumBytes = FrameSize - CSSize;
1708 
1709  uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
1710  if (FI && FI == X86FI->getFAIndex())
1711  return -SEHFrameOffset;
1712 
1713  // FPDelta is the offset from the "traditional" FP location of the old base
1714  // pointer followed by return address and the location required by the
1715  // restricted Win64 prologue.
1716  // Add FPDelta to all offsets below that go through the frame pointer.
1717  FPDelta = FrameSize - SEHFrameOffset;
1718  assert((!MFI.hasCalls() || (FPDelta % 16) == 0) &&
1719  "FPDelta isn't aligned per the Win64 ABI!");
1720  }
1721 
1722 
1723  if (TRI->hasBasePointer(MF)) {
1724  assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
1725  if (FI < 0) {
1726  // Skip the saved EBP.
1727  return Offset + SlotSize + FPDelta;
1728  } else {
1729  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1730  return Offset + StackSize;
1731  }
1732  } else if (TRI->needsStackRealignment(MF)) {
1733  if (FI < 0) {
1734  // Skip the saved EBP.
1735  return Offset + SlotSize + FPDelta;
1736  } else {
1737  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1738  return Offset + StackSize;
1739  }
1740  // FIXME: Support tail calls
1741  } else {
1742  if (!HasFP)
1743  return Offset + StackSize;
1744 
1745  // Skip the saved EBP.
1746  Offset += SlotSize;
1747 
1748  // Skip the RETADDR move area
1749  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1750  if (TailCallReturnAddrDelta < 0)
1751  Offset -= TailCallReturnAddrDelta;
1752  }
1753 
1754  return Offset + FPDelta;
1755 }
1756 
1758  int FI, unsigned &FrameReg,
1759  int Adjustment) const {
1760  const MachineFrameInfo &MFI = MF.getFrameInfo();
1761  FrameReg = TRI->getStackRegister();
1762  return MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + Adjustment;
1763 }
1764 
1765 int
1767  int FI, unsigned &FrameReg,
1768  bool IgnoreSPUpdates) const {
1769 
1770  const MachineFrameInfo &MFI = MF.getFrameInfo();
1771  // Does not include any dynamic realign.
1772  const uint64_t StackSize = MFI.getStackSize();
1773  // LLVM arranges the stack as follows:
1774  // ...
1775  // ARG2
1776  // ARG1
1777  // RETADDR
1778  // PUSH RBP <-- RBP points here
1779  // PUSH CSRs
1780  // ~~~~~~~ <-- possible stack realignment (non-win64)
1781  // ...
1782  // STACK OBJECTS
1783  // ... <-- RSP after prologue points here
1784  // ~~~~~~~ <-- possible stack realignment (win64)
1785  //
1786  // if (hasVarSizedObjects()):
1787  // ... <-- "base pointer" (ESI/RBX) points here
1788  // DYNAMIC ALLOCAS
1789  // ... <-- RSP points here
1790  //
1791  // Case 1: In the simple case of no stack realignment and no dynamic
1792  // allocas, both "fixed" stack objects (arguments and CSRs) are addressable
1793  // with fixed offsets from RSP.
1794  //
1795  // Case 2: In the case of stack realignment with no dynamic allocas, fixed
1796  // stack objects are addressed with RBP and regular stack objects with RSP.
1797  //
1798  // Case 3: In the case of dynamic allocas and stack realignment, RSP is used
1799  // to address stack arguments for outgoing calls and nothing else. The "base
1800  // pointer" points to local variables, and RBP points to fixed objects.
1801  //
1802  // In cases 2 and 3, we can only answer for non-fixed stack objects, and the
1803  // answer we give is relative to the SP after the prologue, and not the
1804  // SP in the middle of the function.
1805 
1806  if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) &&
1807  !STI.isTargetWin64())
1808  return getFrameIndexReference(MF, FI, FrameReg);
1809 
1810  // If !hasReservedCallFrame the function might have SP adjustement in the
1811  // body. So, even though the offset is statically known, it depends on where
1812  // we are in the function.
1814  if (!IgnoreSPUpdates && !TFI->hasReservedCallFrame(MF))
1815  return getFrameIndexReference(MF, FI, FrameReg);
1816 
1817  // We don't handle tail calls, and shouldn't be seeing them either.
1819  "we don't handle this case!");
1820 
1821  // This is how the math works out:
1822  //
1823  // %rsp grows (i.e. gets lower) left to right. Each box below is
1824  // one word (eight bytes). Obj0 is the stack slot we're trying to
1825  // get to.
1826  //
1827  // ----------------------------------
1828  // | BP | Obj0 | Obj1 | ... | ObjN |
1829  // ----------------------------------
1830  // ^ ^ ^ ^
1831  // A B C E
1832  //
1833  // A is the incoming stack pointer.
1834  // (B - A) is the local area offset (-8 for x86-64) [1]
1835  // (C - A) is the Offset returned by MFI.getObjectOffset for Obj0 [2]
1836  //
1837  // |(E - B)| is the StackSize (absolute value, positive). For a
1838  // stack that grown down, this works out to be (B - E). [3]
1839  //
1840  // E is also the value of %rsp after stack has been set up, and we
1841  // want (C - E) -- the value we can add to %rsp to get to Obj0. Now
1842  // (C - E) == (C - A) - (B - A) + (B - E)
1843  // { Using [1], [2] and [3] above }
1844  // == getObjectOffset - LocalAreaOffset + StackSize
1845 
1846  return getFrameIndexReferenceSP(MF, FI, FrameReg, StackSize);
1847 }
1848 
1851  std::vector<CalleeSavedInfo> &CSI) const {
1852  MachineFrameInfo &MFI = MF.getFrameInfo();
1854 
1855  unsigned CalleeSavedFrameSize = 0;
1856  int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
1857 
1858  int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1859 
1860  if (TailCallReturnAddrDelta < 0) {
1861  // create RETURNADDR area
1862  // arg
1863  // arg
1864  // RETADDR
1865  // { ...
1866  // RETADDR area
1867  // ...
1868  // }
1869  // [EBP]
1870  MFI.CreateFixedObject(-TailCallReturnAddrDelta,
1871  TailCallReturnAddrDelta - SlotSize, true);
1872  }
1873 
1874  // Spill the BasePtr if it's used.
1875  if (this->TRI->hasBasePointer(MF)) {
1876  // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
1877  if (MF.hasEHFunclets()) {
1878  int FI = MFI.CreateSpillStackObject(SlotSize, SlotSize);
1879  X86FI->setHasSEHFramePtrSave(true);
1880  X86FI->setSEHFramePtrSaveIndex(FI);
1881  }
1882  }
1883 
1884  if (hasFP(MF)) {
1885  // emitPrologue always spills frame register the first thing.
1886  SpillSlotOffset -= SlotSize;
1887  MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1888 
1889  // Since emitPrologue and emitEpilogue will handle spilling and restoring of
1890  // the frame register, we can delete it from CSI list and not have to worry
1891  // about avoiding it later.
1892  unsigned FPReg = TRI->getFrameRegister(MF);
1893  for (unsigned i = 0; i < CSI.size(); ++i) {
1894  if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
1895  CSI.erase(CSI.begin() + i);
1896  break;
1897  }
1898  }
1899  }
1900 
1901  // Assign slots for GPRs. It increases frame size.
1902  for (unsigned i = CSI.size(); i != 0; --i) {
1903  unsigned Reg = CSI[i - 1].getReg();
1904 
1905  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1906  continue;
1907 
1908  SpillSlotOffset -= SlotSize;
1909  CalleeSavedFrameSize += SlotSize;
1910 
1911  int SlotIndex = MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1912  CSI[i - 1].setFrameIdx(SlotIndex);
1913  }
1914 
1915  X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize);
1916 
1917  // Assign slots for XMMs.
1918  for (unsigned i = CSI.size(); i != 0; --i) {
1919  unsigned Reg = CSI[i - 1].getReg();
1920  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1921  continue;
1922 
1923  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1924  unsigned Size = TRI->getSpillSize(*RC);
1925  unsigned Align = TRI->getSpillAlignment(*RC);
1926  // ensure alignment
1927  SpillSlotOffset -= std::abs(SpillSlotOffset) % Align;
1928  // spill into slot
1929  SpillSlotOffset -= Size;
1930  int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
1931  CSI[i - 1].setFrameIdx(SlotIndex);
1932  MFI.ensureMaxAlignment(Align);
1933  }
1934 
1935  return true;
1936 }
1937 
1940  const std::vector<CalleeSavedInfo> &CSI,
1941  const TargetRegisterInfo *TRI) const {
1942  DebugLoc DL = MBB.findDebugLoc(MI);
1943 
1944  // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI
1945  // for us, and there are no XMM CSRs on Win32.
1946  if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows())
1947  return true;
1948 
1949  // Push GPRs. It increases frame size.
1950  const MachineFunction &MF = *MBB.getParent();
1951  unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
1952  for (unsigned i = CSI.size(); i != 0; --i) {
1953  unsigned Reg = CSI[i - 1].getReg();
1954 
1955  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1956  continue;
1957 
1958  const MachineRegisterInfo &MRI = MF.getRegInfo();
1959  bool isLiveIn = MRI.isLiveIn(Reg);
1960  if (!isLiveIn)
1961  MBB.addLiveIn(Reg);
1962 
1963  // Decide whether we can add a kill flag to the use.
1964  bool CanKill = !isLiveIn;
1965  // Check if any subregister is live-in
1966  if (CanKill) {
1967  for (MCRegAliasIterator AReg(Reg, TRI, false); AReg.isValid(); ++AReg) {
1968  if (MRI.isLiveIn(*AReg)) {
1969  CanKill = false;
1970  break;
1971  }
1972  }
1973  }
1974 
1975  // Do not set a kill flag on values that are also marked as live-in. This
1976  // happens with the @llvm-returnaddress intrinsic and with arguments
1977  // passed in callee saved registers.
1978  // Omitting the kill flags is conservatively correct even if the live-in
1979  // is not used after all.
1980  BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(CanKill))
1981  .setMIFlag(MachineInstr::FrameSetup);
1982  }
1983 
1984  // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
1985  // It can be done by spilling XMMs to stack frame.
1986  for (unsigned i = CSI.size(); i != 0; --i) {
1987  unsigned Reg = CSI[i-1].getReg();
1988  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1989  continue;
1990  // Add the callee-saved register as live-in. It's killed at the spill.
1991  MBB.addLiveIn(Reg);
1992  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1993 
1994  TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
1995  TRI);
1996  --MI;
1997  MI->setFlag(MachineInstr::FrameSetup);
1998  ++MI;
1999  }
2000 
2001  return true;
2002 }
2003 
2004 void X86FrameLowering::emitCatchRetReturnValue(MachineBasicBlock &MBB,
2006  MachineInstr *CatchRet) const {
2007  // SEH shouldn't use catchret.
2009  MBB.getParent()->getFunction().getPersonalityFn())) &&
2010  "SEH should not use CATCHRET");
2011  DebugLoc DL = CatchRet->getDebugLoc();
2012  MachineBasicBlock *CatchRetTarget = CatchRet->getOperand(0).getMBB();
2013 
2014  // Fill EAX/RAX with the address of the target block.
2015  if (STI.is64Bit()) {
2016  // LEA64r CatchRetTarget(%rip), %rax
2017  BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), X86::RAX)
2018  .addReg(X86::RIP)
2019  .addImm(0)
2020  .addReg(0)
2021  .addMBB(CatchRetTarget)
2022  .addReg(0);
2023  } else {
2024  // MOV32ri $CatchRetTarget, %eax
2025  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
2026  .addMBB(CatchRetTarget);
2027  }
2028 
2029  // Record that we've taken the address of CatchRetTarget and no longer just
2030  // reference it in a terminator.
2031  CatchRetTarget->setHasAddressTaken();
2032 }
2033 
2036  std::vector<CalleeSavedInfo> &CSI,
2037  const TargetRegisterInfo *TRI) const {
2038  if (CSI.empty())
2039  return false;
2040 
2041  if (MI != MBB.end() && isFuncletReturnInstr(*MI) && STI.isOSWindows()) {
2042  // Don't restore CSRs in 32-bit EH funclets. Matches
2043  // spillCalleeSavedRegisters.
2044  if (STI.is32Bit())
2045  return true;
2046  // Don't restore CSRs before an SEH catchret. SEH except blocks do not form
2047  // funclets. emitEpilogue transforms these to normal jumps.
2048  if (MI->getOpcode() == X86::CATCHRET) {
2049  const Function &F = MBB.getParent()->getFunction();
2050  bool IsSEH = isAsynchronousEHPersonality(
2052  if (IsSEH)
2053  return true;
2054  }
2055  }
2056 
2057  DebugLoc DL = MBB.findDebugLoc(MI);
2058 
2059  // Reload XMMs from stack frame.
2060  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2061  unsigned Reg = CSI[i].getReg();
2062  if (X86::GR64RegClass.contains(Reg) ||
2063  X86::GR32RegClass.contains(Reg))
2064  continue;
2065 
2066  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
2067  TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
2068  }
2069 
2070  // POP GPRs.
2071  unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
2072  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2073  unsigned Reg = CSI[i].getReg();
2074  if (!X86::GR64RegClass.contains(Reg) &&
2075  !X86::GR32RegClass.contains(Reg))
2076  continue;
2077 
2078  BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
2079  .setMIFlag(MachineInstr::FrameDestroy);
2080  }
2081  return true;
2082 }
2083 
2085  BitVector &SavedRegs,
2086  RegScavenger *RS) const {
2087  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
2088 
2089  // Spill the BasePtr if it's used.
2090  if (TRI->hasBasePointer(MF))
2091  SavedRegs.set(TRI->getBaseRegister());
2092 }
2093 
2094 static bool
2096  const Function &F = MF->getFunction();
2097  for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end();
2098  I != E; I++) {
2099  if (I->hasNestAttr())
2100  return true;
2101  }
2102  return false;
2103 }
2104 
2105 /// GetScratchRegister - Get a temp register for performing work in the
2106 /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
2107 /// and the properties of the function either one or two registers will be
2108 /// needed. Set primary to true for the first register, false for the second.
2109 static unsigned
2110 GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) {
2112 
2113  // Erlang stuff.
2114  if (CallingConvention == CallingConv::HiPE) {
2115  if (Is64Bit)
2116  return Primary ? X86::R14 : X86::R13;
2117  else
2118  return Primary ? X86::EBX : X86::EDI;
2119  }
2120 
2121  if (Is64Bit) {
2122  if (IsLP64)
2123  return Primary ? X86::R11 : X86::R12;
2124  else
2125  return Primary ? X86::R11D : X86::R12D;
2126  }
2127 
2128  bool IsNested = HasNestArgument(&MF);
2129 
2130  if (CallingConvention == CallingConv::X86_FastCall ||
2131  CallingConvention == CallingConv::Fast) {
2132  if (IsNested)
2133  report_fatal_error("Segmented stacks does not support fastcall with "
2134  "nested function.");
2135  return Primary ? X86::EAX : X86::ECX;
2136  }
2137  if (IsNested)
2138  return Primary ? X86::EDX : X86::EAX;
2139  return Primary ? X86::ECX : X86::EAX;
2140 }
2141 
2142 // The stack limit in the TCB is set to this many bytes above the actual stack
2143 // limit.
2144 static const uint64_t kSplitStackAvailable = 256;
2145 
2147  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2148  MachineFrameInfo &MFI = MF.getFrameInfo();
2149  uint64_t StackSize;
2150  unsigned TlsReg, TlsOffset;
2151  DebugLoc DL;
2152 
2153  // To support shrink-wrapping we would need to insert the new blocks
2154  // at the right place and update the branches to PrologueMBB.
2155  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2156 
2157  unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2158  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2159  "Scratch register is live-in");
2160 
2161  if (MF.getFunction().isVarArg())
2162  report_fatal_error("Segmented stacks do not support vararg functions.");
2163  if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() &&
2164  !STI.isTargetWin64() && !STI.isTargetFreeBSD() &&
2166  report_fatal_error("Segmented stacks not supported on this platform.");
2167 
2168  // Eventually StackSize will be calculated by a link-time pass; which will
2169  // also decide whether checking code needs to be injected into this particular
2170  // prologue.
2171  StackSize = MFI.getStackSize();
2172 
2173  // Do not generate a prologue for functions with a stack of size zero
2174  if (StackSize == 0)
2175  return;
2176 
2177  MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
2178  MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
2180  bool IsNested = false;
2181 
2182  // We need to know if the function has a nest argument only in 64 bit mode.
2183  if (Is64Bit)
2184  IsNested = HasNestArgument(&MF);
2185 
2186  // The MOV R10, RAX needs to be in a different block, since the RET we emit in
2187  // allocMBB needs to be last (terminating) instruction.
2188 
2189  for (const auto &LI : PrologueMBB.liveins()) {
2190  allocMBB->addLiveIn(LI);
2191  checkMBB->addLiveIn(LI);
2192  }
2193 
2194  if (IsNested)
2195  allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
2196 
2197  MF.push_front(allocMBB);
2198  MF.push_front(checkMBB);
2199 
2200  // When the frame size is less than 256 we just compare the stack
2201  // boundary directly to the value of the stack pointer, per gcc.
2202  bool CompareStackPointer = StackSize < kSplitStackAvailable;
2203 
2204  // Read the limit off the current stacklet off the stack_guard location.
2205  if (Is64Bit) {
2206  if (STI.isTargetLinux()) {
2207  TlsReg = X86::FS;
2208  TlsOffset = IsLP64 ? 0x70 : 0x40;
2209  } else if (STI.isTargetDarwin()) {
2210  TlsReg = X86::GS;
2211  TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
2212  } else if (STI.isTargetWin64()) {
2213  TlsReg = X86::GS;
2214  TlsOffset = 0x28; // pvArbitrary, reserved for application use
2215  } else if (STI.isTargetFreeBSD()) {
2216  TlsReg = X86::FS;
2217  TlsOffset = 0x18;
2218  } else if (STI.isTargetDragonFly()) {
2219  TlsReg = X86::FS;
2220  TlsOffset = 0x20; // use tls_tcb.tcb_segstack
2221  } else {
2222  report_fatal_error("Segmented stacks not supported on this platform.");
2223  }
2224 
2225  if (CompareStackPointer)
2226  ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
2227  else
2228  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)
2229  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2230 
2231  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg)
2232  .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2233  } else {
2234  if (STI.isTargetLinux()) {
2235  TlsReg = X86::GS;
2236  TlsOffset = 0x30;
2237  } else if (STI.isTargetDarwin()) {
2238  TlsReg = X86::GS;
2239  TlsOffset = 0x48 + 90*4;
2240  } else if (STI.isTargetWin32()) {
2241  TlsReg = X86::FS;
2242  TlsOffset = 0x14; // pvArbitrary, reserved for application use
2243  } else if (STI.isTargetDragonFly()) {
2244  TlsReg = X86::FS;
2245  TlsOffset = 0x10; // use tls_tcb.tcb_segstack
2246  } else if (STI.isTargetFreeBSD()) {
2247  report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
2248  } else {
2249  report_fatal_error("Segmented stacks not supported on this platform.");
2250  }
2251 
2252  if (CompareStackPointer)
2253  ScratchReg = X86::ESP;
2254  else
2255  BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
2256  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2257 
2258  if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() ||
2259  STI.isTargetDragonFly()) {
2260  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
2261  .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2262  } else if (STI.isTargetDarwin()) {
2263 
2264  // TlsOffset doesn't fit into a mod r/m byte so we need an extra register.
2265  unsigned ScratchReg2;
2266  bool SaveScratch2;
2267  if (CompareStackPointer) {
2268  // The primary scratch register is available for holding the TLS offset.
2269  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2270  SaveScratch2 = false;
2271  } else {
2272  // Need to use a second register to hold the TLS offset
2273  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
2274 
2275  // Unfortunately, with fastcc the second scratch register may hold an
2276  // argument.
2277  SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
2278  }
2279 
2280  // If Scratch2 is live-in then it needs to be saved.
2281  assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
2282  "Scratch register is live-in and not saved");
2283 
2284  if (SaveScratch2)
2285  BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
2286  .addReg(ScratchReg2, RegState::Kill);
2287 
2288  BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
2289  .addImm(TlsOffset);
2290  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
2291  .addReg(ScratchReg)
2292  .addReg(ScratchReg2).addImm(1).addReg(0)
2293  .addImm(0)
2294  .addReg(TlsReg);
2295 
2296  if (SaveScratch2)
2297  BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
2298  }
2299  }
2300 
2301  // This jump is taken if SP >= (Stacklet Limit + Stack Space required).
2302  // It jumps to normal execution of the function body.
2303  BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB);
2304 
2305  // On 32 bit we first push the arguments size and then the frame size. On 64
2306  // bit, we pass the stack frame size in r10 and the argument size in r11.
2307  if (Is64Bit) {
2308  // Functions with nested arguments use R10, so it needs to be saved across
2309  // the call to _morestack
2310 
2311  const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
2312  const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
2313  const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
2314  const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
2315  const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
2316 
2317  if (IsNested)
2318  BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10);
2319 
2320  BuildMI(allocMBB, DL, TII.get(MOVri), Reg10)
2321  .addImm(StackSize);
2322  BuildMI(allocMBB, DL, TII.get(MOVri), Reg11)
2323  .addImm(X86FI->getArgumentStackSize());
2324  } else {
2325  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2326  .addImm(X86FI->getArgumentStackSize());
2327  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2328  .addImm(StackSize);
2329  }
2330 
2331  // __morestack is in libgcc
2332  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
2333  // Under the large code model, we cannot assume that __morestack lives
2334  // within 2^31 bytes of the call site, so we cannot use pc-relative
2335  // addressing. We cannot perform the call via a temporary register,
2336  // as the rax register may be used to store the static chain, and all
2337  // other suitable registers may be either callee-save or used for
2338  // parameter passing. We cannot use the stack at this point either
2339  // because __morestack manipulates the stack directly.
2340  //
2341  // To avoid these issues, perform an indirect call via a read-only memory
2342  // location containing the address.
2343  //
2344  // This solution is not perfect, as it assumes that the .rodata section
2345  // is laid out within 2^31 bytes of each function body, but this seems
2346  // to be sufficient for JIT.
2347  BuildMI(allocMBB, DL, TII.get(X86::CALL64m))
2348  .addReg(X86::RIP)
2349  .addImm(0)
2350  .addReg(0)
2351  .addExternalSymbol("__morestack_addr")
2352  .addReg(0);
2353  MF.getMMI().setUsesMorestackAddr(true);
2354  } else {
2355  if (Is64Bit)
2356  BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
2357  .addExternalSymbol("__morestack");
2358  else
2359  BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
2360  .addExternalSymbol("__morestack");
2361  }
2362 
2363  if (IsNested)
2364  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
2365  else
2366  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
2367 
2368  allocMBB->addSuccessor(&PrologueMBB);
2369 
2370  checkMBB->addSuccessor(allocMBB);
2371  checkMBB->addSuccessor(&PrologueMBB);
2372 
2373 #ifdef EXPENSIVE_CHECKS
2374  MF.verify();
2375 #endif
2376 }
2377 
2378 /// Lookup an ERTS parameter in the !hipe.literals named metadata node.
2379 /// HiPE provides Erlang Runtime System-internal parameters, such as PCB offsets
2380 /// to fields it needs, through a named metadata node "hipe.literals" containing
2381 /// name-value pairs.
2382 static unsigned getHiPELiteral(
2383  NamedMDNode *HiPELiteralsMD, const StringRef LiteralName) {
2384  for (int i = 0, e = HiPELiteralsMD->getNumOperands(); i != e; ++i) {
2385  MDNode *Node = HiPELiteralsMD->getOperand(i);
2386  if (Node->getNumOperands() != 2) continue;
2387  MDString *NodeName = dyn_cast<MDString>(Node->getOperand(0));
2388  ValueAsMetadata *NodeVal = dyn_cast<ValueAsMetadata>(Node->getOperand(1));
2389  if (!NodeName || !NodeVal) continue;
2390  ConstantInt *ValConst = dyn_cast_or_null<ConstantInt>(NodeVal->getValue());
2391  if (ValConst && NodeName->getString() == LiteralName) {
2392  return ValConst->getZExtValue();
2393  }
2394  }
2395 
2396  report_fatal_error("HiPE literal " + LiteralName
2397  + " required but not provided");
2398 }
2399 
2400 /// Erlang programs may need a special prologue to handle the stack size they
2401 /// might need at runtime. That is because Erlang/OTP does not implement a C
2402 /// stack but uses a custom implementation of hybrid stack/heap architecture.
2403 /// (for more information see Eric Stenman's Ph.D. thesis:
2404 /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
2405 ///
2406 /// CheckStack:
2407 /// temp0 = sp - MaxStack
2408 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2409 /// OldStart:
2410 /// ...
2411 /// IncStack:
2412 /// call inc_stack # doubles the stack space
2413 /// temp0 = sp - MaxStack
2414 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2416  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2417  MachineFrameInfo &MFI = MF.getFrameInfo();
2418  DebugLoc DL;
2419 
2420  // To support shrink-wrapping we would need to insert the new blocks
2421  // at the right place and update the branches to PrologueMBB.
2422  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2423 
2424  // HiPE-specific values
2425  NamedMDNode *HiPELiteralsMD = MF.getMMI().getModule()
2426  ->getNamedMetadata("hipe.literals");
2427  if (!HiPELiteralsMD)
2429  "Can't generate HiPE prologue without runtime parameters");
2430  const unsigned HipeLeafWords
2431  = getHiPELiteral(HiPELiteralsMD,
2432  Is64Bit ? "AMD64_LEAF_WORDS" : "X86_LEAF_WORDS");
2433  const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
2434  const unsigned Guaranteed = HipeLeafWords * SlotSize;
2435  unsigned CallerStkArity = MF.getFunction().arg_size() > CCRegisteredArgs ?
2436  MF.getFunction().arg_size() - CCRegisteredArgs : 0;
2437  unsigned MaxStack = MFI.getStackSize() + CallerStkArity*SlotSize + SlotSize;
2438 
2439  assert(STI.isTargetLinux() &&
2440  "HiPE prologue is only supported on Linux operating systems.");
2441 
2442  // Compute the largest caller's frame that is needed to fit the callees'
2443  // frames. This 'MaxStack' is computed from:
2444  //
2445  // a) the fixed frame size, which is the space needed for all spilled temps,
2446  // b) outgoing on-stack parameter areas, and
2447  // c) the minimum stack space this function needs to make available for the
2448  // functions it calls (a tunable ABI property).
2449  if (MFI.hasCalls()) {
2450  unsigned MoreStackForCalls = 0;
2451 
2452  for (auto &MBB : MF) {
2453  for (auto &MI : MBB) {
2454  if (!MI.isCall())
2455  continue;
2456 
2457  // Get callee operand.
2458  const MachineOperand &MO = MI.getOperand(0);
2459 
2460  // Only take account of global function calls (no closures etc.).
2461  if (!MO.isGlobal())
2462  continue;
2463 
2464  const Function *F = dyn_cast<Function>(MO.getGlobal());
2465  if (!F)
2466  continue;
2467 
2468  // Do not update 'MaxStack' for primitive and built-in functions
2469  // (encoded with names either starting with "erlang."/"bif_" or not
2470  // having a ".", such as a simple <Module>.<Function>.<Arity>, or an
2471  // "_", such as the BIF "suspend_0") as they are executed on another
2472  // stack.
2473  if (F->getName().find("erlang.") != StringRef::npos ||
2474  F->getName().find("bif_") != StringRef::npos ||
2475  F->getName().find_first_of("._") == StringRef::npos)
2476  continue;
2477 
2478  unsigned CalleeStkArity =
2479  F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
2480  if (HipeLeafWords - 1 > CalleeStkArity)
2481  MoreStackForCalls = std::max(MoreStackForCalls,
2482  (HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
2483  }
2484  }
2485  MaxStack += MoreStackForCalls;
2486  }
2487 
2488  // If the stack frame needed is larger than the guaranteed then runtime checks
2489  // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
2490  if (MaxStack > Guaranteed) {
2491  MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
2492  MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
2493 
2494  for (const auto &LI : PrologueMBB.liveins()) {
2495  stackCheckMBB->addLiveIn(LI);
2496  incStackMBB->addLiveIn(LI);
2497  }
2498 
2499  MF.push_front(incStackMBB);
2500  MF.push_front(stackCheckMBB);
2501 
2502  unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
2503  unsigned LEAop, CMPop, CALLop;
2504  SPLimitOffset = getHiPELiteral(HiPELiteralsMD, "P_NSP_LIMIT");
2505  if (Is64Bit) {
2506  SPReg = X86::RSP;
2507  PReg = X86::RBP;
2508  LEAop = X86::LEA64r;
2509  CMPop = X86::CMP64rm;
2510  CALLop = X86::CALL64pcrel32;
2511  } else {
2512  SPReg = X86::ESP;
2513  PReg = X86::EBP;
2514  LEAop = X86::LEA32r;
2515  CMPop = X86::CMP32rm;
2516  CALLop = X86::CALLpcrel32;
2517  }
2518 
2519  ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2520  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2521  "HiPE prologue scratch register is live-in");
2522 
2523  // Create new MBB for StackCheck:
2524  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
2525  SPReg, false, -MaxStack);
2526  // SPLimitOffset is in a fixed heap location (pointed by BP).
2527  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
2528  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2529  BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB);
2530 
2531  // Create new MBB for IncStack:
2532  BuildMI(incStackMBB, DL, TII.get(CALLop)).
2533  addExternalSymbol("inc_stack_0");
2534  addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
2535  SPReg, false, -MaxStack);
2536  addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
2537  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2538  BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB);
2539 
2540  stackCheckMBB->addSuccessor(&PrologueMBB, {99, 100});
2541  stackCheckMBB->addSuccessor(incStackMBB, {1, 100});
2542  incStackMBB->addSuccessor(&PrologueMBB, {99, 100});
2543  incStackMBB->addSuccessor(incStackMBB, {1, 100});
2544  }
2545 #ifdef EXPENSIVE_CHECKS
2546  MF.verify();
2547 #endif
2548 }
2549 
2550 bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB,
2552  const DebugLoc &DL,
2553  int Offset) const {
2554 
2555  if (Offset <= 0)
2556  return false;
2557 
2558  if (Offset % SlotSize)
2559  return false;
2560 
2561  int NumPops = Offset / SlotSize;
2562  // This is only worth it if we have at most 2 pops.
2563  if (NumPops != 1 && NumPops != 2)
2564  return false;
2565 
2566  // Handle only the trivial case where the adjustment directly follows
2567  // a call. This is the most common one, anyway.
2568  if (MBBI == MBB.begin())
2569  return false;
2570  MachineBasicBlock::iterator Prev = std::prev(MBBI);
2571  if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
2572  return false;
2573 
2574  unsigned Regs[2];
2575  unsigned FoundRegs = 0;
2576 
2577  auto &MRI = MBB.getParent()->getRegInfo();
2578  auto RegMask = Prev->getOperand(1);
2579 
2580  auto &RegClass =
2581  Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
2582  // Try to find up to NumPops free registers.
2583  for (auto Candidate : RegClass) {
2584 
2585  // Poor man's liveness:
2586  // Since we're immediately after a call, any register that is clobbered
2587  // by the call and not defined by it can be considered dead.
2588  if (!RegMask.clobbersPhysReg(Candidate))
2589  continue;
2590 
2591  // Don't clobber reserved registers
2592  if (MRI.isReserved(Candidate))
2593  continue;
2594 
2595  bool IsDef = false;
2596  for (const MachineOperand &MO : Prev->implicit_operands()) {
2597  if (MO.isReg() && MO.isDef() &&
2598  TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
2599  IsDef = true;
2600  break;
2601  }
2602  }
2603 
2604  if (IsDef)
2605  continue;
2606 
2607  Regs[FoundRegs++] = Candidate;
2608  if (FoundRegs == (unsigned)NumPops)
2609  break;
2610  }
2611 
2612  if (FoundRegs == 0)
2613  return false;
2614 
2615  // If we found only one free register, but need two, reuse the same one twice.
2616  while (FoundRegs < (unsigned)NumPops)
2617  Regs[FoundRegs++] = Regs[0];
2618 
2619  for (int i = 0; i < NumPops; ++i)
2620  BuildMI(MBB, MBBI, DL,
2621  TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]);
2622 
2623  return true;
2624 }
2625 
2629  bool reserveCallFrame = hasReservedCallFrame(MF);
2630  unsigned Opcode = I->getOpcode();
2631  bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
2632  DebugLoc DL = I->getDebugLoc();
2633  uint64_t Amount = !reserveCallFrame ? TII.getFrameSize(*I) : 0;
2634  uint64_t InternalAmt = (isDestroy || Amount) ? TII.getFrameAdjustment(*I) : 0;
2635  I = MBB.erase(I);
2636  auto InsertPos = skipDebugInstructionsForward(I, MBB.end());
2637 
2638  if (!reserveCallFrame) {
2639  // If the stack pointer can be changed after prologue, turn the
2640  // adjcallstackup instruction into a 'sub ESP, <amt>' and the
2641  // adjcallstackdown instruction into 'add ESP, <amt>'
2642 
2643  // We need to keep the stack aligned properly. To do this, we round the
2644  // amount of space needed for the outgoing arguments up to the next
2645  // alignment boundary.
2646  unsigned StackAlign = getStackAlignment();
2647  Amount = alignTo(Amount, StackAlign);
2648 
2649  MachineModuleInfo &MMI = MF.getMMI();
2650  const Function &F = MF.getFunction();
2651  bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
2652  bool DwarfCFI = !WindowsCFI &&
2653  (MMI.hasDebugInfo() || F.needsUnwindTableEntry());
2654 
2655  // If we have any exception handlers in this function, and we adjust
2656  // the SP before calls, we may need to indicate this to the unwinder
2657  // using GNU_ARGS_SIZE. Note that this may be necessary even when
2658  // Amount == 0, because the preceding function may have set a non-0
2659  // GNU_ARGS_SIZE.
2660  // TODO: We don't need to reset this between subsequent functions,
2661  // if it didn't change.
2662  bool HasDwarfEHHandlers = !WindowsCFI && !MF.getLandingPads().empty();
2663 
2664  if (HasDwarfEHHandlers && !isDestroy &&
2666  BuildCFI(MBB, InsertPos, DL,
2667  MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
2668 
2669  if (Amount == 0)
2670  return I;
2671 
2672  // Factor out the amount that gets handled inside the sequence
2673  // (Pushes of argument for frame setup, callee pops for frame destroy)
2674  Amount -= InternalAmt;
2675 
2676  // TODO: This is needed only if we require precise CFA.
2677  // If this is a callee-pop calling convention, emit a CFA adjust for
2678  // the amount the callee popped.
2679  if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF))
2680  BuildCFI(MBB, InsertPos, DL,
2681  MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
2682 
2683  // Add Amount to SP to destroy a frame, or subtract to setup.
2684  int64_t StackAdjustment = isDestroy ? Amount : -Amount;
2685  int64_t CfaAdjustment = -StackAdjustment;
2686 
2687  if (StackAdjustment) {
2688  // Merge with any previous or following adjustment instruction. Note: the
2689  // instructions merged with here do not have CFI, so their stack
2690  // adjustments do not feed into CfaAdjustment.
2691  StackAdjustment += mergeSPUpdates(MBB, InsertPos, true);
2692  StackAdjustment += mergeSPUpdates(MBB, InsertPos, false);
2693 
2694  if (StackAdjustment) {
2695  if (!(F.optForMinSize() &&
2696  adjustStackWithPops(MBB, InsertPos, DL, StackAdjustment)))
2697  BuildStackAdjustment(MBB, InsertPos, DL, StackAdjustment,
2698  /*InEpilogue=*/false);
2699  }
2700  }
2701 
2702  if (DwarfCFI && !hasFP(MF)) {
2703  // If we don't have FP, but need to generate unwind information,
2704  // we need to set the correct CFA offset after the stack adjustment.
2705  // How much we adjust the CFA offset depends on whether we're emitting
2706  // CFI only for EH purposes or for debugging. EH only requires the CFA
2707  // offset to be correct at each call site, while for debugging we want
2708  // it to be more precise.
2709 
2710  // TODO: When not using precise CFA, we also need to adjust for the
2711  // InternalAmt here.
2712  if (CfaAdjustment) {
2713  BuildCFI(MBB, InsertPos, DL,
2715  CfaAdjustment));
2716  }
2717  }
2718 
2719  return I;
2720  }
2721 
2722  if (isDestroy && InternalAmt) {
2723  // If we are performing frame pointer elimination and if the callee pops
2724  // something off the stack pointer, add it back. We do this until we have
2725  // more advanced stack pointer tracking ability.
2726  // We are not tracking the stack pointer adjustment by the callee, so make
2727  // sure we restore the stack pointer immediately after the call, there may
2728  // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
2731  while (CI != B && !std::prev(CI)->isCall())
2732  --CI;
2733  BuildStackAdjustment(MBB, CI, DL, -InternalAmt, /*InEpilogue=*/false);
2734  }
2735 
2736  return I;
2737 }
2738 
2740  assert(MBB.getParent() && "Block is not attached to a function!");
2741  const MachineFunction &MF = *MBB.getParent();
2742  return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
2743 }
2744 
2746  assert(MBB.getParent() && "Block is not attached to a function!");
2747 
2748  // Win64 has strict requirements in terms of epilogue and we are
2749  // not taking a chance at messing with them.
2750  // I.e., unless this block is already an exit block, we can't use
2751  // it as an epilogue.
2752  if (STI.isTargetWin64() && !MBB.succ_empty() && !MBB.isReturnBlock())
2753  return false;
2754 
2755  if (canUseLEAForSPInEpilogue(*MBB.getParent()))
2756  return true;
2757 
2758  // If we cannot use LEA to adjust SP, we may need to use ADD, which
2759  // clobbers the EFLAGS. Check that we do not need to preserve it,
2760  // otherwise, conservatively assume this is not
2761  // safe to insert the epilogue here.
2763 }
2764 
2766  // If we may need to emit frameless compact unwind information, give
2767  // up as this is currently broken: PR25614.
2768  return (MF.getFunction().hasFnAttribute(Attribute::NoUnwind) || hasFP(MF)) &&
2769  // The lowering of segmented stack and HiPE only support entry blocks
2770  // as prologue blocks: PR26107.
2771  // This limitation may be lifted if we fix:
2772  // - adjustForSegmentedStacks
2773  // - adjustForHiPEPrologue
2775  !MF.shouldSplitStack();
2776 }
2777 
2780  const DebugLoc &DL, bool RestoreSP) const {
2781  assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env");
2782  assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32");
2784  "restoring EBP/ESI on non-32-bit target");
2785 
2786  MachineFunction &MF = *MBB.getParent();
2787  unsigned FramePtr = TRI->getFrameRegister(MF);
2788  unsigned BasePtr = TRI->getBaseRegister();
2789  WinEHFuncInfo &FuncInfo = *MF.getWinEHFuncInfo();
2790  X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2791  MachineFrameInfo &MFI = MF.getFrameInfo();
2792 
2793  // FIXME: Don't set FrameSetup flag in catchret case.
2794 
2795  int FI = FuncInfo.EHRegNodeFrameIndex;
2796  int EHRegSize = MFI.getObjectSize(FI);
2797 
2798  if (RestoreSP) {
2799  // MOV32rm -EHRegSize(%ebp), %esp
2800  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
2801  X86::EBP, true, -EHRegSize)
2803  }
2804 
2805  unsigned UsedReg;
2806  int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
2807  int EndOffset = -EHRegOffset - EHRegSize;
2808  FuncInfo.EHRegNodeEndOffset = EndOffset;
2809 
2810  if (UsedReg == FramePtr) {
2811  // ADD $offset, %ebp
2812  unsigned ADDri = getADDriOpcode(false, EndOffset);
2813  BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
2814  .addReg(FramePtr)
2815  .addImm(EndOffset)
2817  ->getOperand(3)
2818  .setIsDead();
2819  assert(EndOffset >= 0 &&
2820  "end of registration object above normal EBP position!");
2821  } else if (UsedReg == BasePtr) {
2822  // LEA offset(%ebp), %esi
2823  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),
2824  FramePtr, false, EndOffset)
2826  // MOV32rm SavedEBPOffset(%esi), %ebp
2827  assert(X86FI->getHasSEHFramePtrSave());
2828  int Offset =
2829  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
2830  assert(UsedReg == BasePtr);
2831  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
2832  UsedReg, true, Offset)
2834  } else {
2835  llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");
2836  }
2837  return MBBI;
2838 }
2839 
2840 namespace {
2841 // Struct used by orderFrameObjects to help sort the stack objects.
2842 struct X86FrameSortingObject {
2843  bool IsValid = false; // true if we care about this Object.
2844  unsigned ObjectIndex = 0; // Index of Object into MFI list.
2845  unsigned ObjectSize = 0; // Size of Object in bytes.
2846  unsigned ObjectAlignment = 1; // Alignment of Object in bytes.
2847  unsigned ObjectNumUses = 0; // Object static number of uses.
2848 };
2849 
2850 // The comparison function we use for std::sort to order our local
2851 // stack symbols. The current algorithm is to use an estimated
2852 // "density". This takes into consideration the size and number of
2853 // uses each object has in order to roughly minimize code size.
2854 // So, for example, an object of size 16B that is referenced 5 times
2855 // will get higher priority than 4 4B objects referenced 1 time each.
2856 // It's not perfect and we may be able to squeeze a few more bytes out of
2857 // it (for example : 0(esp) requires fewer bytes, symbols allocated at the
2858 // fringe end can have special consideration, given their size is less
2859 // important, etc.), but the algorithmic complexity grows too much to be
2860 // worth the extra gains we get. This gets us pretty close.
2861 // The final order leaves us with objects with highest priority going
2862 // at the end of our list.
2863 struct X86FrameSortingComparator {
2864  inline bool operator()(const X86FrameSortingObject &A,
2865  const X86FrameSortingObject &B) {
2866  uint64_t DensityAScaled, DensityBScaled;
2867 
2868  // For consistency in our comparison, all invalid objects are placed
2869  // at the end. This also allows us to stop walking when we hit the
2870  // first invalid item after it's all sorted.
2871  if (!A.IsValid)
2872  return false;
2873  if (!B.IsValid)
2874  return true;
2875 
2876  // The density is calculated by doing :
2877  // (double)DensityA = A.ObjectNumUses / A.ObjectSize
2878  // (double)DensityB = B.ObjectNumUses / B.ObjectSize
2879  // Since this approach may cause inconsistencies in
2880  // the floating point <, >, == comparisons, depending on the floating
2881  // point model with which the compiler was built, we're going
2882  // to scale both sides by multiplying with
2883  // A.ObjectSize * B.ObjectSize. This ends up factoring away
2884  // the division and, with it, the need for any floating point
2885  // arithmetic.
2886  DensityAScaled = static_cast<uint64_t>(A.ObjectNumUses) *
2887  static_cast<uint64_t>(B.ObjectSize);
2888  DensityBScaled = static_cast<uint64_t>(B.ObjectNumUses) *
2889  static_cast<uint64_t>(A.ObjectSize);
2890 
2891  // If the two densities are equal, prioritize highest alignment
2892  // objects. This allows for similar alignment objects
2893  // to be packed together (given the same density).
2894  // There's room for improvement here, also, since we can pack
2895  // similar alignment (different density) objects next to each
2896  // other to save padding. This will also require further
2897  // complexity/iterations, and the overall gain isn't worth it,
2898  // in general. Something to keep in mind, though.
2899  if (DensityAScaled == DensityBScaled)
2900  return A.ObjectAlignment < B.ObjectAlignment;
2901 
2902  return DensityAScaled < DensityBScaled;
2903  }
2904 };
2905 } // namespace
2906 
2907 // Order the symbols in the local stack.
2908 // We want to place the local stack objects in some sort of sensible order.
2909 // The heuristic we use is to try and pack them according to static number
2910 // of uses and size of object in order to minimize code size.
2912  const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const {
2913  const MachineFrameInfo &MFI = MF.getFrameInfo();
2914 
2915  // Don't waste time if there's nothing to do.
2916  if (ObjectsToAllocate.empty())
2917  return;
2918 
2919  // Create an array of all MFI objects. We won't need all of these
2920  // objects, but we're going to create a full array of them to make
2921  // it easier to index into when we're counting "uses" down below.
2922  // We want to be able to easily/cheaply access an object by simply
2923  // indexing into it, instead of having to search for it every time.
2924  std::vector<X86FrameSortingObject> SortingObjects(MFI.getObjectIndexEnd());
2925 
2926  // Walk the objects we care about and mark them as such in our working
2927  // struct.
2928  for (auto &Obj : ObjectsToAllocate) {
2929  SortingObjects[Obj].IsValid = true;
2930  SortingObjects[Obj].ObjectIndex = Obj;
2931  SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlignment(Obj);
2932  // Set the size.
2933  int ObjectSize = MFI.getObjectSize(Obj);
2934  if (ObjectSize == 0)
2935  // Variable size. Just use 4.
2936  SortingObjects[Obj].ObjectSize = 4;
2937  else
2938  SortingObjects[Obj].ObjectSize = ObjectSize;
2939  }
2940 
2941  // Count the number of uses for each object.
2942  for (auto &MBB : MF) {
2943  for (auto &MI : MBB) {
2944  if (MI.isDebugValue())
2945  continue;
2946  for (const MachineOperand &MO : MI.operands()) {
2947  // Check to see if it's a local stack symbol.
2948  if (!MO.isFI())
2949  continue;
2950  int Index = MO.getIndex();
2951  // Check to see if it falls within our range, and is tagged
2952  // to require ordering.
2953  if (Index >= 0 && Index < MFI.getObjectIndexEnd() &&
2954  SortingObjects[Index].IsValid)
2955  SortingObjects[Index].ObjectNumUses++;
2956  }
2957  }
2958  }
2959 
2960  // Sort the objects using X86FrameSortingAlgorithm (see its comment for
2961  // info).
2962  std::stable_sort(SortingObjects.begin(), SortingObjects.end(),
2963  X86FrameSortingComparator());
2964 
2965  // Now modify the original list to represent the final order that
2966  // we want. The order will depend on whether we're going to access them
2967  // from the stack pointer or the frame pointer. For SP, the list should
2968  // end up with the END containing objects that we want with smaller offsets.
2969  // For FP, it should be flipped.
2970  int i = 0;
2971  for (auto &Obj : SortingObjects) {
2972  // All invalid items are sorted at the end, so it's safe to stop.
2973  if (!Obj.IsValid)
2974  break;
2975  ObjectsToAllocate[i++] = Obj.ObjectIndex;
2976  }
2977 
2978  // Flip it if we're accessing off of the FP.
2979  if (!TRI->needsStackRealignment(MF) && hasFP(MF))
2980  std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
2981 }
2982 
2983 
2985  // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
2986  unsigned Offset = 16;
2987  // RBP is immediately pushed.
2988  Offset += SlotSize;
2989  // All callee-saved registers are then pushed.
2990  Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
2991  // Every funclet allocates enough stack space for the largest outgoing call.
2992  Offset += getWinEHFuncletFrameSize(MF);
2993  return Offset;
2994 }
2995 
2997  MachineFunction &MF, RegScavenger *RS) const {
2998  // Mark the function as not having WinCFI. We will set it back to true in
2999  // emitPrologue if it gets called and emits CFI.
3000  MF.setHasWinCFI(false);
3001 
3002  // If this function isn't doing Win64-style C++ EH, we don't need to do
3003  // anything.
3004  const Function &F = MF.getFunction();
3005  if (!STI.is64Bit() || !MF.hasEHFunclets() ||
3007  return;
3008 
3009  // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset
3010  // relative to RSP after the prologue. Find the offset of the last fixed
3011  // object, so that we can allocate a slot immediately following it. If there
3012  // were no fixed objects, use offset -SlotSize, which is immediately after the
3013  // return address. Fixed objects have negative frame indices.
3014  MachineFrameInfo &MFI = MF.getFrameInfo();
3015  WinEHFuncInfo &EHInfo = *MF.getWinEHFuncInfo();
3016  int64_t MinFixedObjOffset = -SlotSize;
3017  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I)
3018  MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
3019 
3020  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
3021  for (WinEHHandlerType &H : TBME.HandlerArray) {
3022  int FrameIndex = H.CatchObj.FrameIndex;
3023  if (FrameIndex != INT_MAX) {
3024  // Ensure alignment.
3025  unsigned Align = MFI.getObjectAlignment(FrameIndex);
3026  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % Align;
3027  MinFixedObjOffset -= MFI.getObjectSize(FrameIndex);
3028  MFI.setObjectOffset(FrameIndex, MinFixedObjOffset);
3029  }
3030  }
3031  }
3032 
3033  // Ensure alignment.
3034  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
3035  int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize;
3036  int UnwindHelpFI =
3037  MFI.CreateFixedObject(SlotSize, UnwindHelpOffset, /*Immutable=*/false);
3038  EHInfo.UnwindHelpFrameIdx = UnwindHelpFI;
3039 
3040  // Store -2 into UnwindHelp on function entry. We have to scan forwards past
3041  // other frame setup instructions.
3042  MachineBasicBlock &MBB = MF.front();
3043  auto MBBI = MBB.begin();
3044  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
3045  ++MBBI;
3046 
3047  DebugLoc DL = MBB.findDebugLoc(MBBI);
3048  addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),
3049  UnwindHelpFI)
3050  .addImm(-2);
3051 }
void push_front(MachineBasicBlock *MBB)
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:158
constexpr bool isUInt< 32 >(uint64_t x)
Definition: MathExtras.h:341
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:448
Fast - This calling convention attempts to make calls as fast as possible (e.g.
Definition: CallingConv.h:43
static bool flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB)
Check if the flags need to be preserved before the terminators.
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:569
bool hasBasePointer(const MachineFunction &MF) const
BitVector & set()
Definition: BitVector.h:398
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:77
DILocation * get() const
Get the underlying DILocation.
Definition: DebugLoc.cpp:21
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:30
MachineBasicBlock * getMBB() const
bool hasDebugInfo() const
Returns true if valid debug info is present.
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1073
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:115
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Function Alias Analysis false
bool isOSWindows() const
Definition: X86Subtarget.h:645
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
const X86InstrInfo * getInstrInfo() const override
Definition: X86Subtarget.h:406
bool hasStackObjects() const
Return true if there are any stack objects in this function.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:271
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
bool isCleanupFuncletEntry() const
Returns true if this is the entry block of a cleanup funclet.
unsigned getReg() const
getReg - Returns the register number.
const TargetRegisterClass * getGPRsForTailCall(const MachineFunction &MF) const
getGPRsForTailCall - Returns a register class with registers that can be used in forming tail calls...
static unsigned getLEArOpcode(unsigned IsLP64)
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:411
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
MachineBasicBlock::iterator restoreWin32EHStackPointers(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool RestoreSP=false) const
Sets up EBP and optionally ESI based on the incoming EBP value.
constexpr bool isInt< 8 >(int64_t x)
Definition: MathExtras.h:295
void setCalleeSavedFrameSize(unsigned bytes)
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:270
arg_iterator arg_end()
Definition: Function.h:626
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:862
void setIsDead(bool Val=true)
F(f)
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
MachineModuleInfo & getMMI() const
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1067
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:677
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
union llvm::WinEHHandlerType::@167 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
bool isTargetNaCl64() const
Definition: X86Subtarget.h:615
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:398
unsigned getSlotSize() const
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:405
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
bool isTargetWindowsMSVC() const
Definition: X86Subtarget.h:619
X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride)
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
return AArch64::GPR64RegClass contains(Reg)
iterator_range< succ_iterator > successors()
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
bool Uses64BitFramePtr
True if the 64-bit frame or stack pointer should be used.
unsigned getSpillAlignment(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class...
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:658
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
A tuple of MDNodes.
Definition: Metadata.h:1323
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction. ...
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const HexagonInstrInfo * TII
bool isTarget64BitLP64() const
Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?
Definition: X86Subtarget.h:467
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
bool is32Bit() const
Definition: X86Subtarget.h:452
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Reg
All possible values of the reg field in the ModR/M byte.
iterator_range< iterator > terminators()
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
void adjustForHiPEPrologue(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Erlang programs may need a special prologue to handle the stack size they might need at runtime...
unsigned getNumOperands() const
Definition: Metadata.cpp:1069
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:293
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
static const uint64_t kSplitStackAvailable
virtual unsigned getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
unsigned getBaseRegister() const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
auto reverse(ContainerTy &&C, typename std::enable_if< has_rbegin< ContainerTy >::value >::type *=nullptr) -> decltype(make_range(C.rbegin(), C.rend()))
Definition: STLExtras.h:233
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override
uint16_t StackAdjustment(const RuntimeFunction &RF)
StackAdjustment - calculated stack adjustment in words.
Definition: ARMWinEH.h:197
bool canUseLEAForSPInEpilogue(const MachineFunction &MF) const
Check that LEA can be used on SP in an epilogue sequence for MF.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
bool needsFrameIndexResolution(const MachineFunction &MF) const override
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe inline-stub with the actual probe code inline.
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
static unsigned getANDriOpcode(bool IsLP64, int64_t Imm)
const MCContext & getContext() const
const RegList & Regs
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:133
int getObjectIndexBegin() const
Return the minimum frame object index.
NamedMDNode * getNamedMetadata(const Twine &Name) const
Return the first NamedMDNode in the module with the specified name.
Definition: Module.cpp:242
static unsigned getHiPELiteral(NamedMDNode *HiPELiteralsMD, const StringRef LiteralName)
Lookup an ERTS parameter in the !hipe.literals named metadata node.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:648
bool hasCopyImplyingStackAdjustment() const
Returns true if the function contains operations which will lower down to instructions which manipula...
StringRef getStackProbeSymbolName(MachineFunction &MF) const override
Returns the name of the symbol used to emit stack probes or the empty string if not applicable...
Value wrapper in the Metadata hierarchy.
Definition: Metadata.h:337
static unsigned calculateSetFPREG(uint64_t SPAdjust)
bool Is64Bit
Is64Bit implies that x86_64 instructions are available.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
unsigned getUndefRegState(bool B)
void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const MCCFIInstruction &CFIInst) const
Wraps up getting a CFI index and building a MachineInstr for it.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
unsigned getKillRegState(bool B)
unsigned getCodeViewFlag() const
Returns the CodeView Version by checking module flags.
Definition: Module.cpp:460
unsigned getStackRegister() const
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:121
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
TargetInstrInfo - Interface to description of machine instruction set.
StringRef getString() const
Definition: Metadata.cpp:456
unsigned getDefRegState(bool B)
The memory access is volatile.
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:402
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:149
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
unsigned const MachineRegisterInfo * MRI
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:391
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool isBundled() const
Return true if this instruction part of a bundle.
Definition: MachineInstr.h:244
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
bool hasEHFunclets() const
void setStackSize(uint64_t Size)
Set the size of the stack.
static bool is64Bit(const char *name)
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE instructions.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:36
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
const GlobalValue * getGlobal() const
const X86InstrInfo & TII
#define H(x, y, z)
Definition: MD5.cpp:57
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size)
A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE.
Definition: MCDwarf.h:472
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:188
MCRegAliasIterator enumerates all registers aliasing Reg.
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset]...
bool useLeaForSP() const
Definition: X86Subtarget.h:545
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
unsigned getFramePtr() const
Returns physical register used as frame pointer.
bool isTargetFreeBSD() const
Definition: X86Subtarget.h:600
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
size_t arg_size() const
Definition: Function.h:644
arg_iterator arg_begin()
Definition: Function.h:617
self_iterator getIterator()
Definition: ilist_node.h:82
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn&#39;t already there.
Definition: SmallSet.h:81
bool isTargetDarwin() const
Definition: X86Subtarget.h:599
int CreateSpillStackObject(uint64_t Size, unsigned Alignment)
Create a new statically sized stack object that represents a spill slot, returning a nonnegative iden...
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineBasicBlock & front() const
bool isTargetWin64() const
Definition: X86Subtarget.h:647
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
virtual bool hasReservedCallFrame(const MachineFunction &MF) const
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm)
static bool isFuncletReturnInstr(MachineInstr &MI)
static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm)
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const
Emit target stack probe code.
The memory access writes data.
std::enable_if< std::numeric_limits< T >::is_signed, bool >::type getAsInteger(unsigned Radix, T &Result) const
Parse the current string as an integer of the specified radix.
Definition: StringRef.h:497
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
const X86Subtarget & STI
Iterator for intrusive lists based on ilist_node.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
constexpr bool isInt< 32 >(int64_t x)
Definition: MathExtras.h:301
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
bool regsOverlap(unsigned regA, unsigned regB) const
Returns true if the two registers are equal or alias each other.
bool shouldSplitStack() const
Should we be emitting segmented stack stuff for the function.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:194
MachineOperand class - Representation of each machine instruction operand.
Information about stack frame layout on the target.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool isTargetWin32() const
Definition: X86Subtarget.h:649
int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, unsigned &FrameReg, bool IgnoreSPUpdates) const override
Same as getFrameIndexReference, except that the stack pointer (as opposed to the frame pointer) will ...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
int64_t getFrameAdjustment(const MachineInstr &I) const
Returns the stack pointer adjustment that happens inside the frame setup..destroy sequence (e...
Definition: X86InstrInfo.h:189
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
bool callsUnwindInit() const
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - If there is a reserved call frame, the call frame pseudos can be simpli...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
const Function & getFunction() const
Return the LLVM function that this machine code represents.
bool isTarget64BitILP32() const
Is this x86_64 with the ILP32 programming model (x32 ABI)?
Definition: X86Subtarget.h:461
bool needsUnwindTableEntry() const
True if this function needs an unwind table.
Definition: Function.h:519
bool callsEHReturn() const
unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
static bool isTailCallOpcode(unsigned Opc)
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:97
CodeModel::Model getCodeModel() const
Returns the code model.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:654
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
int getFrameIndexReferenceSP(const MachineFunction &MF, int FI, unsigned &SPReg, int Adjustment) const
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
bool isLiveIn(unsigned Reg) const
Representation of each machine instruction.
Definition: MachineInstr.h:60
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Adjust the prologue to have the function use segmented stacks.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
void ensureMaxAlignment(unsigned Align)
Make sure the function is at least Align bytes aligned.
static const size_t npos
Definition: StringRef.h:51
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB &#39;Other&#39; at the position From, and insert it into this MBB right before &#39;...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isTargetDragonFly() const
Definition: X86Subtarget.h:601
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:61
bool verify(Pass *p=nullptr, const char *Banner=nullptr, bool AbortOnError=true) const
Run the current MachineFunction through the machine code verifier, useful for debugger use...
StringRef getValueAsString() const
Return the attribute&#39;s value as a string.
Definition: Attributes.cpp:195
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
StringRef getName() const
Return a constant reference to the value&#39;s name.
Definition: Value.cpp:224
TargetOptions Options
Definition: TargetMachine.h:98
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned char TargetFlags=0) const
LLVM_NODISCARD size_t find_first_of(char C, size_t From=0) const
Find the first character in the string that is C, or npos if not found.
Definition: StringRef.h:395
#define I(x, y, z)
Definition: MD5.cpp:58
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1213
bool optForMinSize() const
Optimize this function for minimum size (-Oz).
Definition: Function.h:541
Pair of physical register and lane mask.
virtual const TargetFrameLowering * getFrameLowering() const
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
int getOffsetAdjustment() const
Return the correction for frame offsets.
static unsigned getSUBrrOpcode(unsigned isLP64)
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const X86RegisterInfo * TRI
const Module * getModule() const
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
static cl::opt< int > PageSize("imp-null-check-page-size", cl::desc("The page size of the target in bytes"), cl::init(4096), cl::Hidden)
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents &#39;eh_return&#39; gcc dwarf builtin...
Definition: ISDOpcodes.h:102
CallingConvention
Definition: Dwarf.h:194
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isEAXLiveIn(MachineBasicBlock &MBB)
static unsigned getADDrrOpcode(unsigned isLP64)
void insert(iterator MBBI, MachineBasicBlock *MBB)
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary)
GetScratchRegister - Get a temp register for performing work in the segmented stack and the Erlang/Hi...
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:286
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1259
bool isTargetLinux() const
Definition: X86Subtarget.h:609
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const X86RegisterInfo *TRI, bool Is64Bit)
findDeadCallerSavedReg - Return a caller-saved register that isn&#39;t live when it reaches the "return" ...
bool isCallingConvWin64(CallingConv::ID CC) const
Definition: X86Subtarget.h:660
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.h:280
static const unsigned FramePtr
int getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
A single uniqued string.
Definition: Metadata.h:602
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL) const
unsigned getFrameRegister(const MachineFunction &MF) const override
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
No exception support.
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack.
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const
Check the instruction before/after the passed instruction.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1073
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t find(char C, size_t From=0) const
Search for the first character C in the string.
Definition: StringRef.h:298
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:298
static bool HasNestArgument(const MachineFunction *MF)
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:84
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
X86_INTR - x86 hardware interrupt context.
Definition: CallingConv.h:174
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value...
X86_FastCall - &#39;fast&#39; analog of X86_StdCall.
Definition: CallingConv.h:92
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
This class contains meta information specific to a module.
bool hasCalls() const
Return true if the current function has any function calls.
unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:65
bool isTargetWindowsCoreCLR() const
Definition: X86Subtarget.h:627