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X86FrameLowering.cpp
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1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the X86 implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "X86TargetMachine.h"
20 #include "llvm/ADT/SmallSet.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
32 #include "llvm/Support/Debug.h"
34 #include <cstdlib>
35 
36 using namespace llvm;
37 
39  unsigned StackAlignOverride)
40  : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
41  STI.is64Bit() ? -8 : -4),
42  STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
43  // Cache a bunch of frame-related predicates for this subtarget.
45  Is64Bit = STI.is64Bit();
46  IsLP64 = STI.isTarget64BitLP64();
47  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
50 }
51 
53  return !MF.getFrameInfo().hasVarSizedObjects() &&
54  !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
55 }
56 
57 /// canSimplifyCallFramePseudos - If there is a reserved call frame, the
58 /// call frame pseudos can be simplified. Having a FP, as in the default
59 /// implementation, is not sufficient here since we can't always use it.
60 /// Use a more nuanced condition.
61 bool
63  return hasReservedCallFrame(MF) ||
64  (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
65  TRI->hasBasePointer(MF);
66 }
67 
68 // needsFrameIndexResolution - Do we need to perform FI resolution for
69 // this function. Normally, this is required only when the function
70 // has any stack objects. However, FI resolution actually has another job,
71 // not apparent from the title - it resolves callframesetup/destroy
72 // that were not simplified earlier.
73 // So, this is required for x86 functions that have push sequences even
74 // when there are no stack objects.
75 bool
77  return MF.getFrameInfo().hasStackObjects() ||
78  MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
79 }
80 
81 /// hasFP - Return true if the specified function should have a dedicated frame
82 /// pointer register. This is true if the function has variable sized allocas
83 /// or if frame pointer elimination is disabled.
85  const MachineFrameInfo &MFI = MF.getFrameInfo();
86  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
87  TRI->needsStackRealignment(MF) ||
88  MFI.hasVarSizedObjects() ||
90  MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
91  MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
92  MFI.hasStackMap() || MFI.hasPatchPoint() ||
94 }
95 
96 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
97  if (IsLP64) {
98  if (isInt<8>(Imm))
99  return X86::SUB64ri8;
100  return X86::SUB64ri32;
101  } else {
102  if (isInt<8>(Imm))
103  return X86::SUB32ri8;
104  return X86::SUB32ri;
105  }
106 }
107 
108 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
109  if (IsLP64) {
110  if (isInt<8>(Imm))
111  return X86::ADD64ri8;
112  return X86::ADD64ri32;
113  } else {
114  if (isInt<8>(Imm))
115  return X86::ADD32ri8;
116  return X86::ADD32ri;
117  }
118 }
119 
120 static unsigned getSUBrrOpcode(unsigned isLP64) {
121  return isLP64 ? X86::SUB64rr : X86::SUB32rr;
122 }
123 
124 static unsigned getADDrrOpcode(unsigned isLP64) {
125  return isLP64 ? X86::ADD64rr : X86::ADD32rr;
126 }
127 
128 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
129  if (IsLP64) {
130  if (isInt<8>(Imm))
131  return X86::AND64ri8;
132  return X86::AND64ri32;
133  }
134  if (isInt<8>(Imm))
135  return X86::AND32ri8;
136  return X86::AND32ri;
137 }
138 
139 static unsigned getLEArOpcode(unsigned IsLP64) {
140  return IsLP64 ? X86::LEA64r : X86::LEA32r;
141 }
142 
143 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
144 /// when it reaches the "return" instruction. We can then pop a stack object
145 /// to this register without worry about clobbering it.
148  const X86RegisterInfo *TRI,
149  bool Is64Bit) {
150  const MachineFunction *MF = MBB.getParent();
151  const Function *F = MF->getFunction();
152  if (!F || MF->callsEHReturn())
153  return 0;
154 
155  const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF);
156 
157  if (MBBI == MBB.end())
158  return 0;
159 
160  switch (MBBI->getOpcode()) {
161  default: return 0;
162  case TargetOpcode::PATCHABLE_RET:
163  case X86::RET:
164  case X86::RETL:
165  case X86::RETQ:
166  case X86::RETIL:
167  case X86::RETIQ:
168  case X86::TCRETURNdi:
169  case X86::TCRETURNri:
170  case X86::TCRETURNmi:
171  case X86::TCRETURNdi64:
172  case X86::TCRETURNri64:
173  case X86::TCRETURNmi64:
174  case X86::EH_RETURN:
175  case X86::EH_RETURN64: {
177  for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
178  MachineOperand &MO = MBBI->getOperand(i);
179  if (!MO.isReg() || MO.isDef())
180  continue;
181  unsigned Reg = MO.getReg();
182  if (!Reg)
183  continue;
184  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
185  Uses.insert(*AI);
186  }
187 
188  for (auto CS : AvailableRegs)
189  if (!Uses.count(CS) && CS != X86::RIP)
190  return CS;
191  }
192  }
193 
194  return 0;
195 }
196 
197 static bool isEAXLiveIn(MachineBasicBlock &MBB) {
198  for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) {
199  unsigned Reg = RegMask.PhysReg;
200 
201  if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
202  Reg == X86::AH || Reg == X86::AL)
203  return true;
204  }
205 
206  return false;
207 }
208 
209 /// Check if the flags need to be preserved before the terminators.
210 /// This would be the case, if the eflags is live-in of the region
211 /// composed by the terminators or live-out of that region, without
212 /// being defined by a terminator.
213 static bool
215  for (const MachineInstr &MI : MBB.terminators()) {
216  bool BreakNext = false;
217  for (const MachineOperand &MO : MI.operands()) {
218  if (!MO.isReg())
219  continue;
220  unsigned Reg = MO.getReg();
221  if (Reg != X86::EFLAGS)
222  continue;
223 
224  // This terminator needs an eflags that is not defined
225  // by a previous another terminator:
226  // EFLAGS is live-in of the region composed by the terminators.
227  if (!MO.isDef())
228  return true;
229  // This terminator defines the eflags, i.e., we don't need to preserve it.
230  // However, we still need to check this specific terminator does not
231  // read a live-in value.
232  BreakNext = true;
233  }
234  // We found a definition of the eflags, no need to preserve them.
235  if (BreakNext)
236  return false;
237  }
238 
239  // None of the terminators use or define the eflags.
240  // Check if they are live-out, that would imply we need to preserve them.
241  for (const MachineBasicBlock *Succ : MBB.successors())
242  if (Succ->isLiveIn(X86::EFLAGS))
243  return true;
244 
245  return false;
246 }
247 
248 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
249 /// stack pointer by a constant value.
252  int64_t NumBytes, bool InEpilogue) const {
253  bool isSub = NumBytes < 0;
254  uint64_t Offset = isSub ? -NumBytes : NumBytes;
257 
258  uint64_t Chunk = (1LL << 31) - 1;
259  DebugLoc DL = MBB.findDebugLoc(MBBI);
260 
261  if (Offset > Chunk) {
262  // Rather than emit a long series of instructions for large offsets,
263  // load the offset into a register and do one sub/add
264  unsigned Reg = 0;
265  unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
266 
267  if (isSub && !isEAXLiveIn(MBB))
268  Reg = Rax;
269  else
270  Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
271 
272  unsigned MovRIOpc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
273  unsigned AddSubRROpc =
275  if (Reg) {
276  BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg)
277  .addImm(Offset)
278  .setMIFlag(Flag);
279  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr)
280  .addReg(StackPtr)
281  .addReg(Reg);
282  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
283  return;
284  } else if (Offset > 8 * Chunk) {
285  // If we would need more than 8 add or sub instructions (a >16GB stack
286  // frame), it's worth spilling RAX to materialize this immediate.
287  // pushq %rax
288  // movabsq +-$Offset+-SlotSize, %rax
289  // addq %rsp, %rax
290  // xchg %rax, (%rsp)
291  // movq (%rsp), %rsp
292  assert(Is64Bit && "can't have 32-bit 16GB stack frame");
293  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
294  .addReg(Rax, RegState::Kill)
295  .setMIFlag(Flag);
296  // Subtract is not commutative, so negate the offset and always use add.
297  // Subtract 8 less and add 8 more to account for the PUSH we just did.
298  if (isSub)
299  Offset = -(Offset - SlotSize);
300  else
301  Offset = Offset + SlotSize;
302  BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax)
303  .addImm(Offset)
304  .setMIFlag(Flag);
305  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax)
306  .addReg(Rax)
307  .addReg(StackPtr);
308  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
309  // Exchange the new SP in RAX with the top of the stack.
310  addRegOffset(
311  BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax),
312  StackPtr, false, 0);
313  // Load new SP from the top of the stack into RSP.
314  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),
315  StackPtr, false, 0);
316  return;
317  }
318  }
319 
320  while (Offset) {
321  uint64_t ThisVal = std::min(Offset, Chunk);
322  if (ThisVal == SlotSize) {
323  // Use push / pop for slot sized adjustments as a size optimization. We
324  // need to find a dead register when using pop.
325  unsigned Reg = isSub
326  ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
327  : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
328  if (Reg) {
329  unsigned Opc = isSub
330  ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
331  : (Is64Bit ? X86::POP64r : X86::POP32r);
332  BuildMI(MBB, MBBI, DL, TII.get(Opc))
333  .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))
334  .setMIFlag(Flag);
335  Offset -= ThisVal;
336  continue;
337  }
338  }
339 
340  BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue)
341  .setMIFlag(Flag);
342 
343  Offset -= ThisVal;
344  }
345 }
346 
347 MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
349  const DebugLoc &DL, int64_t Offset, bool InEpilogue) const {
350  assert(Offset != 0 && "zero offset stack adjustment requested");
351 
352  // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue
353  // is tricky.
354  bool UseLEA;
355  if (!InEpilogue) {
356  // Check if inserting the prologue at the beginning
357  // of MBB would require to use LEA operations.
358  // We need to use LEA operations if EFLAGS is live in, because
359  // it means an instruction will read it before it gets defined.
360  UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);
361  } else {
362  // If we can use LEA for SP but we shouldn't, check that none
363  // of the terminators uses the eflags. Otherwise we will insert
364  // a ADD that will redefine the eflags and break the condition.
365  // Alternatively, we could move the ADD, but this may not be possible
366  // and is an optimization anyway.
367  UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent());
368  if (UseLEA && !STI.useLeaForSP())
370  // If that assert breaks, that means we do not do the right thing
371  // in canUseAsEpilogue.
373  "We shouldn't have allowed this insertion point");
374  }
375 
377  if (UseLEA) {
378  MI = addRegOffset(BuildMI(MBB, MBBI, DL,
380  StackPtr),
381  StackPtr, false, Offset);
382  } else {
383  bool IsSub = Offset < 0;
384  uint64_t AbsOffset = IsSub ? -Offset : Offset;
385  unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset)
386  : getADDriOpcode(Uses64BitFramePtr, AbsOffset);
387  MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
388  .addReg(StackPtr)
389  .addImm(AbsOffset);
390  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
391  }
392  return MI;
393 }
394 
397  bool doMergeWithPrevious) const {
398  if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
399  (!doMergeWithPrevious && MBBI == MBB.end()))
400  return 0;
401 
402  MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
403  MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr
404  : std::next(MBBI);
405  PI = skipDebugInstructionsBackward(PI, MBB.begin());
406  if (NI != nullptr)
407  NI = skipDebugInstructionsForward(NI, MBB.end());
408 
409  unsigned Opc = PI->getOpcode();
410  int Offset = 0;
411 
412  if (!doMergeWithPrevious && NI != MBB.end() &&
413  NI->getOpcode() == TargetOpcode::CFI_INSTRUCTION) {
414  // Don't merge with the next instruction if it has CFI.
415  return Offset;
416  }
417 
418  if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
419  Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
420  PI->getOperand(0).getReg() == StackPtr){
421  assert(PI->getOperand(1).getReg() == StackPtr);
422  Offset += PI->getOperand(2).getImm();
423  MBB.erase(PI);
424  if (!doMergeWithPrevious) MBBI = NI;
425  } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
426  PI->getOperand(0).getReg() == StackPtr &&
427  PI->getOperand(1).getReg() == StackPtr &&
428  PI->getOperand(2).getImm() == 1 &&
429  PI->getOperand(3).getReg() == X86::NoRegister &&
430  PI->getOperand(5).getReg() == X86::NoRegister) {
431  // For LEAs we have: def = lea SP, FI, noreg, Offset, noreg.
432  Offset += PI->getOperand(4).getImm();
433  MBB.erase(PI);
434  if (!doMergeWithPrevious) MBBI = NI;
435  } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
436  Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
437  PI->getOperand(0).getReg() == StackPtr) {
438  assert(PI->getOperand(1).getReg() == StackPtr);
439  Offset -= PI->getOperand(2).getImm();
440  MBB.erase(PI);
441  if (!doMergeWithPrevious) MBBI = NI;
442  }
443 
444  return Offset;
445 }
446 
449  const DebugLoc &DL,
450  const MCCFIInstruction &CFIInst) const {
451  MachineFunction &MF = *MBB.getParent();
452  unsigned CFIIndex = MF.addFrameInst(CFIInst);
453  BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
454  .addCFIIndex(CFIIndex);
455 }
456 
459  const DebugLoc &DL) const {
460  MachineFunction &MF = *MBB.getParent();
461  MachineFrameInfo &MFI = MF.getFrameInfo();
462  MachineModuleInfo &MMI = MF.getMMI();
463  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
464 
465  // Add callee saved registers to move list.
466  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
467  if (CSI.empty()) return;
468 
469  // Calculate offsets.
470  for (std::vector<CalleeSavedInfo>::const_iterator
471  I = CSI.begin(), E = CSI.end(); I != E; ++I) {
472  int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
473  unsigned Reg = I->getReg();
474 
475  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
476  BuildCFI(MBB, MBBI, DL,
477  MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
478  }
479 }
480 
482  MachineBasicBlock &MBB,
484  const DebugLoc &DL, bool InProlog) const {
485  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
486  if (STI.isTargetWindowsCoreCLR()) {
487  if (InProlog) {
488  emitStackProbeInlineStub(MF, MBB, MBBI, DL, true);
489  } else {
490  emitStackProbeInline(MF, MBB, MBBI, DL, false);
491  }
492  } else {
493  emitStackProbeCall(MF, MBB, MBBI, DL, InProlog);
494  }
495 }
496 
498  MachineBasicBlock &PrologMBB) const {
499  const StringRef ChkStkStubSymbol = "__chkstk_stub";
500  MachineInstr *ChkStkStub = nullptr;
501 
502  for (MachineInstr &MI : PrologMBB) {
503  if (MI.isCall() && MI.getOperand(0).isSymbol() &&
504  ChkStkStubSymbol == MI.getOperand(0).getSymbolName()) {
505  ChkStkStub = &MI;
506  break;
507  }
508  }
509 
510  if (ChkStkStub != nullptr) {
511  assert(!ChkStkStub->isBundled() &&
512  "Not expecting bundled instructions here");
513  MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
514  assert(std::prev(MBBI) == ChkStkStub &&
515  "MBBI expected after __chkstk_stub.");
516  DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
517  emitStackProbeInline(MF, PrologMBB, MBBI, DL, true);
518  ChkStkStub->eraseFromParent();
519  }
520 }
521 
522 void X86FrameLowering::emitStackProbeInline(MachineFunction &MF,
523  MachineBasicBlock &MBB,
525  const DebugLoc &DL,
526  bool InProlog) const {
527  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
528  assert(STI.is64Bit() && "different expansion needed for 32 bit");
529  assert(STI.isTargetWindowsCoreCLR() && "custom expansion expects CoreCLR");
530  const TargetInstrInfo &TII = *STI.getInstrInfo();
531  const BasicBlock *LLVM_BB = MBB.getBasicBlock();
532 
533  // RAX contains the number of bytes of desired stack adjustment.
534  // The handling here assumes this value has already been updated so as to
535  // maintain stack alignment.
536  //
537  // We need to exit with RSP modified by this amount and execute suitable
538  // page touches to notify the OS that we're growing the stack responsibly.
539  // All stack probing must be done without modifying RSP.
540  //
541  // MBB:
542  // SizeReg = RAX;
543  // ZeroReg = 0
544  // CopyReg = RSP
545  // Flags, TestReg = CopyReg - SizeReg
546  // FinalReg = !Flags.Ovf ? TestReg : ZeroReg
547  // LimitReg = gs magic thread env access
548  // if FinalReg >= LimitReg goto ContinueMBB
549  // RoundBB:
550  // RoundReg = page address of FinalReg
551  // LoopMBB:
552  // LoopReg = PHI(LimitReg,ProbeReg)
553  // ProbeReg = LoopReg - PageSize
554  // [ProbeReg] = 0
555  // if (ProbeReg > RoundReg) goto LoopMBB
556  // ContinueMBB:
557  // RSP = RSP - RAX
558  // [rest of original MBB]
559 
560  // Set up the new basic blocks
561  MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB);
562  MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB);
563  MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB);
564 
565  MachineFunction::iterator MBBIter = std::next(MBB.getIterator());
566  MF.insert(MBBIter, RoundMBB);
567  MF.insert(MBBIter, LoopMBB);
568  MF.insert(MBBIter, ContinueMBB);
569 
570  // Split MBB and move the tail portion down to ContinueMBB.
571  MachineBasicBlock::iterator BeforeMBBI = std::prev(MBBI);
572  ContinueMBB->splice(ContinueMBB->begin(), &MBB, MBBI, MBB.end());
573  ContinueMBB->transferSuccessorsAndUpdatePHIs(&MBB);
574 
575  // Some useful constants
576  const int64_t ThreadEnvironmentStackLimit = 0x10;
577  const int64_t PageSize = 0x1000;
578  const int64_t PageMask = ~(PageSize - 1);
579 
580  // Registers we need. For the normal case we use virtual
581  // registers. For the prolog expansion we use RAX, RCX and RDX.
583  const TargetRegisterClass *RegClass = &X86::GR64RegClass;
584  const unsigned SizeReg = InProlog ? (unsigned)X86::RAX
585  : MRI.createVirtualRegister(RegClass),
586  ZeroReg = InProlog ? (unsigned)X86::RCX
587  : MRI.createVirtualRegister(RegClass),
588  CopyReg = InProlog ? (unsigned)X86::RDX
589  : MRI.createVirtualRegister(RegClass),
590  TestReg = InProlog ? (unsigned)X86::RDX
591  : MRI.createVirtualRegister(RegClass),
592  FinalReg = InProlog ? (unsigned)X86::RDX
593  : MRI.createVirtualRegister(RegClass),
594  RoundedReg = InProlog ? (unsigned)X86::RDX
595  : MRI.createVirtualRegister(RegClass),
596  LimitReg = InProlog ? (unsigned)X86::RCX
597  : MRI.createVirtualRegister(RegClass),
598  JoinReg = InProlog ? (unsigned)X86::RCX
599  : MRI.createVirtualRegister(RegClass),
600  ProbeReg = InProlog ? (unsigned)X86::RCX
601  : MRI.createVirtualRegister(RegClass);
602 
603  // SP-relative offsets where we can save RCX and RDX.
604  int64_t RCXShadowSlot = 0;
605  int64_t RDXShadowSlot = 0;
606 
607  // If inlining in the prolog, save RCX and RDX.
608  // Future optimization: don't save or restore if not live in.
609  if (InProlog) {
610  // Compute the offsets. We need to account for things already
611  // pushed onto the stack at this point: return address, frame
612  // pointer (if used), and callee saves.
614  const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize();
615  const bool HasFP = hasFP(MF);
616  RCXShadowSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0);
617  RDXShadowSlot = RCXShadowSlot + 8;
618  // Emit the saves.
619  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
620  RCXShadowSlot)
621  .addReg(X86::RCX);
622  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
623  RDXShadowSlot)
624  .addReg(X86::RDX);
625  } else {
626  // Not in the prolog. Copy RAX to a virtual reg.
627  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX);
628  }
629 
630  // Add code to MBB to check for overflow and set the new target stack pointer
631  // to zero if so.
632  BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)
633  .addReg(ZeroReg, RegState::Undef)
634  .addReg(ZeroReg, RegState::Undef);
635  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);
636  BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)
637  .addReg(CopyReg)
638  .addReg(SizeReg);
639  BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg)
640  .addReg(TestReg)
641  .addReg(ZeroReg);
642 
643  // FinalReg now holds final stack pointer value, or zero if
644  // allocation would overflow. Compare against the current stack
645  // limit from the thread environment block. Note this limit is the
646  // lowest touched page on the stack, not the point at which the OS
647  // will cause an overflow exception, so this is just an optimization
648  // to avoid unnecessarily touching pages that are below the current
649  // SP but already committed to the stack by the OS.
650  BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg)
651  .addReg(0)
652  .addImm(1)
653  .addReg(0)
654  .addImm(ThreadEnvironmentStackLimit)
655  .addReg(X86::GS);
656  BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg);
657  // Jump if the desired stack pointer is at or above the stack limit.
658  BuildMI(&MBB, DL, TII.get(X86::JAE_1)).addMBB(ContinueMBB);
659 
660  // Add code to roundMBB to round the final stack pointer to a page boundary.
661  BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)
662  .addReg(FinalReg)
663  .addImm(PageMask);
664  BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB);
665 
666  // LimitReg now holds the current stack limit, RoundedReg page-rounded
667  // final RSP value. Add code to loopMBB to decrement LimitReg page-by-page
668  // and probe until we reach RoundedReg.
669  if (!InProlog) {
670  BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg)
671  .addReg(LimitReg)
672  .addMBB(RoundMBB)
673  .addReg(ProbeReg)
674  .addMBB(LoopMBB);
675  }
676 
677  addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,
678  false, -PageSize);
679 
680  // Probe by storing a byte onto the stack.
681  BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi))
682  .addReg(ProbeReg)
683  .addImm(1)
684  .addReg(0)
685  .addImm(0)
686  .addReg(0)
687  .addImm(0);
688  BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))
689  .addReg(RoundedReg)
690  .addReg(ProbeReg);
691  BuildMI(LoopMBB, DL, TII.get(X86::JNE_1)).addMBB(LoopMBB);
692 
693  MachineBasicBlock::iterator ContinueMBBI = ContinueMBB->getFirstNonPHI();
694 
695  // If in prolog, restore RDX and RCX.
696  if (InProlog) {
697  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
698  X86::RCX),
699  X86::RSP, false, RCXShadowSlot);
700  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
701  X86::RDX),
702  X86::RSP, false, RDXShadowSlot);
703  }
704 
705  // Now that the probing is done, add code to continueMBB to update
706  // the stack pointer for real.
707  BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
708  .addReg(X86::RSP)
709  .addReg(SizeReg);
710 
711  // Add the control flow edges we need.
712  MBB.addSuccessor(ContinueMBB);
713  MBB.addSuccessor(RoundMBB);
714  RoundMBB->addSuccessor(LoopMBB);
715  LoopMBB->addSuccessor(ContinueMBB);
716  LoopMBB->addSuccessor(LoopMBB);
717 
718  // Mark all the instructions added to the prolog as frame setup.
719  if (InProlog) {
720  for (++BeforeMBBI; BeforeMBBI != MBB.end(); ++BeforeMBBI) {
721  BeforeMBBI->setFlag(MachineInstr::FrameSetup);
722  }
723  for (MachineInstr &MI : *RoundMBB) {
724  MI.setFlag(MachineInstr::FrameSetup);
725  }
726  for (MachineInstr &MI : *LoopMBB) {
727  MI.setFlag(MachineInstr::FrameSetup);
728  }
729  for (MachineBasicBlock::iterator CMBBI = ContinueMBB->begin();
730  CMBBI != ContinueMBBI; ++CMBBI) {
731  CMBBI->setFlag(MachineInstr::FrameSetup);
732  }
733  }
734 
735  // Possible TODO: physreg liveness for InProlog case.
736 }
737 
738 void X86FrameLowering::emitStackProbeCall(MachineFunction &MF,
739  MachineBasicBlock &MBB,
741  const DebugLoc &DL,
742  bool InProlog) const {
743  bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
744 
745  unsigned CallOp;
746  if (Is64Bit)
747  CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
748  else
749  CallOp = X86::CALLpcrel32;
750 
752 
754  MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI);
755 
756  // All current stack probes take AX and SP as input, clobber flags, and
757  // preserve all registers. x86_64 probes leave RSP unmodified.
758  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
759  // For the large code model, we have to call through a register. Use R11,
760  // as it is scratch in all supported calling conventions.
761  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
762  .addExternalSymbol(MF.createExternalSymbolName(Symbol));
763  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
764  } else {
765  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp))
766  .addExternalSymbol(MF.createExternalSymbolName(Symbol));
767  }
768 
769  unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
770  unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
771  CI.addReg(AX, RegState::Implicit)
775  .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
776 
777  if (STI.isTargetWin64() || !STI.isOSWindows()) {
778  // MSVC x32's _chkstk and cygwin/mingw's _alloca adjust %esp themselves.
779  // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
780  // themselves. They also does not clobber %rax so we can reuse it when
781  // adjusting %rsp.
782  // All other platforms do not specify a particular ABI for the stack probe
783  // function, so we arbitrarily define it to not adjust %esp/%rsp itself.
784  BuildMI(MBB, MBBI, DL, TII.get(getSUBrrOpcode(Is64Bit)), SP)
785  .addReg(SP)
786  .addReg(AX);
787  }
788 
789  if (InProlog) {
790  // Apply the frame setup flag to all inserted instrs.
791  for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI)
792  ExpansionMBBI->setFlag(MachineInstr::FrameSetup);
793  }
794 }
795 
796 void X86FrameLowering::emitStackProbeInlineStub(
798  MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const {
799 
800  assert(InProlog && "ChkStkStub called outside prolog!");
801 
802  BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32))
803  .addExternalSymbol("__chkstk_stub");
804 }
805 
806 static unsigned calculateSetFPREG(uint64_t SPAdjust) {
807  // Win64 ABI has a less restrictive limitation of 240; 128 works equally well
808  // and might require smaller successive adjustments.
809  const uint64_t Win64MaxSEHOffset = 128;
810  uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
811  // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode.
812  return SEHFrameOffset & -16;
813 }
814 
815 // If we're forcing a stack realignment we can't rely on just the frame
816 // info, we need to know the ABI stack alignment as well in case we
817 // have a call out. Otherwise just make sure we have some alignment - we'll
818 // go with the minimum SlotSize.
819 uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const {
820  const MachineFrameInfo &MFI = MF.getFrameInfo();
821  uint64_t MaxAlign = MFI.getMaxAlignment(); // Desired stack alignment.
822  unsigned StackAlign = getStackAlignment();
823  if (MF.getFunction()->hasFnAttribute("stackrealign")) {
824  if (MFI.hasCalls())
825  MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
826  else if (MaxAlign < SlotSize)
827  MaxAlign = SlotSize;
828  }
829  return MaxAlign;
830 }
831 
832 void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
834  const DebugLoc &DL, unsigned Reg,
835  uint64_t MaxAlign) const {
836  uint64_t Val = -MaxAlign;
837  unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
838  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
839  .addReg(Reg)
840  .addImm(Val)
842 
843  // The EFLAGS implicit def is dead.
844  MI->getOperand(3).setIsDead();
845 }
846 
847 /// emitPrologue - Push callee-saved registers onto the stack, which
848 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
849 /// space for local variables. Also emit labels used by the exception handler to
850 /// generate the exception handling frames.
851 
852 /*
853  Here's a gist of what gets emitted:
854 
855  ; Establish frame pointer, if needed
856  [if needs FP]
857  push %rbp
858  .cfi_def_cfa_offset 16
859  .cfi_offset %rbp, -16
860  .seh_pushreg %rpb
861  mov %rsp, %rbp
862  .cfi_def_cfa_register %rbp
863 
864  ; Spill general-purpose registers
865  [for all callee-saved GPRs]
866  pushq %<reg>
867  [if not needs FP]
868  .cfi_def_cfa_offset (offset from RETADDR)
869  .seh_pushreg %<reg>
870 
871  ; If the required stack alignment > default stack alignment
872  ; rsp needs to be re-aligned. This creates a "re-alignment gap"
873  ; of unknown size in the stack frame.
874  [if stack needs re-alignment]
875  and $MASK, %rsp
876 
877  ; Allocate space for locals
878  [if target is Windows and allocated space > 4096 bytes]
879  ; Windows needs special care for allocations larger
880  ; than one page.
881  mov $NNN, %rax
882  call ___chkstk_ms/___chkstk
883  sub %rax, %rsp
884  [else]
885  sub $NNN, %rsp
886 
887  [if needs FP]
888  .seh_stackalloc (size of XMM spill slots)
889  .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
890  [else]
891  .seh_stackalloc NNN
892 
893  ; Spill XMMs
894  ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved,
895  ; they may get spilled on any platform, if the current function
896  ; calls @llvm.eh.unwind.init
897  [if needs FP]
898  [for all callee-saved XMM registers]
899  movaps %<xmm reg>, -MMM(%rbp)
900  [for all callee-saved XMM registers]
901  .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
902  ; i.e. the offset relative to (%rbp - SEHFrameOffset)
903  [else]
904  [for all callee-saved XMM registers]
905  movaps %<xmm reg>, KKK(%rsp)
906  [for all callee-saved XMM registers]
907  .seh_savexmm %<xmm reg>, KKK
908 
909  .seh_endprologue
910 
911  [if needs base pointer]
912  mov %rsp, %rbx
913  [if needs to restore base pointer]
914  mov %rsp, -MMM(%rbp)
915 
916  ; Emit CFI info
917  [if needs FP]
918  [for all callee-saved registers]
919  .cfi_offset %<reg>, (offset from %rbp)
920  [else]
921  .cfi_def_cfa_offset (offset from RETADDR)
922  [for all callee-saved registers]
923  .cfi_offset %<reg>, (offset from %rsp)
924 
925  Notes:
926  - .seh directives are emitted only for Windows 64 ABI
927  - .cv_fpo directives are emitted on win32 when emitting CodeView
928  - .cfi directives are emitted for all other ABIs
929  - for 32-bit code, substitute %e?? registers for %r??
930 */
931 
933  MachineBasicBlock &MBB) const {
934  assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
935  "MF used frame lowering for wrong subtarget");
936  MachineBasicBlock::iterator MBBI = MBB.begin();
937  MachineFrameInfo &MFI = MF.getFrameInfo();
938  const Function *Fn = MF.getFunction();
939  MachineModuleInfo &MMI = MF.getMMI();
941  uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
942  uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate.
943  bool IsFunclet = MBB.isEHFuncletEntry();
945  if (Fn->hasPersonalityFn())
946  Personality = classifyEHPersonality(Fn->getPersonalityFn());
947  bool FnHasClrFunclet =
948  MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
949  bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
950  bool HasFP = hasFP(MF);
951  bool IsWin64CC = STI.isCallingConvWin64(Fn->getCallingConv());
952  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
953  bool NeedsWin64CFI = IsWin64Prologue && Fn->needsUnwindTableEntry();
954  // FIXME: Emit FPO data for EH funclets.
955  bool NeedsWinFPO =
956  !IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag();
957  bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
958  bool NeedsDwarfCFI =
959  !IsWin64Prologue && (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
960  unsigned FramePtr = TRI->getFrameRegister(MF);
961  const unsigned MachineFramePtr =
963  ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
964  unsigned BasePtr = TRI->getBaseRegister();
965  bool HasWinCFI = false;
966 
967  // Debug location must be unknown since the first debug location is used
968  // to determine the end of the prologue.
969  DebugLoc DL;
970 
971  // Add RETADDR move area to callee saved frame size.
972  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
973  if (TailCallReturnAddrDelta && IsWin64Prologue)
974  report_fatal_error("Can't handle guaranteed tail call under win64 yet");
975 
976  if (TailCallReturnAddrDelta < 0)
978  X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
979 
980  bool UseStackProbe = !STI.getTargetLowering()->getStackProbeSymbolName(MF).empty();
981 
982  // The default stack probe size is 4096 if the function has no stackprobesize
983  // attribute.
984  unsigned StackProbeSize = 4096;
985  if (Fn->hasFnAttribute("stack-probe-size"))
986  Fn->getFnAttribute("stack-probe-size")
988  .getAsInteger(0, StackProbeSize);
989 
990  // Re-align the stack on 64-bit if the x86-interrupt calling convention is
991  // used and an error code was pushed, since the x86-64 ABI requires a 16-byte
992  // stack alignment.
993  if (Fn->getCallingConv() == CallingConv::X86_INTR && Is64Bit &&
994  Fn->arg_size() == 2) {
995  StackSize += 8;
996  MFI.setStackSize(StackSize);
997  emitSPUpdate(MBB, MBBI, -8, /*InEpilogue=*/false);
998  }
999 
1000  // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
1001  // function, and use up to 128 bytes of stack space, don't have a frame
1002  // pointer, calls, or dynamic alloca then we do not need to adjust the
1003  // stack pointer (we fit in the Red Zone). We also check that we don't
1004  // push and pop from the stack.
1005  if (Is64Bit && !Fn->hasFnAttribute(Attribute::NoRedZone) &&
1006  !TRI->needsStackRealignment(MF) &&
1007  !MFI.hasVarSizedObjects() && // No dynamic alloca.
1008  !MFI.adjustsStack() && // No calls.
1009  !UseStackProbe && // No stack probes.
1010  !IsWin64CC && // Win64 has no Red Zone
1011  !MFI.hasCopyImplyingStackAdjustment() && // Don't push and pop.
1012  !MF.shouldSplitStack()) { // Regular stack
1013  uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
1014  if (HasFP) MinSize += SlotSize;
1015  X86FI->setUsesRedZone(MinSize > 0 || StackSize > 0);
1016  StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
1017  MFI.setStackSize(StackSize);
1018  }
1019 
1020  // Insert stack pointer adjustment for later moving of return addr. Only
1021  // applies to tail call optimized functions where the callee argument stack
1022  // size is bigger than the callers.
1023  if (TailCallReturnAddrDelta < 0) {
1024  BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta,
1025  /*InEpilogue=*/false)
1027  }
1028 
1029  // Mapping for machine moves:
1030  //
1031  // DST: VirtualFP AND
1032  // SRC: VirtualFP => DW_CFA_def_cfa_offset
1033  // ELSE => DW_CFA_def_cfa
1034  //
1035  // SRC: VirtualFP AND
1036  // DST: Register => DW_CFA_def_cfa_register
1037  //
1038  // ELSE
1039  // OFFSET < 0 => DW_CFA_offset_extended_sf
1040  // REG < 64 => DW_CFA_offset + Reg
1041  // ELSE => DW_CFA_offset_extended
1042 
1043  uint64_t NumBytes = 0;
1044  int stackGrowth = -SlotSize;
1045 
1046  // Find the funclet establisher parameter
1047  unsigned Establisher = X86::NoRegister;
1048  if (IsClrFunclet)
1049  Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
1050  else if (IsFunclet)
1051  Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
1052 
1053  if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1054  // Immediately spill establisher into the home slot.
1055  // The runtime cares about this.
1056  // MOV64mr %rdx, 16(%rsp)
1057  unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1058  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)
1059  .addReg(Establisher)
1061  MBB.addLiveIn(Establisher);
1062  }
1063 
1064  if (HasFP) {
1065  assert(MF.getRegInfo().isReserved(MachineFramePtr) && "FP reserved");
1066 
1067  // Calculate required stack adjustment.
1068  uint64_t FrameSize = StackSize - SlotSize;
1069  // If required, include space for extra hidden slot for stashing base pointer.
1070  if (X86FI->getRestoreBasePointer())
1071  FrameSize += SlotSize;
1072 
1073  NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
1074 
1075  // Callee-saved registers are pushed on stack before the stack is realigned.
1076  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1077  NumBytes = alignTo(NumBytes, MaxAlign);
1078 
1079  // Get the offset of the stack slot for the EBP register, which is
1080  // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
1081  // Update the frame offset adjustment.
1082  if (!IsFunclet)
1083  MFI.setOffsetAdjustment(-NumBytes);
1084  else
1085  assert(MFI.getOffsetAdjustment() == -(int)NumBytes &&
1086  "should calculate same local variable offset for funclets");
1087 
1088  // Save EBP/RBP into the appropriate stack slot.
1089  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
1090  .addReg(MachineFramePtr, RegState::Kill)
1092 
1093  if (NeedsDwarfCFI) {
1094  // Mark the place where EBP/RBP was saved.
1095  // Define the current CFA rule to use the provided offset.
1096  assert(StackSize);
1097  BuildCFI(MBB, MBBI, DL,
1098  MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth));
1099 
1100  // Change the rule for the FramePtr to be an "offset" rule.
1101  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1103  nullptr, DwarfFramePtr, 2 * stackGrowth));
1104  }
1105 
1106  if (NeedsWinCFI) {
1107  HasWinCFI = true;
1108  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1109  .addImm(FramePtr)
1111  }
1112 
1113  if (!IsWin64Prologue && !IsFunclet) {
1114  // Update EBP with the new base value.
1115  BuildMI(MBB, MBBI, DL,
1116  TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),
1117  FramePtr)
1118  .addReg(StackPtr)
1120 
1121  if (NeedsDwarfCFI) {
1122  // Mark effective beginning of when frame pointer becomes valid.
1123  // Define the current CFA to use the EBP/RBP register.
1124  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1126  nullptr, DwarfFramePtr));
1127  }
1128 
1129  if (NeedsWinFPO) {
1130  // .cv_fpo_setframe $FramePtr
1131  HasWinCFI = true;
1132  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1133  .addImm(FramePtr)
1134  .addImm(0)
1136  }
1137  }
1138  } else {
1139  assert(!IsFunclet && "funclets without FPs not yet implemented");
1140  NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
1141  }
1142 
1143  // For EH funclets, only allocate enough space for outgoing calls. Save the
1144  // NumBytes value that we would've used for the parent frame.
1145  unsigned ParentFrameNumBytes = NumBytes;
1146  if (IsFunclet)
1147  NumBytes = getWinEHFuncletFrameSize(MF);
1148 
1149  // Skip the callee-saved push instructions.
1150  bool PushedRegs = false;
1151  int StackOffset = 2 * stackGrowth;
1152 
1153  while (MBBI != MBB.end() &&
1154  MBBI->getFlag(MachineInstr::FrameSetup) &&
1155  (MBBI->getOpcode() == X86::PUSH32r ||
1156  MBBI->getOpcode() == X86::PUSH64r)) {
1157  PushedRegs = true;
1158  unsigned Reg = MBBI->getOperand(0).getReg();
1159  ++MBBI;
1160 
1161  if (!HasFP && NeedsDwarfCFI) {
1162  // Mark callee-saved push instruction.
1163  // Define the current CFA rule to use the provided offset.
1164  assert(StackSize);
1165  BuildCFI(MBB, MBBI, DL,
1166  MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
1167  StackOffset += stackGrowth;
1168  }
1169 
1170  if (NeedsWinCFI) {
1171  HasWinCFI = true;
1172  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1173  .addImm(Reg)
1175  }
1176  }
1177 
1178  // Realign stack after we pushed callee-saved registers (so that we'll be
1179  // able to calculate their offsets from the frame pointer).
1180  // Don't do this for Win64, it needs to realign the stack after the prologue.
1181  if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
1182  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1183  BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
1184  }
1185 
1186  // If there is an SUB32ri of ESP immediately before this instruction, merge
1187  // the two. This can be the case when tail call elimination is enabled and
1188  // the callee has more arguments then the caller.
1189  NumBytes -= mergeSPUpdates(MBB, MBBI, true);
1190 
1191  // Adjust stack pointer: ESP -= numbytes.
1192 
1193  // Windows and cygwin/mingw require a prologue helper routine when allocating
1194  // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
1195  // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
1196  // stack and adjust the stack pointer in one go. The 64-bit version of
1197  // __chkstk is only responsible for probing the stack. The 64-bit prologue is
1198  // responsible for adjusting the stack pointer. Touching the stack at 4K
1199  // increments is necessary to ensure that the guard pages used by the OS
1200  // virtual memory manager are allocated in correct sequence.
1201  uint64_t AlignedNumBytes = NumBytes;
1202  if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
1203  AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
1204  if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
1205  assert(!X86FI->getUsesRedZone() &&
1206  "The Red Zone is not accounted for in stack probes");
1207 
1208  // Check whether EAX is livein for this block.
1209  bool isEAXAlive = isEAXLiveIn(MBB);
1210 
1211  if (isEAXAlive) {
1212  // Sanity check that EAX is not livein for this function.
1213  // It should not be, so throw an assert.
1214  assert(!Is64Bit && "EAX is livein in x64 case!");
1215 
1216  // Save EAX
1217  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
1218  .addReg(X86::EAX, RegState::Kill)
1220  }
1221 
1222  if (Is64Bit) {
1223  // Handle the 64-bit Windows ABI case where we need to call __chkstk.
1224  // Function prologue is responsible for adjusting the stack pointer.
1225  if (isUInt<32>(NumBytes)) {
1226  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1227  .addImm(NumBytes)
1229  } else if (isInt<32>(NumBytes)) {
1230  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)
1231  .addImm(NumBytes)
1233  } else {
1234  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
1235  .addImm(NumBytes)
1237  }
1238  } else {
1239  // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
1240  // We'll also use 4 already allocated bytes for EAX.
1241  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1242  .addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
1244  }
1245 
1246  // Call __chkstk, __chkstk_ms, or __alloca.
1247  emitStackProbe(MF, MBB, MBBI, DL, true);
1248 
1249  if (isEAXAlive) {
1250  // Restore EAX
1251  MachineInstr *MI =
1252  addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),
1253  StackPtr, false, NumBytes - 4);
1255  MBB.insert(MBBI, MI);
1256  }
1257  } else if (NumBytes) {
1258  emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
1259  }
1260 
1261  if (NeedsWinCFI && NumBytes) {
1262  HasWinCFI = true;
1263  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))
1264  .addImm(NumBytes)
1266  }
1267 
1268  int SEHFrameOffset = 0;
1269  unsigned SPOrEstablisher;
1270  if (IsFunclet) {
1271  if (IsClrFunclet) {
1272  // The establisher parameter passed to a CLR funclet is actually a pointer
1273  // to the (mostly empty) frame of its nearest enclosing funclet; we have
1274  // to find the root function establisher frame by loading the PSPSym from
1275  // the intermediate frame.
1276  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1277  MachinePointerInfo NoInfo;
1278  MBB.addLiveIn(Establisher);
1279  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),
1280  Establisher, false, PSPSlotOffset)
1283  ;
1284  // Save the root establisher back into the current funclet's (mostly
1285  // empty) frame, in case a sub-funclet or the GC needs it.
1286  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,
1287  false, PSPSlotOffset)
1288  .addReg(Establisher)
1289  .addMemOperand(
1292  SlotSize, SlotSize));
1293  }
1294  SPOrEstablisher = Establisher;
1295  } else {
1296  SPOrEstablisher = StackPtr;
1297  }
1298 
1299  if (IsWin64Prologue && HasFP) {
1300  // Set RBP to a small fixed offset from RSP. In the funclet case, we base
1301  // this calculation on the incoming establisher, which holds the value of
1302  // RSP from the parent frame at the end of the prologue.
1303  SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes);
1304  if (SEHFrameOffset)
1305  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
1306  SPOrEstablisher, false, SEHFrameOffset);
1307  else
1308  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
1309  .addReg(SPOrEstablisher);
1310 
1311  // If this is not a funclet, emit the CFI describing our frame pointer.
1312  if (NeedsWinCFI && !IsFunclet) {
1313  assert(!NeedsWinFPO && "this setframe incompatible with FPO data");
1314  HasWinCFI = true;
1315  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1316  .addImm(FramePtr)
1317  .addImm(SEHFrameOffset)
1319  if (isAsynchronousEHPersonality(Personality))
1320  MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset;
1321  }
1322  } else if (IsFunclet && STI.is32Bit()) {
1323  // Reset EBP / ESI to something good for funclets.
1324  MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL);
1325  // If we're a catch funclet, we can be returned to via catchret. Save ESP
1326  // into the registration node so that the runtime will restore it for us.
1327  if (!MBB.isCleanupFuncletEntry()) {
1328  assert(Personality == EHPersonality::MSVC_CXX);
1329  unsigned FrameReg;
1330  int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex;
1331  int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1332  // ESP is the first field, so no extra displacement is needed.
1333  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
1334  false, EHRegOffset)
1335  .addReg(X86::ESP);
1336  }
1337  }
1338 
1339  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
1340  const MachineInstr &FrameInstr = *MBBI;
1341  ++MBBI;
1342 
1343  if (NeedsWinCFI) {
1344  int FI;
1345  if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
1346  if (X86::FR64RegClass.contains(Reg)) {
1347  unsigned IgnoredFrameReg;
1348  int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
1349  Offset += SEHFrameOffset;
1350 
1351  HasWinCFI = true;
1352  assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data");
1353  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
1354  .addImm(Reg)
1355  .addImm(Offset)
1357  }
1358  }
1359  }
1360  }
1361 
1362  if (NeedsWinCFI && HasWinCFI)
1363  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))
1364  .setMIFlag(MachineInstr::FrameSetup);
1365 
1366  if (FnHasClrFunclet && !IsFunclet) {
1367  // Save the so-called Initial-SP (i.e. the value of the stack pointer
1368  // immediately after the prolog) into the PSPSlot so that funclets
1369  // and the GC can recover it.
1370  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1371  auto PSPInfo = MachinePointerInfo::getFixedStack(
1372  MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx);
1373  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,
1374  PSPSlotOffset)
1375  .addReg(StackPtr)
1378  SlotSize, SlotSize));
1379  }
1380 
1381  // Realign stack after we spilled callee-saved registers (so that we'll be
1382  // able to calculate their offsets from the frame pointer).
1383  // Win64 requires aligning the stack after the prologue.
1384  if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
1385  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1386  BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
1387  }
1388 
1389  // We already dealt with stack realignment and funclets above.
1390  if (IsFunclet && STI.is32Bit())
1391  return;
1392 
1393  // If we need a base pointer, set it up here. It's whatever the value
1394  // of the stack pointer is at this point. Any variable size objects
1395  // will be allocated after this, so we can still use the base pointer
1396  // to reference locals.
1397  if (TRI->hasBasePointer(MF)) {
1398  // Update the base pointer with the current stack pointer.
1399  unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;
1400  BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1401  .addReg(SPOrEstablisher)
1403  if (X86FI->getRestoreBasePointer()) {
1404  // Stash value of base pointer. Saving RSP instead of EBP shortens
1405  // dependence chain. Used by SjLj EH.
1406  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1407  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)),
1408  FramePtr, true, X86FI->getRestoreBasePointerOffset())
1409  .addReg(SPOrEstablisher)
1411  }
1412 
1413  if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) {
1414  // Stash the value of the frame pointer relative to the base pointer for
1415  // Win32 EH. This supports Win32 EH, which does the inverse of the above:
1416  // it recovers the frame pointer from the base pointer rather than the
1417  // other way around.
1418  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1419  unsigned UsedReg;
1420  int Offset =
1421  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
1422  assert(UsedReg == BasePtr);
1423  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
1424  .addReg(FramePtr)
1426  }
1427  }
1428 
1429  if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
1430  // Mark end of stack pointer adjustment.
1431  if (!HasFP && NumBytes) {
1432  // Define the current CFA rule to use the provided offset.
1433  assert(StackSize);
1435  nullptr, -StackSize + stackGrowth));
1436  }
1437 
1438  // Emit DWARF info specifying the offsets of the callee-saved registers.
1439  emitCalleeSavedFrameMoves(MBB, MBBI, DL);
1440  }
1441 
1442  // X86 Interrupt handling function cannot assume anything about the direction
1443  // flag (DF in EFLAGS register). Clear this flag by creating "cld" instruction
1444  // in each prologue of interrupt handler function.
1445  //
1446  // FIXME: Create "cld" instruction only in these cases:
1447  // 1. The interrupt handling function uses any of the "rep" instructions.
1448  // 2. Interrupt handling function calls another function.
1449  //
1451  BuildMI(MBB, MBBI, DL, TII.get(X86::CLD))
1452  .setMIFlag(MachineInstr::FrameSetup);
1453 
1454  // At this point we know if the function has WinCFI or not.
1455  MF.setHasWinCFI(HasWinCFI);
1456 }
1457 
1459  const MachineFunction &MF) const {
1460  // We can't use LEA instructions for adjusting the stack pointer if we don't
1461  // have a frame pointer in the Win64 ABI. Only ADD instructions may be used
1462  // to deallocate the stack.
1463  // This means that we can use LEA for SP in two situations:
1464  // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.
1465  // 2. We *have* a frame pointer which means we are permitted to use LEA.
1466  return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
1467 }
1468 
1470  switch (MI.getOpcode()) {
1471  case X86::CATCHRET:
1472  case X86::CLEANUPRET:
1473  return true;
1474  default:
1475  return false;
1476  }
1477  llvm_unreachable("impossible");
1478 }
1479 
1480 // CLR funclets use a special "Previous Stack Pointer Symbol" slot on the
1481 // stack. It holds a pointer to the bottom of the root function frame. The
1482 // establisher frame pointer passed to a nested funclet may point to the
1483 // (mostly empty) frame of its parent funclet, but it will need to find
1484 // the frame of the root function to access locals. To facilitate this,
1485 // every funclet copies the pointer to the bottom of the root function
1486 // frame into a PSPSym slot in its own (mostly empty) stack frame. Using the
1487 // same offset for the PSPSym in the root function frame that's used in the
1488 // funclets' frames allows each funclet to dynamically accept any ancestor
1489 // frame as its establisher argument (the runtime doesn't guarantee the
1490 // immediate parent for some reason lost to history), and also allows the GC,
1491 // which uses the PSPSym for some bookkeeping, to find it in any funclet's
1492 // frame with only a single offset reported for the entire method.
1493 unsigned
1494 X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const {
1495  const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo();
1496  unsigned SPReg;
1498  /*IgnoreSPUpdates*/ true);
1499  assert(Offset >= 0 && SPReg == TRI->getStackRegister());
1500  return static_cast<unsigned>(Offset);
1501 }
1502 
1503 unsigned
1504 X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const {
1505  // This is the size of the pushed CSRs.
1506  unsigned CSSize =
1507  MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
1508  // This is the amount of stack a funclet needs to allocate.
1509  unsigned UsedSize;
1510  EHPersonality Personality =
1512  if (Personality == EHPersonality::CoreCLR) {
1513  // CLR funclets need to hold enough space to include the PSPSym, at the
1514  // same offset from the stack pointer (immediately after the prolog) as it
1515  // resides at in the main function.
1516  UsedSize = getPSPSlotOffsetFromSP(MF) + SlotSize;
1517  } else {
1518  // Other funclets just need enough stack for outgoing call arguments.
1519  UsedSize = MF.getFrameInfo().getMaxCallFrameSize();
1520  }
1521  // RBP is not included in the callee saved register block. After pushing RBP,
1522  // everything is 16 byte aligned. Everything we allocate before an outgoing
1523  // call must also be 16 byte aligned.
1524  unsigned FrameSizeMinusRBP = alignTo(CSSize + UsedSize, getStackAlignment());
1525  // Subtract out the size of the callee saved registers. This is how much stack
1526  // each funclet will allocate.
1527  return FrameSizeMinusRBP - CSSize;
1528 }
1529 
1530 static bool isTailCallOpcode(unsigned Opc) {
1531  return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
1532  Opc == X86::TCRETURNmi ||
1533  Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNdi64 ||
1534  Opc == X86::TCRETURNmi64;
1535 }
1536 
1538  MachineBasicBlock &MBB) const {
1539  const MachineFrameInfo &MFI = MF.getFrameInfo();
1543  DebugLoc DL;
1544  if (MBBI != MBB.end())
1545  DL = MBBI->getDebugLoc();
1546  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
1547  const bool Is64BitILP32 = STI.isTarget64BitILP32();
1548  unsigned FramePtr = TRI->getFrameRegister(MF);
1549  unsigned MachineFramePtr =
1550  Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
1551 
1552  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1553  bool NeedsWin64CFI =
1554  IsWin64Prologue && MF.getFunction()->needsUnwindTableEntry();
1555  bool IsFunclet = MBBI == MBB.end() ? false : isFuncletReturnInstr(*MBBI);
1556 
1557  // Get the number of bytes to allocate from the FrameInfo.
1558  uint64_t StackSize = MFI.getStackSize();
1559  uint64_t MaxAlign = calculateMaxStackAlign(MF);
1560  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1561  bool HasFP = hasFP(MF);
1562  uint64_t NumBytes = 0;
1563 
1564  if (IsFunclet) {
1565  assert(HasFP && "EH funclets without FP not yet implemented");
1566  NumBytes = getWinEHFuncletFrameSize(MF);
1567  } else if (HasFP) {
1568  // Calculate required stack adjustment.
1569  uint64_t FrameSize = StackSize - SlotSize;
1570  NumBytes = FrameSize - CSSize;
1571 
1572  // Callee-saved registers were pushed on stack before the stack was
1573  // realigned.
1574  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1575  NumBytes = alignTo(FrameSize, MaxAlign);
1576  } else {
1577  NumBytes = StackSize - CSSize;
1578  }
1579  uint64_t SEHStackAllocAmt = NumBytes;
1580 
1581  if (HasFP) {
1582  // Pop EBP.
1583  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1584  MachineFramePtr)
1585  .setMIFlag(MachineInstr::FrameDestroy);
1586  }
1587 
1588  MachineBasicBlock::iterator FirstCSPop = MBBI;
1589  // Skip the callee-saved pop instructions.
1590  while (MBBI != MBB.begin()) {
1591  MachineBasicBlock::iterator PI = std::prev(MBBI);
1592  unsigned Opc = PI->getOpcode();
1593 
1594  if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
1595  if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1596  (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
1597  break;
1598  FirstCSPop = PI;
1599  }
1600 
1601  --MBBI;
1602  }
1603  MBBI = FirstCSPop;
1604 
1605  if (IsFunclet && Terminator->getOpcode() == X86::CATCHRET)
1606  emitCatchRetReturnValue(MBB, FirstCSPop, &*Terminator);
1607 
1608  if (MBBI != MBB.end())
1609  DL = MBBI->getDebugLoc();
1610 
1611  // If there is an ADD32ri or SUB32ri of ESP immediately before this
1612  // instruction, merge the two instructions.
1613  if (NumBytes || MFI.hasVarSizedObjects())
1614  NumBytes += mergeSPUpdates(MBB, MBBI, true);
1615 
1616  // If dynamic alloca is used, then reset esp to point to the last callee-saved
1617  // slot before popping them off! Same applies for the case, when stack was
1618  // realigned. Don't do this if this was a funclet epilogue, since the funclets
1619  // will not do realignment or dynamic stack allocation.
1620  if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) &&
1621  !IsFunclet) {
1622  if (TRI->needsStackRealignment(MF))
1623  MBBI = FirstCSPop;
1624  unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
1625  uint64_t LEAAmount =
1626  IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
1627 
1628  // There are only two legal forms of epilogue:
1629  // - add SEHAllocationSize, %rsp
1630  // - lea SEHAllocationSize(%FramePtr), %rsp
1631  //
1632  // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
1633  // However, we may use this sequence if we have a frame pointer because the
1634  // effects of the prologue can safely be undone.
1635  if (LEAAmount != 0) {
1636  unsigned Opc = getLEArOpcode(Uses64BitFramePtr);
1637  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
1638  FramePtr, false, LEAAmount);
1639  --MBBI;
1640  } else {
1641  unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);
1642  BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
1643  .addReg(FramePtr);
1644  --MBBI;
1645  }
1646  } else if (NumBytes) {
1647  // Adjust stack pointer back: ESP += numbytes.
1648  emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
1649  --MBBI;
1650  }
1651 
1652  // Windows unwinder will not invoke function's exception handler if IP is
1653  // either in prologue or in epilogue. This behavior causes a problem when a
1654  // call immediately precedes an epilogue, because the return address points
1655  // into the epilogue. To cope with that, we insert an epilogue marker here,
1656  // then replace it with a 'nop' if it ends up immediately after a CALL in the
1657  // final emitted code.
1658  if (NeedsWin64CFI && MF.hasWinCFI())
1659  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1660 
1661  if (Terminator == MBB.end() || !isTailCallOpcode(Terminator->getOpcode())) {
1662  // Add the return addr area delta back since we are not tail calling.
1663  int Offset = -1 * X86FI->getTCReturnAddrDelta();
1664  assert(Offset >= 0 && "TCDelta should never be positive");
1665  if (Offset) {
1666  // Check for possible merge with preceding ADD instruction.
1667  Offset += mergeSPUpdates(MBB, Terminator, true);
1668  emitSPUpdate(MBB, Terminator, Offset, /*InEpilogue=*/true);
1669  }
1670  }
1671 }
1672 
1674  unsigned &FrameReg) const {
1675  const MachineFrameInfo &MFI = MF.getFrameInfo();
1676 
1677  bool IsFixed = MFI.isFixedObjectIndex(FI);
1678  // We can't calculate offset from frame pointer if the stack is realigned,
1679  // so enforce usage of stack/base pointer. The base pointer is used when we
1680  // have dynamic allocas in addition to dynamic realignment.
1681  if (TRI->hasBasePointer(MF))
1682  FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister();
1683  else if (TRI->needsStackRealignment(MF))
1684  FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister();
1685  else
1686  FrameReg = TRI->getFrameRegister(MF);
1687 
1688  // Offset will hold the offset from the stack pointer at function entry to the
1689  // object.
1690  // We need to factor in additional offsets applied during the prologue to the
1691  // frame, base, and stack pointer depending on which is used.
1692  int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
1694  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1695  uint64_t StackSize = MFI.getStackSize();
1696  bool HasFP = hasFP(MF);
1697  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1698  int64_t FPDelta = 0;
1699 
1700  if (IsWin64Prologue) {
1701  assert(!MFI.hasCalls() || (StackSize % 16) == 8);
1702 
1703  // Calculate required stack adjustment.
1704  uint64_t FrameSize = StackSize - SlotSize;
1705  // If required, include space for extra hidden slot for stashing base pointer.
1706  if (X86FI->getRestoreBasePointer())
1707  FrameSize += SlotSize;
1708  uint64_t NumBytes = FrameSize - CSSize;
1709 
1710  uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
1711  if (FI && FI == X86FI->getFAIndex())
1712  return -SEHFrameOffset;
1713 
1714  // FPDelta is the offset from the "traditional" FP location of the old base
1715  // pointer followed by return address and the location required by the
1716  // restricted Win64 prologue.
1717  // Add FPDelta to all offsets below that go through the frame pointer.
1718  FPDelta = FrameSize - SEHFrameOffset;
1719  assert((!MFI.hasCalls() || (FPDelta % 16) == 0) &&
1720  "FPDelta isn't aligned per the Win64 ABI!");
1721  }
1722 
1723 
1724  if (TRI->hasBasePointer(MF)) {
1725  assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
1726  if (FI < 0) {
1727  // Skip the saved EBP.
1728  return Offset + SlotSize + FPDelta;
1729  } else {
1730  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1731  return Offset + StackSize;
1732  }
1733  } else if (TRI->needsStackRealignment(MF)) {
1734  if (FI < 0) {
1735  // Skip the saved EBP.
1736  return Offset + SlotSize + FPDelta;
1737  } else {
1738  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1739  return Offset + StackSize;
1740  }
1741  // FIXME: Support tail calls
1742  } else {
1743  if (!HasFP)
1744  return Offset + StackSize;
1745 
1746  // Skip the saved EBP.
1747  Offset += SlotSize;
1748 
1749  // Skip the RETADDR move area
1750  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1751  if (TailCallReturnAddrDelta < 0)
1752  Offset -= TailCallReturnAddrDelta;
1753  }
1754 
1755  return Offset + FPDelta;
1756 }
1757 
1759  int FI, unsigned &FrameReg,
1760  int Adjustment) const {
1761  const MachineFrameInfo &MFI = MF.getFrameInfo();
1762  FrameReg = TRI->getStackRegister();
1763  return MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + Adjustment;
1764 }
1765 
1766 int
1768  int FI, unsigned &FrameReg,
1769  bool IgnoreSPUpdates) const {
1770 
1771  const MachineFrameInfo &MFI = MF.getFrameInfo();
1772  // Does not include any dynamic realign.
1773  const uint64_t StackSize = MFI.getStackSize();
1774  // LLVM arranges the stack as follows:
1775  // ...
1776  // ARG2
1777  // ARG1
1778  // RETADDR
1779  // PUSH RBP <-- RBP points here
1780  // PUSH CSRs
1781  // ~~~~~~~ <-- possible stack realignment (non-win64)
1782  // ...
1783  // STACK OBJECTS
1784  // ... <-- RSP after prologue points here
1785  // ~~~~~~~ <-- possible stack realignment (win64)
1786  //
1787  // if (hasVarSizedObjects()):
1788  // ... <-- "base pointer" (ESI/RBX) points here
1789  // DYNAMIC ALLOCAS
1790  // ... <-- RSP points here
1791  //
1792  // Case 1: In the simple case of no stack realignment and no dynamic
1793  // allocas, both "fixed" stack objects (arguments and CSRs) are addressable
1794  // with fixed offsets from RSP.
1795  //
1796  // Case 2: In the case of stack realignment with no dynamic allocas, fixed
1797  // stack objects are addressed with RBP and regular stack objects with RSP.
1798  //
1799  // Case 3: In the case of dynamic allocas and stack realignment, RSP is used
1800  // to address stack arguments for outgoing calls and nothing else. The "base
1801  // pointer" points to local variables, and RBP points to fixed objects.
1802  //
1803  // In cases 2 and 3, we can only answer for non-fixed stack objects, and the
1804  // answer we give is relative to the SP after the prologue, and not the
1805  // SP in the middle of the function.
1806 
1807  if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) &&
1808  !STI.isTargetWin64())
1809  return getFrameIndexReference(MF, FI, FrameReg);
1810 
1811  // If !hasReservedCallFrame the function might have SP adjustement in the
1812  // body. So, even though the offset is statically known, it depends on where
1813  // we are in the function.
1815  if (!IgnoreSPUpdates && !TFI->hasReservedCallFrame(MF))
1816  return getFrameIndexReference(MF, FI, FrameReg);
1817 
1818  // We don't handle tail calls, and shouldn't be seeing them either.
1820  "we don't handle this case!");
1821 
1822  // This is how the math works out:
1823  //
1824  // %rsp grows (i.e. gets lower) left to right. Each box below is
1825  // one word (eight bytes). Obj0 is the stack slot we're trying to
1826  // get to.
1827  //
1828  // ----------------------------------
1829  // | BP | Obj0 | Obj1 | ... | ObjN |
1830  // ----------------------------------
1831  // ^ ^ ^ ^
1832  // A B C E
1833  //
1834  // A is the incoming stack pointer.
1835  // (B - A) is the local area offset (-8 for x86-64) [1]
1836  // (C - A) is the Offset returned by MFI.getObjectOffset for Obj0 [2]
1837  //
1838  // |(E - B)| is the StackSize (absolute value, positive). For a
1839  // stack that grown down, this works out to be (B - E). [3]
1840  //
1841  // E is also the value of %rsp after stack has been set up, and we
1842  // want (C - E) -- the value we can add to %rsp to get to Obj0. Now
1843  // (C - E) == (C - A) - (B - A) + (B - E)
1844  // { Using [1], [2] and [3] above }
1845  // == getObjectOffset - LocalAreaOffset + StackSize
1846 
1847  return getFrameIndexReferenceSP(MF, FI, FrameReg, StackSize);
1848 }
1849 
1852  std::vector<CalleeSavedInfo> &CSI) const {
1853  MachineFrameInfo &MFI = MF.getFrameInfo();
1855 
1856  unsigned CalleeSavedFrameSize = 0;
1857  int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
1858 
1859  if (hasFP(MF)) {
1860  // emitPrologue always spills frame register the first thing.
1861  SpillSlotOffset -= SlotSize;
1862  MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1863 
1864  // Since emitPrologue and emitEpilogue will handle spilling and restoring of
1865  // the frame register, we can delete it from CSI list and not have to worry
1866  // about avoiding it later.
1867  unsigned FPReg = TRI->getFrameRegister(MF);
1868  for (unsigned i = 0; i < CSI.size(); ++i) {
1869  if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
1870  CSI.erase(CSI.begin() + i);
1871  break;
1872  }
1873  }
1874  }
1875 
1876  // Assign slots for GPRs. It increases frame size.
1877  for (unsigned i = CSI.size(); i != 0; --i) {
1878  unsigned Reg = CSI[i - 1].getReg();
1879 
1880  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1881  continue;
1882 
1883  SpillSlotOffset -= SlotSize;
1884  CalleeSavedFrameSize += SlotSize;
1885 
1886  int SlotIndex = MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1887  CSI[i - 1].setFrameIdx(SlotIndex);
1888  }
1889 
1890  X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize);
1891 
1892  // Assign slots for XMMs.
1893  for (unsigned i = CSI.size(); i != 0; --i) {
1894  unsigned Reg = CSI[i - 1].getReg();
1895  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1896  continue;
1897 
1898  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1899  unsigned Size = TRI->getSpillSize(*RC);
1900  unsigned Align = TRI->getSpillAlignment(*RC);
1901  // ensure alignment
1902  SpillSlotOffset -= std::abs(SpillSlotOffset) % Align;
1903  // spill into slot
1904  SpillSlotOffset -= Size;
1905  int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
1906  CSI[i - 1].setFrameIdx(SlotIndex);
1907  MFI.ensureMaxAlignment(Align);
1908  }
1909 
1910  return true;
1911 }
1912 
1915  const std::vector<CalleeSavedInfo> &CSI,
1916  const TargetRegisterInfo *TRI) const {
1917  DebugLoc DL = MBB.findDebugLoc(MI);
1918 
1919  // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI
1920  // for us, and there are no XMM CSRs on Win32.
1921  if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows())
1922  return true;
1923 
1924  // Push GPRs. It increases frame size.
1925  const MachineFunction &MF = *MBB.getParent();
1926  unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
1927  for (unsigned i = CSI.size(); i != 0; --i) {
1928  unsigned Reg = CSI[i - 1].getReg();
1929 
1930  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1931  continue;
1932 
1933  const MachineRegisterInfo &MRI = MF.getRegInfo();
1934  bool isLiveIn = MRI.isLiveIn(Reg);
1935  if (!isLiveIn)
1936  MBB.addLiveIn(Reg);
1937 
1938  // Decide whether we can add a kill flag to the use.
1939  bool CanKill = !isLiveIn;
1940  // Check if any subregister is live-in
1941  if (CanKill) {
1942  for (MCRegAliasIterator AReg(Reg, TRI, false); AReg.isValid(); ++AReg) {
1943  if (MRI.isLiveIn(*AReg)) {
1944  CanKill = false;
1945  break;
1946  }
1947  }
1948  }
1949 
1950  // Do not set a kill flag on values that are also marked as live-in. This
1951  // happens with the @llvm-returnaddress intrinsic and with arguments
1952  // passed in callee saved registers.
1953  // Omitting the kill flags is conservatively correct even if the live-in
1954  // is not used after all.
1955  BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(CanKill))
1956  .setMIFlag(MachineInstr::FrameSetup);
1957  }
1958 
1959  // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
1960  // It can be done by spilling XMMs to stack frame.
1961  for (unsigned i = CSI.size(); i != 0; --i) {
1962  unsigned Reg = CSI[i-1].getReg();
1963  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1964  continue;
1965  // Add the callee-saved register as live-in. It's killed at the spill.
1966  MBB.addLiveIn(Reg);
1967  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1968 
1969  TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
1970  TRI);
1971  --MI;
1972  MI->setFlag(MachineInstr::FrameSetup);
1973  ++MI;
1974  }
1975 
1976  return true;
1977 }
1978 
1979 void X86FrameLowering::emitCatchRetReturnValue(MachineBasicBlock &MBB,
1981  MachineInstr *CatchRet) const {
1982  // SEH shouldn't use catchret.
1984  MBB.getParent()->getFunction()->getPersonalityFn())) &&
1985  "SEH should not use CATCHRET");
1986  DebugLoc DL = CatchRet->getDebugLoc();
1987  MachineBasicBlock *CatchRetTarget = CatchRet->getOperand(0).getMBB();
1988 
1989  // Fill EAX/RAX with the address of the target block.
1990  if (STI.is64Bit()) {
1991  // LEA64r CatchRetTarget(%rip), %rax
1992  BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), X86::RAX)
1993  .addReg(X86::RIP)
1994  .addImm(0)
1995  .addReg(0)
1996  .addMBB(CatchRetTarget)
1997  .addReg(0);
1998  } else {
1999  // MOV32ri $CatchRetTarget, %eax
2000  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
2001  .addMBB(CatchRetTarget);
2002  }
2003 
2004  // Record that we've taken the address of CatchRetTarget and no longer just
2005  // reference it in a terminator.
2006  CatchRetTarget->setHasAddressTaken();
2007 }
2008 
2011  std::vector<CalleeSavedInfo> &CSI,
2012  const TargetRegisterInfo *TRI) const {
2013  if (CSI.empty())
2014  return false;
2015 
2016  if (MI != MBB.end() && isFuncletReturnInstr(*MI) && STI.isOSWindows()) {
2017  // Don't restore CSRs in 32-bit EH funclets. Matches
2018  // spillCalleeSavedRegisters.
2019  if (STI.is32Bit())
2020  return true;
2021  // Don't restore CSRs before an SEH catchret. SEH except blocks do not form
2022  // funclets. emitEpilogue transforms these to normal jumps.
2023  if (MI->getOpcode() == X86::CATCHRET) {
2024  const Function *Func = MBB.getParent()->getFunction();
2025  bool IsSEH = isAsynchronousEHPersonality(
2027  if (IsSEH)
2028  return true;
2029  }
2030  }
2031 
2032  DebugLoc DL = MBB.findDebugLoc(MI);
2033 
2034  // Reload XMMs from stack frame.
2035  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2036  unsigned Reg = CSI[i].getReg();
2037  if (X86::GR64RegClass.contains(Reg) ||
2038  X86::GR32RegClass.contains(Reg))
2039  continue;
2040 
2041  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
2042  TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
2043  }
2044 
2045  // POP GPRs.
2046  unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
2047  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2048  unsigned Reg = CSI[i].getReg();
2049  if (!X86::GR64RegClass.contains(Reg) &&
2050  !X86::GR32RegClass.contains(Reg))
2051  continue;
2052 
2053  BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
2054  .setMIFlag(MachineInstr::FrameDestroy);
2055  }
2056  return true;
2057 }
2058 
2060  BitVector &SavedRegs,
2061  RegScavenger *RS) const {
2062  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
2063 
2064  MachineFrameInfo &MFI = MF.getFrameInfo();
2065 
2067  int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
2068 
2069  if (TailCallReturnAddrDelta < 0) {
2070  // create RETURNADDR area
2071  // arg
2072  // arg
2073  // RETADDR
2074  // { ...
2075  // RETADDR area
2076  // ...
2077  // }
2078  // [EBP]
2079  MFI.CreateFixedObject(-TailCallReturnAddrDelta,
2080  TailCallReturnAddrDelta - SlotSize, true);
2081  }
2082 
2083  // Spill the BasePtr if it's used.
2084  if (TRI->hasBasePointer(MF)) {
2085  SavedRegs.set(TRI->getBaseRegister());
2086 
2087  // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
2088  if (MF.hasEHFunclets()) {
2089  int FI = MFI.CreateSpillStackObject(SlotSize, SlotSize);
2090  X86FI->setHasSEHFramePtrSave(true);
2091  X86FI->setSEHFramePtrSaveIndex(FI);
2092  }
2093  }
2094 }
2095 
2096 static bool
2098  const Function *F = MF->getFunction();
2099  for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
2100  I != E; I++) {
2101  if (I->hasNestAttr())
2102  return true;
2103  }
2104  return false;
2105 }
2106 
2107 /// GetScratchRegister - Get a temp register for performing work in the
2108 /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
2109 /// and the properties of the function either one or two registers will be
2110 /// needed. Set primary to true for the first register, false for the second.
2111 static unsigned
2112 GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) {
2114 
2115  // Erlang stuff.
2116  if (CallingConvention == CallingConv::HiPE) {
2117  if (Is64Bit)
2118  return Primary ? X86::R14 : X86::R13;
2119  else
2120  return Primary ? X86::EBX : X86::EDI;
2121  }
2122 
2123  if (Is64Bit) {
2124  if (IsLP64)
2125  return Primary ? X86::R11 : X86::R12;
2126  else
2127  return Primary ? X86::R11D : X86::R12D;
2128  }
2129 
2130  bool IsNested = HasNestArgument(&MF);
2131 
2132  if (CallingConvention == CallingConv::X86_FastCall ||
2133  CallingConvention == CallingConv::Fast) {
2134  if (IsNested)
2135  report_fatal_error("Segmented stacks does not support fastcall with "
2136  "nested function.");
2137  return Primary ? X86::EAX : X86::ECX;
2138  }
2139  if (IsNested)
2140  return Primary ? X86::EDX : X86::EAX;
2141  return Primary ? X86::ECX : X86::EAX;
2142 }
2143 
2144 // The stack limit in the TCB is set to this many bytes above the actual stack
2145 // limit.
2146 static const uint64_t kSplitStackAvailable = 256;
2147 
2149  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2150  MachineFrameInfo &MFI = MF.getFrameInfo();
2151  uint64_t StackSize;
2152  unsigned TlsReg, TlsOffset;
2153  DebugLoc DL;
2154 
2155  // To support shrink-wrapping we would need to insert the new blocks
2156  // at the right place and update the branches to PrologueMBB.
2157  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2158 
2159  unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2160  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2161  "Scratch register is live-in");
2162 
2163  if (MF.getFunction()->isVarArg())
2164  report_fatal_error("Segmented stacks do not support vararg functions.");
2165  if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() &&
2166  !STI.isTargetWin64() && !STI.isTargetFreeBSD() &&
2168  report_fatal_error("Segmented stacks not supported on this platform.");
2169 
2170  // Eventually StackSize will be calculated by a link-time pass; which will
2171  // also decide whether checking code needs to be injected into this particular
2172  // prologue.
2173  StackSize = MFI.getStackSize();
2174 
2175  // Do not generate a prologue for functions with a stack of size zero
2176  if (StackSize == 0)
2177  return;
2178 
2179  MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
2180  MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
2182  bool IsNested = false;
2183 
2184  // We need to know if the function has a nest argument only in 64 bit mode.
2185  if (Is64Bit)
2186  IsNested = HasNestArgument(&MF);
2187 
2188  // The MOV R10, RAX needs to be in a different block, since the RET we emit in
2189  // allocMBB needs to be last (terminating) instruction.
2190 
2191  for (const auto &LI : PrologueMBB.liveins()) {
2192  allocMBB->addLiveIn(LI);
2193  checkMBB->addLiveIn(LI);
2194  }
2195 
2196  if (IsNested)
2197  allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
2198 
2199  MF.push_front(allocMBB);
2200  MF.push_front(checkMBB);
2201 
2202  // When the frame size is less than 256 we just compare the stack
2203  // boundary directly to the value of the stack pointer, per gcc.
2204  bool CompareStackPointer = StackSize < kSplitStackAvailable;
2205 
2206  // Read the limit off the current stacklet off the stack_guard location.
2207  if (Is64Bit) {
2208  if (STI.isTargetLinux()) {
2209  TlsReg = X86::FS;
2210  TlsOffset = IsLP64 ? 0x70 : 0x40;
2211  } else if (STI.isTargetDarwin()) {
2212  TlsReg = X86::GS;
2213  TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
2214  } else if (STI.isTargetWin64()) {
2215  TlsReg = X86::GS;
2216  TlsOffset = 0x28; // pvArbitrary, reserved for application use
2217  } else if (STI.isTargetFreeBSD()) {
2218  TlsReg = X86::FS;
2219  TlsOffset = 0x18;
2220  } else if (STI.isTargetDragonFly()) {
2221  TlsReg = X86::FS;
2222  TlsOffset = 0x20; // use tls_tcb.tcb_segstack
2223  } else {
2224  report_fatal_error("Segmented stacks not supported on this platform.");
2225  }
2226 
2227  if (CompareStackPointer)
2228  ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
2229  else
2230  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)
2231  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2232 
2233  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg)
2234  .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2235  } else {
2236  if (STI.isTargetLinux()) {
2237  TlsReg = X86::GS;
2238  TlsOffset = 0x30;
2239  } else if (STI.isTargetDarwin()) {
2240  TlsReg = X86::GS;
2241  TlsOffset = 0x48 + 90*4;
2242  } else if (STI.isTargetWin32()) {
2243  TlsReg = X86::FS;
2244  TlsOffset = 0x14; // pvArbitrary, reserved for application use
2245  } else if (STI.isTargetDragonFly()) {
2246  TlsReg = X86::FS;
2247  TlsOffset = 0x10; // use tls_tcb.tcb_segstack
2248  } else if (STI.isTargetFreeBSD()) {
2249  report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
2250  } else {
2251  report_fatal_error("Segmented stacks not supported on this platform.");
2252  }
2253 
2254  if (CompareStackPointer)
2255  ScratchReg = X86::ESP;
2256  else
2257  BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
2258  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2259 
2260  if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() ||
2261  STI.isTargetDragonFly()) {
2262  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
2263  .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2264  } else if (STI.isTargetDarwin()) {
2265 
2266  // TlsOffset doesn't fit into a mod r/m byte so we need an extra register.
2267  unsigned ScratchReg2;
2268  bool SaveScratch2;
2269  if (CompareStackPointer) {
2270  // The primary scratch register is available for holding the TLS offset.
2271  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2272  SaveScratch2 = false;
2273  } else {
2274  // Need to use a second register to hold the TLS offset
2275  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
2276 
2277  // Unfortunately, with fastcc the second scratch register may hold an
2278  // argument.
2279  SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
2280  }
2281 
2282  // If Scratch2 is live-in then it needs to be saved.
2283  assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
2284  "Scratch register is live-in and not saved");
2285 
2286  if (SaveScratch2)
2287  BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
2288  .addReg(ScratchReg2, RegState::Kill);
2289 
2290  BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
2291  .addImm(TlsOffset);
2292  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
2293  .addReg(ScratchReg)
2294  .addReg(ScratchReg2).addImm(1).addReg(0)
2295  .addImm(0)
2296  .addReg(TlsReg);
2297 
2298  if (SaveScratch2)
2299  BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
2300  }
2301  }
2302 
2303  // This jump is taken if SP >= (Stacklet Limit + Stack Space required).
2304  // It jumps to normal execution of the function body.
2305  BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB);
2306 
2307  // On 32 bit we first push the arguments size and then the frame size. On 64
2308  // bit, we pass the stack frame size in r10 and the argument size in r11.
2309  if (Is64Bit) {
2310  // Functions with nested arguments use R10, so it needs to be saved across
2311  // the call to _morestack
2312 
2313  const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
2314  const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
2315  const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
2316  const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
2317  const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
2318 
2319  if (IsNested)
2320  BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10);
2321 
2322  BuildMI(allocMBB, DL, TII.get(MOVri), Reg10)
2323  .addImm(StackSize);
2324  BuildMI(allocMBB, DL, TII.get(MOVri), Reg11)
2325  .addImm(X86FI->getArgumentStackSize());
2326  } else {
2327  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2328  .addImm(X86FI->getArgumentStackSize());
2329  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2330  .addImm(StackSize);
2331  }
2332 
2333  // __morestack is in libgcc
2334  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
2335  // Under the large code model, we cannot assume that __morestack lives
2336  // within 2^31 bytes of the call site, so we cannot use pc-relative
2337  // addressing. We cannot perform the call via a temporary register,
2338  // as the rax register may be used to store the static chain, and all
2339  // other suitable registers may be either callee-save or used for
2340  // parameter passing. We cannot use the stack at this point either
2341  // because __morestack manipulates the stack directly.
2342  //
2343  // To avoid these issues, perform an indirect call via a read-only memory
2344  // location containing the address.
2345  //
2346  // This solution is not perfect, as it assumes that the .rodata section
2347  // is laid out within 2^31 bytes of each function body, but this seems
2348  // to be sufficient for JIT.
2349  BuildMI(allocMBB, DL, TII.get(X86::CALL64m))
2350  .addReg(X86::RIP)
2351  .addImm(0)
2352  .addReg(0)
2353  .addExternalSymbol("__morestack_addr")
2354  .addReg(0);
2355  MF.getMMI().setUsesMorestackAddr(true);
2356  } else {
2357  if (Is64Bit)
2358  BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
2359  .addExternalSymbol("__morestack");
2360  else
2361  BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
2362  .addExternalSymbol("__morestack");
2363  }
2364 
2365  if (IsNested)
2366  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
2367  else
2368  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
2369 
2370  allocMBB->addSuccessor(&PrologueMBB);
2371 
2372  checkMBB->addSuccessor(allocMBB);
2373  checkMBB->addSuccessor(&PrologueMBB);
2374 
2375 #ifdef EXPENSIVE_CHECKS
2376  MF.verify();
2377 #endif
2378 }
2379 
2380 /// Lookup an ERTS parameter in the !hipe.literals named metadata node.
2381 /// HiPE provides Erlang Runtime System-internal parameters, such as PCB offsets
2382 /// to fields it needs, through a named metadata node "hipe.literals" containing
2383 /// name-value pairs.
2384 static unsigned getHiPELiteral(
2385  NamedMDNode *HiPELiteralsMD, const StringRef LiteralName) {
2386  for (int i = 0, e = HiPELiteralsMD->getNumOperands(); i != e; ++i) {
2387  MDNode *Node = HiPELiteralsMD->getOperand(i);
2388  if (Node->getNumOperands() != 2) continue;
2389  MDString *NodeName = dyn_cast<MDString>(Node->getOperand(0));
2390  ValueAsMetadata *NodeVal = dyn_cast<ValueAsMetadata>(Node->getOperand(1));
2391  if (!NodeName || !NodeVal) continue;
2392  ConstantInt *ValConst = dyn_cast_or_null<ConstantInt>(NodeVal->getValue());
2393  if (ValConst && NodeName->getString() == LiteralName) {
2394  return ValConst->getZExtValue();
2395  }
2396  }
2397 
2398  report_fatal_error("HiPE literal " + LiteralName
2399  + " required but not provided");
2400 }
2401 
2402 /// Erlang programs may need a special prologue to handle the stack size they
2403 /// might need at runtime. That is because Erlang/OTP does not implement a C
2404 /// stack but uses a custom implementation of hybrid stack/heap architecture.
2405 /// (for more information see Eric Stenman's Ph.D. thesis:
2406 /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
2407 ///
2408 /// CheckStack:
2409 /// temp0 = sp - MaxStack
2410 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2411 /// OldStart:
2412 /// ...
2413 /// IncStack:
2414 /// call inc_stack # doubles the stack space
2415 /// temp0 = sp - MaxStack
2416 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2418  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2419  MachineFrameInfo &MFI = MF.getFrameInfo();
2420  DebugLoc DL;
2421 
2422  // To support shrink-wrapping we would need to insert the new blocks
2423  // at the right place and update the branches to PrologueMBB.
2424  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2425 
2426  // HiPE-specific values
2427  NamedMDNode *HiPELiteralsMD = MF.getMMI().getModule()
2428  ->getNamedMetadata("hipe.literals");
2429  if (!HiPELiteralsMD)
2431  "Can't generate HiPE prologue without runtime parameters");
2432  const unsigned HipeLeafWords
2433  = getHiPELiteral(HiPELiteralsMD,
2434  Is64Bit ? "AMD64_LEAF_WORDS" : "X86_LEAF_WORDS");
2435  const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
2436  const unsigned Guaranteed = HipeLeafWords * SlotSize;
2437  unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ?
2438  MF.getFunction()->arg_size() - CCRegisteredArgs : 0;
2439  unsigned MaxStack = MFI.getStackSize() + CallerStkArity*SlotSize + SlotSize;
2440 
2441  assert(STI.isTargetLinux() &&
2442  "HiPE prologue is only supported on Linux operating systems.");
2443 
2444  // Compute the largest caller's frame that is needed to fit the callees'
2445  // frames. This 'MaxStack' is computed from:
2446  //
2447  // a) the fixed frame size, which is the space needed for all spilled temps,
2448  // b) outgoing on-stack parameter areas, and
2449  // c) the minimum stack space this function needs to make available for the
2450  // functions it calls (a tunable ABI property).
2451  if (MFI.hasCalls()) {
2452  unsigned MoreStackForCalls = 0;
2453 
2454  for (auto &MBB : MF) {
2455  for (auto &MI : MBB) {
2456  if (!MI.isCall())
2457  continue;
2458 
2459  // Get callee operand.
2460  const MachineOperand &MO = MI.getOperand(0);
2461 
2462  // Only take account of global function calls (no closures etc.).
2463  if (!MO.isGlobal())
2464  continue;
2465 
2466  const Function *F = dyn_cast<Function>(MO.getGlobal());
2467  if (!F)
2468  continue;
2469 
2470  // Do not update 'MaxStack' for primitive and built-in functions
2471  // (encoded with names either starting with "erlang."/"bif_" or not
2472  // having a ".", such as a simple <Module>.<Function>.<Arity>, or an
2473  // "_", such as the BIF "suspend_0") as they are executed on another
2474  // stack.
2475  if (F->getName().find("erlang.") != StringRef::npos ||
2476  F->getName().find("bif_") != StringRef::npos ||
2477  F->getName().find_first_of("._") == StringRef::npos)
2478  continue;
2479 
2480  unsigned CalleeStkArity =
2481  F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
2482  if (HipeLeafWords - 1 > CalleeStkArity)
2483  MoreStackForCalls = std::max(MoreStackForCalls,
2484  (HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
2485  }
2486  }
2487  MaxStack += MoreStackForCalls;
2488  }
2489 
2490  // If the stack frame needed is larger than the guaranteed then runtime checks
2491  // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
2492  if (MaxStack > Guaranteed) {
2493  MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
2494  MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
2495 
2496  for (const auto &LI : PrologueMBB.liveins()) {
2497  stackCheckMBB->addLiveIn(LI);
2498  incStackMBB->addLiveIn(LI);
2499  }
2500 
2501  MF.push_front(incStackMBB);
2502  MF.push_front(stackCheckMBB);
2503 
2504  unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
2505  unsigned LEAop, CMPop, CALLop;
2506  SPLimitOffset = getHiPELiteral(HiPELiteralsMD, "P_NSP_LIMIT");
2507  if (Is64Bit) {
2508  SPReg = X86::RSP;
2509  PReg = X86::RBP;
2510  LEAop = X86::LEA64r;
2511  CMPop = X86::CMP64rm;
2512  CALLop = X86::CALL64pcrel32;
2513  } else {
2514  SPReg = X86::ESP;
2515  PReg = X86::EBP;
2516  LEAop = X86::LEA32r;
2517  CMPop = X86::CMP32rm;
2518  CALLop = X86::CALLpcrel32;
2519  }
2520 
2521  ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2522  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2523  "HiPE prologue scratch register is live-in");
2524 
2525  // Create new MBB for StackCheck:
2526  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
2527  SPReg, false, -MaxStack);
2528  // SPLimitOffset is in a fixed heap location (pointed by BP).
2529  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
2530  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2531  BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB);
2532 
2533  // Create new MBB for IncStack:
2534  BuildMI(incStackMBB, DL, TII.get(CALLop)).
2535  addExternalSymbol("inc_stack_0");
2536  addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
2537  SPReg, false, -MaxStack);
2538  addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
2539  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2540  BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB);
2541 
2542  stackCheckMBB->addSuccessor(&PrologueMBB, {99, 100});
2543  stackCheckMBB->addSuccessor(incStackMBB, {1, 100});
2544  incStackMBB->addSuccessor(&PrologueMBB, {99, 100});
2545  incStackMBB->addSuccessor(incStackMBB, {1, 100});
2546  }
2547 #ifdef EXPENSIVE_CHECKS
2548  MF.verify();
2549 #endif
2550 }
2551 
2552 bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB,
2554  const DebugLoc &DL,
2555  int Offset) const {
2556 
2557  if (Offset <= 0)
2558  return false;
2559 
2560  if (Offset % SlotSize)
2561  return false;
2562 
2563  int NumPops = Offset / SlotSize;
2564  // This is only worth it if we have at most 2 pops.
2565  if (NumPops != 1 && NumPops != 2)
2566  return false;
2567 
2568  // Handle only the trivial case where the adjustment directly follows
2569  // a call. This is the most common one, anyway.
2570  if (MBBI == MBB.begin())
2571  return false;
2572  MachineBasicBlock::iterator Prev = std::prev(MBBI);
2573  if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
2574  return false;
2575 
2576  unsigned Regs[2];
2577  unsigned FoundRegs = 0;
2578 
2579  auto &MRI = MBB.getParent()->getRegInfo();
2580  auto RegMask = Prev->getOperand(1);
2581 
2582  auto &RegClass =
2583  Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
2584  // Try to find up to NumPops free registers.
2585  for (auto Candidate : RegClass) {
2586 
2587  // Poor man's liveness:
2588  // Since we're immediately after a call, any register that is clobbered
2589  // by the call and not defined by it can be considered dead.
2590  if (!RegMask.clobbersPhysReg(Candidate))
2591  continue;
2592 
2593  // Don't clobber reserved registers
2594  if (MRI.isReserved(Candidate))
2595  continue;
2596 
2597  bool IsDef = false;
2598  for (const MachineOperand &MO : Prev->implicit_operands()) {
2599  if (MO.isReg() && MO.isDef() &&
2600  TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
2601  IsDef = true;
2602  break;
2603  }
2604  }
2605 
2606  if (IsDef)
2607  continue;
2608 
2609  Regs[FoundRegs++] = Candidate;
2610  if (FoundRegs == (unsigned)NumPops)
2611  break;
2612  }
2613 
2614  if (FoundRegs == 0)
2615  return false;
2616 
2617  // If we found only one free register, but need two, reuse the same one twice.
2618  while (FoundRegs < (unsigned)NumPops)
2619  Regs[FoundRegs++] = Regs[0];
2620 
2621  for (int i = 0; i < NumPops; ++i)
2622  BuildMI(MBB, MBBI, DL,
2623  TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]);
2624 
2625  return true;
2626 }
2627 
2631  bool reserveCallFrame = hasReservedCallFrame(MF);
2632  unsigned Opcode = I->getOpcode();
2633  bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
2634  DebugLoc DL = I->getDebugLoc();
2635  uint64_t Amount = !reserveCallFrame ? TII.getFrameSize(*I) : 0;
2636  uint64_t InternalAmt = (isDestroy || Amount) ? TII.getFrameAdjustment(*I) : 0;
2637  I = MBB.erase(I);
2638  auto InsertPos = skipDebugInstructionsForward(I, MBB.end());
2639 
2640  if (!reserveCallFrame) {
2641  // If the stack pointer can be changed after prologue, turn the
2642  // adjcallstackup instruction into a 'sub ESP, <amt>' and the
2643  // adjcallstackdown instruction into 'add ESP, <amt>'
2644 
2645  // We need to keep the stack aligned properly. To do this, we round the
2646  // amount of space needed for the outgoing arguments up to the next
2647  // alignment boundary.
2648  unsigned StackAlign = getStackAlignment();
2649  Amount = alignTo(Amount, StackAlign);
2650 
2651  MachineModuleInfo &MMI = MF.getMMI();
2652  const Function *Fn = MF.getFunction();
2653  bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
2654  bool DwarfCFI = !WindowsCFI &&
2655  (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
2656 
2657  // If we have any exception handlers in this function, and we adjust
2658  // the SP before calls, we may need to indicate this to the unwinder
2659  // using GNU_ARGS_SIZE. Note that this may be necessary even when
2660  // Amount == 0, because the preceding function may have set a non-0
2661  // GNU_ARGS_SIZE.
2662  // TODO: We don't need to reset this between subsequent functions,
2663  // if it didn't change.
2664  bool HasDwarfEHHandlers = !WindowsCFI && !MF.getLandingPads().empty();
2665 
2666  if (HasDwarfEHHandlers && !isDestroy &&
2668  BuildCFI(MBB, InsertPos, DL,
2669  MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
2670 
2671  if (Amount == 0)
2672  return I;
2673 
2674  // Factor out the amount that gets handled inside the sequence
2675  // (Pushes of argument for frame setup, callee pops for frame destroy)
2676  Amount -= InternalAmt;
2677 
2678  // TODO: This is needed only if we require precise CFA.
2679  // If this is a callee-pop calling convention, emit a CFA adjust for
2680  // the amount the callee popped.
2681  if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF))
2682  BuildCFI(MBB, InsertPos, DL,
2683  MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
2684 
2685  // Add Amount to SP to destroy a frame, or subtract to setup.
2686  int64_t StackAdjustment = isDestroy ? Amount : -Amount;
2687  int64_t CfaAdjustment = -StackAdjustment;
2688 
2689  if (StackAdjustment) {
2690  // Merge with any previous or following adjustment instruction. Note: the
2691  // instructions merged with here do not have CFI, so their stack
2692  // adjustments do not feed into CfaAdjustment.
2693  StackAdjustment += mergeSPUpdates(MBB, InsertPos, true);
2694  StackAdjustment += mergeSPUpdates(MBB, InsertPos, false);
2695 
2696  if (StackAdjustment) {
2697  if (!(Fn->optForMinSize() &&
2698  adjustStackWithPops(MBB, InsertPos, DL, StackAdjustment)))
2699  BuildStackAdjustment(MBB, InsertPos, DL, StackAdjustment,
2700  /*InEpilogue=*/false);
2701  }
2702  }
2703 
2704  if (DwarfCFI && !hasFP(MF)) {
2705  // If we don't have FP, but need to generate unwind information,
2706  // we need to set the correct CFA offset after the stack adjustment.
2707  // How much we adjust the CFA offset depends on whether we're emitting
2708  // CFI only for EH purposes or for debugging. EH only requires the CFA
2709  // offset to be correct at each call site, while for debugging we want
2710  // it to be more precise.
2711 
2712  // TODO: When not using precise CFA, we also need to adjust for the
2713  // InternalAmt here.
2714  if (CfaAdjustment) {
2715  BuildCFI(MBB, InsertPos, DL,
2717  CfaAdjustment));
2718  }
2719  }
2720 
2721  return I;
2722  }
2723 
2724  if (isDestroy && InternalAmt) {
2725  // If we are performing frame pointer elimination and if the callee pops
2726  // something off the stack pointer, add it back. We do this until we have
2727  // more advanced stack pointer tracking ability.
2728  // We are not tracking the stack pointer adjustment by the callee, so make
2729  // sure we restore the stack pointer immediately after the call, there may
2730  // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
2733  while (CI != B && !std::prev(CI)->isCall())
2734  --CI;
2735  BuildStackAdjustment(MBB, CI, DL, -InternalAmt, /*InEpilogue=*/false);
2736  }
2737 
2738  return I;
2739 }
2740 
2742  assert(MBB.getParent() && "Block is not attached to a function!");
2743  const MachineFunction &MF = *MBB.getParent();
2744  return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
2745 }
2746 
2748  assert(MBB.getParent() && "Block is not attached to a function!");
2749 
2750  // Win64 has strict requirements in terms of epilogue and we are
2751  // not taking a chance at messing with them.
2752  // I.e., unless this block is already an exit block, we can't use
2753  // it as an epilogue.
2754  if (STI.isTargetWin64() && !MBB.succ_empty() && !MBB.isReturnBlock())
2755  return false;
2756 
2757  if (canUseLEAForSPInEpilogue(*MBB.getParent()))
2758  return true;
2759 
2760  // If we cannot use LEA to adjust SP, we may need to use ADD, which
2761  // clobbers the EFLAGS. Check that we do not need to preserve it,
2762  // otherwise, conservatively assume this is not
2763  // safe to insert the epilogue here.
2765 }
2766 
2768  // If we may need to emit frameless compact unwind information, give
2769  // up as this is currently broken: PR25614.
2770  return (MF.getFunction()->hasFnAttribute(Attribute::NoUnwind) || hasFP(MF)) &&
2771  // The lowering of segmented stack and HiPE only support entry blocks
2772  // as prologue blocks: PR26107.
2773  // This limitation may be lifted if we fix:
2774  // - adjustForSegmentedStacks
2775  // - adjustForHiPEPrologue
2777  !MF.shouldSplitStack();
2778 }
2779 
2782  const DebugLoc &DL, bool RestoreSP) const {
2783  assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env");
2784  assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32");
2786  "restoring EBP/ESI on non-32-bit target");
2787 
2788  MachineFunction &MF = *MBB.getParent();
2789  unsigned FramePtr = TRI->getFrameRegister(MF);
2790  unsigned BasePtr = TRI->getBaseRegister();
2791  WinEHFuncInfo &FuncInfo = *MF.getWinEHFuncInfo();
2792  X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2793  MachineFrameInfo &MFI = MF.getFrameInfo();
2794 
2795  // FIXME: Don't set FrameSetup flag in catchret case.
2796 
2797  int FI = FuncInfo.EHRegNodeFrameIndex;
2798  int EHRegSize = MFI.getObjectSize(FI);
2799 
2800  if (RestoreSP) {
2801  // MOV32rm -EHRegSize(%ebp), %esp
2802  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
2803  X86::EBP, true, -EHRegSize)
2805  }
2806 
2807  unsigned UsedReg;
2808  int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
2809  int EndOffset = -EHRegOffset - EHRegSize;
2810  FuncInfo.EHRegNodeEndOffset = EndOffset;
2811 
2812  if (UsedReg == FramePtr) {
2813  // ADD $offset, %ebp
2814  unsigned ADDri = getADDriOpcode(false, EndOffset);
2815  BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
2816  .addReg(FramePtr)
2817  .addImm(EndOffset)
2819  ->getOperand(3)
2820  .setIsDead();
2821  assert(EndOffset >= 0 &&
2822  "end of registration object above normal EBP position!");
2823  } else if (UsedReg == BasePtr) {
2824  // LEA offset(%ebp), %esi
2825  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),
2826  FramePtr, false, EndOffset)
2828  // MOV32rm SavedEBPOffset(%esi), %ebp
2829  assert(X86FI->getHasSEHFramePtrSave());
2830  int Offset =
2831  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
2832  assert(UsedReg == BasePtr);
2833  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
2834  UsedReg, true, Offset)
2836  } else {
2837  llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");
2838  }
2839  return MBBI;
2840 }
2841 
2842 namespace {
2843 // Struct used by orderFrameObjects to help sort the stack objects.
2844 struct X86FrameSortingObject {
2845  bool IsValid = false; // true if we care about this Object.
2846  unsigned ObjectIndex = 0; // Index of Object into MFI list.
2847  unsigned ObjectSize = 0; // Size of Object in bytes.
2848  unsigned ObjectAlignment = 1; // Alignment of Object in bytes.
2849  unsigned ObjectNumUses = 0; // Object static number of uses.
2850 };
2851 
2852 // The comparison function we use for std::sort to order our local
2853 // stack symbols. The current algorithm is to use an estimated
2854 // "density". This takes into consideration the size and number of
2855 // uses each object has in order to roughly minimize code size.
2856 // So, for example, an object of size 16B that is referenced 5 times
2857 // will get higher priority than 4 4B objects referenced 1 time each.
2858 // It's not perfect and we may be able to squeeze a few more bytes out of
2859 // it (for example : 0(esp) requires fewer bytes, symbols allocated at the
2860 // fringe end can have special consideration, given their size is less
2861 // important, etc.), but the algorithmic complexity grows too much to be
2862 // worth the extra gains we get. This gets us pretty close.
2863 // The final order leaves us with objects with highest priority going
2864 // at the end of our list.
2865 struct X86FrameSortingComparator {
2866  inline bool operator()(const X86FrameSortingObject &A,
2867  const X86FrameSortingObject &B) {
2868  uint64_t DensityAScaled, DensityBScaled;
2869 
2870  // For consistency in our comparison, all invalid objects are placed
2871  // at the end. This also allows us to stop walking when we hit the
2872  // first invalid item after it's all sorted.
2873  if (!A.IsValid)
2874  return false;
2875  if (!B.IsValid)
2876  return true;
2877 
2878  // The density is calculated by doing :
2879  // (double)DensityA = A.ObjectNumUses / A.ObjectSize
2880  // (double)DensityB = B.ObjectNumUses / B.ObjectSize
2881  // Since this approach may cause inconsistencies in
2882  // the floating point <, >, == comparisons, depending on the floating
2883  // point model with which the compiler was built, we're going
2884  // to scale both sides by multiplying with
2885  // A.ObjectSize * B.ObjectSize. This ends up factoring away
2886  // the division and, with it, the need for any floating point
2887  // arithmetic.
2888  DensityAScaled = static_cast<uint64_t>(A.ObjectNumUses) *
2889  static_cast<uint64_t>(B.ObjectSize);
2890  DensityBScaled = static_cast<uint64_t>(B.ObjectNumUses) *
2891  static_cast<uint64_t>(A.ObjectSize);
2892 
2893  // If the two densities are equal, prioritize highest alignment
2894  // objects. This allows for similar alignment objects
2895  // to be packed together (given the same density).
2896  // There's room for improvement here, also, since we can pack
2897  // similar alignment (different density) objects next to each
2898  // other to save padding. This will also require further
2899  // complexity/iterations, and the overall gain isn't worth it,
2900  // in general. Something to keep in mind, though.
2901  if (DensityAScaled == DensityBScaled)
2902  return A.ObjectAlignment < B.ObjectAlignment;
2903 
2904  return DensityAScaled < DensityBScaled;
2905  }
2906 };
2907 } // namespace
2908 
2909 // Order the symbols in the local stack.
2910 // We want to place the local stack objects in some sort of sensible order.
2911 // The heuristic we use is to try and pack them according to static number
2912 // of uses and size of object in order to minimize code size.
2914  const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const {
2915  const MachineFrameInfo &MFI = MF.getFrameInfo();
2916 
2917  // Don't waste time if there's nothing to do.
2918  if (ObjectsToAllocate.empty())
2919  return;
2920 
2921  // Create an array of all MFI objects. We won't need all of these
2922  // objects, but we're going to create a full array of them to make
2923  // it easier to index into when we're counting "uses" down below.
2924  // We want to be able to easily/cheaply access an object by simply
2925  // indexing into it, instead of having to search for it every time.
2926  std::vector<X86FrameSortingObject> SortingObjects(MFI.getObjectIndexEnd());
2927 
2928  // Walk the objects we care about and mark them as such in our working
2929  // struct.
2930  for (auto &Obj : ObjectsToAllocate) {
2931  SortingObjects[Obj].IsValid = true;
2932  SortingObjects[Obj].ObjectIndex = Obj;
2933  SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlignment(Obj);
2934  // Set the size.
2935  int ObjectSize = MFI.getObjectSize(Obj);
2936  if (ObjectSize == 0)
2937  // Variable size. Just use 4.
2938  SortingObjects[Obj].ObjectSize = 4;
2939  else
2940  SortingObjects[Obj].ObjectSize = ObjectSize;
2941  }
2942 
2943  // Count the number of uses for each object.
2944  for (auto &MBB : MF) {
2945  for (auto &MI : MBB) {
2946  if (MI.isDebugValue())
2947  continue;
2948  for (const MachineOperand &MO : MI.operands()) {
2949  // Check to see if it's a local stack symbol.
2950  if (!MO.isFI())
2951  continue;
2952  int Index = MO.getIndex();
2953  // Check to see if it falls within our range, and is tagged
2954  // to require ordering.
2955  if (Index >= 0 && Index < MFI.getObjectIndexEnd() &&
2956  SortingObjects[Index].IsValid)
2957  SortingObjects[Index].ObjectNumUses++;
2958  }
2959  }
2960  }
2961 
2962  // Sort the objects using X86FrameSortingAlgorithm (see its comment for
2963  // info).
2964  std::stable_sort(SortingObjects.begin(), SortingObjects.end(),
2965  X86FrameSortingComparator());
2966 
2967  // Now modify the original list to represent the final order that
2968  // we want. The order will depend on whether we're going to access them
2969  // from the stack pointer or the frame pointer. For SP, the list should
2970  // end up with the END containing objects that we want with smaller offsets.
2971  // For FP, it should be flipped.
2972  int i = 0;
2973  for (auto &Obj : SortingObjects) {
2974  // All invalid items are sorted at the end, so it's safe to stop.
2975  if (!Obj.IsValid)
2976  break;
2977  ObjectsToAllocate[i++] = Obj.ObjectIndex;
2978  }
2979 
2980  // Flip it if we're accessing off of the FP.
2981  if (!TRI->needsStackRealignment(MF) && hasFP(MF))
2982  std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
2983 }
2984 
2985 
2987  // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
2988  unsigned Offset = 16;
2989  // RBP is immediately pushed.
2990  Offset += SlotSize;
2991  // All callee-saved registers are then pushed.
2992  Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
2993  // Every funclet allocates enough stack space for the largest outgoing call.
2994  Offset += getWinEHFuncletFrameSize(MF);
2995  return Offset;
2996 }
2997 
2999  MachineFunction &MF, RegScavenger *RS) const {
3000  // Mark the function as not having WinCFI. We will set it back to true in
3001  // emitPrologue if it gets called and emits CFI.
3002  MF.setHasWinCFI(false);
3003 
3004  // If this function isn't doing Win64-style C++ EH, we don't need to do
3005  // anything.
3006  const Function *Fn = MF.getFunction();
3007  if (!STI.is64Bit() || !MF.hasEHFunclets() ||
3009  return;
3010 
3011  // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset
3012  // relative to RSP after the prologue. Find the offset of the last fixed
3013  // object, so that we can allocate a slot immediately following it. If there
3014  // were no fixed objects, use offset -SlotSize, which is immediately after the
3015  // return address. Fixed objects have negative frame indices.
3016  MachineFrameInfo &MFI = MF.getFrameInfo();
3017  WinEHFuncInfo &EHInfo = *MF.getWinEHFuncInfo();
3018  int64_t MinFixedObjOffset = -SlotSize;
3019  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I)
3020  MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
3021 
3022  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
3023  for (WinEHHandlerType &H : TBME.HandlerArray) {
3024  int FrameIndex = H.CatchObj.FrameIndex;
3025  if (FrameIndex != INT_MAX) {
3026  // Ensure alignment.
3027  unsigned Align = MFI.getObjectAlignment(FrameIndex);
3028  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % Align;
3029  MinFixedObjOffset -= MFI.getObjectSize(FrameIndex);
3030  MFI.setObjectOffset(FrameIndex, MinFixedObjOffset);
3031  }
3032  }
3033  }
3034 
3035  // Ensure alignment.
3036  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
3037  int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize;
3038  int UnwindHelpFI =
3039  MFI.CreateFixedObject(SlotSize, UnwindHelpOffset, /*Immutable=*/false);
3040  EHInfo.UnwindHelpFrameIdx = UnwindHelpFI;
3041 
3042  // Store -2 into UnwindHelp on function entry. We have to scan forwards past
3043  // other frame setup instructions.
3044  MachineBasicBlock &MBB = MF.front();
3045  auto MBBI = MBB.begin();
3046  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
3047  ++MBBI;
3048 
3049  DebugLoc DL = MBB.findDebugLoc(MBBI);
3050  addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),
3051  UnwindHelpFI)
3052  .addImm(-2);
3053 }
void push_front(MachineBasicBlock *MBB)
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:158
Fast - This calling convention attempts to make calls as fast as possible (e.g.
Definition: CallingConv.h:43
constexpr bool isUInt< 32 >(uint64_t x)
Definition: MathExtras.h:341
union llvm::WinEHHandlerType::@168 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:412
static bool flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB)
Check if the flags need to be preserved before the terminators.
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:568
bool hasBasePointer(const MachineFunction &MF) const
BitVector & set()
Definition: BitVector.h:398
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:77
DILocation * get() const
Get the underlying DILocation.
Definition: DebugLoc.cpp:22
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:30
MachineBasicBlock * getMBB() const
bool hasDebugInfo() const
Returns true if valid debug info is present.
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1073
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:115
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Function Alias Analysis false
bool isOSWindows() const
Definition: X86Subtarget.h:589
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
const X86InstrInfo * getInstrInfo() const override
Definition: X86Subtarget.h:370
bool hasStackObjects() const
Return true if there are any stack objects in this function.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:268
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
bool isCleanupFuncletEntry() const
Returns true if this is the entry block of a cleanup funclet.
unsigned getReg() const
getReg - Returns the register number.
const TargetRegisterClass * getGPRsForTailCall(const MachineFunction &MF) const
getGPRsForTailCall - Returns a register class with registers that can be used in forming tail calls...
static unsigned getLEArOpcode(unsigned IsLP64)
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:404
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
MachineBasicBlock::iterator restoreWin32EHStackPointers(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool RestoreSP=false) const
Sets up EBP and optionally ESI based on the incoming EBP value.
constexpr bool isInt< 8 >(int64_t x)
Definition: MathExtras.h:295
void setCalleeSavedFrameSize(unsigned bytes)
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:262
arg_iterator arg_end()
Definition: Function.h:612
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:862
void setIsDead(bool Val=true)
F(f)
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
MachineModuleInfo & getMMI() const
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1067
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:677
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
bool isTargetNaCl64() const
Definition: X86Subtarget.h:559
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:391
unsigned getSlotSize() const
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:398
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
bool isTargetWindowsMSVC() const
Definition: X86Subtarget.h:563
X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride)
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
return AArch64::GPR64RegClass contains(Reg)
iterator_range< succ_iterator > successors()
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
bool Uses64BitFramePtr
True if the 64-bit frame or stack pointer should be used.
unsigned getSpillAlignment(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class...
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:657
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
A tuple of MDNodes.
Definition: Metadata.h:1323
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction. ...
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const HexagonInstrInfo * TII
bool isTarget64BitLP64() const
Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?
Definition: X86Subtarget.h:431
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
bool is32Bit() const
Definition: X86Subtarget.h:416
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
Reg
All possible values of the reg field in the ModR/M byte.
iterator_range< iterator > terminators()
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
void adjustForHiPEPrologue(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Erlang programs may need a special prologue to handle the stack size they might need at runtime...
unsigned getNumOperands() const
Definition: Metadata.cpp:1069
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:290
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
static const uint64_t kSplitStackAvailable
virtual unsigned getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool Immutable=false)
Create a spill slot at a fixed location on the stack.
unsigned getBaseRegister() const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
auto reverse(ContainerTy &&C, typename std::enable_if< has_rbegin< ContainerTy >::value >::type *=nullptr) -> decltype(make_range(C.rbegin(), C.rend()))
Definition: STLExtras.h:186
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override
uint16_t StackAdjustment(const RuntimeFunction &RF)
StackAdjustment - calculated stack adjustment in words.
Definition: ARMWinEH.h:197
bool canUseLEAForSPInEpilogue(const MachineFunction &MF) const
Check that LEA can be used on SP in an epilogue sequence for MF.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
bool needsFrameIndexResolution(const MachineFunction &MF) const override
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe inline-stub with the actual probe code inline.
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
static unsigned getANDriOpcode(bool IsLP64, int64_t Imm)
const MCContext & getContext() const
const RegList & Regs
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:133
int getObjectIndexBegin() const
Return the minimum frame object index.
NamedMDNode * getNamedMetadata(const Twine &Name) const
Return the first NamedMDNode in the module with the specified name.
Definition: Module.cpp:242
static unsigned getHiPELiteral(NamedMDNode *HiPELiteralsMD, const StringRef LiteralName)
Lookup an ERTS parameter in the !hipe.literals named metadata node.
static cl::opt< int > PageSize("imp-null-check-page-size", cl::desc("The page size of the target in bytes"), cl::init(4096))
int getObjectIndexEnd() const
Return one past the maximum frame object index.
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:634
bool hasCopyImplyingStackAdjustment() const
Returns true if the function contains operations which will lower down to instructions which manipula...
StringRef getStackProbeSymbolName(MachineFunction &MF) const override
Returns the name of the symbol used to emit stack probes or the empty string if not applicable...
Value wrapper in the Metadata hierarchy.
Definition: Metadata.h:337
static unsigned calculateSetFPREG(uint64_t SPAdjust)
bool Is64Bit
Is64Bit implies that x86_64 instructions are available.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
unsigned getUndefRegState(bool B)
void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const MCCFIInstruction &CFIInst) const
Wraps up getting a CFI index and building a MachineInstr for it.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
unsigned getKillRegState(bool B)
unsigned getCodeViewFlag() const
Returns the CodeView Version by checking module flags.
Definition: Module.cpp:460
unsigned getStackRegister() const
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:121
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
TargetInstrInfo - Interface to description of machine instruction set.
StringRef getString() const
Definition: Metadata.cpp:456
unsigned getDefRegState(bool B)
The memory access is volatile.
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:366
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:149
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
unsigned const MachineRegisterInfo * MRI
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:384
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool isBundled() const
Return true if this instruction part of a bundle.
Definition: MachineInstr.h:241
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
bool hasEHFunclets() const
void setStackSize(uint64_t Size)
Set the size of the stack.
static bool is64Bit(const char *name)
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE instructions.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:36
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
const GlobalValue * getGlobal() const
const X86InstrInfo & TII
#define H(x, y, z)
Definition: MD5.cpp:57
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size)
A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE.
Definition: MCDwarf.h:465
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:185
MCRegAliasIterator enumerates all registers aliasing Reg.
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset]...
bool useLeaForSP() const
Definition: X86Subtarget.h:497
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
unsigned getFramePtr() const
Returns physical register used as frame pointer.
bool isTargetFreeBSD() const
Definition: X86Subtarget.h:544
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
size_t arg_size() const
Definition: Function.h:630
arg_iterator arg_begin()
Definition: Function.h:603
self_iterator getIterator()
Definition: ilist_node.h:82
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn&#39;t already there.
Definition: SmallSet.h:81
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool Immutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool isTargetDarwin() const
Definition: X86Subtarget.h:543
int CreateSpillStackObject(uint64_t Size, unsigned Alignment)
Create a new statically sized stack object that represents a spill slot, returning a nonnegative iden...
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineBasicBlock & front() const
bool isTargetWin64() const
Definition: X86Subtarget.h:591
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
virtual bool hasReservedCallFrame(const MachineFunction &MF) const
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm)
static bool isFuncletReturnInstr(MachineInstr &MI)
static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm)
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
X86_INTR - x86 hardware interrupt context.
Definition: CallingConv.h:174
void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const
Emit target stack probe code.
The memory access writes data.
std::enable_if< std::numeric_limits< T >::is_signed, bool >::type getAsInteger(unsigned Radix, T &Result) const
Parse the current string as an integer of the specified radix.
Definition: StringRef.h:497
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
const X86Subtarget & STI
Iterator for intrusive lists based on ilist_node.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
constexpr bool isInt< 32 >(int64_t x)
Definition: MathExtras.h:301
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
bool regsOverlap(unsigned regA, unsigned regB) const
Returns true if the two registers are equal or alias each other.
bool shouldSplitStack() const
Should we be emitting segmented stack stuff for the function.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:194
MachineOperand class - Representation of each machine instruction operand.
Information about stack frame layout on the target.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
bool isTargetWin32() const
Definition: X86Subtarget.h:593
int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, unsigned &FrameReg, bool IgnoreSPUpdates) const override
Same as getFrameIndexReference, except that the stack pointer (as opposed to the frame pointer) will ...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
int64_t getFrameAdjustment(const MachineInstr &I) const
Returns the stack pointer adjustment that happens inside the frame setup..destroy sequence (e...
Definition: X86InstrInfo.h:189
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
bool callsUnwindInit() const
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - If there is a reserved call frame, the call frame pseudos can be simpli...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
bool isTarget64BitILP32() const
Is this x86_64 with the ILP32 programming model (x32 ABI)?
Definition: X86Subtarget.h:425
bool needsUnwindTableEntry() const
True if this function needs an unwind table.
Definition: Function.h:505
bool callsEHReturn() const
unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
static bool isTailCallOpcode(unsigned Opc)
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:97
CodeModel::Model getCodeModel() const
Returns the code model.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:653
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
int getFrameIndexReferenceSP(const MachineFunction &MF, int FI, unsigned &SPReg, int Adjustment) const
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
bool isLiveIn(unsigned Reg) const
Representation of each machine instruction.
Definition: MachineInstr.h:59
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Adjust the prologue to have the function use segmented stacks.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
void ensureMaxAlignment(unsigned Align)
Make sure the function is at least Align bytes aligned.
static const size_t npos
Definition: StringRef.h:51
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB &#39;Other&#39; at the position From, and insert it into this MBB right before &#39;...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isTargetDragonFly() const
Definition: X86Subtarget.h:545
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:61
bool verify(Pass *p=nullptr, const char *Banner=nullptr, bool AbortOnError=true) const
Run the current MachineFunction through the machine code verifier, useful for debugger use...
StringRef getValueAsString() const
Return the attribute&#39;s value as a string.
Definition: Attributes.cpp:195
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
StringRef getName() const
Return a constant reference to the value&#39;s name.
Definition: Value.cpp:220
TargetOptions Options
Definition: TargetMachine.h:96
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned char TargetFlags=0) const
LLVM_NODISCARD size_t find_first_of(char C, size_t From=0) const
Find the first character in the string that is C, or npos if not found.
Definition: StringRef.h:395
#define I(x, y, z)
Definition: MD5.cpp:58
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1213
bool optForMinSize() const
Optimize this function for minimum size (-Oz).
Definition: Function.h:527
Pair of physical register and lane mask.
virtual const TargetFrameLowering * getFrameLowering() const
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
int getOffsetAdjustment() const
Return the correction for frame offsets.
static unsigned getSUBrrOpcode(unsigned isLP64)
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const X86RegisterInfo * TRI
const Module * getModule() const
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents &#39;eh_return&#39; gcc dwarf builtin...
Definition: ISDOpcodes.h:102
const Function * getFunction() const
getFunction - Return the LLVM function that this machine code represents
CallingConvention
Definition: Dwarf.h:194
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isEAXLiveIn(MachineBasicBlock &MBB)
static unsigned getADDrrOpcode(unsigned isLP64)
void insert(iterator MBBI, MachineBasicBlock *MBB)
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary)
GetScratchRegister - Get a temp register for performing work in the segmented stack and the Erlang/Hi...
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:285
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1260
bool isTargetLinux() const
Definition: X86Subtarget.h:553
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const X86RegisterInfo *TRI, bool Is64Bit)
findDeadCallerSavedReg - Return a caller-saved register that isn&#39;t live when it reaches the "return" ...
bool isCallingConvWin64(CallingConv::ID CC) const
Definition: X86Subtarget.h:604
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.h:270
static const unsigned FramePtr
int getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
A single uniqued string.
Definition: Metadata.h:602
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL) const
unsigned getFrameRegister(const MachineFunction &MF) const override
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
No exception support.
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack.
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const
Check the instruction before/after the passed instruction.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1073
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t find(char C, size_t From=0) const
Search for the first character C in the string.
Definition: StringRef.h:298
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:295
static bool HasNestArgument(const MachineFunction *MF)
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:84
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value...
X86_FastCall - &#39;fast&#39; analog of X86_StdCall.
Definition: CallingConv.h:92
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
This class contains meta information specific to a module.
bool hasCalls() const
Return true if the current function has any function calls.
unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:65
bool isTargetWindowsCoreCLR() const
Definition: X86Subtarget.h:571