LLVM  7.0.0svn
X86FrameLowering.cpp
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1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the X86 implementation of TargetFrameLowering class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "X86TargetMachine.h"
20 #include "llvm/ADT/SmallSet.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
32 #include "llvm/Support/Debug.h"
34 #include <cstdlib>
35 
36 using namespace llvm;
37 
39  unsigned StackAlignOverride)
40  : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
41  STI.is64Bit() ? -8 : -4),
42  STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
43  // Cache a bunch of frame-related predicates for this subtarget.
45  Is64Bit = STI.is64Bit();
46  IsLP64 = STI.isTarget64BitLP64();
47  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
50 }
51 
53  return !MF.getFrameInfo().hasVarSizedObjects() &&
54  !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
55 }
56 
57 /// canSimplifyCallFramePseudos - If there is a reserved call frame, the
58 /// call frame pseudos can be simplified. Having a FP, as in the default
59 /// implementation, is not sufficient here since we can't always use it.
60 /// Use a more nuanced condition.
61 bool
63  return hasReservedCallFrame(MF) ||
64  (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
65  TRI->hasBasePointer(MF);
66 }
67 
68 // needsFrameIndexResolution - Do we need to perform FI resolution for
69 // this function. Normally, this is required only when the function
70 // has any stack objects. However, FI resolution actually has another job,
71 // not apparent from the title - it resolves callframesetup/destroy
72 // that were not simplified earlier.
73 // So, this is required for x86 functions that have push sequences even
74 // when there are no stack objects.
75 bool
77  return MF.getFrameInfo().hasStackObjects() ||
78  MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
79 }
80 
81 /// hasFP - Return true if the specified function should have a dedicated frame
82 /// pointer register. This is true if the function has variable sized allocas
83 /// or if frame pointer elimination is disabled.
85  const MachineFrameInfo &MFI = MF.getFrameInfo();
86  return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
87  TRI->needsStackRealignment(MF) ||
88  MFI.hasVarSizedObjects() ||
90  MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
91  MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
92  MFI.hasStackMap() || MFI.hasPatchPoint() ||
94 }
95 
96 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
97  if (IsLP64) {
98  if (isInt<8>(Imm))
99  return X86::SUB64ri8;
100  return X86::SUB64ri32;
101  } else {
102  if (isInt<8>(Imm))
103  return X86::SUB32ri8;
104  return X86::SUB32ri;
105  }
106 }
107 
108 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
109  if (IsLP64) {
110  if (isInt<8>(Imm))
111  return X86::ADD64ri8;
112  return X86::ADD64ri32;
113  } else {
114  if (isInt<8>(Imm))
115  return X86::ADD32ri8;
116  return X86::ADD32ri;
117  }
118 }
119 
120 static unsigned getSUBrrOpcode(unsigned isLP64) {
121  return isLP64 ? X86::SUB64rr : X86::SUB32rr;
122 }
123 
124 static unsigned getADDrrOpcode(unsigned isLP64) {
125  return isLP64 ? X86::ADD64rr : X86::ADD32rr;
126 }
127 
128 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
129  if (IsLP64) {
130  if (isInt<8>(Imm))
131  return X86::AND64ri8;
132  return X86::AND64ri32;
133  }
134  if (isInt<8>(Imm))
135  return X86::AND32ri8;
136  return X86::AND32ri;
137 }
138 
139 static unsigned getLEArOpcode(unsigned IsLP64) {
140  return IsLP64 ? X86::LEA64r : X86::LEA32r;
141 }
142 
143 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
144 /// when it reaches the "return" instruction. We can then pop a stack object
145 /// to this register without worry about clobbering it.
148  const X86RegisterInfo *TRI,
149  bool Is64Bit) {
150  const MachineFunction *MF = MBB.getParent();
151  if (MF->callsEHReturn())
152  return 0;
153 
154  const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF);
155 
156  if (MBBI == MBB.end())
157  return 0;
158 
159  switch (MBBI->getOpcode()) {
160  default: return 0;
161  case TargetOpcode::PATCHABLE_RET:
162  case X86::RET:
163  case X86::RETL:
164  case X86::RETQ:
165  case X86::RETIL:
166  case X86::RETIQ:
167  case X86::TCRETURNdi:
168  case X86::TCRETURNri:
169  case X86::TCRETURNmi:
170  case X86::TCRETURNdi64:
171  case X86::TCRETURNri64:
172  case X86::TCRETURNmi64:
173  case X86::EH_RETURN:
174  case X86::EH_RETURN64: {
176  for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
177  MachineOperand &MO = MBBI->getOperand(i);
178  if (!MO.isReg() || MO.isDef())
179  continue;
180  unsigned Reg = MO.getReg();
181  if (!Reg)
182  continue;
183  for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
184  Uses.insert(*AI);
185  }
186 
187  for (auto CS : AvailableRegs)
188  if (!Uses.count(CS) && CS != X86::RIP)
189  return CS;
190  }
191  }
192 
193  return 0;
194 }
195 
196 static bool isEAXLiveIn(MachineBasicBlock &MBB) {
197  for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) {
198  unsigned Reg = RegMask.PhysReg;
199 
200  if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
201  Reg == X86::AH || Reg == X86::AL)
202  return true;
203  }
204 
205  return false;
206 }
207 
208 /// Check if the flags need to be preserved before the terminators.
209 /// This would be the case, if the eflags is live-in of the region
210 /// composed by the terminators or live-out of that region, without
211 /// being defined by a terminator.
212 static bool
214  for (const MachineInstr &MI : MBB.terminators()) {
215  bool BreakNext = false;
216  for (const MachineOperand &MO : MI.operands()) {
217  if (!MO.isReg())
218  continue;
219  unsigned Reg = MO.getReg();
220  if (Reg != X86::EFLAGS)
221  continue;
222 
223  // This terminator needs an eflags that is not defined
224  // by a previous another terminator:
225  // EFLAGS is live-in of the region composed by the terminators.
226  if (!MO.isDef())
227  return true;
228  // This terminator defines the eflags, i.e., we don't need to preserve it.
229  // However, we still need to check this specific terminator does not
230  // read a live-in value.
231  BreakNext = true;
232  }
233  // We found a definition of the eflags, no need to preserve them.
234  if (BreakNext)
235  return false;
236  }
237 
238  // None of the terminators use or define the eflags.
239  // Check if they are live-out, that would imply we need to preserve them.
240  for (const MachineBasicBlock *Succ : MBB.successors())
241  if (Succ->isLiveIn(X86::EFLAGS))
242  return true;
243 
244  return false;
245 }
246 
247 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
248 /// stack pointer by a constant value.
251  const DebugLoc &DL,
252  int64_t NumBytes, bool InEpilogue) const {
253  bool isSub = NumBytes < 0;
254  uint64_t Offset = isSub ? -NumBytes : NumBytes;
257 
258  uint64_t Chunk = (1LL << 31) - 1;
259 
260  if (Offset > Chunk) {
261  // Rather than emit a long series of instructions for large offsets,
262  // load the offset into a register and do one sub/add
263  unsigned Reg = 0;
264  unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
265 
266  if (isSub && !isEAXLiveIn(MBB))
267  Reg = Rax;
268  else
269  Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
270 
271  unsigned MovRIOpc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
272  unsigned AddSubRROpc =
274  if (Reg) {
275  BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg)
276  .addImm(Offset)
277  .setMIFlag(Flag);
278  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr)
279  .addReg(StackPtr)
280  .addReg(Reg);
281  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
282  return;
283  } else if (Offset > 8 * Chunk) {
284  // If we would need more than 8 add or sub instructions (a >16GB stack
285  // frame), it's worth spilling RAX to materialize this immediate.
286  // pushq %rax
287  // movabsq +-$Offset+-SlotSize, %rax
288  // addq %rsp, %rax
289  // xchg %rax, (%rsp)
290  // movq (%rsp), %rsp
291  assert(Is64Bit && "can't have 32-bit 16GB stack frame");
292  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
293  .addReg(Rax, RegState::Kill)
294  .setMIFlag(Flag);
295  // Subtract is not commutative, so negate the offset and always use add.
296  // Subtract 8 less and add 8 more to account for the PUSH we just did.
297  if (isSub)
298  Offset = -(Offset - SlotSize);
299  else
300  Offset = Offset + SlotSize;
301  BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax)
302  .addImm(Offset)
303  .setMIFlag(Flag);
304  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax)
305  .addReg(Rax)
306  .addReg(StackPtr);
307  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
308  // Exchange the new SP in RAX with the top of the stack.
309  addRegOffset(
310  BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax),
311  StackPtr, false, 0);
312  // Load new SP from the top of the stack into RSP.
313  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),
314  StackPtr, false, 0);
315  return;
316  }
317  }
318 
319  while (Offset) {
320  uint64_t ThisVal = std::min(Offset, Chunk);
321  if (ThisVal == SlotSize) {
322  // Use push / pop for slot sized adjustments as a size optimization. We
323  // need to find a dead register when using pop.
324  unsigned Reg = isSub
325  ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
326  : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
327  if (Reg) {
328  unsigned Opc = isSub
329  ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
330  : (Is64Bit ? X86::POP64r : X86::POP32r);
331  BuildMI(MBB, MBBI, DL, TII.get(Opc))
332  .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))
333  .setMIFlag(Flag);
334  Offset -= ThisVal;
335  continue;
336  }
337  }
338 
339  BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue)
340  .setMIFlag(Flag);
341 
342  Offset -= ThisVal;
343  }
344 }
345 
346 MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
348  const DebugLoc &DL, int64_t Offset, bool InEpilogue) const {
349  assert(Offset != 0 && "zero offset stack adjustment requested");
350 
351  // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue
352  // is tricky.
353  bool UseLEA;
354  if (!InEpilogue) {
355  // Check if inserting the prologue at the beginning
356  // of MBB would require to use LEA operations.
357  // We need to use LEA operations if EFLAGS is live in, because
358  // it means an instruction will read it before it gets defined.
359  UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);
360  } else {
361  // If we can use LEA for SP but we shouldn't, check that none
362  // of the terminators uses the eflags. Otherwise we will insert
363  // a ADD that will redefine the eflags and break the condition.
364  // Alternatively, we could move the ADD, but this may not be possible
365  // and is an optimization anyway.
366  UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent());
367  if (UseLEA && !STI.useLeaForSP())
369  // If that assert breaks, that means we do not do the right thing
370  // in canUseAsEpilogue.
372  "We shouldn't have allowed this insertion point");
373  }
374 
376  if (UseLEA) {
377  MI = addRegOffset(BuildMI(MBB, MBBI, DL,
379  StackPtr),
380  StackPtr, false, Offset);
381  } else {
382  bool IsSub = Offset < 0;
383  uint64_t AbsOffset = IsSub ? -Offset : Offset;
384  unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset)
385  : getADDriOpcode(Uses64BitFramePtr, AbsOffset);
386  MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
387  .addReg(StackPtr)
388  .addImm(AbsOffset);
389  MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
390  }
391  return MI;
392 }
393 
396  bool doMergeWithPrevious) const {
397  if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
398  (!doMergeWithPrevious && MBBI == MBB.end()))
399  return 0;
400 
401  MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
402 
403  PI = skipDebugInstructionsBackward(PI, MBB.begin());
404  // It is assumed that ADD/SUB/LEA instruction is succeded by one CFI
405  // instruction, and that there are no DBG_VALUE or other instructions between
406  // ADD/SUB/LEA and its corresponding CFI instruction.
407  /* TODO: Add support for the case where there are multiple CFI instructions
408  below the ADD/SUB/LEA, e.g.:
409  ...
410  add
411  cfi_def_cfa_offset
412  cfi_offset
413  ...
414  */
415  if (doMergeWithPrevious && PI != MBB.begin() && PI->isCFIInstruction())
416  PI = std::prev(PI);
417 
418  unsigned Opc = PI->getOpcode();
419  int Offset = 0;
420 
421  if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
422  Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
423  PI->getOperand(0).getReg() == StackPtr){
424  assert(PI->getOperand(1).getReg() == StackPtr);
425  Offset = PI->getOperand(2).getImm();
426  } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
427  PI->getOperand(0).getReg() == StackPtr &&
428  PI->getOperand(1).getReg() == StackPtr &&
429  PI->getOperand(2).getImm() == 1 &&
430  PI->getOperand(3).getReg() == X86::NoRegister &&
431  PI->getOperand(5).getReg() == X86::NoRegister) {
432  // For LEAs we have: def = lea SP, FI, noreg, Offset, noreg.
433  Offset = PI->getOperand(4).getImm();
434  } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
435  Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
436  PI->getOperand(0).getReg() == StackPtr) {
437  assert(PI->getOperand(1).getReg() == StackPtr);
438  Offset = -PI->getOperand(2).getImm();
439  } else
440  return 0;
441 
442  PI = MBB.erase(PI);
443  if (PI != MBB.end() && PI->isCFIInstruction()) PI = MBB.erase(PI);
444  if (!doMergeWithPrevious)
445  MBBI = skipDebugInstructionsForward(PI, MBB.end());
446 
447  return Offset;
448 }
449 
452  const DebugLoc &DL,
453  const MCCFIInstruction &CFIInst) const {
454  MachineFunction &MF = *MBB.getParent();
455  unsigned CFIIndex = MF.addFrameInst(CFIInst);
456  BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
457  .addCFIIndex(CFIIndex);
458 }
459 
462  const DebugLoc &DL) const {
463  MachineFunction &MF = *MBB.getParent();
464  MachineFrameInfo &MFI = MF.getFrameInfo();
465  MachineModuleInfo &MMI = MF.getMMI();
466  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
467 
468  // Add callee saved registers to move list.
469  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
470  if (CSI.empty()) return;
471 
472  // Calculate offsets.
473  for (std::vector<CalleeSavedInfo>::const_iterator
474  I = CSI.begin(), E = CSI.end(); I != E; ++I) {
475  int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
476  unsigned Reg = I->getReg();
477 
478  unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
479  BuildCFI(MBB, MBBI, DL,
480  MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
481  }
482 }
483 
485  MachineBasicBlock &MBB,
487  const DebugLoc &DL, bool InProlog) const {
488  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
489  if (STI.isTargetWindowsCoreCLR()) {
490  if (InProlog) {
491  emitStackProbeInlineStub(MF, MBB, MBBI, DL, true);
492  } else {
493  emitStackProbeInline(MF, MBB, MBBI, DL, false);
494  }
495  } else {
496  emitStackProbeCall(MF, MBB, MBBI, DL, InProlog);
497  }
498 }
499 
501  MachineBasicBlock &PrologMBB) const {
502  const StringRef ChkStkStubSymbol = "__chkstk_stub";
503  MachineInstr *ChkStkStub = nullptr;
504 
505  for (MachineInstr &MI : PrologMBB) {
506  if (MI.isCall() && MI.getOperand(0).isSymbol() &&
507  ChkStkStubSymbol == MI.getOperand(0).getSymbolName()) {
508  ChkStkStub = &MI;
509  break;
510  }
511  }
512 
513  if (ChkStkStub != nullptr) {
514  assert(!ChkStkStub->isBundled() &&
515  "Not expecting bundled instructions here");
516  MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
517  assert(std::prev(MBBI) == ChkStkStub &&
518  "MBBI expected after __chkstk_stub.");
519  DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
520  emitStackProbeInline(MF, PrologMBB, MBBI, DL, true);
521  ChkStkStub->eraseFromParent();
522  }
523 }
524 
525 void X86FrameLowering::emitStackProbeInline(MachineFunction &MF,
526  MachineBasicBlock &MBB,
528  const DebugLoc &DL,
529  bool InProlog) const {
530  const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
531  assert(STI.is64Bit() && "different expansion needed for 32 bit");
532  assert(STI.isTargetWindowsCoreCLR() && "custom expansion expects CoreCLR");
533  const TargetInstrInfo &TII = *STI.getInstrInfo();
534  const BasicBlock *LLVM_BB = MBB.getBasicBlock();
535 
536  // RAX contains the number of bytes of desired stack adjustment.
537  // The handling here assumes this value has already been updated so as to
538  // maintain stack alignment.
539  //
540  // We need to exit with RSP modified by this amount and execute suitable
541  // page touches to notify the OS that we're growing the stack responsibly.
542  // All stack probing must be done without modifying RSP.
543  //
544  // MBB:
545  // SizeReg = RAX;
546  // ZeroReg = 0
547  // CopyReg = RSP
548  // Flags, TestReg = CopyReg - SizeReg
549  // FinalReg = !Flags.Ovf ? TestReg : ZeroReg
550  // LimitReg = gs magic thread env access
551  // if FinalReg >= LimitReg goto ContinueMBB
552  // RoundBB:
553  // RoundReg = page address of FinalReg
554  // LoopMBB:
555  // LoopReg = PHI(LimitReg,ProbeReg)
556  // ProbeReg = LoopReg - PageSize
557  // [ProbeReg] = 0
558  // if (ProbeReg > RoundReg) goto LoopMBB
559  // ContinueMBB:
560  // RSP = RSP - RAX
561  // [rest of original MBB]
562 
563  // Set up the new basic blocks
564  MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB);
565  MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB);
566  MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB);
567 
568  MachineFunction::iterator MBBIter = std::next(MBB.getIterator());
569  MF.insert(MBBIter, RoundMBB);
570  MF.insert(MBBIter, LoopMBB);
571  MF.insert(MBBIter, ContinueMBB);
572 
573  // Split MBB and move the tail portion down to ContinueMBB.
574  MachineBasicBlock::iterator BeforeMBBI = std::prev(MBBI);
575  ContinueMBB->splice(ContinueMBB->begin(), &MBB, MBBI, MBB.end());
576  ContinueMBB->transferSuccessorsAndUpdatePHIs(&MBB);
577 
578  // Some useful constants
579  const int64_t ThreadEnvironmentStackLimit = 0x10;
580  const int64_t PageSize = 0x1000;
581  const int64_t PageMask = ~(PageSize - 1);
582 
583  // Registers we need. For the normal case we use virtual
584  // registers. For the prolog expansion we use RAX, RCX and RDX.
586  const TargetRegisterClass *RegClass = &X86::GR64RegClass;
587  const unsigned SizeReg = InProlog ? (unsigned)X86::RAX
588  : MRI.createVirtualRegister(RegClass),
589  ZeroReg = InProlog ? (unsigned)X86::RCX
590  : MRI.createVirtualRegister(RegClass),
591  CopyReg = InProlog ? (unsigned)X86::RDX
592  : MRI.createVirtualRegister(RegClass),
593  TestReg = InProlog ? (unsigned)X86::RDX
594  : MRI.createVirtualRegister(RegClass),
595  FinalReg = InProlog ? (unsigned)X86::RDX
596  : MRI.createVirtualRegister(RegClass),
597  RoundedReg = InProlog ? (unsigned)X86::RDX
598  : MRI.createVirtualRegister(RegClass),
599  LimitReg = InProlog ? (unsigned)X86::RCX
600  : MRI.createVirtualRegister(RegClass),
601  JoinReg = InProlog ? (unsigned)X86::RCX
602  : MRI.createVirtualRegister(RegClass),
603  ProbeReg = InProlog ? (unsigned)X86::RCX
604  : MRI.createVirtualRegister(RegClass);
605 
606  // SP-relative offsets where we can save RCX and RDX.
607  int64_t RCXShadowSlot = 0;
608  int64_t RDXShadowSlot = 0;
609 
610  // If inlining in the prolog, save RCX and RDX.
611  // Future optimization: don't save or restore if not live in.
612  if (InProlog) {
613  // Compute the offsets. We need to account for things already
614  // pushed onto the stack at this point: return address, frame
615  // pointer (if used), and callee saves.
617  const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize();
618  const bool HasFP = hasFP(MF);
619  RCXShadowSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0);
620  RDXShadowSlot = RCXShadowSlot + 8;
621  // Emit the saves.
622  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
623  RCXShadowSlot)
624  .addReg(X86::RCX);
625  addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
626  RDXShadowSlot)
627  .addReg(X86::RDX);
628  } else {
629  // Not in the prolog. Copy RAX to a virtual reg.
630  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX);
631  }
632 
633  // Add code to MBB to check for overflow and set the new target stack pointer
634  // to zero if so.
635  BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)
636  .addReg(ZeroReg, RegState::Undef)
637  .addReg(ZeroReg, RegState::Undef);
638  BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);
639  BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)
640  .addReg(CopyReg)
641  .addReg(SizeReg);
642  BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg)
643  .addReg(TestReg)
644  .addReg(ZeroReg);
645 
646  // FinalReg now holds final stack pointer value, or zero if
647  // allocation would overflow. Compare against the current stack
648  // limit from the thread environment block. Note this limit is the
649  // lowest touched page on the stack, not the point at which the OS
650  // will cause an overflow exception, so this is just an optimization
651  // to avoid unnecessarily touching pages that are below the current
652  // SP but already committed to the stack by the OS.
653  BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg)
654  .addReg(0)
655  .addImm(1)
656  .addReg(0)
657  .addImm(ThreadEnvironmentStackLimit)
658  .addReg(X86::GS);
659  BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg);
660  // Jump if the desired stack pointer is at or above the stack limit.
661  BuildMI(&MBB, DL, TII.get(X86::JAE_1)).addMBB(ContinueMBB);
662 
663  // Add code to roundMBB to round the final stack pointer to a page boundary.
664  BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)
665  .addReg(FinalReg)
666  .addImm(PageMask);
667  BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB);
668 
669  // LimitReg now holds the current stack limit, RoundedReg page-rounded
670  // final RSP value. Add code to loopMBB to decrement LimitReg page-by-page
671  // and probe until we reach RoundedReg.
672  if (!InProlog) {
673  BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg)
674  .addReg(LimitReg)
675  .addMBB(RoundMBB)
676  .addReg(ProbeReg)
677  .addMBB(LoopMBB);
678  }
679 
680  addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,
681  false, -PageSize);
682 
683  // Probe by storing a byte onto the stack.
684  BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi))
685  .addReg(ProbeReg)
686  .addImm(1)
687  .addReg(0)
688  .addImm(0)
689  .addReg(0)
690  .addImm(0);
691  BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))
692  .addReg(RoundedReg)
693  .addReg(ProbeReg);
694  BuildMI(LoopMBB, DL, TII.get(X86::JNE_1)).addMBB(LoopMBB);
695 
696  MachineBasicBlock::iterator ContinueMBBI = ContinueMBB->getFirstNonPHI();
697 
698  // If in prolog, restore RDX and RCX.
699  if (InProlog) {
700  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
701  X86::RCX),
702  X86::RSP, false, RCXShadowSlot);
703  addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
704  X86::RDX),
705  X86::RSP, false, RDXShadowSlot);
706  }
707 
708  // Now that the probing is done, add code to continueMBB to update
709  // the stack pointer for real.
710  BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
711  .addReg(X86::RSP)
712  .addReg(SizeReg);
713 
714  // Add the control flow edges we need.
715  MBB.addSuccessor(ContinueMBB);
716  MBB.addSuccessor(RoundMBB);
717  RoundMBB->addSuccessor(LoopMBB);
718  LoopMBB->addSuccessor(ContinueMBB);
719  LoopMBB->addSuccessor(LoopMBB);
720 
721  // Mark all the instructions added to the prolog as frame setup.
722  if (InProlog) {
723  for (++BeforeMBBI; BeforeMBBI != MBB.end(); ++BeforeMBBI) {
724  BeforeMBBI->setFlag(MachineInstr::FrameSetup);
725  }
726  for (MachineInstr &MI : *RoundMBB) {
727  MI.setFlag(MachineInstr::FrameSetup);
728  }
729  for (MachineInstr &MI : *LoopMBB) {
730  MI.setFlag(MachineInstr::FrameSetup);
731  }
732  for (MachineBasicBlock::iterator CMBBI = ContinueMBB->begin();
733  CMBBI != ContinueMBBI; ++CMBBI) {
734  CMBBI->setFlag(MachineInstr::FrameSetup);
735  }
736  }
737 
738  // Possible TODO: physreg liveness for InProlog case.
739 }
740 
741 void X86FrameLowering::emitStackProbeCall(MachineFunction &MF,
742  MachineBasicBlock &MBB,
744  const DebugLoc &DL,
745  bool InProlog) const {
746  bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
747 
748  // FIXME: Add retpoline support and remove this.
749  if (Is64Bit && IsLargeCodeModel && STI.useRetpoline())
750  report_fatal_error("Emitting stack probe calls on 64-bit with the large "
751  "code model and retpoline not yet implemented.");
752 
753  unsigned CallOp;
754  if (Is64Bit)
755  CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
756  else
757  CallOp = X86::CALLpcrel32;
758 
760 
762  MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI);
763 
764  // All current stack probes take AX and SP as input, clobber flags, and
765  // preserve all registers. x86_64 probes leave RSP unmodified.
766  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
767  // For the large code model, we have to call through a register. Use R11,
768  // as it is scratch in all supported calling conventions.
769  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
770  .addExternalSymbol(MF.createExternalSymbolName(Symbol));
771  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
772  } else {
773  CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp))
774  .addExternalSymbol(MF.createExternalSymbolName(Symbol));
775  }
776 
777  unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
778  unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
779  CI.addReg(AX, RegState::Implicit)
783  .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
784 
785  if (STI.isTargetWin64() || !STI.isOSWindows()) {
786  // MSVC x32's _chkstk and cygwin/mingw's _alloca adjust %esp themselves.
787  // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
788  // themselves. They also does not clobber %rax so we can reuse it when
789  // adjusting %rsp.
790  // All other platforms do not specify a particular ABI for the stack probe
791  // function, so we arbitrarily define it to not adjust %esp/%rsp itself.
792  BuildMI(MBB, MBBI, DL, TII.get(getSUBrrOpcode(Is64Bit)), SP)
793  .addReg(SP)
794  .addReg(AX);
795  }
796 
797  if (InProlog) {
798  // Apply the frame setup flag to all inserted instrs.
799  for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI)
800  ExpansionMBBI->setFlag(MachineInstr::FrameSetup);
801  }
802 }
803 
804 void X86FrameLowering::emitStackProbeInlineStub(
806  MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const {
807 
808  assert(InProlog && "ChkStkStub called outside prolog!");
809 
810  BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32))
811  .addExternalSymbol("__chkstk_stub");
812 }
813 
814 static unsigned calculateSetFPREG(uint64_t SPAdjust) {
815  // Win64 ABI has a less restrictive limitation of 240; 128 works equally well
816  // and might require smaller successive adjustments.
817  const uint64_t Win64MaxSEHOffset = 128;
818  uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
819  // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode.
820  return SEHFrameOffset & -16;
821 }
822 
823 // If we're forcing a stack realignment we can't rely on just the frame
824 // info, we need to know the ABI stack alignment as well in case we
825 // have a call out. Otherwise just make sure we have some alignment - we'll
826 // go with the minimum SlotSize.
827 uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const {
828  const MachineFrameInfo &MFI = MF.getFrameInfo();
829  uint64_t MaxAlign = MFI.getMaxAlignment(); // Desired stack alignment.
830  unsigned StackAlign = getStackAlignment();
831  if (MF.getFunction().hasFnAttribute("stackrealign")) {
832  if (MFI.hasCalls())
833  MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
834  else if (MaxAlign < SlotSize)
835  MaxAlign = SlotSize;
836  }
837  return MaxAlign;
838 }
839 
840 void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
842  const DebugLoc &DL, unsigned Reg,
843  uint64_t MaxAlign) const {
844  uint64_t Val = -MaxAlign;
845  unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
846  MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
847  .addReg(Reg)
848  .addImm(Val)
850 
851  // The EFLAGS implicit def is dead.
852  MI->getOperand(3).setIsDead();
853 }
854 
855 /// emitPrologue - Push callee-saved registers onto the stack, which
856 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
857 /// space for local variables. Also emit labels used by the exception handler to
858 /// generate the exception handling frames.
859 
860 /*
861  Here's a gist of what gets emitted:
862 
863  ; Establish frame pointer, if needed
864  [if needs FP]
865  push %rbp
866  .cfi_def_cfa_offset 16
867  .cfi_offset %rbp, -16
868  .seh_pushreg %rpb
869  mov %rsp, %rbp
870  .cfi_def_cfa_register %rbp
871 
872  ; Spill general-purpose registers
873  [for all callee-saved GPRs]
874  pushq %<reg>
875  [if not needs FP]
876  .cfi_def_cfa_offset (offset from RETADDR)
877  .seh_pushreg %<reg>
878 
879  ; If the required stack alignment > default stack alignment
880  ; rsp needs to be re-aligned. This creates a "re-alignment gap"
881  ; of unknown size in the stack frame.
882  [if stack needs re-alignment]
883  and $MASK, %rsp
884 
885  ; Allocate space for locals
886  [if target is Windows and allocated space > 4096 bytes]
887  ; Windows needs special care for allocations larger
888  ; than one page.
889  mov $NNN, %rax
890  call ___chkstk_ms/___chkstk
891  sub %rax, %rsp
892  [else]
893  sub $NNN, %rsp
894 
895  [if needs FP]
896  .seh_stackalloc (size of XMM spill slots)
897  .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
898  [else]
899  .seh_stackalloc NNN
900 
901  ; Spill XMMs
902  ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved,
903  ; they may get spilled on any platform, if the current function
904  ; calls @llvm.eh.unwind.init
905  [if needs FP]
906  [for all callee-saved XMM registers]
907  movaps %<xmm reg>, -MMM(%rbp)
908  [for all callee-saved XMM registers]
909  .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
910  ; i.e. the offset relative to (%rbp - SEHFrameOffset)
911  [else]
912  [for all callee-saved XMM registers]
913  movaps %<xmm reg>, KKK(%rsp)
914  [for all callee-saved XMM registers]
915  .seh_savexmm %<xmm reg>, KKK
916 
917  .seh_endprologue
918 
919  [if needs base pointer]
920  mov %rsp, %rbx
921  [if needs to restore base pointer]
922  mov %rsp, -MMM(%rbp)
923 
924  ; Emit CFI info
925  [if needs FP]
926  [for all callee-saved registers]
927  .cfi_offset %<reg>, (offset from %rbp)
928  [else]
929  .cfi_def_cfa_offset (offset from RETADDR)
930  [for all callee-saved registers]
931  .cfi_offset %<reg>, (offset from %rsp)
932 
933  Notes:
934  - .seh directives are emitted only for Windows 64 ABI
935  - .cv_fpo directives are emitted on win32 when emitting CodeView
936  - .cfi directives are emitted for all other ABIs
937  - for 32-bit code, substitute %e?? registers for %r??
938 */
939 
941  MachineBasicBlock &MBB) const {
942  assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
943  "MF used frame lowering for wrong subtarget");
944  MachineBasicBlock::iterator MBBI = MBB.begin();
945  MachineFrameInfo &MFI = MF.getFrameInfo();
946  const Function &Fn = MF.getFunction();
947  MachineModuleInfo &MMI = MF.getMMI();
949  uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
950  uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate.
951  bool IsFunclet = MBB.isEHFuncletEntry();
953  if (Fn.hasPersonalityFn())
954  Personality = classifyEHPersonality(Fn.getPersonalityFn());
955  bool FnHasClrFunclet =
956  MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
957  bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
958  bool HasFP = hasFP(MF);
959  bool IsWin64CC = STI.isCallingConvWin64(Fn.getCallingConv());
960  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
961  bool NeedsWin64CFI = IsWin64Prologue && Fn.needsUnwindTableEntry();
962  // FIXME: Emit FPO data for EH funclets.
963  bool NeedsWinFPO =
964  !IsFunclet && STI.isTargetWin32() && MMI.getModule()->getCodeViewFlag();
965  bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
966  bool NeedsDwarfCFI =
967  !IsWin64Prologue && (MMI.hasDebugInfo() || Fn.needsUnwindTableEntry());
968  unsigned FramePtr = TRI->getFrameRegister(MF);
969  const unsigned MachineFramePtr =
971  ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
972  unsigned BasePtr = TRI->getBaseRegister();
973  bool HasWinCFI = false;
974 
975  // Debug location must be unknown since the first debug location is used
976  // to determine the end of the prologue.
977  DebugLoc DL;
978 
979  // Add RETADDR move area to callee saved frame size.
980  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
981  if (TailCallReturnAddrDelta && IsWin64Prologue)
982  report_fatal_error("Can't handle guaranteed tail call under win64 yet");
983 
984  if (TailCallReturnAddrDelta < 0)
986  X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
987 
988  bool UseStackProbe = !STI.getTargetLowering()->getStackProbeSymbolName(MF).empty();
989 
990  // The default stack probe size is 4096 if the function has no stackprobesize
991  // attribute.
992  unsigned StackProbeSize = 4096;
993  if (Fn.hasFnAttribute("stack-probe-size"))
994  Fn.getFnAttribute("stack-probe-size")
996  .getAsInteger(0, StackProbeSize);
997 
998  // Re-align the stack on 64-bit if the x86-interrupt calling convention is
999  // used and an error code was pushed, since the x86-64 ABI requires a 16-byte
1000  // stack alignment.
1001  if (Fn.getCallingConv() == CallingConv::X86_INTR && Is64Bit &&
1002  Fn.arg_size() == 2) {
1003  StackSize += 8;
1004  MFI.setStackSize(StackSize);
1005  emitSPUpdate(MBB, MBBI, DL, -8, /*InEpilogue=*/false);
1006  }
1007 
1008  // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
1009  // function, and use up to 128 bytes of stack space, don't have a frame
1010  // pointer, calls, or dynamic alloca then we do not need to adjust the
1011  // stack pointer (we fit in the Red Zone). We also check that we don't
1012  // push and pop from the stack.
1013  if (Is64Bit && !Fn.hasFnAttribute(Attribute::NoRedZone) &&
1014  !TRI->needsStackRealignment(MF) &&
1015  !MFI.hasVarSizedObjects() && // No dynamic alloca.
1016  !MFI.adjustsStack() && // No calls.
1017  !UseStackProbe && // No stack probes.
1018  !IsWin64CC && // Win64 has no Red Zone
1019  !MFI.hasCopyImplyingStackAdjustment() && // Don't push and pop.
1020  !MF.shouldSplitStack()) { // Regular stack
1021  uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
1022  if (HasFP) MinSize += SlotSize;
1023  X86FI->setUsesRedZone(MinSize > 0 || StackSize > 0);
1024  StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
1025  MFI.setStackSize(StackSize);
1026  }
1027 
1028  // Insert stack pointer adjustment for later moving of return addr. Only
1029  // applies to tail call optimized functions where the callee argument stack
1030  // size is bigger than the callers.
1031  if (TailCallReturnAddrDelta < 0) {
1032  BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta,
1033  /*InEpilogue=*/false)
1035  }
1036 
1037  // Mapping for machine moves:
1038  //
1039  // DST: VirtualFP AND
1040  // SRC: VirtualFP => DW_CFA_def_cfa_offset
1041  // ELSE => DW_CFA_def_cfa
1042  //
1043  // SRC: VirtualFP AND
1044  // DST: Register => DW_CFA_def_cfa_register
1045  //
1046  // ELSE
1047  // OFFSET < 0 => DW_CFA_offset_extended_sf
1048  // REG < 64 => DW_CFA_offset + Reg
1049  // ELSE => DW_CFA_offset_extended
1050 
1051  uint64_t NumBytes = 0;
1052  int stackGrowth = -SlotSize;
1053 
1054  // Find the funclet establisher parameter
1055  unsigned Establisher = X86::NoRegister;
1056  if (IsClrFunclet)
1057  Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
1058  else if (IsFunclet)
1059  Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
1060 
1061  if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1062  // Immediately spill establisher into the home slot.
1063  // The runtime cares about this.
1064  // MOV64mr %rdx, 16(%rsp)
1065  unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1066  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)
1067  .addReg(Establisher)
1069  MBB.addLiveIn(Establisher);
1070  }
1071 
1072  if (HasFP) {
1073  assert(MF.getRegInfo().isReserved(MachineFramePtr) && "FP reserved");
1074 
1075  // Calculate required stack adjustment.
1076  uint64_t FrameSize = StackSize - SlotSize;
1077  // If required, include space for extra hidden slot for stashing base pointer.
1078  if (X86FI->getRestoreBasePointer())
1079  FrameSize += SlotSize;
1080 
1081  NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
1082 
1083  // Callee-saved registers are pushed on stack before the stack is realigned.
1084  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1085  NumBytes = alignTo(NumBytes, MaxAlign);
1086 
1087  // Get the offset of the stack slot for the EBP register, which is
1088  // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
1089  // Update the frame offset adjustment.
1090  if (!IsFunclet)
1091  MFI.setOffsetAdjustment(-NumBytes);
1092  else
1093  assert(MFI.getOffsetAdjustment() == -(int)NumBytes &&
1094  "should calculate same local variable offset for funclets");
1095 
1096  // Save EBP/RBP into the appropriate stack slot.
1097  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
1098  .addReg(MachineFramePtr, RegState::Kill)
1100 
1101  if (NeedsDwarfCFI) {
1102  // Mark the place where EBP/RBP was saved.
1103  // Define the current CFA rule to use the provided offset.
1104  assert(StackSize);
1105  BuildCFI(MBB, MBBI, DL,
1106  MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth));
1107 
1108  // Change the rule for the FramePtr to be an "offset" rule.
1109  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1111  nullptr, DwarfFramePtr, 2 * stackGrowth));
1112  }
1113 
1114  if (NeedsWinCFI) {
1115  HasWinCFI = true;
1116  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1117  .addImm(FramePtr)
1119  }
1120 
1121  if (!IsWin64Prologue && !IsFunclet) {
1122  // Update EBP with the new base value.
1123  BuildMI(MBB, MBBI, DL,
1124  TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),
1125  FramePtr)
1126  .addReg(StackPtr)
1128 
1129  if (NeedsDwarfCFI) {
1130  // Mark effective beginning of when frame pointer becomes valid.
1131  // Define the current CFA to use the EBP/RBP register.
1132  unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1134  nullptr, DwarfFramePtr));
1135  }
1136 
1137  if (NeedsWinFPO) {
1138  // .cv_fpo_setframe $FramePtr
1139  HasWinCFI = true;
1140  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1141  .addImm(FramePtr)
1142  .addImm(0)
1144  }
1145  }
1146  } else {
1147  assert(!IsFunclet && "funclets without FPs not yet implemented");
1148  NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
1149  }
1150 
1151  // For EH funclets, only allocate enough space for outgoing calls. Save the
1152  // NumBytes value that we would've used for the parent frame.
1153  unsigned ParentFrameNumBytes = NumBytes;
1154  if (IsFunclet)
1155  NumBytes = getWinEHFuncletFrameSize(MF);
1156 
1157  // Skip the callee-saved push instructions.
1158  bool PushedRegs = false;
1159  int StackOffset = 2 * stackGrowth;
1160 
1161  while (MBBI != MBB.end() &&
1162  MBBI->getFlag(MachineInstr::FrameSetup) &&
1163  (MBBI->getOpcode() == X86::PUSH32r ||
1164  MBBI->getOpcode() == X86::PUSH64r)) {
1165  PushedRegs = true;
1166  unsigned Reg = MBBI->getOperand(0).getReg();
1167  ++MBBI;
1168 
1169  if (!HasFP && NeedsDwarfCFI) {
1170  // Mark callee-saved push instruction.
1171  // Define the current CFA rule to use the provided offset.
1172  assert(StackSize);
1173  BuildCFI(MBB, MBBI, DL,
1174  MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
1175  StackOffset += stackGrowth;
1176  }
1177 
1178  if (NeedsWinCFI) {
1179  HasWinCFI = true;
1180  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1181  .addImm(Reg)
1183  }
1184  }
1185 
1186  // Realign stack after we pushed callee-saved registers (so that we'll be
1187  // able to calculate their offsets from the frame pointer).
1188  // Don't do this for Win64, it needs to realign the stack after the prologue.
1189  if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
1190  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1191  BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
1192  }
1193 
1194  // If there is an SUB32ri of ESP immediately before this instruction, merge
1195  // the two. This can be the case when tail call elimination is enabled and
1196  // the callee has more arguments then the caller.
1197  NumBytes -= mergeSPUpdates(MBB, MBBI, true);
1198 
1199  // Adjust stack pointer: ESP -= numbytes.
1200 
1201  // Windows and cygwin/mingw require a prologue helper routine when allocating
1202  // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
1203  // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
1204  // stack and adjust the stack pointer in one go. The 64-bit version of
1205  // __chkstk is only responsible for probing the stack. The 64-bit prologue is
1206  // responsible for adjusting the stack pointer. Touching the stack at 4K
1207  // increments is necessary to ensure that the guard pages used by the OS
1208  // virtual memory manager are allocated in correct sequence.
1209  uint64_t AlignedNumBytes = NumBytes;
1210  if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
1211  AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
1212  if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
1213  assert(!X86FI->getUsesRedZone() &&
1214  "The Red Zone is not accounted for in stack probes");
1215 
1216  // Check whether EAX is livein for this block.
1217  bool isEAXAlive = isEAXLiveIn(MBB);
1218 
1219  if (isEAXAlive) {
1220  if (Is64Bit) {
1221  // Save RAX
1222  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
1223  .addReg(X86::RAX, RegState::Kill)
1225  } else {
1226  // Save EAX
1227  BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
1228  .addReg(X86::EAX, RegState::Kill)
1230  }
1231  }
1232 
1233  if (Is64Bit) {
1234  // Handle the 64-bit Windows ABI case where we need to call __chkstk.
1235  // Function prologue is responsible for adjusting the stack pointer.
1236  int Alloc = isEAXAlive ? NumBytes - 8 : NumBytes;
1237  if (isUInt<32>(Alloc)) {
1238  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1239  .addImm(Alloc)
1241  } else if (isInt<32>(Alloc)) {
1242  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)
1243  .addImm(Alloc)
1245  } else {
1246  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
1247  .addImm(Alloc)
1249  }
1250  } else {
1251  // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
1252  // We'll also use 4 already allocated bytes for EAX.
1253  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1254  .addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
1256  }
1257 
1258  // Call __chkstk, __chkstk_ms, or __alloca.
1259  emitStackProbe(MF, MBB, MBBI, DL, true);
1260 
1261  if (isEAXAlive) {
1262  // Restore RAX/EAX
1263  MachineInstr *MI;
1264  if (Is64Bit)
1265  MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV64rm), X86::RAX),
1266  StackPtr, false, NumBytes - 8);
1267  else
1268  MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),
1269  StackPtr, false, NumBytes - 4);
1271  MBB.insert(MBBI, MI);
1272  }
1273  } else if (NumBytes) {
1274  emitSPUpdate(MBB, MBBI, DL, -(int64_t)NumBytes, /*InEpilogue=*/false);
1275  }
1276 
1277  if (NeedsWinCFI && NumBytes) {
1278  HasWinCFI = true;
1279  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))
1280  .addImm(NumBytes)
1282  }
1283 
1284  int SEHFrameOffset = 0;
1285  unsigned SPOrEstablisher;
1286  if (IsFunclet) {
1287  if (IsClrFunclet) {
1288  // The establisher parameter passed to a CLR funclet is actually a pointer
1289  // to the (mostly empty) frame of its nearest enclosing funclet; we have
1290  // to find the root function establisher frame by loading the PSPSym from
1291  // the intermediate frame.
1292  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1293  MachinePointerInfo NoInfo;
1294  MBB.addLiveIn(Establisher);
1295  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),
1296  Establisher, false, PSPSlotOffset)
1299  ;
1300  // Save the root establisher back into the current funclet's (mostly
1301  // empty) frame, in case a sub-funclet or the GC needs it.
1302  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,
1303  false, PSPSlotOffset)
1304  .addReg(Establisher)
1305  .addMemOperand(
1308  SlotSize, SlotSize));
1309  }
1310  SPOrEstablisher = Establisher;
1311  } else {
1312  SPOrEstablisher = StackPtr;
1313  }
1314 
1315  if (IsWin64Prologue && HasFP) {
1316  // Set RBP to a small fixed offset from RSP. In the funclet case, we base
1317  // this calculation on the incoming establisher, which holds the value of
1318  // RSP from the parent frame at the end of the prologue.
1319  SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes);
1320  if (SEHFrameOffset)
1321  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
1322  SPOrEstablisher, false, SEHFrameOffset);
1323  else
1324  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
1325  .addReg(SPOrEstablisher);
1326 
1327  // If this is not a funclet, emit the CFI describing our frame pointer.
1328  if (NeedsWinCFI && !IsFunclet) {
1329  assert(!NeedsWinFPO && "this setframe incompatible with FPO data");
1330  HasWinCFI = true;
1331  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1332  .addImm(FramePtr)
1333  .addImm(SEHFrameOffset)
1335  if (isAsynchronousEHPersonality(Personality))
1336  MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset;
1337  }
1338  } else if (IsFunclet && STI.is32Bit()) {
1339  // Reset EBP / ESI to something good for funclets.
1340  MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL);
1341  // If we're a catch funclet, we can be returned to via catchret. Save ESP
1342  // into the registration node so that the runtime will restore it for us.
1343  if (!MBB.isCleanupFuncletEntry()) {
1344  assert(Personality == EHPersonality::MSVC_CXX);
1345  unsigned FrameReg;
1346  int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex;
1347  int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1348  // ESP is the first field, so no extra displacement is needed.
1349  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
1350  false, EHRegOffset)
1351  .addReg(X86::ESP);
1352  }
1353  }
1354 
1355  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
1356  const MachineInstr &FrameInstr = *MBBI;
1357  ++MBBI;
1358 
1359  if (NeedsWinCFI) {
1360  int FI;
1361  if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
1362  if (X86::FR64RegClass.contains(Reg)) {
1363  unsigned IgnoredFrameReg;
1364  int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
1365  Offset += SEHFrameOffset;
1366 
1367  HasWinCFI = true;
1368  assert(!NeedsWinFPO && "SEH_SaveXMM incompatible with FPO data");
1369  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
1370  .addImm(Reg)
1371  .addImm(Offset)
1373  }
1374  }
1375  }
1376  }
1377 
1378  if (NeedsWinCFI && HasWinCFI)
1379  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))
1380  .setMIFlag(MachineInstr::FrameSetup);
1381 
1382  if (FnHasClrFunclet && !IsFunclet) {
1383  // Save the so-called Initial-SP (i.e. the value of the stack pointer
1384  // immediately after the prolog) into the PSPSlot so that funclets
1385  // and the GC can recover it.
1386  unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1387  auto PSPInfo = MachinePointerInfo::getFixedStack(
1388  MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx);
1389  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,
1390  PSPSlotOffset)
1391  .addReg(StackPtr)
1394  SlotSize, SlotSize));
1395  }
1396 
1397  // Realign stack after we spilled callee-saved registers (so that we'll be
1398  // able to calculate their offsets from the frame pointer).
1399  // Win64 requires aligning the stack after the prologue.
1400  if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
1401  assert(HasFP && "There should be a frame pointer if stack is realigned.");
1402  BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
1403  }
1404 
1405  // We already dealt with stack realignment and funclets above.
1406  if (IsFunclet && STI.is32Bit())
1407  return;
1408 
1409  // If we need a base pointer, set it up here. It's whatever the value
1410  // of the stack pointer is at this point. Any variable size objects
1411  // will be allocated after this, so we can still use the base pointer
1412  // to reference locals.
1413  if (TRI->hasBasePointer(MF)) {
1414  // Update the base pointer with the current stack pointer.
1415  unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;
1416  BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1417  .addReg(SPOrEstablisher)
1419  if (X86FI->getRestoreBasePointer()) {
1420  // Stash value of base pointer. Saving RSP instead of EBP shortens
1421  // dependence chain. Used by SjLj EH.
1422  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1423  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)),
1424  FramePtr, true, X86FI->getRestoreBasePointerOffset())
1425  .addReg(SPOrEstablisher)
1427  }
1428 
1429  if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) {
1430  // Stash the value of the frame pointer relative to the base pointer for
1431  // Win32 EH. This supports Win32 EH, which does the inverse of the above:
1432  // it recovers the frame pointer from the base pointer rather than the
1433  // other way around.
1434  unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1435  unsigned UsedReg;
1436  int Offset =
1437  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
1438  assert(UsedReg == BasePtr);
1439  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
1440  .addReg(FramePtr)
1442  }
1443  }
1444 
1445  if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
1446  // Mark end of stack pointer adjustment.
1447  if (!HasFP && NumBytes) {
1448  // Define the current CFA rule to use the provided offset.
1449  assert(StackSize);
1451  nullptr, -StackSize + stackGrowth));
1452  }
1453 
1454  // Emit DWARF info specifying the offsets of the callee-saved registers.
1455  emitCalleeSavedFrameMoves(MBB, MBBI, DL);
1456  }
1457 
1458  // X86 Interrupt handling function cannot assume anything about the direction
1459  // flag (DF in EFLAGS register). Clear this flag by creating "cld" instruction
1460  // in each prologue of interrupt handler function.
1461  //
1462  // FIXME: Create "cld" instruction only in these cases:
1463  // 1. The interrupt handling function uses any of the "rep" instructions.
1464  // 2. Interrupt handling function calls another function.
1465  //
1467  BuildMI(MBB, MBBI, DL, TII.get(X86::CLD))
1468  .setMIFlag(MachineInstr::FrameSetup);
1469 
1470  // At this point we know if the function has WinCFI or not.
1471  MF.setHasWinCFI(HasWinCFI);
1472 }
1473 
1475  const MachineFunction &MF) const {
1476  // We can't use LEA instructions for adjusting the stack pointer if we don't
1477  // have a frame pointer in the Win64 ABI. Only ADD instructions may be used
1478  // to deallocate the stack.
1479  // This means that we can use LEA for SP in two situations:
1480  // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.
1481  // 2. We *have* a frame pointer which means we are permitted to use LEA.
1482  return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
1483 }
1484 
1486  switch (MI.getOpcode()) {
1487  case X86::CATCHRET:
1488  case X86::CLEANUPRET:
1489  return true;
1490  default:
1491  return false;
1492  }
1493  llvm_unreachable("impossible");
1494 }
1495 
1496 // CLR funclets use a special "Previous Stack Pointer Symbol" slot on the
1497 // stack. It holds a pointer to the bottom of the root function frame. The
1498 // establisher frame pointer passed to a nested funclet may point to the
1499 // (mostly empty) frame of its parent funclet, but it will need to find
1500 // the frame of the root function to access locals. To facilitate this,
1501 // every funclet copies the pointer to the bottom of the root function
1502 // frame into a PSPSym slot in its own (mostly empty) stack frame. Using the
1503 // same offset for the PSPSym in the root function frame that's used in the
1504 // funclets' frames allows each funclet to dynamically accept any ancestor
1505 // frame as its establisher argument (the runtime doesn't guarantee the
1506 // immediate parent for some reason lost to history), and also allows the GC,
1507 // which uses the PSPSym for some bookkeeping, to find it in any funclet's
1508 // frame with only a single offset reported for the entire method.
1509 unsigned
1510 X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const {
1511  const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo();
1512  unsigned SPReg;
1514  /*IgnoreSPUpdates*/ true);
1515  assert(Offset >= 0 && SPReg == TRI->getStackRegister());
1516  return static_cast<unsigned>(Offset);
1517 }
1518 
1519 unsigned
1520 X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const {
1521  // This is the size of the pushed CSRs.
1522  unsigned CSSize =
1523  MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
1524  // This is the amount of stack a funclet needs to allocate.
1525  unsigned UsedSize;
1526  EHPersonality Personality =
1528  if (Personality == EHPersonality::CoreCLR) {
1529  // CLR funclets need to hold enough space to include the PSPSym, at the
1530  // same offset from the stack pointer (immediately after the prolog) as it
1531  // resides at in the main function.
1532  UsedSize = getPSPSlotOffsetFromSP(MF) + SlotSize;
1533  } else {
1534  // Other funclets just need enough stack for outgoing call arguments.
1535  UsedSize = MF.getFrameInfo().getMaxCallFrameSize();
1536  }
1537  // RBP is not included in the callee saved register block. After pushing RBP,
1538  // everything is 16 byte aligned. Everything we allocate before an outgoing
1539  // call must also be 16 byte aligned.
1540  unsigned FrameSizeMinusRBP = alignTo(CSSize + UsedSize, getStackAlignment());
1541  // Subtract out the size of the callee saved registers. This is how much stack
1542  // each funclet will allocate.
1543  return FrameSizeMinusRBP - CSSize;
1544 }
1545 
1546 static bool isTailCallOpcode(unsigned Opc) {
1547  return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
1548  Opc == X86::TCRETURNmi ||
1549  Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNdi64 ||
1550  Opc == X86::TCRETURNmi64;
1551 }
1552 
1554  MachineBasicBlock &MBB) const {
1555  const MachineFrameInfo &MFI = MF.getFrameInfo();
1559  DebugLoc DL;
1560  if (MBBI != MBB.end())
1561  DL = MBBI->getDebugLoc();
1562  // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
1563  const bool Is64BitILP32 = STI.isTarget64BitILP32();
1564  unsigned FramePtr = TRI->getFrameRegister(MF);
1565  unsigned MachineFramePtr =
1566  Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
1567 
1568  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1569  bool NeedsWin64CFI =
1570  IsWin64Prologue && MF.getFunction().needsUnwindTableEntry();
1571  bool IsFunclet = MBBI == MBB.end() ? false : isFuncletReturnInstr(*MBBI);
1572 
1573  // Get the number of bytes to allocate from the FrameInfo.
1574  uint64_t StackSize = MFI.getStackSize();
1575  uint64_t MaxAlign = calculateMaxStackAlign(MF);
1576  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1577  bool HasFP = hasFP(MF);
1578  uint64_t NumBytes = 0;
1579 
1580  bool NeedsDwarfCFI =
1581  (!MF.getTarget().getTargetTriple().isOSDarwin() &&
1582  !MF.getTarget().getTargetTriple().isOSWindows()) &&
1584 
1585  if (IsFunclet) {
1586  assert(HasFP && "EH funclets without FP not yet implemented");
1587  NumBytes = getWinEHFuncletFrameSize(MF);
1588  } else if (HasFP) {
1589  // Calculate required stack adjustment.
1590  uint64_t FrameSize = StackSize - SlotSize;
1591  NumBytes = FrameSize - CSSize;
1592 
1593  // Callee-saved registers were pushed on stack before the stack was
1594  // realigned.
1595  if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1596  NumBytes = alignTo(FrameSize, MaxAlign);
1597  } else {
1598  NumBytes = StackSize - CSSize;
1599  }
1600  uint64_t SEHStackAllocAmt = NumBytes;
1601 
1602  if (HasFP) {
1603  // Pop EBP.
1604  BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1605  MachineFramePtr)
1606  .setMIFlag(MachineInstr::FrameDestroy);
1607  if (NeedsDwarfCFI) {
1608  unsigned DwarfStackPtr =
1609  TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);
1611  nullptr, DwarfStackPtr, -SlotSize));
1612  --MBBI;
1613  }
1614  }
1615 
1616  MachineBasicBlock::iterator FirstCSPop = MBBI;
1617  // Skip the callee-saved pop instructions.
1618  while (MBBI != MBB.begin()) {
1619  MachineBasicBlock::iterator PI = std::prev(MBBI);
1620  unsigned Opc = PI->getOpcode();
1621 
1622  if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
1623  if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1624  (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
1625  break;
1626  FirstCSPop = PI;
1627  }
1628 
1629  --MBBI;
1630  }
1631  MBBI = FirstCSPop;
1632 
1633  if (IsFunclet && Terminator->getOpcode() == X86::CATCHRET)
1634  emitCatchRetReturnValue(MBB, FirstCSPop, &*Terminator);
1635 
1636  if (MBBI != MBB.end())
1637  DL = MBBI->getDebugLoc();
1638 
1639  // If there is an ADD32ri or SUB32ri of ESP immediately before this
1640  // instruction, merge the two instructions.
1641  if (NumBytes || MFI.hasVarSizedObjects())
1642  NumBytes += mergeSPUpdates(MBB, MBBI, true);
1643 
1644  // If dynamic alloca is used, then reset esp to point to the last callee-saved
1645  // slot before popping them off! Same applies for the case, when stack was
1646  // realigned. Don't do this if this was a funclet epilogue, since the funclets
1647  // will not do realignment or dynamic stack allocation.
1648  if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) &&
1649  !IsFunclet) {
1650  if (TRI->needsStackRealignment(MF))
1651  MBBI = FirstCSPop;
1652  unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
1653  uint64_t LEAAmount =
1654  IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
1655 
1656  // There are only two legal forms of epilogue:
1657  // - add SEHAllocationSize, %rsp
1658  // - lea SEHAllocationSize(%FramePtr), %rsp
1659  //
1660  // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
1661  // However, we may use this sequence if we have a frame pointer because the
1662  // effects of the prologue can safely be undone.
1663  if (LEAAmount != 0) {
1664  unsigned Opc = getLEArOpcode(Uses64BitFramePtr);
1665  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
1666  FramePtr, false, LEAAmount);
1667  --MBBI;
1668  } else {
1669  unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);
1670  BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
1671  .addReg(FramePtr);
1672  --MBBI;
1673  }
1674  } else if (NumBytes) {
1675  // Adjust stack pointer back: ESP += numbytes.
1676  emitSPUpdate(MBB, MBBI, DL, NumBytes, /*InEpilogue=*/true);
1677  if (!hasFP(MF) && NeedsDwarfCFI) {
1678  // Define the current CFA rule to use the provided offset.
1680  nullptr, -CSSize - SlotSize));
1681  }
1682  --MBBI;
1683  }
1684 
1685  // Windows unwinder will not invoke function's exception handler if IP is
1686  // either in prologue or in epilogue. This behavior causes a problem when a
1687  // call immediately precedes an epilogue, because the return address points
1688  // into the epilogue. To cope with that, we insert an epilogue marker here,
1689  // then replace it with a 'nop' if it ends up immediately after a CALL in the
1690  // final emitted code.
1691  if (NeedsWin64CFI && MF.hasWinCFI())
1692  BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1693 
1694  if (!hasFP(MF) && NeedsDwarfCFI) {
1695  MBBI = FirstCSPop;
1696  int64_t Offset = -CSSize - SlotSize;
1697  // Mark callee-saved pop instruction.
1698  // Define the current CFA rule to use the provided offset.
1699  while (MBBI != MBB.end()) {
1700  MachineBasicBlock::iterator PI = MBBI;
1701  unsigned Opc = PI->getOpcode();
1702  ++MBBI;
1703  if (Opc == X86::POP32r || Opc == X86::POP64r) {
1704  Offset += SlotSize;
1705  BuildCFI(MBB, MBBI, DL,
1706  MCCFIInstruction::createDefCfaOffset(nullptr, Offset));
1707  }
1708  }
1709  }
1710 
1711  if (Terminator == MBB.end() || !isTailCallOpcode(Terminator->getOpcode())) {
1712  // Add the return addr area delta back since we are not tail calling.
1713  int Offset = -1 * X86FI->getTCReturnAddrDelta();
1714  assert(Offset >= 0 && "TCDelta should never be positive");
1715  if (Offset) {
1716  // Check for possible merge with preceding ADD instruction.
1717  Offset += mergeSPUpdates(MBB, Terminator, true);
1718  emitSPUpdate(MBB, Terminator, DL, Offset, /*InEpilogue=*/true);
1719  }
1720  }
1721 }
1722 
1724  unsigned &FrameReg) const {
1725  const MachineFrameInfo &MFI = MF.getFrameInfo();
1726 
1727  bool IsFixed = MFI.isFixedObjectIndex(FI);
1728  // We can't calculate offset from frame pointer if the stack is realigned,
1729  // so enforce usage of stack/base pointer. The base pointer is used when we
1730  // have dynamic allocas in addition to dynamic realignment.
1731  if (TRI->hasBasePointer(MF))
1732  FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister();
1733  else if (TRI->needsStackRealignment(MF))
1734  FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister();
1735  else
1736  FrameReg = TRI->getFrameRegister(MF);
1737 
1738  // Offset will hold the offset from the stack pointer at function entry to the
1739  // object.
1740  // We need to factor in additional offsets applied during the prologue to the
1741  // frame, base, and stack pointer depending on which is used.
1742  int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
1744  unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1745  uint64_t StackSize = MFI.getStackSize();
1746  bool HasFP = hasFP(MF);
1747  bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1748  int64_t FPDelta = 0;
1749 
1750  if (IsWin64Prologue) {
1751  assert(!MFI.hasCalls() || (StackSize % 16) == 8);
1752 
1753  // Calculate required stack adjustment.
1754  uint64_t FrameSize = StackSize - SlotSize;
1755  // If required, include space for extra hidden slot for stashing base pointer.
1756  if (X86FI->getRestoreBasePointer())
1757  FrameSize += SlotSize;
1758  uint64_t NumBytes = FrameSize - CSSize;
1759 
1760  uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
1761  if (FI && FI == X86FI->getFAIndex())
1762  return -SEHFrameOffset;
1763 
1764  // FPDelta is the offset from the "traditional" FP location of the old base
1765  // pointer followed by return address and the location required by the
1766  // restricted Win64 prologue.
1767  // Add FPDelta to all offsets below that go through the frame pointer.
1768  FPDelta = FrameSize - SEHFrameOffset;
1769  assert((!MFI.hasCalls() || (FPDelta % 16) == 0) &&
1770  "FPDelta isn't aligned per the Win64 ABI!");
1771  }
1772 
1773 
1774  if (TRI->hasBasePointer(MF)) {
1775  assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
1776  if (FI < 0) {
1777  // Skip the saved EBP.
1778  return Offset + SlotSize + FPDelta;
1779  } else {
1780  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1781  return Offset + StackSize;
1782  }
1783  } else if (TRI->needsStackRealignment(MF)) {
1784  if (FI < 0) {
1785  // Skip the saved EBP.
1786  return Offset + SlotSize + FPDelta;
1787  } else {
1788  assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1789  return Offset + StackSize;
1790  }
1791  // FIXME: Support tail calls
1792  } else {
1793  if (!HasFP)
1794  return Offset + StackSize;
1795 
1796  // Skip the saved EBP.
1797  Offset += SlotSize;
1798 
1799  // Skip the RETADDR move area
1800  int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1801  if (TailCallReturnAddrDelta < 0)
1802  Offset -= TailCallReturnAddrDelta;
1803  }
1804 
1805  return Offset + FPDelta;
1806 }
1807 
1809  int FI, unsigned &FrameReg,
1810  int Adjustment) const {
1811  const MachineFrameInfo &MFI = MF.getFrameInfo();
1812  FrameReg = TRI->getStackRegister();
1813  return MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + Adjustment;
1814 }
1815 
1816 int
1818  int FI, unsigned &FrameReg,
1819  bool IgnoreSPUpdates) const {
1820 
1821  const MachineFrameInfo &MFI = MF.getFrameInfo();
1822  // Does not include any dynamic realign.
1823  const uint64_t StackSize = MFI.getStackSize();
1824  // LLVM arranges the stack as follows:
1825  // ...
1826  // ARG2
1827  // ARG1
1828  // RETADDR
1829  // PUSH RBP <-- RBP points here
1830  // PUSH CSRs
1831  // ~~~~~~~ <-- possible stack realignment (non-win64)
1832  // ...
1833  // STACK OBJECTS
1834  // ... <-- RSP after prologue points here
1835  // ~~~~~~~ <-- possible stack realignment (win64)
1836  //
1837  // if (hasVarSizedObjects()):
1838  // ... <-- "base pointer" (ESI/RBX) points here
1839  // DYNAMIC ALLOCAS
1840  // ... <-- RSP points here
1841  //
1842  // Case 1: In the simple case of no stack realignment and no dynamic
1843  // allocas, both "fixed" stack objects (arguments and CSRs) are addressable
1844  // with fixed offsets from RSP.
1845  //
1846  // Case 2: In the case of stack realignment with no dynamic allocas, fixed
1847  // stack objects are addressed with RBP and regular stack objects with RSP.
1848  //
1849  // Case 3: In the case of dynamic allocas and stack realignment, RSP is used
1850  // to address stack arguments for outgoing calls and nothing else. The "base
1851  // pointer" points to local variables, and RBP points to fixed objects.
1852  //
1853  // In cases 2 and 3, we can only answer for non-fixed stack objects, and the
1854  // answer we give is relative to the SP after the prologue, and not the
1855  // SP in the middle of the function.
1856 
1857  if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) &&
1858  !STI.isTargetWin64())
1859  return getFrameIndexReference(MF, FI, FrameReg);
1860 
1861  // If !hasReservedCallFrame the function might have SP adjustement in the
1862  // body. So, even though the offset is statically known, it depends on where
1863  // we are in the function.
1865  if (!IgnoreSPUpdates && !TFI->hasReservedCallFrame(MF))
1866  return getFrameIndexReference(MF, FI, FrameReg);
1867 
1868  // We don't handle tail calls, and shouldn't be seeing them either.
1870  "we don't handle this case!");
1871 
1872  // This is how the math works out:
1873  //
1874  // %rsp grows (i.e. gets lower) left to right. Each box below is
1875  // one word (eight bytes). Obj0 is the stack slot we're trying to
1876  // get to.
1877  //
1878  // ----------------------------------
1879  // | BP | Obj0 | Obj1 | ... | ObjN |
1880  // ----------------------------------
1881  // ^ ^ ^ ^
1882  // A B C E
1883  //
1884  // A is the incoming stack pointer.
1885  // (B - A) is the local area offset (-8 for x86-64) [1]
1886  // (C - A) is the Offset returned by MFI.getObjectOffset for Obj0 [2]
1887  //
1888  // |(E - B)| is the StackSize (absolute value, positive). For a
1889  // stack that grown down, this works out to be (B - E). [3]
1890  //
1891  // E is also the value of %rsp after stack has been set up, and we
1892  // want (C - E) -- the value we can add to %rsp to get to Obj0. Now
1893  // (C - E) == (C - A) - (B - A) + (B - E)
1894  // { Using [1], [2] and [3] above }
1895  // == getObjectOffset - LocalAreaOffset + StackSize
1896 
1897  return getFrameIndexReferenceSP(MF, FI, FrameReg, StackSize);
1898 }
1899 
1902  std::vector<CalleeSavedInfo> &CSI) const {
1903  MachineFrameInfo &MFI = MF.getFrameInfo();
1905 
1906  unsigned CalleeSavedFrameSize = 0;
1907  int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
1908 
1909  int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1910 
1911  if (TailCallReturnAddrDelta < 0) {
1912  // create RETURNADDR area
1913  // arg
1914  // arg
1915  // RETADDR
1916  // { ...
1917  // RETADDR area
1918  // ...
1919  // }
1920  // [EBP]
1921  MFI.CreateFixedObject(-TailCallReturnAddrDelta,
1922  TailCallReturnAddrDelta - SlotSize, true);
1923  }
1924 
1925  // Spill the BasePtr if it's used.
1926  if (this->TRI->hasBasePointer(MF)) {
1927  // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
1928  if (MF.hasEHFunclets()) {
1929  int FI = MFI.CreateSpillStackObject(SlotSize, SlotSize);
1930  X86FI->setHasSEHFramePtrSave(true);
1931  X86FI->setSEHFramePtrSaveIndex(FI);
1932  }
1933  }
1934 
1935  if (hasFP(MF)) {
1936  // emitPrologue always spills frame register the first thing.
1937  SpillSlotOffset -= SlotSize;
1938  MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1939 
1940  // Since emitPrologue and emitEpilogue will handle spilling and restoring of
1941  // the frame register, we can delete it from CSI list and not have to worry
1942  // about avoiding it later.
1943  unsigned FPReg = TRI->getFrameRegister(MF);
1944  for (unsigned i = 0; i < CSI.size(); ++i) {
1945  if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
1946  CSI.erase(CSI.begin() + i);
1947  break;
1948  }
1949  }
1950  }
1951 
1952  // Assign slots for GPRs. It increases frame size.
1953  for (unsigned i = CSI.size(); i != 0; --i) {
1954  unsigned Reg = CSI[i - 1].getReg();
1955 
1956  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1957  continue;
1958 
1959  SpillSlotOffset -= SlotSize;
1960  CalleeSavedFrameSize += SlotSize;
1961 
1962  int SlotIndex = MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1963  CSI[i - 1].setFrameIdx(SlotIndex);
1964  }
1965 
1966  X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize);
1967 
1968  // Assign slots for XMMs.
1969  for (unsigned i = CSI.size(); i != 0; --i) {
1970  unsigned Reg = CSI[i - 1].getReg();
1971  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1972  continue;
1973 
1974  // If this is k-register make sure we lookup via the largest legal type.
1975  MVT VT = MVT::Other;
1976  if (X86::VK16RegClass.contains(Reg))
1977  VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
1978 
1979  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
1980  unsigned Size = TRI->getSpillSize(*RC);
1981  unsigned Align = TRI->getSpillAlignment(*RC);
1982  // ensure alignment
1983  SpillSlotOffset -= std::abs(SpillSlotOffset) % Align;
1984  // spill into slot
1985  SpillSlotOffset -= Size;
1986  int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
1987  CSI[i - 1].setFrameIdx(SlotIndex);
1988  MFI.ensureMaxAlignment(Align);
1989  }
1990 
1991  return true;
1992 }
1993 
1996  const std::vector<CalleeSavedInfo> &CSI,
1997  const TargetRegisterInfo *TRI) const {
1998  DebugLoc DL = MBB.findDebugLoc(MI);
1999 
2000  // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI
2001  // for us, and there are no XMM CSRs on Win32.
2002  if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows())
2003  return true;
2004 
2005  // Push GPRs. It increases frame size.
2006  const MachineFunction &MF = *MBB.getParent();
2007  unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
2008  for (unsigned i = CSI.size(); i != 0; --i) {
2009  unsigned Reg = CSI[i - 1].getReg();
2010 
2011  if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
2012  continue;
2013 
2014  const MachineRegisterInfo &MRI = MF.getRegInfo();
2015  bool isLiveIn = MRI.isLiveIn(Reg);
2016  if (!isLiveIn)
2017  MBB.addLiveIn(Reg);
2018 
2019  // Decide whether we can add a kill flag to the use.
2020  bool CanKill = !isLiveIn;
2021  // Check if any subregister is live-in
2022  if (CanKill) {
2023  for (MCRegAliasIterator AReg(Reg, TRI, false); AReg.isValid(); ++AReg) {
2024  if (MRI.isLiveIn(*AReg)) {
2025  CanKill = false;
2026  break;
2027  }
2028  }
2029  }
2030 
2031  // Do not set a kill flag on values that are also marked as live-in. This
2032  // happens with the @llvm-returnaddress intrinsic and with arguments
2033  // passed in callee saved registers.
2034  // Omitting the kill flags is conservatively correct even if the live-in
2035  // is not used after all.
2036  BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(CanKill))
2037  .setMIFlag(MachineInstr::FrameSetup);
2038  }
2039 
2040  // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
2041  // It can be done by spilling XMMs to stack frame.
2042  for (unsigned i = CSI.size(); i != 0; --i) {
2043  unsigned Reg = CSI[i-1].getReg();
2044  if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
2045  continue;
2046 
2047  // If this is k-register make sure we lookup via the largest legal type.
2048  MVT VT = MVT::Other;
2049  if (X86::VK16RegClass.contains(Reg))
2050  VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
2051 
2052  // Add the callee-saved register as live-in. It's killed at the spill.
2053  MBB.addLiveIn(Reg);
2054  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
2055 
2056  TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
2057  TRI);
2058  --MI;
2059  MI->setFlag(MachineInstr::FrameSetup);
2060  ++MI;
2061  }
2062 
2063  return true;
2064 }
2065 
2066 void X86FrameLowering::emitCatchRetReturnValue(MachineBasicBlock &MBB,
2068  MachineInstr *CatchRet) const {
2069  // SEH shouldn't use catchret.
2071  MBB.getParent()->getFunction().getPersonalityFn())) &&
2072  "SEH should not use CATCHRET");
2073  DebugLoc DL = CatchRet->getDebugLoc();
2074  MachineBasicBlock *CatchRetTarget = CatchRet->getOperand(0).getMBB();
2075 
2076  // Fill EAX/RAX with the address of the target block.
2077  if (STI.is64Bit()) {
2078  // LEA64r CatchRetTarget(%rip), %rax
2079  BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), X86::RAX)
2080  .addReg(X86::RIP)
2081  .addImm(0)
2082  .addReg(0)
2083  .addMBB(CatchRetTarget)
2084  .addReg(0);
2085  } else {
2086  // MOV32ri $CatchRetTarget, %eax
2087  BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
2088  .addMBB(CatchRetTarget);
2089  }
2090 
2091  // Record that we've taken the address of CatchRetTarget and no longer just
2092  // reference it in a terminator.
2093  CatchRetTarget->setHasAddressTaken();
2094 }
2095 
2098  std::vector<CalleeSavedInfo> &CSI,
2099  const TargetRegisterInfo *TRI) const {
2100  if (CSI.empty())
2101  return false;
2102 
2103  if (MI != MBB.end() && isFuncletReturnInstr(*MI) && STI.isOSWindows()) {
2104  // Don't restore CSRs in 32-bit EH funclets. Matches
2105  // spillCalleeSavedRegisters.
2106  if (STI.is32Bit())
2107  return true;
2108  // Don't restore CSRs before an SEH catchret. SEH except blocks do not form
2109  // funclets. emitEpilogue transforms these to normal jumps.
2110  if (MI->getOpcode() == X86::CATCHRET) {
2111  const Function &F = MBB.getParent()->getFunction();
2112  bool IsSEH = isAsynchronousEHPersonality(
2114  if (IsSEH)
2115  return true;
2116  }
2117  }
2118 
2119  DebugLoc DL = MBB.findDebugLoc(MI);
2120 
2121  // Reload XMMs from stack frame.
2122  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2123  unsigned Reg = CSI[i].getReg();
2124  if (X86::GR64RegClass.contains(Reg) ||
2125  X86::GR32RegClass.contains(Reg))
2126  continue;
2127 
2128  // If this is k-register make sure we lookup via the largest legal type.
2129  MVT VT = MVT::Other;
2130  if (X86::VK16RegClass.contains(Reg))
2131  VT = STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
2132 
2133  const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT);
2134  TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
2135  }
2136 
2137  // POP GPRs.
2138  unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
2139  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2140  unsigned Reg = CSI[i].getReg();
2141  if (!X86::GR64RegClass.contains(Reg) &&
2142  !X86::GR32RegClass.contains(Reg))
2143  continue;
2144 
2145  BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
2146  .setMIFlag(MachineInstr::FrameDestroy);
2147  }
2148  return true;
2149 }
2150 
2152  BitVector &SavedRegs,
2153  RegScavenger *RS) const {
2154  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
2155 
2156  // Spill the BasePtr if it's used.
2157  if (TRI->hasBasePointer(MF)){
2158  unsigned BasePtr = TRI->getBaseRegister();
2159  if (STI.isTarget64BitILP32())
2160  BasePtr = getX86SubSuperRegister(BasePtr, 64);
2161  SavedRegs.set(BasePtr);
2162  }
2163 }
2164 
2165 static bool
2167  const Function &F = MF->getFunction();
2168  for (Function::const_arg_iterator I = F.arg_begin(), E = F.arg_end();
2169  I != E; I++) {
2170  if (I->hasNestAttr())
2171  return true;
2172  }
2173  return false;
2174 }
2175 
2176 /// GetScratchRegister - Get a temp register for performing work in the
2177 /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
2178 /// and the properties of the function either one or two registers will be
2179 /// needed. Set primary to true for the first register, false for the second.
2180 static unsigned
2181 GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) {
2183 
2184  // Erlang stuff.
2185  if (CallingConvention == CallingConv::HiPE) {
2186  if (Is64Bit)
2187  return Primary ? X86::R14 : X86::R13;
2188  else
2189  return Primary ? X86::EBX : X86::EDI;
2190  }
2191 
2192  if (Is64Bit) {
2193  if (IsLP64)
2194  return Primary ? X86::R11 : X86::R12;
2195  else
2196  return Primary ? X86::R11D : X86::R12D;
2197  }
2198 
2199  bool IsNested = HasNestArgument(&MF);
2200 
2201  if (CallingConvention == CallingConv::X86_FastCall ||
2202  CallingConvention == CallingConv::Fast) {
2203  if (IsNested)
2204  report_fatal_error("Segmented stacks does not support fastcall with "
2205  "nested function.");
2206  return Primary ? X86::EAX : X86::ECX;
2207  }
2208  if (IsNested)
2209  return Primary ? X86::EDX : X86::EAX;
2210  return Primary ? X86::ECX : X86::EAX;
2211 }
2212 
2213 // The stack limit in the TCB is set to this many bytes above the actual stack
2214 // limit.
2215 static const uint64_t kSplitStackAvailable = 256;
2216 
2218  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2219  MachineFrameInfo &MFI = MF.getFrameInfo();
2220  uint64_t StackSize;
2221  unsigned TlsReg, TlsOffset;
2222  DebugLoc DL;
2223 
2224  // To support shrink-wrapping we would need to insert the new blocks
2225  // at the right place and update the branches to PrologueMBB.
2226  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2227 
2228  unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2229  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2230  "Scratch register is live-in");
2231 
2232  if (MF.getFunction().isVarArg())
2233  report_fatal_error("Segmented stacks do not support vararg functions.");
2234  if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() &&
2235  !STI.isTargetWin64() && !STI.isTargetFreeBSD() &&
2237  report_fatal_error("Segmented stacks not supported on this platform.");
2238 
2239  // Eventually StackSize will be calculated by a link-time pass; which will
2240  // also decide whether checking code needs to be injected into this particular
2241  // prologue.
2242  StackSize = MFI.getStackSize();
2243 
2244  // Do not generate a prologue for leaf functions with a stack of size zero.
2245  // For non-leaf functions we have to allow for the possibility that the
2246  // call is to a non-split function, as in PR37807.
2247  if (StackSize == 0 && !MFI.hasTailCall())
2248  return;
2249 
2250  MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
2251  MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
2253  bool IsNested = false;
2254 
2255  // We need to know if the function has a nest argument only in 64 bit mode.
2256  if (Is64Bit)
2257  IsNested = HasNestArgument(&MF);
2258 
2259  // The MOV R10, RAX needs to be in a different block, since the RET we emit in
2260  // allocMBB needs to be last (terminating) instruction.
2261 
2262  for (const auto &LI : PrologueMBB.liveins()) {
2263  allocMBB->addLiveIn(LI);
2264  checkMBB->addLiveIn(LI);
2265  }
2266 
2267  if (IsNested)
2268  allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
2269 
2270  MF.push_front(allocMBB);
2271  MF.push_front(checkMBB);
2272 
2273  // When the frame size is less than 256 we just compare the stack
2274  // boundary directly to the value of the stack pointer, per gcc.
2275  bool CompareStackPointer = StackSize < kSplitStackAvailable;
2276 
2277  // Read the limit off the current stacklet off the stack_guard location.
2278  if (Is64Bit) {
2279  if (STI.isTargetLinux()) {
2280  TlsReg = X86::FS;
2281  TlsOffset = IsLP64 ? 0x70 : 0x40;
2282  } else if (STI.isTargetDarwin()) {
2283  TlsReg = X86::GS;
2284  TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
2285  } else if (STI.isTargetWin64()) {
2286  TlsReg = X86::GS;
2287  TlsOffset = 0x28; // pvArbitrary, reserved for application use
2288  } else if (STI.isTargetFreeBSD()) {
2289  TlsReg = X86::FS;
2290  TlsOffset = 0x18;
2291  } else if (STI.isTargetDragonFly()) {
2292  TlsReg = X86::FS;
2293  TlsOffset = 0x20; // use tls_tcb.tcb_segstack
2294  } else {
2295  report_fatal_error("Segmented stacks not supported on this platform.");
2296  }
2297 
2298  if (CompareStackPointer)
2299  ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
2300  else
2301  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)
2302  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2303 
2304  BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg)
2305  .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2306  } else {
2307  if (STI.isTargetLinux()) {
2308  TlsReg = X86::GS;
2309  TlsOffset = 0x30;
2310  } else if (STI.isTargetDarwin()) {
2311  TlsReg = X86::GS;
2312  TlsOffset = 0x48 + 90*4;
2313  } else if (STI.isTargetWin32()) {
2314  TlsReg = X86::FS;
2315  TlsOffset = 0x14; // pvArbitrary, reserved for application use
2316  } else if (STI.isTargetDragonFly()) {
2317  TlsReg = X86::FS;
2318  TlsOffset = 0x10; // use tls_tcb.tcb_segstack
2319  } else if (STI.isTargetFreeBSD()) {
2320  report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
2321  } else {
2322  report_fatal_error("Segmented stacks not supported on this platform.");
2323  }
2324 
2325  if (CompareStackPointer)
2326  ScratchReg = X86::ESP;
2327  else
2328  BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
2329  .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2330 
2331  if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() ||
2332  STI.isTargetDragonFly()) {
2333  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
2334  .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2335  } else if (STI.isTargetDarwin()) {
2336 
2337  // TlsOffset doesn't fit into a mod r/m byte so we need an extra register.
2338  unsigned ScratchReg2;
2339  bool SaveScratch2;
2340  if (CompareStackPointer) {
2341  // The primary scratch register is available for holding the TLS offset.
2342  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2343  SaveScratch2 = false;
2344  } else {
2345  // Need to use a second register to hold the TLS offset
2346  ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
2347 
2348  // Unfortunately, with fastcc the second scratch register may hold an
2349  // argument.
2350  SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
2351  }
2352 
2353  // If Scratch2 is live-in then it needs to be saved.
2354  assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
2355  "Scratch register is live-in and not saved");
2356 
2357  if (SaveScratch2)
2358  BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
2359  .addReg(ScratchReg2, RegState::Kill);
2360 
2361  BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
2362  .addImm(TlsOffset);
2363  BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
2364  .addReg(ScratchReg)
2365  .addReg(ScratchReg2).addImm(1).addReg(0)
2366  .addImm(0)
2367  .addReg(TlsReg);
2368 
2369  if (SaveScratch2)
2370  BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
2371  }
2372  }
2373 
2374  // This jump is taken if SP >= (Stacklet Limit + Stack Space required).
2375  // It jumps to normal execution of the function body.
2376  BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB);
2377 
2378  // On 32 bit we first push the arguments size and then the frame size. On 64
2379  // bit, we pass the stack frame size in r10 and the argument size in r11.
2380  if (Is64Bit) {
2381  // Functions with nested arguments use R10, so it needs to be saved across
2382  // the call to _morestack
2383 
2384  const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
2385  const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
2386  const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
2387  const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
2388  const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
2389 
2390  if (IsNested)
2391  BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10);
2392 
2393  BuildMI(allocMBB, DL, TII.get(MOVri), Reg10)
2394  .addImm(StackSize);
2395  BuildMI(allocMBB, DL, TII.get(MOVri), Reg11)
2396  .addImm(X86FI->getArgumentStackSize());
2397  } else {
2398  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2399  .addImm(X86FI->getArgumentStackSize());
2400  BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2401  .addImm(StackSize);
2402  }
2403 
2404  // __morestack is in libgcc
2405  if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
2406  // Under the large code model, we cannot assume that __morestack lives
2407  // within 2^31 bytes of the call site, so we cannot use pc-relative
2408  // addressing. We cannot perform the call via a temporary register,
2409  // as the rax register may be used to store the static chain, and all
2410  // other suitable registers may be either callee-save or used for
2411  // parameter passing. We cannot use the stack at this point either
2412  // because __morestack manipulates the stack directly.
2413  //
2414  // To avoid these issues, perform an indirect call via a read-only memory
2415  // location containing the address.
2416  //
2417  // This solution is not perfect, as it assumes that the .rodata section
2418  // is laid out within 2^31 bytes of each function body, but this seems
2419  // to be sufficient for JIT.
2420  // FIXME: Add retpoline support and remove the error here..
2421  if (STI.useRetpoline())
2422  report_fatal_error("Emitting morestack calls on 64-bit with the large "
2423  "code model and retpoline not yet implemented.");
2424  BuildMI(allocMBB, DL, TII.get(X86::CALL64m))
2425  .addReg(X86::RIP)
2426  .addImm(0)
2427  .addReg(0)
2428  .addExternalSymbol("__morestack_addr")
2429  .addReg(0);
2430  MF.getMMI().setUsesMorestackAddr(true);
2431  } else {
2432  if (Is64Bit)
2433  BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
2434  .addExternalSymbol("__morestack");
2435  else
2436  BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
2437  .addExternalSymbol("__morestack");
2438  }
2439 
2440  if (IsNested)
2441  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
2442  else
2443  BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
2444 
2445  allocMBB->addSuccessor(&PrologueMBB);
2446 
2447  checkMBB->addSuccessor(allocMBB);
2448  checkMBB->addSuccessor(&PrologueMBB);
2449 
2450 #ifdef EXPENSIVE_CHECKS
2451  MF.verify();
2452 #endif
2453 }
2454 
2455 /// Lookup an ERTS parameter in the !hipe.literals named metadata node.
2456 /// HiPE provides Erlang Runtime System-internal parameters, such as PCB offsets
2457 /// to fields it needs, through a named metadata node "hipe.literals" containing
2458 /// name-value pairs.
2459 static unsigned getHiPELiteral(
2460  NamedMDNode *HiPELiteralsMD, const StringRef LiteralName) {
2461  for (int i = 0, e = HiPELiteralsMD->getNumOperands(); i != e; ++i) {
2462  MDNode *Node = HiPELiteralsMD->getOperand(i);
2463  if (Node->getNumOperands() != 2) continue;
2464  MDString *NodeName = dyn_cast<MDString>(Node->getOperand(0));
2465  ValueAsMetadata *NodeVal = dyn_cast<ValueAsMetadata>(Node->getOperand(1));
2466  if (!NodeName || !NodeVal) continue;
2467  ConstantInt *ValConst = dyn_cast_or_null<ConstantInt>(NodeVal->getValue());
2468  if (ValConst && NodeName->getString() == LiteralName) {
2469  return ValConst->getZExtValue();
2470  }
2471  }
2472 
2473  report_fatal_error("HiPE literal " + LiteralName
2474  + " required but not provided");
2475 }
2476 
2477 /// Erlang programs may need a special prologue to handle the stack size they
2478 /// might need at runtime. That is because Erlang/OTP does not implement a C
2479 /// stack but uses a custom implementation of hybrid stack/heap architecture.
2480 /// (for more information see Eric Stenman's Ph.D. thesis:
2481 /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
2482 ///
2483 /// CheckStack:
2484 /// temp0 = sp - MaxStack
2485 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2486 /// OldStart:
2487 /// ...
2488 /// IncStack:
2489 /// call inc_stack # doubles the stack space
2490 /// temp0 = sp - MaxStack
2491 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2493  MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2494  MachineFrameInfo &MFI = MF.getFrameInfo();
2495  DebugLoc DL;
2496 
2497  // To support shrink-wrapping we would need to insert the new blocks
2498  // at the right place and update the branches to PrologueMBB.
2499  assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2500 
2501  // HiPE-specific values
2502  NamedMDNode *HiPELiteralsMD = MF.getMMI().getModule()
2503  ->getNamedMetadata("hipe.literals");
2504  if (!HiPELiteralsMD)
2506  "Can't generate HiPE prologue without runtime parameters");
2507  const unsigned HipeLeafWords
2508  = getHiPELiteral(HiPELiteralsMD,
2509  Is64Bit ? "AMD64_LEAF_WORDS" : "X86_LEAF_WORDS");
2510  const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
2511  const unsigned Guaranteed = HipeLeafWords * SlotSize;
2512  unsigned CallerStkArity = MF.getFunction().arg_size() > CCRegisteredArgs ?
2513  MF.getFunction().arg_size() - CCRegisteredArgs : 0;
2514  unsigned MaxStack = MFI.getStackSize() + CallerStkArity*SlotSize + SlotSize;
2515 
2516  assert(STI.isTargetLinux() &&
2517  "HiPE prologue is only supported on Linux operating systems.");
2518 
2519  // Compute the largest caller's frame that is needed to fit the callees'
2520  // frames. This 'MaxStack' is computed from:
2521  //
2522  // a) the fixed frame size, which is the space needed for all spilled temps,
2523  // b) outgoing on-stack parameter areas, and
2524  // c) the minimum stack space this function needs to make available for the
2525  // functions it calls (a tunable ABI property).
2526  if (MFI.hasCalls()) {
2527  unsigned MoreStackForCalls = 0;
2528 
2529  for (auto &MBB : MF) {
2530  for (auto &MI : MBB) {
2531  if (!MI.isCall())
2532  continue;
2533 
2534  // Get callee operand.
2535  const MachineOperand &MO = MI.getOperand(0);
2536 
2537  // Only take account of global function calls (no closures etc.).
2538  if (!MO.isGlobal())
2539  continue;
2540 
2541  const Function *F = dyn_cast<Function>(MO.getGlobal());
2542  if (!F)
2543  continue;
2544 
2545  // Do not update 'MaxStack' for primitive and built-in functions
2546  // (encoded with names either starting with "erlang."/"bif_" or not
2547  // having a ".", such as a simple <Module>.<Function>.<Arity>, or an
2548  // "_", such as the BIF "suspend_0") as they are executed on another
2549  // stack.
2550  if (F->getName().find("erlang.") != StringRef::npos ||
2551  F->getName().find("bif_") != StringRef::npos ||
2552  F->getName().find_first_of("._") == StringRef::npos)
2553  continue;
2554 
2555  unsigned CalleeStkArity =
2556  F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
2557  if (HipeLeafWords - 1 > CalleeStkArity)
2558  MoreStackForCalls = std::max(MoreStackForCalls,
2559  (HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
2560  }
2561  }
2562  MaxStack += MoreStackForCalls;
2563  }
2564 
2565  // If the stack frame needed is larger than the guaranteed then runtime checks
2566  // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
2567  if (MaxStack > Guaranteed) {
2568  MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
2569  MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
2570 
2571  for (const auto &LI : PrologueMBB.liveins()) {
2572  stackCheckMBB->addLiveIn(LI);
2573  incStackMBB->addLiveIn(LI);
2574  }
2575 
2576  MF.push_front(incStackMBB);
2577  MF.push_front(stackCheckMBB);
2578 
2579  unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
2580  unsigned LEAop, CMPop, CALLop;
2581  SPLimitOffset = getHiPELiteral(HiPELiteralsMD, "P_NSP_LIMIT");
2582  if (Is64Bit) {
2583  SPReg = X86::RSP;
2584  PReg = X86::RBP;
2585  LEAop = X86::LEA64r;
2586  CMPop = X86::CMP64rm;
2587  CALLop = X86::CALL64pcrel32;
2588  } else {
2589  SPReg = X86::ESP;
2590  PReg = X86::EBP;
2591  LEAop = X86::LEA32r;
2592  CMPop = X86::CMP32rm;
2593  CALLop = X86::CALLpcrel32;
2594  }
2595 
2596  ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2597  assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2598  "HiPE prologue scratch register is live-in");
2599 
2600  // Create new MBB for StackCheck:
2601  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
2602  SPReg, false, -MaxStack);
2603  // SPLimitOffset is in a fixed heap location (pointed by BP).
2604  addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
2605  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2606  BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB);
2607 
2608  // Create new MBB for IncStack:
2609  BuildMI(incStackMBB, DL, TII.get(CALLop)).
2610  addExternalSymbol("inc_stack_0");
2611  addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
2612  SPReg, false, -MaxStack);
2613  addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
2614  .addReg(ScratchReg), PReg, false, SPLimitOffset);
2615  BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB);
2616 
2617  stackCheckMBB->addSuccessor(&PrologueMBB, {99, 100});
2618  stackCheckMBB->addSuccessor(incStackMBB, {1, 100});
2619  incStackMBB->addSuccessor(&PrologueMBB, {99, 100});
2620  incStackMBB->addSuccessor(incStackMBB, {1, 100});
2621  }
2622 #ifdef EXPENSIVE_CHECKS
2623  MF.verify();
2624 #endif
2625 }
2626 
2627 bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB,
2629  const DebugLoc &DL,
2630  int Offset) const {
2631 
2632  if (Offset <= 0)
2633  return false;
2634 
2635  if (Offset % SlotSize)
2636  return false;
2637 
2638  int NumPops = Offset / SlotSize;
2639  // This is only worth it if we have at most 2 pops.
2640  if (NumPops != 1 && NumPops != 2)
2641  return false;
2642 
2643  // Handle only the trivial case where the adjustment directly follows
2644  // a call. This is the most common one, anyway.
2645  if (MBBI == MBB.begin())
2646  return false;
2647  MachineBasicBlock::iterator Prev = std::prev(MBBI);
2648  if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
2649  return false;
2650 
2651  unsigned Regs[2];
2652  unsigned FoundRegs = 0;
2653 
2654  auto &MRI = MBB.getParent()->getRegInfo();
2655  auto RegMask = Prev->getOperand(1);
2656 
2657  auto &RegClass =
2658  Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
2659  // Try to find up to NumPops free registers.
2660  for (auto Candidate : RegClass) {
2661 
2662  // Poor man's liveness:
2663  // Since we're immediately after a call, any register that is clobbered
2664  // by the call and not defined by it can be considered dead.
2665  if (!RegMask.clobbersPhysReg(Candidate))
2666  continue;
2667 
2668  // Don't clobber reserved registers
2669  if (MRI.isReserved(Candidate))
2670  continue;
2671 
2672  bool IsDef = false;
2673  for (const MachineOperand &MO : Prev->implicit_operands()) {
2674  if (MO.isReg() && MO.isDef() &&
2675  TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
2676  IsDef = true;
2677  break;
2678  }
2679  }
2680 
2681  if (IsDef)
2682  continue;
2683 
2684  Regs[FoundRegs++] = Candidate;
2685  if (FoundRegs == (unsigned)NumPops)
2686  break;
2687  }
2688 
2689  if (FoundRegs == 0)
2690  return false;
2691 
2692  // If we found only one free register, but need two, reuse the same one twice.
2693  while (FoundRegs < (unsigned)NumPops)
2694  Regs[FoundRegs++] = Regs[0];
2695 
2696  for (int i = 0; i < NumPops; ++i)
2697  BuildMI(MBB, MBBI, DL,
2698  TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]);
2699 
2700  return true;
2701 }
2702 
2706  bool reserveCallFrame = hasReservedCallFrame(MF);
2707  unsigned Opcode = I->getOpcode();
2708  bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
2709  DebugLoc DL = I->getDebugLoc();
2710  uint64_t Amount = !reserveCallFrame ? TII.getFrameSize(*I) : 0;
2711  uint64_t InternalAmt = (isDestroy || Amount) ? TII.getFrameAdjustment(*I) : 0;
2712  I = MBB.erase(I);
2713  auto InsertPos = skipDebugInstructionsForward(I, MBB.end());
2714 
2715  if (!reserveCallFrame) {
2716  // If the stack pointer can be changed after prologue, turn the
2717  // adjcallstackup instruction into a 'sub ESP, <amt>' and the
2718  // adjcallstackdown instruction into 'add ESP, <amt>'
2719 
2720  // We need to keep the stack aligned properly. To do this, we round the
2721  // amount of space needed for the outgoing arguments up to the next
2722  // alignment boundary.
2723  unsigned StackAlign = getStackAlignment();
2724  Amount = alignTo(Amount, StackAlign);
2725 
2726  MachineModuleInfo &MMI = MF.getMMI();
2727  const Function &F = MF.getFunction();
2728  bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
2729  bool DwarfCFI = !WindowsCFI &&
2730  (MMI.hasDebugInfo() || F.needsUnwindTableEntry());
2731 
2732  // If we have any exception handlers in this function, and we adjust
2733  // the SP before calls, we may need to indicate this to the unwinder
2734  // using GNU_ARGS_SIZE. Note that this may be necessary even when
2735  // Amount == 0, because the preceding function may have set a non-0
2736  // GNU_ARGS_SIZE.
2737  // TODO: We don't need to reset this between subsequent functions,
2738  // if it didn't change.
2739  bool HasDwarfEHHandlers = !WindowsCFI && !MF.getLandingPads().empty();
2740 
2741  if (HasDwarfEHHandlers && !isDestroy &&
2743  BuildCFI(MBB, InsertPos, DL,
2744  MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
2745 
2746  if (Amount == 0)
2747  return I;
2748 
2749  // Factor out the amount that gets handled inside the sequence
2750  // (Pushes of argument for frame setup, callee pops for frame destroy)
2751  Amount -= InternalAmt;
2752 
2753  // TODO: This is needed only if we require precise CFA.
2754  // If this is a callee-pop calling convention, emit a CFA adjust for
2755  // the amount the callee popped.
2756  if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF))
2757  BuildCFI(MBB, InsertPos, DL,
2758  MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
2759 
2760  // Add Amount to SP to destroy a frame, or subtract to setup.
2761  int64_t StackAdjustment = isDestroy ? Amount : -Amount;
2762 
2763  if (StackAdjustment) {
2764  // Merge with any previous or following adjustment instruction. Note: the
2765  // instructions merged with here do not have CFI, so their stack
2766  // adjustments do not feed into CfaAdjustment.
2767  StackAdjustment += mergeSPUpdates(MBB, InsertPos, true);
2768  StackAdjustment += mergeSPUpdates(MBB, InsertPos, false);
2769 
2770  if (StackAdjustment) {
2771  if (!(F.optForMinSize() &&
2772  adjustStackWithPops(MBB, InsertPos, DL, StackAdjustment)))
2773  BuildStackAdjustment(MBB, InsertPos, DL, StackAdjustment,
2774  /*InEpilogue=*/false);
2775  }
2776  }
2777 
2778  if (DwarfCFI && !hasFP(MF)) {
2779  // If we don't have FP, but need to generate unwind information,
2780  // we need to set the correct CFA offset after the stack adjustment.
2781  // How much we adjust the CFA offset depends on whether we're emitting
2782  // CFI only for EH purposes or for debugging. EH only requires the CFA
2783  // offset to be correct at each call site, while for debugging we want
2784  // it to be more precise.
2785 
2786  int64_t CfaAdjustment = -StackAdjustment;
2787  // TODO: When not using precise CFA, we also need to adjust for the
2788  // InternalAmt here.
2789  if (CfaAdjustment) {
2790  BuildCFI(MBB, InsertPos, DL,
2792  CfaAdjustment));
2793  }
2794  }
2795 
2796  return I;
2797  }
2798 
2799  if (isDestroy && InternalAmt) {
2800  // If we are performing frame pointer elimination and if the callee pops
2801  // something off the stack pointer, add it back. We do this until we have
2802  // more advanced stack pointer tracking ability.
2803  // We are not tracking the stack pointer adjustment by the callee, so make
2804  // sure we restore the stack pointer immediately after the call, there may
2805  // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
2808  while (CI != B && !std::prev(CI)->isCall())
2809  --CI;
2810  BuildStackAdjustment(MBB, CI, DL, -InternalAmt, /*InEpilogue=*/false);
2811  }
2812 
2813  return I;
2814 }
2815 
2817  assert(MBB.getParent() && "Block is not attached to a function!");
2818  const MachineFunction &MF = *MBB.getParent();
2819  return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
2820 }
2821 
2823  assert(MBB.getParent() && "Block is not attached to a function!");
2824 
2825  // Win64 has strict requirements in terms of epilogue and we are
2826  // not taking a chance at messing with them.
2827  // I.e., unless this block is already an exit block, we can't use
2828  // it as an epilogue.
2829  if (STI.isTargetWin64() && !MBB.succ_empty() && !MBB.isReturnBlock())
2830  return false;
2831 
2832  if (canUseLEAForSPInEpilogue(*MBB.getParent()))
2833  return true;
2834 
2835  // If we cannot use LEA to adjust SP, we may need to use ADD, which
2836  // clobbers the EFLAGS. Check that we do not need to preserve it,
2837  // otherwise, conservatively assume this is not
2838  // safe to insert the epilogue here.
2840 }
2841 
2843  // If we may need to emit frameless compact unwind information, give
2844  // up as this is currently broken: PR25614.
2845  return (MF.getFunction().hasFnAttribute(Attribute::NoUnwind) || hasFP(MF)) &&
2846  // The lowering of segmented stack and HiPE only support entry blocks
2847  // as prologue blocks: PR26107.
2848  // This limitation may be lifted if we fix:
2849  // - adjustForSegmentedStacks
2850  // - adjustForHiPEPrologue
2852  !MF.shouldSplitStack();
2853 }
2854 
2857  const DebugLoc &DL, bool RestoreSP) const {
2858  assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env");
2859  assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32");
2861  "restoring EBP/ESI on non-32-bit target");
2862 
2863  MachineFunction &MF = *MBB.getParent();
2864  unsigned FramePtr = TRI->getFrameRegister(MF);
2865  unsigned BasePtr = TRI->getBaseRegister();
2866  WinEHFuncInfo &FuncInfo = *MF.getWinEHFuncInfo();
2867  X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2868  MachineFrameInfo &MFI = MF.getFrameInfo();
2869 
2870  // FIXME: Don't set FrameSetup flag in catchret case.
2871 
2872  int FI = FuncInfo.EHRegNodeFrameIndex;
2873  int EHRegSize = MFI.getObjectSize(FI);
2874 
2875  if (RestoreSP) {
2876  // MOV32rm -EHRegSize(%ebp), %esp
2877  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
2878  X86::EBP, true, -EHRegSize)
2880  }
2881 
2882  unsigned UsedReg;
2883  int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
2884  int EndOffset = -EHRegOffset - EHRegSize;
2885  FuncInfo.EHRegNodeEndOffset = EndOffset;
2886 
2887  if (UsedReg == FramePtr) {
2888  // ADD $offset, %ebp
2889  unsigned ADDri = getADDriOpcode(false, EndOffset);
2890  BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
2891  .addReg(FramePtr)
2892  .addImm(EndOffset)
2894  ->getOperand(3)
2895  .setIsDead();
2896  assert(EndOffset >= 0 &&
2897  "end of registration object above normal EBP position!");
2898  } else if (UsedReg == BasePtr) {
2899  // LEA offset(%ebp), %esi
2900  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),
2901  FramePtr, false, EndOffset)
2903  // MOV32rm SavedEBPOffset(%esi), %ebp
2904  assert(X86FI->getHasSEHFramePtrSave());
2905  int Offset =
2906  getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
2907  assert(UsedReg == BasePtr);
2908  addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
2909  UsedReg, true, Offset)
2911  } else {
2912  llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");
2913  }
2914  return MBBI;
2915 }
2916 
2918  return TRI->getSlotSize();
2919 }
2920 
2922  const {
2923  return TRI->getDwarfRegNum(StackPtr, true);
2924 }
2925 
2926 namespace {
2927 // Struct used by orderFrameObjects to help sort the stack objects.
2928 struct X86FrameSortingObject {
2929  bool IsValid = false; // true if we care about this Object.
2930  unsigned ObjectIndex = 0; // Index of Object into MFI list.
2931  unsigned ObjectSize = 0; // Size of Object in bytes.
2932  unsigned ObjectAlignment = 1; // Alignment of Object in bytes.
2933  unsigned ObjectNumUses = 0; // Object static number of uses.
2934 };
2935 
2936 // The comparison function we use for std::sort to order our local
2937 // stack symbols. The current algorithm is to use an estimated
2938 // "density". This takes into consideration the size and number of
2939 // uses each object has in order to roughly minimize code size.
2940 // So, for example, an object of size 16B that is referenced 5 times
2941 // will get higher priority than 4 4B objects referenced 1 time each.
2942 // It's not perfect and we may be able to squeeze a few more bytes out of
2943 // it (for example : 0(esp) requires fewer bytes, symbols allocated at the
2944 // fringe end can have special consideration, given their size is less
2945 // important, etc.), but the algorithmic complexity grows too much to be
2946 // worth the extra gains we get. This gets us pretty close.
2947 // The final order leaves us with objects with highest priority going
2948 // at the end of our list.
2949 struct X86FrameSortingComparator {
2950  inline bool operator()(const X86FrameSortingObject &A,
2951  const X86FrameSortingObject &B) {
2952  uint64_t DensityAScaled, DensityBScaled;
2953 
2954  // For consistency in our comparison, all invalid objects are placed
2955  // at the end. This also allows us to stop walking when we hit the
2956  // first invalid item after it's all sorted.
2957  if (!A.IsValid)
2958  return false;
2959  if (!B.IsValid)
2960  return true;
2961 
2962  // The density is calculated by doing :
2963  // (double)DensityA = A.ObjectNumUses / A.ObjectSize
2964  // (double)DensityB = B.ObjectNumUses / B.ObjectSize
2965  // Since this approach may cause inconsistencies in
2966  // the floating point <, >, == comparisons, depending on the floating
2967  // point model with which the compiler was built, we're going
2968  // to scale both sides by multiplying with
2969  // A.ObjectSize * B.ObjectSize. This ends up factoring away
2970  // the division and, with it, the need for any floating point
2971  // arithmetic.
2972  DensityAScaled = static_cast<uint64_t>(A.ObjectNumUses) *
2973  static_cast<uint64_t>(B.ObjectSize);
2974  DensityBScaled = static_cast<uint64_t>(B.ObjectNumUses) *
2975  static_cast<uint64_t>(A.ObjectSize);
2976 
2977  // If the two densities are equal, prioritize highest alignment
2978  // objects. This allows for similar alignment objects
2979  // to be packed together (given the same density).
2980  // There's room for improvement here, also, since we can pack
2981  // similar alignment (different density) objects next to each
2982  // other to save padding. This will also require further
2983  // complexity/iterations, and the overall gain isn't worth it,
2984  // in general. Something to keep in mind, though.
2985  if (DensityAScaled == DensityBScaled)
2986  return A.ObjectAlignment < B.ObjectAlignment;
2987 
2988  return DensityAScaled < DensityBScaled;
2989  }
2990 };
2991 } // namespace
2992 
2993 // Order the symbols in the local stack.
2994 // We want to place the local stack objects in some sort of sensible order.
2995 // The heuristic we use is to try and pack them according to static number
2996 // of uses and size of object in order to minimize code size.
2998  const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const {
2999  const MachineFrameInfo &MFI = MF.getFrameInfo();
3000 
3001  // Don't waste time if there's nothing to do.
3002  if (ObjectsToAllocate.empty())
3003  return;
3004 
3005  // Create an array of all MFI objects. We won't need all of these
3006  // objects, but we're going to create a full array of them to make
3007  // it easier to index into when we're counting "uses" down below.
3008  // We want to be able to easily/cheaply access an object by simply
3009  // indexing into it, instead of having to search for it every time.
3010  std::vector<X86FrameSortingObject> SortingObjects(MFI.getObjectIndexEnd());
3011 
3012  // Walk the objects we care about and mark them as such in our working
3013  // struct.
3014  for (auto &Obj : ObjectsToAllocate) {
3015  SortingObjects[Obj].IsValid = true;
3016  SortingObjects[Obj].ObjectIndex = Obj;
3017  SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlignment(Obj);
3018  // Set the size.
3019  int ObjectSize = MFI.getObjectSize(Obj);
3020  if (ObjectSize == 0)
3021  // Variable size. Just use 4.
3022  SortingObjects[Obj].ObjectSize = 4;
3023  else
3024  SortingObjects[Obj].ObjectSize = ObjectSize;
3025  }
3026 
3027  // Count the number of uses for each object.
3028  for (auto &MBB : MF) {
3029  for (auto &MI : MBB) {
3030  if (MI.isDebugInstr())
3031  continue;
3032  for (const MachineOperand &MO : MI.operands()) {
3033  // Check to see if it's a local stack symbol.
3034  if (!MO.isFI())
3035  continue;
3036  int Index = MO.getIndex();
3037  // Check to see if it falls within our range, and is tagged
3038  // to require ordering.
3039  if (Index >= 0 && Index < MFI.getObjectIndexEnd() &&
3040  SortingObjects[Index].IsValid)
3041  SortingObjects[Index].ObjectNumUses++;
3042  }
3043  }
3044  }
3045 
3046  // Sort the objects using X86FrameSortingAlgorithm (see its comment for
3047  // info).
3048  std::stable_sort(SortingObjects.begin(), SortingObjects.end(),
3049  X86FrameSortingComparator());
3050 
3051  // Now modify the original list to represent the final order that
3052  // we want. The order will depend on whether we're going to access them
3053  // from the stack pointer or the frame pointer. For SP, the list should
3054  // end up with the END containing objects that we want with smaller offsets.
3055  // For FP, it should be flipped.
3056  int i = 0;
3057  for (auto &Obj : SortingObjects) {
3058  // All invalid items are sorted at the end, so it's safe to stop.
3059  if (!Obj.IsValid)
3060  break;
3061  ObjectsToAllocate[i++] = Obj.ObjectIndex;
3062  }
3063 
3064  // Flip it if we're accessing off of the FP.
3065  if (!TRI->needsStackRealignment(MF) && hasFP(MF))
3066  std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
3067 }
3068 
3069 
3071  // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
3072  unsigned Offset = 16;
3073  // RBP is immediately pushed.
3074  Offset += SlotSize;
3075  // All callee-saved registers are then pushed.
3076  Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
3077  // Every funclet allocates enough stack space for the largest outgoing call.
3078  Offset += getWinEHFuncletFrameSize(MF);
3079  return Offset;
3080 }
3081 
3083  MachineFunction &MF, RegScavenger *RS) const {
3084  // Mark the function as not having WinCFI. We will set it back to true in
3085  // emitPrologue if it gets called and emits CFI.
3086  MF.setHasWinCFI(false);
3087 
3088  // If this function isn't doing Win64-style C++ EH, we don't need to do
3089  // anything.
3090  const Function &F = MF.getFunction();
3091  if (!STI.is64Bit() || !MF.hasEHFunclets() ||
3093  return;
3094 
3095  // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset
3096  // relative to RSP after the prologue. Find the offset of the last fixed
3097  // object, so that we can allocate a slot immediately following it. If there
3098  // were no fixed objects, use offset -SlotSize, which is immediately after the
3099  // return address. Fixed objects have negative frame indices.
3100  MachineFrameInfo &MFI = MF.getFrameInfo();
3101  WinEHFuncInfo &EHInfo = *MF.getWinEHFuncInfo();
3102  int64_t MinFixedObjOffset = -SlotSize;
3103  for (int I = MFI.getObjectIndexBegin(); I < 0; ++I)
3104  MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
3105 
3106  for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
3107  for (WinEHHandlerType &H : TBME.HandlerArray) {
3108  int FrameIndex = H.CatchObj.FrameIndex;
3109  if (FrameIndex != INT_MAX) {
3110  // Ensure alignment.
3111  unsigned Align = MFI.getObjectAlignment(FrameIndex);
3112  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % Align;
3113  MinFixedObjOffset -= MFI.getObjectSize(FrameIndex);
3114  MFI.setObjectOffset(FrameIndex, MinFixedObjOffset);
3115  }
3116  }
3117  }
3118 
3119  // Ensure alignment.
3120  MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
3121  int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize;
3122  int UnwindHelpFI =
3123  MFI.CreateFixedObject(SlotSize, UnwindHelpOffset, /*Immutable=*/false);
3124  EHInfo.UnwindHelpFrameIdx = UnwindHelpFI;
3125 
3126  // Store -2 into UnwindHelp on function entry. We have to scan forwards past
3127  // other frame setup instructions.
3128  MachineBasicBlock &MBB = MF.front();
3129  auto MBBI = MBB.begin();
3130  while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
3131  ++MBBI;
3132 
3133  DebugLoc DL = MBB.findDebugLoc(MBBI);
3134  addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),
3135  UnwindHelpFI)
3136  .addImm(-2);
3137 }
void push_front(MachineBasicBlock *MBB)
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
Definition: Function.h:163
constexpr bool isUInt< 32 >(uint64_t x)
Definition: MathExtras.h:349
bool isOSDarwin() const
isOSDarwin - Is this a "Darwin" OS (OS X, iOS, or watchOS).
Definition: Triple.h:470
bool is64Bit() const
Is this x86_64? (disregarding specific ABI / programming model)
Definition: X86Subtarget.h:508
static bool flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB)
Check if the flags need to be preserved before the terminators.
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
bool usesWindowsCFI() const
Definition: MCAsmInfo.h:579
bool hasBasePointer(const MachineFunction &MF) const
BitVector & set()
Definition: BitVector.h:398
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
SmallVector< WinEHHandlerType, 1 > HandlerArray
Definition: WinEHFuncInfo.h:77
DILocation * get() const
Get the underlying DILocation.
Definition: DebugLoc.cpp:22
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents an incoming formal argument to a Function.
Definition: Argument.h:30
MachineBasicBlock * getMBB() const
bool hasDebugInfo() const
Returns true if valid debug info is present.
MDNode * getOperand(unsigned i) const
Definition: Metadata.cpp:1081
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:115
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool isOSWindows() const
Definition: X86Subtarget.h:746
const X86InstrInfo * getInstrInfo() const override
Definition: X86Subtarget.h:467
bool hasStackObjects() const
Return true if there are any stack objects in this function.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
Definition: MachineInstr.h:285
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
bool isCleanupFuncletEntry() const
Returns true if this is the entry block of a cleanup funclet.
unsigned getReg() const
getReg - Returns the register number.
const TargetRegisterClass * getGPRsForTailCall(const MachineFunction &MF) const
getGPRsForTailCall - Returns a register class with registers that can be used in forming tail calls...
static unsigned getLEArOpcode(unsigned IsLP64)
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset)
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
Definition: MCDwarf.h:480
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
unsigned Reg
MachineBasicBlock::iterator restoreWin32EHStackPointers(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool RestoreSP=false) const
Sets up EBP and optionally ESI based on the incoming EBP value.
constexpr bool isInt< 8 >(int64_t x)
Definition: MathExtras.h:303
void setCalleeSavedFrameSize(unsigned bytes)
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
Definition: Function.h:307
arg_iterator arg_end()
Definition: Function.h:666
unsigned const TargetRegisterInfo * TRI
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:862
void setIsDead(bool Val=true)
F(f)
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
MachineModuleInfo & getMMI() const
const MDOperand & getOperand(unsigned I) const
Definition: Metadata.h:1067
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:685
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
bool isTargetNaCl64() const
Definition: X86Subtarget.h:716
static MCCFIInstruction createDefCfaOffset(MCSymbol *L, int Offset)
.cfi_def_cfa_offset modifies a rule for computing CFA.
Definition: MCDwarf.h:467
unsigned getSlotSize() const
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment)
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
Definition: MCDwarf.h:474
unsigned getSpillSize(const TargetRegisterClass &RC) const
Return the size in bytes of the stack slot allocated to hold a spilled copy of a register from class ...
bool isTargetWindowsMSVC() const
Definition: X86Subtarget.h:720
X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride)
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
return AArch64::GPR64RegClass contains(Reg)
iterator_range< succ_iterator > successors()
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
bool Uses64BitFramePtr
True if the 64-bit frame or stack pointer should be used.
unsigned getSpillAlignment(const TargetRegisterClass &RC) const
Return the minimum required alignment in bytes for a spill slot for a register of this class...
CLEANUPRET - Represents a return from a cleanup block funclet.
Definition: ISDOpcodes.h:651
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
A tuple of MDNodes.
Definition: Metadata.h:1323
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction. ...
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
const HexagonInstrInfo * TII
bool isTarget64BitLP64() const
Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?
Definition: X86Subtarget.h:527
const TargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
void eraseFromParent()
Unlink &#39;this&#39; from the containing basic block and delete it.
bool is32Bit() const
Definition: X86Subtarget.h:512
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
iterator_range< iterator > terminators()
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
void adjustForHiPEPrologue(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Erlang programs may need a special prologue to handle the stack size they might need at runtime...
unsigned getNumOperands() const
Definition: Metadata.cpp:1077
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:311
int getDwarfRegNum(unsigned RegNum, bool isEH) const
Map a target register to an equivalent dwarf register number.
static const uint64_t kSplitStackAvailable
virtual unsigned getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
LLVM_NODISCARD unsigned addFrameInst(const MCCFIInstruction &Inst)
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, uint64_t s, unsigned base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
unsigned getBaseRegister() const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
auto reverse(ContainerTy &&C, typename std::enable_if< has_rbegin< ContainerTy >::value >::type *=nullptr) -> decltype(make_range(C.rbegin(), C.rend()))
Definition: STLExtras.h:237
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override
uint16_t StackAdjustment(const RuntimeFunction &RF)
StackAdjustment - calculated stack adjustment in words.
Definition: ARMWinEH.h:197
bool canUseLEAForSPInEpilogue(const MachineFunction &MF) const
Check that LEA can be used on SP in an epilogue sequence for MF.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...
bool needsFrameIndexResolution(const MachineFunction &MF) const override
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe inline-stub with the actual probe code inline.
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
static unsigned getANDriOpcode(bool IsLP64, int64_t Imm)
const MCContext & getContext() const
const RegList & Regs
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:133
int getObjectIndexBegin() const
Return the minimum frame object index.
NamedMDNode * getNamedMetadata(const Twine &Name) const
Return the first NamedMDNode in the module with the specified name.
Definition: Module.cpp:242
union llvm::WinEHHandlerType::@172 CatchObj
The CatchObj starts out life as an LLVM alloca and is eventually turned frame index.
static unsigned getHiPELiteral(NamedMDNode *HiPELiteralsMD, const StringRef LiteralName)
Lookup an ERTS parameter in the !hipe.literals named metadata node.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
bool hasPersonalityFn() const
Check whether this function has a personality function.
Definition: Function.h:688
bool hasCopyImplyingStackAdjustment() const
Returns true if the function contains operations which will lower down to instructions which manipula...
StringRef getStackProbeSymbolName(MachineFunction &MF) const override
Returns the name of the symbol used to emit stack probes or the empty string if not applicable...
Value wrapper in the Metadata hierarchy.
Definition: Metadata.h:337
static unsigned calculateSetFPREG(uint64_t SPAdjust)
bool Is64Bit
Is64Bit implies that x86_64 instructions are available.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
unsigned getUndefRegState(bool B)
void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const MCCFIInstruction &CFIInst) const
Wraps up getting a CFI index and building a MachineInstr for it.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *bb=nullptr)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
unsigned getKillRegState(bool B)
unsigned getCodeViewFlag() const
Returns the CodeView Version by checking module flags.
Definition: Module.cpp:460
unsigned getStackRegister() const
Flag
These should be considered private to the implementation of the MCInstrDesc class.
Definition: MCInstrDesc.h:118
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
TargetInstrInfo - Interface to description of machine instruction set.
unsigned getInitialCFARegister(const MachineFunction &MF) const override
Return initial CFA register value i.e.
StringRef getString() const
Definition: Metadata.cpp:464
bool isOSWindows() const
Tests whether the OS is Windows.
Definition: Triple.h:562
unsigned getDefRegState(bool B)
The memory access is volatile.
const X86TargetLowering * getTargetLowering() const override
Definition: X86Subtarget.h:463
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getObjectAlignment(int ObjectIdx) const
Return the alignment of the specified stack object.
void addLiveIn(MCPhysReg PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
Definition: Constants.h:149
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
unsigned const MachineRegisterInfo * MRI
static MCCFIInstruction createDefCfa(MCSymbol *L, unsigned Register, int Offset)
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it...
Definition: MCDwarf.h:453
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register)
.cfi_def_cfa_register modifies a rule for computing CFA.
Definition: MCDwarf.h:460
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool isBundled() const
Return true if this instruction part of a bundle.
Definition: MachineInstr.h:258
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
bool hasEHFunclets() const
void setStackSize(uint64_t Size)
Set the size of the stack.
static bool is64Bit(const char *name)
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE and DBG_LABEL instructions...
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:36
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
const GlobalValue * getGlobal() const
const X86InstrInfo & TII
#define H(x, y, z)
Definition: MD5.cpp:57
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size)
A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE.
Definition: MCDwarf.h:541
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
void setFlag(MIFlag Flag)
Set a MI flag.
Definition: MachineInstr.h:202
MCRegAliasIterator enumerates all registers aliasing Reg.
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset]...
bool useLeaForSP() const
Definition: X86Subtarget.h:608
unsigned getMaxAlignment() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
unsigned getFramePtr() const
Returns physical register used as frame pointer.
bool isTargetFreeBSD() const
Definition: X86Subtarget.h:701
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const Triple & getTargetTriple() const
size_t arg_size() const
Definition: Function.h:684
arg_iterator arg_begin()
Definition: Function.h:657
self_iterator getIterator()
Definition: ilist_node.h:82
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn&#39;t already there.
Definition: SmallSet.h:81
bool isTargetDarwin() const
Definition: X86Subtarget.h:700
int CreateSpillStackObject(uint64_t Size, unsigned Alignment)
Create a new statically sized stack object that represents a spill slot, returning a nonnegative iden...
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
const MachineBasicBlock & front() const
X86_INTR - x86 hardware interrupt context.
Definition: CallingConv.h:174
bool isTargetWin64() const
Definition: X86Subtarget.h:748
This class contains a discriminated union of information about pointers in memory operands...
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
unsigned getStackAlignment() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
virtual bool hasReservedCallFrame(const MachineFunction &MF) const
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm)
static bool isFuncletReturnInstr(MachineInstr &MI)
static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm)
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const
Emit target stack probe code.
The memory access writes data.
std::enable_if< std::numeric_limits< T >::is_signed, bool >::type getAsInteger(unsigned Radix, T &Result) const
Parse the current string as an integer of the specified radix.
Definition: StringRef.h:497
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
const X86Subtarget & STI
Iterator for intrusive lists based on ilist_node.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
constexpr bool isInt< 32 >(int64_t x)
Definition: MathExtras.h:309
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required, we reserve argument space for call sites in the function immediately on entry to the current function.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call...
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
bool regsOverlap(unsigned regA, unsigned regB) const
Returns true if the two registers are equal or alias each other.
bool shouldSplitStack() const
Should we be emitting segmented stack stuff for the function.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
Definition: Function.h:199
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value...
MachineOperand class - Representation of each machine instruction operand.
Information about stack frame layout on the target.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool isTargetWin32() const
Definition: X86Subtarget.h:750
int getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, unsigned &FrameReg, bool IgnoreSPUpdates) const override
Same as getFrameIndexReference, except that the stack pointer (as opposed to the frame pointer) will ...
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling...
int64_t getFrameAdjustment(const MachineInstr &I) const
Returns the stack pointer adjustment that happens inside the frame setup..destroy sequence (e...
Definition: X86InstrInfo.h:190
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
bool callsUnwindInit() const
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - If there is a reserved call frame, the call frame pseudos can be simpli...
IterT skipDebugInstructionsBackward(IterT It, IterT Begin)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
const Function & getFunction() const
Return the LLVM function that this machine code represents.
bool isTarget64BitILP32() const
Is this x86_64 with the ILP32 programming model (x32 ABI)?
Definition: X86Subtarget.h:521
bool needsUnwindTableEntry() const
True if this function needs an unwind table.
Definition: Function.h:559
bool callsEHReturn() const
unsigned getX86SubSuperRegister(unsigned, unsigned, bool High=false)
Returns the sub or super register of a specific X86 register.
static bool isTailCallOpcode(unsigned Opc)
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
Definition: WinEHFuncInfo.h:97
CodeModel::Model getCodeModel() const
Returns the code model.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void setHasAddressTaken()
Set this block to reflect that it potentially is the target of an indirect branch.
Fast - This calling convention attempts to make calls as fast as possible (e.g.
Definition: CallingConv.h:43
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
CATCHRET - Represents a return from a catch block funclet.
Definition: ISDOpcodes.h:647
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
The memory access reads data.
int getFrameIndexReferenceSP(const MachineFunction &MF, int FI, unsigned &SPReg, int Adjustment) const
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
bool isLiveIn(unsigned Reg) const
Representation of each machine instruction.
Definition: MachineInstr.h:60
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
assignCalleeSavedSpillSlots - Allows target to override spill slot assignment logic.
void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Adjust the prologue to have the function use segmented stacks.
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
void ensureMaxAlignment(unsigned Align)
Make sure the function is at least Align bytes aligned.
static const size_t npos
Definition: StringRef.h:51
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB &#39;Other&#39; at the position From, and insert it into this MBB right before &#39;...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
bool isTargetDragonFly() const
Definition: X86Subtarget.h:702
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:62
bool verify(Pass *p=nullptr, const char *Banner=nullptr, bool AbortOnError=true) const
Run the current MachineFunction through the machine code verifier, useful for debugger use...
StringRef getValueAsString() const
Return the attribute&#39;s value as a string.
Definition: Attributes.cpp:195
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
StringRef getName() const
Return a constant reference to the value&#39;s name.
Definition: Value.cpp:224
TargetOptions Options
Definition: TargetMachine.h:98
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned char TargetFlags=0) const
LLVM_NODISCARD size_t find_first_of(char C, size_t From=0) const
Find the first character in the string that is C, or npos if not found.
Definition: StringRef.h:395
#define I(x, y, z)
Definition: MD5.cpp:58
APFloat abs(APFloat X)
Returns the absolute value of the argument.
Definition: APFloat.h:1213
bool optForMinSize() const
Optimize this function for minimum size (-Oz).
Definition: Function.h:581
Pair of physical register and lane mask.
virtual const TargetFrameLowering * getFrameLowering() const
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
LLVM_NODISCARD std::enable_if<!is_simple_type< Y >::value, typename cast_retty< X, const Y >::ret_type >::type dyn_cast(const Y &Val)
Definition: Casting.h:323
int getOffsetAdjustment() const
Return the correction for frame offsets.
static unsigned getSUBrrOpcode(unsigned isLP64)
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const X86RegisterInfo * TRI
const Module * getModule() const
const TargetRegisterClass * getMinimalPhysRegClass(unsigned Reg, MVT VT=MVT::Other) const
Returns the Register Class of a physical register of the given type, picking the most sub register cl...
static cl::opt< int > PageSize("imp-null-check-page-size", cl::desc("The page size of the target in bytes"), cl::init(4096), cl::Hidden)
iterator_range< livein_iterator > liveins() const
bool isReg() const
isReg - Tests if this is a MO_Register operand.
OUTCHAIN = EH_RETURN(INCHAIN, OFFSET, HANDLER) - This node represents &#39;eh_return&#39; gcc dwarf builtin...
Definition: ISDOpcodes.h:102
CallingConvention
Definition: Dwarf.h:201
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static bool isEAXLiveIn(MachineBasicBlock &MBB)
X86_FastCall - &#39;fast&#39; analog of X86_StdCall.
Definition: CallingConv.h:92
static unsigned getADDrrOpcode(unsigned isLP64)
void insert(iterator MBBI, MachineBasicBlock *MBB)
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary)
GetScratchRegister - Get a temp register for performing work in the segmented stack and the Erlang/Hi...
const MCRegisterInfo * getRegisterInfo() const
Definition: MCContext.h:295
Constant * getPersonalityFn() const
Get the personality function associated with this function.
Definition: Function.cpp:1288
bool isTargetLinux() const
Definition: X86Subtarget.h:710
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const X86RegisterInfo *TRI, bool Is64Bit)
findDeadCallerSavedReg - Return a caller-saved register that isn&#39;t live when it reaches the "return" ...
bool isCallingConvWin64(CallingConv::ID CC) const
Definition: X86Subtarget.h:761
Attribute getFnAttribute(Attribute::AttrKind Kind) const
Return the attribute for the given attribute kind.
Definition: Function.h:317
static const unsigned FramePtr
int getInitialCFAOffset(const MachineFunction &MF) const override
Return initial CFA offset value i.e.
bool useRetpoline() const
Definition: X86Subtarget.h:652
int getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
IRTranslator LLVM IR MI
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool hasBWI() const
Definition: X86Subtarget.h:637
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
A single uniqued string.
Definition: Metadata.h:602
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL) const
unsigned getFrameRegister(const MachineFunction &MF) const override
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
No exception support.
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack.
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const
Check the instruction before/after the passed instruction.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned char TargetFlags=0) const
unsigned getNumOperands() const
Return number of MDNode operands.
Definition: Metadata.h:1073
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE size_t find(char C, size_t From=0) const
Search for the first character C in the string.
Definition: StringRef.h:298
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const override
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:316
static bool HasNestArgument(const MachineFunction *MF)
SlotIndex - An opaque wrapper around machine indexes.
Definition: SlotIndexes.h:84
bool hasTailCall() const
Returns true if the function contains a tail call.
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects...
Function Alias Analysis false
unsigned createVirtualRegister(const TargetRegisterClass *RegClass, StringRef Name="")
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
bool isReserved(unsigned PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
This class contains meta information specific to a module.
bool hasCalls() const
Return true if the current function has any function calls.
unsigned isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:65
bool isTargetWindowsCoreCLR() const
Definition: X86Subtarget.h:728