39#define DEBUG_TYPE "x86-fl"
41STATISTIC(NumFrameLoopProbe,
"Number of loop stack probes used in prologue");
43 "Number of extra stack probes generated in prologue");
44STATISTIC(NumFunctionUsingPush2Pop2,
"Number of funtions using push2/pop2");
52 STI(STI),
TII(*STI.getInstrInfo()),
TRI(STI.getRegisterInfo()) {
76 (
hasFP(MF) && !
TRI->hasStackRealignment(MF)) ||
109 return IsLP64 ? X86::SUB64ri32 : X86::SUB32ri;
113 return IsLP64 ? X86::ADD64ri32 : X86::ADD32ri;
117 return IsLP64 ? X86::SUB64rr : X86::SUB32rr;
121 return IsLP64 ? X86::ADD64rr : X86::ADD32rr;
125 return IsLP64 ? X86::AND64ri32 : X86::AND32ri;
129 return IsLP64 ? X86::LEA64r : X86::LEA32r;
135 return X86::MOV32ri64;
137 return X86::MOV64ri32;
161 return ST.is64Bit() ? (ST.hasPPX() ? X86::PUSHP64r : X86::PUSH64r)
165 return ST.is64Bit() ? (ST.hasPPX() ? X86::POPP64r : X86::POP64r)
169 return ST.hasPPX() ? X86::PUSH2P : X86::PUSH2;
172 return ST.hasPPX() ? X86::POP2P : X86::POP2;
177 unsigned Reg = RegMask.PhysReg;
179 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
180 Reg == X86::AH || Reg == X86::AL)
194 bool BreakNext =
false;
199 if (Reg != X86::EFLAGS)
220 if (Succ->isLiveIn(X86::EFLAGS))
231 bool InEpilogue)
const {
232 bool isSub = NumBytes < 0;
246 if (EmitInlineStackProbe && !InEpilogue) {
252 }
else if (
Offset > Chunk) {
263 unsigned AddSubRROpc =
272 MI->getOperand(3).setIsDead();
274 }
else if (
Offset > 8 * Chunk) {
298 MI->getOperand(3).setIsDead();
318 unsigned Opc = isSub ? (
Is64Bit ? X86::PUSH64r : X86::PUSH32r)
319 : (
Is64Bit ? X86::POP64r : X86::POP32r);
328 BuildStackAdjustment(
MBB,
MBBI,
DL, isSub ? -ThisVal : ThisVal, InEpilogue)
338 assert(
Offset != 0 &&
"zero offset stack adjustment requested");
356 if (UseLEA && !
STI.useLeaForSP())
361 "We shouldn't have allowed this insertion point");
378 MI->getOperand(3).setIsDead();
385 bool doMergeWithPrevious)
const {
404 if (doMergeWithPrevious && PI !=
MBB.
begin() && PI->isCFIInstruction())
407 unsigned Opc = PI->getOpcode();
410 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD32ri) &&
411 PI->getOperand(0).getReg() ==
StackPtr) {
413 Offset = PI->getOperand(2).getImm();
414 }
else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
415 PI->getOperand(0).getReg() ==
StackPtr &&
416 PI->getOperand(1).getReg() ==
StackPtr &&
417 PI->getOperand(2).getImm() == 1 &&
418 PI->getOperand(3).getReg() == X86::NoRegister &&
419 PI->getOperand(5).getReg() == X86::NoRegister) {
421 Offset = PI->getOperand(4).getImm();
422 }
else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB32ri) &&
423 PI->getOperand(0).getReg() ==
StackPtr) {
425 Offset = -PI->getOperand(2).getImm();
430 if (PI !=
MBB.
end() && PI->isCFIInstruction()) {
437 if (!doMergeWithPrevious)
474 unsigned DwarfReg =
MRI->getDwarfRegNum(MachineFramePtr,
true);
498 unsigned DwarfReg =
MRI->getDwarfRegNum(Reg,
true);
509 CfaExpr.
push_back(dwarf::DW_CFA_expression);
518 unsigned DwarfFramePtr =
MRI->getDwarfRegNum(MachineFramePtr,
true);
519 CfaExpr.
push_back((uint8_t)(dwarf::DW_OP_breg0 + DwarfFramePtr));
534 int FI =
MI->getOperand(1).getIndex();
542 unsigned DwarfFramePtr =
MRI->getDwarfRegNum(MachineFramePtr,
true);
543 CfaExpr.
push_back((uint8_t)(dwarf::DW_OP_breg0 + DwarfFramePtr));
549 DefCfaExpr.
push_back(dwarf::DW_CFA_def_cfa_expression);
559void X86FrameLowering::emitZeroCallUsedRegs(
BitVector RegsToZero,
575 if (!X86::RFP80RegClass.
contains(Reg))
578 unsigned NumFPRegs = ST.is64Bit() ? 8 : 7;
579 for (
unsigned i = 0; i != NumFPRegs; ++i)
582 for (
unsigned i = 0; i != NumFPRegs; ++i)
590 if (
TRI->isGeneralPurposeRegister(MF, Reg)) {
592 RegsToZero.
reset(Reg);
607 std::optional<MachineFunction::DebugInstrOperandPair> InstrNum)
const {
614 emitStackProbeInline(MF,
MBB,
MBBI,
DL,
false);
617 emitStackProbeCall(MF,
MBB,
MBBI,
DL, InProlog, InstrNum);
628 return MI.getOpcode() == X86::STACKALLOC_W_PROBING;
630 if (Where != PrologMBB.
end()) {
632 emitStackProbeInline(MF, PrologMBB, Where,
DL,
true);
633 Where->eraseFromParent();
641 bool InProlog)
const {
644 emitStackProbeInlineWindowsCoreCLR64(MF,
MBB,
MBBI,
DL, InProlog);
646 emitStackProbeInlineGeneric(MF,
MBB,
MBBI,
DL, InProlog);
649void X86FrameLowering::emitStackProbeInlineGeneric(
658 "different expansion expected for CoreCLR 64 bit");
660 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
661 uint64_t ProbeChunk = StackProbeSize * 8;
664 TRI->hasStackRealignment(MF) ? calculateMaxStackAlign(MF) : 0;
669 if (
Offset > ProbeChunk) {
671 MaxAlign % StackProbeSize);
674 MaxAlign % StackProbeSize);
678void X86FrameLowering::emitStackProbeInlineGenericBlock(
683 const bool NeedsDwarfCFI = needsDwarfCFI(MF);
687 const unsigned MovMIOpc =
Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
688 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
692 assert(AlignOffset < StackProbeSize);
695 if (StackProbeSize <
Offset + AlignOffset) {
698 BuildStackAdjustment(
MBB,
MBBI,
DL, -StackAdjustment,
false)
700 if (!HasFP && NeedsDwarfCFI) {
711 NumFrameExtraProbe++;
712 CurrentOffset = StackProbeSize - AlignOffset;
718 while (CurrentOffset + StackProbeSize <
Offset) {
719 BuildStackAdjustment(
MBB,
MBBI,
DL, -StackProbeSize,
false)
722 if (!HasFP && NeedsDwarfCFI) {
732 NumFrameExtraProbe++;
733 CurrentOffset += StackProbeSize;
742 unsigned Opc =
Is64Bit ? X86::PUSH64r : X86::PUSH32r;
747 BuildStackAdjustment(
MBB,
MBBI,
DL, -ChunkSize,
false)
754void X86FrameLowering::emitStackProbeInlineGenericLoop(
762 "Inline stack probe loop will clobber live EFLAGS.");
764 const bool NeedsDwarfCFI = needsDwarfCFI(MF);
768 const unsigned MovMIOpc =
Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
769 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
772 if (AlignOffset < StackProbeSize) {
774 BuildStackAdjustment(
MBB,
MBBI,
DL, -AlignOffset,
false)
782 NumFrameExtraProbe++;
795 MF.
insert(MBBIter, testMBB);
796 MF.
insert(MBBIter, tailMBB);
817 if (!HasFP && NeedsDwarfCFI) {
820 const Register DwarfFinalStackProbed =
827 nullptr,
TRI->getDwarfRegNum(DwarfFinalStackProbed,
true)));
834 BuildStackAdjustment(*testMBB, testMBB->
end(),
DL, -StackProbeSize,
868 BuildStackAdjustment(*tailMBB, TailMBBIter,
DL, -TailOffset,
874 if (!HasFP && NeedsDwarfCFI) {
884 nullptr,
TRI->getDwarfRegNum(DwarfStackPtr,
true)));
888 bool anyChange =
false;
894void X86FrameLowering::emitStackProbeInlineWindowsCoreCLR64(
898 assert(
STI.is64Bit() &&
"different expansion needed for 32 bit");
905 "Inline stack probe loop will clobber live EFLAGS.");
940 MF.
insert(MBBIter, RoundMBB);
941 MF.
insert(MBBIter, LoopMBB);
942 MF.
insert(MBBIter, ContinueMBB);
950 const int64_t ThreadEnvironmentStackLimit = 0x10;
952 const int64_t PageMask = ~(
PageSize - 1);
959 SizeReg = InProlog ? X86::RAX :
MRI.createVirtualRegister(RegClass),
960 ZeroReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass),
961 CopyReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
962 TestReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
963 FinalReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
964 RoundedReg = InProlog ? X86::RDX :
MRI.createVirtualRegister(RegClass),
965 LimitReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass),
966 JoinReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass),
967 ProbeReg = InProlog ? X86::RCX :
MRI.createVirtualRegister(RegClass);
970 int64_t RCXShadowSlot = 0;
971 int64_t RDXShadowSlot = 0;
987 int64_t InitSlot = 8 + CalleeSaveSize + (
HasFP ? 8 : 0);
991 RCXShadowSlot = InitSlot;
993 RDXShadowSlot = InitSlot;
994 if (IsRDXLiveIn && IsRCXLiveIn)
1035 .
addImm(ThreadEnvironmentStackLimit)
1045 BuildMI(RoundMBB,
DL,
TII.get(X86::AND64ri32), RoundedReg)
1088 TII.get(X86::MOV64rm), X86::RCX),
1089 X86::RSP,
false, RCXShadowSlot);
1092 TII.get(X86::MOV64rm), X86::RDX),
1093 X86::RSP,
false, RDXShadowSlot);
1099 BuildMI(*ContinueMBB, ContinueMBBI,
DL,
TII.get(X86::SUB64rr), X86::RSP)
1112 for (++BeforeMBBI; BeforeMBBI !=
MBB.
end(); ++BeforeMBBI) {
1128void X86FrameLowering::emitStackProbeCall(
1131 std::optional<MachineFunction::DebugInstrOperandPair> InstrNum)
const {
1137 "code model and indirect thunks not yet implemented.");
1141 "Stack probe calls will clobber live EFLAGS.");
1145 CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
1147 CallOp = X86::CALLpcrel32;
1208 for (++ExpansionMBBI; ExpansionMBBI !=
MBBI; ++ExpansionMBBI)
1216 const uint64_t Win64MaxSEHOffset = 128;
1217 uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
1219 return SEHFrameOffset & -16;
1227X86FrameLowering::calculateMaxStackAlign(
const MachineFunction &MF)
const {
1234 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
1241 MaxAlign = (MaxAlign > 16) ? MaxAlign :
Align(16);
1243 MaxAlign =
Align(16);
1245 return MaxAlign.
value();
1258 const uint64_t StackProbeSize = TLI.getStackProbeSize(MF);
1259 const bool EmitInlineStackProbe = TLI.hasInlineStackProbe(MF);
1264 if (Reg ==
StackPtr && EmitInlineStackProbe && MaxAlign >= StackProbeSize) {
1266 NumFrameLoopProbe++;
1277 MF.
insert(MBBIter, entryMBB);
1278 MF.
insert(MBBIter, headMBB);
1279 MF.
insert(MBBIter, bodyMBB);
1280 MF.
insert(MBBIter, footMBB);
1281 const unsigned MovMIOpc =
Is64Bit ? X86::MOV64mi32 : X86::MOV32mi;
1290 BuildMI(entryMBB,
DL,
TII.get(TargetOpcode::COPY), FinalStackProbed)
1294 BuildMI(entryMBB,
DL,
TII.get(AndOp), FinalStackProbed)
1295 .
addReg(FinalStackProbed)
1300 MI->getOperand(3).setIsDead();
1304 .
addReg(FinalStackProbed)
1327 .
addReg(FinalStackProbed)
1357 .
addReg(FinalStackProbed)
1373 .
addReg(FinalStackProbed)
1383 bool anyChange =
false;
1387 }
while (anyChange);
1396 MI->getOperand(3).setIsDead();
1404 "MF used frame lowering for wrong subtarget");
1413bool X86FrameLowering::isWin64Prologue(
const MachineFunction &MF)
const {
1417bool X86FrameLowering::needsDwarfCFI(
const MachineFunction &MF)
const {
1424 case X86::REPNE_PREFIX:
1425 case X86::REP_MOVSB_32:
1426 case X86::REP_MOVSB_64:
1427 case X86::REP_MOVSD_32:
1428 case X86::REP_MOVSD_64:
1429 case X86::REP_MOVSQ_32:
1430 case X86::REP_MOVSQ_64:
1431 case X86::REP_MOVSW_32:
1432 case X86::REP_MOVSW_64:
1433 case X86::REP_PREFIX:
1434 case X86::REP_STOSB_32:
1435 case X86::REP_STOSB_64:
1436 case X86::REP_STOSD_32:
1437 case X86::REP_STOSD_64:
1438 case X86::REP_STOSQ_32:
1439 case X86::REP_STOSQ_64:
1440 case X86::REP_STOSW_32:
1441 case X86::REP_STOSW_64:
1537 "MF used frame lowering for wrong subtarget");
1543 uint64_t MaxAlign = calculateMaxStackAlign(MF);
1549 bool FnHasClrFunclet =
1551 bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
1552 bool HasFP =
hasFP(MF);
1553 bool IsWin64Prologue = isWin64Prologue(MF);
1558 bool NeedsWinCFI = NeedsWin64CFI || NeedsWinFPO;
1559 bool NeedsDwarfCFI = needsDwarfCFI(MF);
1565 bool HasWinCFI =
false;
1576 ArgBaseReg =
MI->getOperand(0).getReg();
1589 if (NeedsDwarfCFI) {
1591 unsigned DwarfStackPtr =
TRI->getDwarfRegNum(ArgBaseReg,
true);
1610 if (TailCallArgReserveSize && IsWin64Prologue)
1613 const bool EmitStackProbeCall =
1630 .
addUse(X86::NoRegister);
1638 "win64 prologue does not set the bit 60 in the saved frame pointer");
1680 !EmitStackProbeCall &&
1688 StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
1695 if (TailCallArgReserveSize != 0) {
1696 BuildStackAdjustment(
MBB,
MBBI,
DL, -(
int)TailCallArgReserveSize,
1719 Register Establisher = X86::NoRegister;
1725 if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1745 if (
TRI->hasStackRealignment(MF) && !IsWin64Prologue)
1746 NumBytes =
alignTo(NumBytes, MaxAlign);
1754 if (NeedsDwarfCFI && !ArgBaseReg.
isValid()) {
1760 nullptr, -2 * stackGrowth + (
int)TailCallArgReserveSize),
1764 unsigned DwarfFramePtr =
TRI->getDwarfRegNum(MachineFramePtr,
true);
1768 (
int)TailCallArgReserveSize),
1781 assert(!IsWin64Prologue &&
1782 "win64 prologue does not store async context right below rbp");
1788 if (Attrs.hasAttrSomewhere(Attribute::SwiftAsync)) {
1823 if (!IsWin64Prologue && !IsFunclet) {
1832 if (NeedsDwarfCFI) {
1835 CfaExpr.
push_back(dwarf::DW_CFA_expression);
1837 unsigned DwarfReg =
TRI->getDwarfRegNum(MachineFramePtr,
true);
1840 CfaExpr.
push_back((uint8_t)(dwarf::DW_OP_breg0 + DwarfReg));
1849 unsigned DwarfFramePtr =
TRI->getDwarfRegNum(MachineFramePtr,
true);
1868 assert(!IsFunclet &&
"funclets without FPs not yet implemented");
1876 if (HasFP &&
TRI->hasStackRealignment(MF))
1884 unsigned ParentFrameNumBytes = NumBytes;
1886 NumBytes = getWinEHFuncletFrameSize(MF);
1889 bool PushedRegs =
false;
1895 unsigned Opc =
MBBI->getOpcode();
1896 return Opc == X86::PUSH32r || Opc == X86::PUSH64r || Opc == X86::PUSHP64r ||
1897 Opc == X86::PUSH2 || Opc == X86::PUSH2P;
1900 while (IsCSPush(
MBBI)) {
1905 unsigned Opc = LastCSPush->getOpcode();
1907 if (!HasFP && NeedsDwarfCFI) {
1913 if (Opc == X86::PUSH2 || Opc == X86::PUSH2P)
1926 if (Opc == X86::PUSH2 || Opc == X86::PUSH2P)
1928 .
addImm(LastCSPush->getOperand(1).getReg())
1936 if (!IsWin64Prologue && !IsFunclet &&
TRI->hasStackRealignment(MF) &&
1938 assert(HasFP &&
"There should be a frame pointer if stack is realigned.");
1964 uint64_t AlignedNumBytes = NumBytes;
1965 if (IsWin64Prologue && !IsFunclet &&
TRI->hasStackRealignment(MF))
1966 AlignedNumBytes =
alignTo(AlignedNumBytes, MaxAlign);
1967 if (AlignedNumBytes >= StackProbeSize && EmitStackProbeCall) {
1969 "The Red Zone is not accounted for in stack probes");
1991 int64_t
Alloc = isEAXAlive ? NumBytes - 8 : NumBytes;
1999 .
addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
2018 }
else if (NumBytes) {
2022 if (NeedsWinCFI && NumBytes) {
2029 int SEHFrameOffset = 0;
2030 unsigned SPOrEstablisher;
2037 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
2041 Establisher,
false, PSPSlotOffset)
2048 false, PSPSlotOffset)
2055 SPOrEstablisher = Establisher;
2060 if (IsWin64Prologue && HasFP) {
2067 SPOrEstablisher,
false, SEHFrameOffset);
2070 .
addReg(SPOrEstablisher);
2073 if (NeedsWinCFI && !IsFunclet) {
2074 assert(!NeedsWinFPO &&
"this setframe incompatible with FPO data");
2083 }
else if (IsFunclet &&
STI.is32Bit()) {
2107 if (X86::FR64RegClass.
contains(Reg)) {
2110 if (IsWin64Prologue && IsFunclet)
2118 assert(!NeedsWinFPO &&
"SEH_SaveXMM incompatible with FPO data");
2128 if (NeedsWinCFI && HasWinCFI)
2132 if (FnHasClrFunclet && !IsFunclet) {
2136 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
2150 if (IsWin64Prologue &&
TRI->hasStackRealignment(MF)) {
2151 assert(HasFP &&
"There should be a frame pointer if stack is realigned.");
2152 BuildStackAlignAND(
MBB,
MBBI,
DL, SPOrEstablisher, MaxAlign);
2156 if (IsFunclet &&
STI.is32Bit())
2189 assert(UsedReg == BasePtr);
2198 int FI =
MI->getOperand(1).getIndex();
2199 unsigned MOVmr =
Is64Bit ? X86::MOV64mr : X86::MOV32mr;
2206 if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
2208 if (!HasFP && NumBytes) {
2234 bool NeedsCLD =
false;
2248 if (
MI.isInlineAsm()) {
2280 switch (
MI.getOpcode()) {
2282 case X86::CLEANUPRET:
2304X86FrameLowering::getPSPSlotOffsetFromSP(
const MachineFunction &MF)
const {
2311 return static_cast<unsigned>(
Offset);
2315X86FrameLowering::getWinEHFuncletFrameSize(
const MachineFunction &MF)
const {
2322 WinEHXMMSlotInfo.
size() *
TRI->getSpillSize(X86::VR128RegClass);
2331 UsedSize = getPSPSlotOffsetFromSP(MF) +
SlotSize;
2342 return FrameSizeMinusRBP + XMMSize - CSSize;
2346 return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
2347 Opc == X86::TCRETURNmi || Opc == X86::TCRETURNri64 ||
2348 Opc == X86::TCRETURNdi64 || Opc == X86::TCRETURNmi64;
2359 DL =
MBBI->getDebugLoc();
2367 bool NeedsWin64CFI =
2373 uint64_t MaxAlign = calculateMaxStackAlign(MF);
2376 bool HasFP =
hasFP(MF);
2385 unsigned Opc = X86::LEA32r;
2387 ArgBaseReg =
MI->getOperand(0).getReg();
2388 if (
STI.is64Bit()) {
2390 StackReg = X86::RSP;
2401 if (NeedsDwarfCFI) {
2402 unsigned DwarfStackPtr =
TRI->getDwarfRegNum(StackReg,
true);
2412 assert(HasFP &&
"EH funclets without FP not yet implemented");
2413 NumBytes = getWinEHFuncletFrameSize(MF);
2417 NumBytes = FrameSize - CSSize - TailCallArgReserveSize;
2421 if (
TRI->hasStackRealignment(MF) && !IsWin64Prologue)
2422 NumBytes =
alignTo(FrameSize, MaxAlign);
2424 NumBytes = StackSize - CSSize - TailCallArgReserveSize;
2426 uint64_t SEHStackAllocAmt = NumBytes;
2451 if (NeedsDwarfCFI) {
2453 unsigned DwarfStackPtr =
2454 TRI->getDwarfRegNum(
Is64Bit ? X86::RSP : X86::ESP,
true);
2460 unsigned DwarfFramePtr =
TRI->getDwarfRegNum(MachineFramePtr,
true);
2475 unsigned Opc = PI->getOpcode();
2477 if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
2479 (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::BTR64ri8 &&
2480 Opc != X86::ADD64ri32 && Opc != X86::POPP64r && Opc != X86::POP2 &&
2481 Opc != X86::POP2P && Opc != X86::LEA64r))
2491 int FI =
MI->getOperand(1).getIndex();
2492 unsigned MOVrm =
Is64Bit ? X86::MOV64rm : X86::MOV32rm;
2499 if (IsFunclet && Terminator->getOpcode() == X86::CATCHRET)
2500 emitCatchRetReturnValue(
MBB, FirstCSPop, &*Terminator);
2503 DL =
MBBI->getDebugLoc();
2515 if (
TRI->hasStackRealignment(MF))
2519 IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
2531 if (LEAAmount != 0) {
2541 }
else if (NumBytes) {
2544 if (!HasFP && NeedsDwarfCFI) {
2548 nullptr, CSSize + TailCallArgReserveSize +
SlotSize),
2563 if (!HasFP && NeedsDwarfCFI) {
2570 unsigned Opc = PI->getOpcode();
2572 if (Opc == X86::POP32r || Opc == X86::POP64r || Opc == X86::POPP64r ||
2573 Opc == X86::POP2 || Opc == X86::POP2P) {
2577 if (Opc == X86::POP2 || Opc == X86::POP2P)
2595 assert(
Offset >= 0 &&
"TCDelta should never be positive");
2619 else if (
TRI->hasStackRealignment(MF))
2633 int64_t FPDelta = 0;
2644 if (IsWin64Prologue) {
2653 uint64_t NumBytes = FrameSize - CSSize;
2663 FPDelta = FrameSize - SEHFrameOffset;
2665 "FPDelta isn't aligned per the Win64 ABI!");
2677 if (TailCallReturnAddrDelta < 0)
2678 Offset -= TailCallReturnAddrDelta;
2696 const auto it = WinEHXMMSlotInfo.find(FI);
2698 if (it == WinEHXMMSlotInfo.end())
2709 int Adjustment)
const {
2719 bool IgnoreSPUpdates)
const {
2769 "we don't handle this case!");
2801 std::vector<CalleeSavedInfo> &CSI)
const {
2805 unsigned CalleeSavedFrameSize = 0;
2806 unsigned XMMCalleeSavedFrameSize = 0;
2812 if (TailCallReturnAddrDelta < 0) {
2823 TailCallReturnAddrDelta -
SlotSize,
true);
2827 if (this->TRI->hasBasePointer(MF)) {
2853 for (
unsigned i = 0; i < CSI.size(); ++i) {
2854 if (
TRI->regsOverlap(CSI[i].getReg(), FPReg)) {
2855 CSI.erase(CSI.begin() + i);
2870 unsigned NumRegsForPush2 = 0;
2871 if (
STI.hasPush2Pop2()) {
2873 return X86::GR64RegClass.contains(
I.getReg());
2875 bool NeedPadding = (SpillSlotOffset % 16 != 0) && (NumCSGPR % 2 == 0);
2876 bool UsePush2Pop2 = NeedPadding ? NumCSGPR > 2 : NumCSGPR > 1;
2878 NumRegsForPush2 = UsePush2Pop2 ?
alignDown(NumCSGPR, 2) : 0;
2895 (SpillSlotOffset % 16 == 0 ||
2917 "Expect even candidates for push2/pop2");
2919 ++NumFunctionUsingPush2Pop2;
2930 MVT VT = MVT::Other;
2931 if (X86::VK16RegClass.
contains(Reg))
2932 VT =
STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
2935 unsigned Size =
TRI->getSpillSize(*RC);
2936 Align Alignment =
TRI->getSpillAlign(*RC);
2938 assert(SpillSlotOffset < 0 &&
"SpillSlotOffset should always < 0 on X86");
2939 SpillSlotOffset = -
alignTo(-SpillSlotOffset, Alignment);
2942 SpillSlotOffset -=
Size;
2948 if (X86::VR128RegClass.
contains(Reg)) {
2949 WinEHXMMSlotInfo[
SlotIndex] = XMMCalleeSavedFrameSize;
2950 XMMCalleeSavedFrameSize +=
Size;
2975 auto UpdateLiveInCheckCanKill = [&](
Register Reg) {
2982 if (
MRI.isLiveIn(Reg))
2987 if (
MRI.isLiveIn(*AReg))
2991 auto UpdateLiveInGetKillRegState = [&](
Register Reg) {
2995 for (
auto RI = CSI.
rbegin(), RE = CSI.
rend(); RI != RE; ++RI) {
3003 .
addReg(Reg, UpdateLiveInGetKillRegState(Reg))
3004 .
addReg(Reg2, UpdateLiveInGetKillRegState(Reg2))
3008 .
addReg(Reg, UpdateLiveInGetKillRegState(Reg))
3014 unsigned Opc =
STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
3015 Register BaseReg = this->TRI->getBaseRegister();
3029 MVT VT = MVT::Other;
3030 if (X86::VK16RegClass.
contains(Reg))
3031 VT =
STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
3053 "SEH should not use CATCHRET");
3058 if (
STI.is64Bit()) {
3090 if (
MI->getOpcode() == X86::CATCHRET) {
3108 MVT VT = MVT::Other;
3109 if (X86::VK16RegClass.
contains(Reg))
3110 VT =
STI.hasBWI() ? MVT::v64i1 : MVT::v16i1;
3121 unsigned Opc =
STI.is64Bit() ? X86::POP64r : X86::POP32r;
3122 Register BaseReg = this->TRI->getBaseRegister();
3157 SavedRegs.
set(BasePtr);
3165 if (
I->hasNestAttr() && !
I->use_empty())
3182 return Primary ? X86::R14 : X86::R13;
3184 return Primary ? X86::EBX : X86::EDI;
3189 return Primary ? X86::R11 : X86::R12;
3191 return Primary ? X86::R11D : X86::R12D;
3201 "nested function.");
3202 return Primary ? X86::EAX : X86::ECX;
3205 return Primary ? X86::EDX : X86::EAX;
3206 return Primary ? X86::ECX : X86::EAX;
3217 unsigned TlsReg, TlsOffset;
3222 assert(&(*MF.
begin()) == &PrologueMBB &&
"Shrink-wrapping not supported yet");
3226 "Scratch register is live-in");
3246 bool IsNested =
false;
3255 for (
const auto &LI : PrologueMBB.
liveins()) {
3274 TlsOffset =
IsLP64 ? 0x70 : 0x40;
3277 TlsOffset = 0x60 + 90 * 8;
3291 if (CompareStackPointer)
3292 ScratchReg =
IsLP64 ? X86::RSP : X86::ESP;
3315 TlsOffset = 0x48 + 90 * 4;
3328 if (CompareStackPointer)
3329 ScratchReg = X86::ESP;
3331 BuildMI(checkMBB,
DL,
TII.get(X86::LEA32r), ScratchReg)
3350 unsigned ScratchReg2;
3352 if (CompareStackPointer) {
3355 SaveScratch2 =
false;
3367 "Scratch register is live-in and not saved");
3373 BuildMI(checkMBB,
DL,
TII.get(X86::MOV32ri), ScratchReg2)
3384 BuildMI(checkMBB,
DL,
TII.get(X86::POP32r), ScratchReg2);
3400 const unsigned RegAX =
IsLP64 ? X86::RAX : X86::EAX;
3401 const unsigned Reg10 =
IsLP64 ? X86::R10 : X86::R10D;
3402 const unsigned Reg11 =
IsLP64 ? X86::R11 : X86::R11D;
3403 const unsigned MOVrr =
IsLP64 ? X86::MOV64rr : X86::MOV32rr;
3439 "code model and thunks not yet implemented.");
3456 BuildMI(allocMBB,
DL,
TII.get(X86::MORESTACK_RET_RESTORE_R10));
3465#ifdef EXPENSIVE_CHECKS
3476 for (
int i = 0, e = HiPELiteralsMD->
getNumOperands(); i != e; ++i) {
3478 if (
Node->getNumOperands() != 2)
3480 MDString *NodeName = dyn_cast<MDString>(
Node->getOperand(0));
3482 if (!NodeName || !NodeVal)
3485 if (ValConst && NodeName->
getString() == LiteralName) {
3491 " required but not provided");
3502 return MI.isMetaInstruction();
3528 assert(&(*MF.
begin()) == &PrologueMBB &&
"Shrink-wrapping not supported yet");
3533 if (!HiPELiteralsMD)
3535 "Can't generate HiPE prologue without runtime parameters");
3537 HiPELiteralsMD,
Is64Bit ?
"AMD64_LEAF_WORDS" :
"X86_LEAF_WORDS");
3538 const unsigned CCRegisteredArgs =
Is64Bit ? 6 : 5;
3539 const unsigned Guaranteed = HipeLeafWords *
SlotSize;
3546 "HiPE prologue is only supported on Linux operating systems.");
3556 unsigned MoreStackForCalls = 0;
3558 for (
auto &
MBB : MF) {
3559 for (
auto &
MI :
MBB) {
3579 if (
F->getName().contains(
"erlang.") ||
F->getName().contains(
"bif_") ||
3583 unsigned CalleeStkArity =
F->arg_size() > CCRegisteredArgs
3584 ?
F->arg_size() - CCRegisteredArgs
3586 if (HipeLeafWords - 1 > CalleeStkArity)
3588 std::max(MoreStackForCalls,
3589 (HipeLeafWords - 1 - CalleeStkArity) *
SlotSize);
3592 MaxStack += MoreStackForCalls;
3597 if (MaxStack > Guaranteed) {
3601 for (
const auto &LI : PrologueMBB.
liveins()) {
3609 unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
3610 unsigned LEAop, CMPop, CALLop;
3615 LEAop = X86::LEA64r;
3616 CMPop = X86::CMP64rm;
3617 CALLop = X86::CALL64pcrel32;
3621 LEAop = X86::LEA32r;
3622 CMPop = X86::CMP32rm;
3623 CALLop = X86::CALLpcrel32;
3628 "HiPE prologue scratch register is live-in");
3635 PReg,
false, SPLimitOffset);
3645 PReg,
false, SPLimitOffset);
3655#ifdef EXPENSIVE_CHECKS
3672 if (NumPops != 1 && NumPops != 2)
3680 if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
3684 unsigned FoundRegs = 0;
3690 Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
3692 for (
auto Candidate : RegClass) {
3700 if (
MRI.isReserved(Candidate))
3705 if (MO.isReg() && MO.isDef() &&
3706 TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
3715 Regs[FoundRegs++] = Candidate;
3716 if (FoundRegs == (
unsigned)NumPops)
3724 while (FoundRegs < (
unsigned)NumPops)
3725 Regs[FoundRegs++] = Regs[0];
3727 for (
int i = 0; i < NumPops; ++i)
3738 unsigned Opcode =
I->getOpcode();
3739 bool isDestroy = Opcode ==
TII.getCallFrameDestroyOpcode();
3752 if (!reserveCallFrame) {
3773 bool HasDwarfEHHandlers = !WindowsCFI && !MF.
getLandingPads().empty();
3775 if (HasDwarfEHHandlers && !isDestroy &&
3785 Amount -= InternalAmt;
3795 int64_t StackAdjustment = isDestroy ? Amount : -Amount;
3797 if (StackAdjustment) {
3804 if (StackAdjustment) {
3805 if (!(
F.hasMinSize() &&
3806 adjustStackWithPops(
MBB, InsertPos,
DL, StackAdjustment)))
3807 BuildStackAdjustment(
MBB, InsertPos,
DL, StackAdjustment,
3820 int64_t CfaAdjustment = -StackAdjustment;
3823 if (CfaAdjustment) {
3836 while (CI !=
B && !std::prev(CI)->isCall())
3838 BuildStackAdjustment(
MBB, CI,
DL, -InternalAmt,
false);
3854 if (TLI.hasInlineStackProbe(MF) || TLI.hasStackProbeSymbol(MF))
3890 bool CompactUnwind =
3910 "restoring EBP/ESI on non-32-bit target");
3922 int EHRegSize = MFI.getObjectSize(FI);
3927 X86::EBP,
true, -EHRegSize)
3933 int EndOffset = -EHRegOffset - EHRegSize;
3946 "end of registration object above normal EBP position!");
3947 }
else if (UsedReg == BasePtr) {
3957 assert(UsedReg == BasePtr);
3983 FrameBase.
Kind = DwarfFrameBase::CFA;
3989 return DwarfFrameBase{DwarfFrameBase::Register, {FrameRegister}};
3994struct X86FrameSortingObject {
3995 bool IsValid =
false;
3996 unsigned ObjectIndex = 0;
3997 unsigned ObjectSize = 0;
3999 unsigned ObjectNumUses = 0;
4015struct X86FrameSortingComparator {
4016 inline bool operator()(
const X86FrameSortingObject &
A,
4017 const X86FrameSortingObject &
B)
const {
4018 uint64_t DensityAScaled, DensityBScaled;
4038 DensityAScaled =
static_cast<uint64_t>(
A.ObjectNumUses) *
4040 DensityBScaled =
static_cast<uint64_t>(
B.ObjectNumUses) *
4051 if (DensityAScaled == DensityBScaled)
4052 return A.ObjectAlignment <
B.ObjectAlignment;
4054 return DensityAScaled < DensityBScaled;
4068 if (ObjectsToAllocate.
empty())
4080 for (
auto &Obj : ObjectsToAllocate) {
4081 SortingObjects[Obj].IsValid =
true;
4082 SortingObjects[Obj].ObjectIndex = Obj;
4086 if (ObjectSize == 0)
4088 SortingObjects[Obj].ObjectSize = 4;
4090 SortingObjects[Obj].ObjectSize = ObjectSize;
4094 for (
auto &
MBB : MF) {
4095 for (
auto &
MI :
MBB) {
4096 if (
MI.isDebugInstr())
4102 int Index = MO.getIndex();
4106 SortingObjects[
Index].IsValid)
4107 SortingObjects[
Index].ObjectNumUses++;
4122 for (
auto &Obj : SortingObjects) {
4126 ObjectsToAllocate[i++] = Obj.ObjectIndex;
4130 if (!
TRI->hasStackRealignment(MF) &&
hasFP(MF))
4131 std::reverse(ObjectsToAllocate.
begin(), ObjectsToAllocate.
end());
4143 Offset += getWinEHFuncletFrameSize(MF);
4163 adjustFrameForMsvcCxxEh(MF);
4167void X86FrameLowering::adjustFrameForMsvcCxxEh(
MachineFunction &MF)
const {
4175 int64_t MinFixedObjOffset = -
SlotSize;
4181 int FrameIndex =
H.CatchObj.FrameIndex;
4182 if (FrameIndex != INT_MAX) {
4185 MinFixedObjOffset -= std::abs(MinFixedObjOffset) %
Align;
4193 MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
4194 int64_t UnwindHelpOffset = MinFixedObjOffset -
SlotSize;
4221 MI->eraseFromParent();
unsigned const MachineRegisterInfo * MRI
static bool isFuncletReturnInstr(const MachineInstr &MI)
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
static const uint64_t kSplitStackAvailable
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Analysis containing CSE Info
Given that RA is a live value
const HexagonInstrInfo * TII
static cl::opt< int > PageSize("imp-null-check-page-size", cl::desc("The page size of the target in bytes"), cl::init(4096), cl::Hidden)
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
static bool isTailCallOpcode(unsigned Opc)
unsigned const TargetRegisterInfo * TRI
static unsigned getReg(const MCDisassembler *D, unsigned RC, unsigned RegNo)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the 'Statistic' class, which is designed to be an easy way to expose various metric...
#define STATISTIC(VARNAME, DESC)
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
static bool is64Bit(const char *name)
static unsigned calculateSetFPREG(uint64_t SPAdjust)
static unsigned GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary)
GetScratchRegister - Get a temp register for performing work in the segmented stack and the Erlang/Hi...
static unsigned getADDriOpcode(bool IsLP64)
static unsigned getPUSH2Opcode(const X86Subtarget &ST)
static unsigned getMOVriOpcode(bool Use64BitReg, int64_t Imm)
static unsigned getLEArOpcode(bool IsLP64)
static unsigned getSUBriOpcode(bool IsLP64)
static bool flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB)
Check if the flags need to be preserved before the terminators.
static bool isOpcodeRep(unsigned Opcode)
Return true if an opcode is part of the REP group of instructions.
static unsigned getANDriOpcode(bool IsLP64, int64_t Imm)
static bool isEAXLiveIn(MachineBasicBlock &MBB)
static unsigned getADDrrOpcode(bool IsLP64)
static bool HasNestArgument(const MachineFunction *MF)
static unsigned getPOPOpcode(const X86Subtarget &ST)
static unsigned getPOP2Opcode(const X86Subtarget &ST)
static unsigned getHiPELiteral(NamedMDNode *HiPELiteralsMD, const StringRef LiteralName)
Lookup an ERTS parameter in the !hipe.literals named metadata node.
static bool blockEndIsUnreachable(const MachineBasicBlock &MBB, MachineBasicBlock::const_iterator MBBI)
static unsigned getSUBrrOpcode(bool IsLP64)
static unsigned getPUSHOpcode(const X86Subtarget &ST)
static const unsigned FramePtr
This class represents an incoming formal argument to a Function.
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
reverse_iterator rend() const
bool empty() const
empty - Check if the array is empty.
reverse_iterator rbegin() const
LLVM Basic Block Representation.
iterator_range< const_set_bits_iterator > set_bits() const
static BranchProbability getOne()
static BranchProbability getZero()
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
This is the shared class of boolean and integer constants.
uint64_t getZExtValue() const
Return the constant as a 64-bit unsigned integer value after it has been zero extended as appropriate...
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
bool hasPersonalityFn() const
Check whether this function has a personality function.
Constant * getPersonalityFn() const
Get the personality function associated with this function.
AttributeList getAttributes() const
Return the attribute list for this Function.
bool needsUnwindTableEntry() const
True if this function needs an unwind table.
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
bool usesWindowsCFI() const
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
static MCCFIInstruction createRestore(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_restore says that the rule for Register is now the same as it was at the beginning of the functi...
OpType getOperation() const
static MCCFIInstruction cfiDefCfa(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_def_cfa defines a rule for computing CFA as: take address from Register and add Offset to it.
static MCCFIInstruction createAdjustCfaOffset(MCSymbol *L, int Adjustment, SMLoc Loc={})
.cfi_adjust_cfa_offset Same as .cfi_def_cfa_offset, but Offset is a relative value that is added/subt...
static MCCFIInstruction createEscape(MCSymbol *L, StringRef Vals, SMLoc Loc={}, StringRef Comment="")
.cfi_escape Allows the user to add arbitrary bytes to the unwind info.
static MCCFIInstruction createGnuArgsSize(MCSymbol *L, int Size, SMLoc Loc={})
A special wrapper for .cfi_escape that indicates GNU_ARGS_SIZE.
const MCObjectFileInfo * getObjectFileInfo() const
const MCRegisterInfo * getRegisterInfo() const
MCSection * getCompactUnwindSection() const
MCRegAliasIterator enumerates all registers aliasing Reg.
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Wrapper class representing physical registers. Should be passed by value.
StringRef getString() const
void transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB)
Transfers all the successors, as in transferSuccessors, and update PHI operands in the successor bloc...
bool isEHPad() const
Returns true if the block is a landing pad.
instr_iterator insert(instr_iterator I, MachineInstr *M)
Insert MI into the instruction list before I, possibly inside a bundle.
iterator_range< livein_iterator > liveins() const
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
bool isEHFuncletEntry() const
Returns true if this is the entry block of an EH funclet.
LivenessQueryResult computeRegisterLiveness(const TargetRegisterInfo *TRI, MCRegister Reg, const_iterator Before, unsigned Neighborhood=10) const
Return whether (physical) register Reg has been defined and not killed as of just before Before.
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
bool isReturnBlock() const
Convenience function that returns true if the block ends in a return instruction.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
iterator getFirstNonPHI()
Returns a pointer to the first instruction in this block that is not a PHINode instruction.
DebugLoc findDebugLoc(instr_iterator MBBI)
Find the next valid DebugLoc starting at MBBI, skipping any debug instructions.
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
iterator_range< iterator > terminators()
iterator_range< succ_iterator > successors()
void splice(iterator Where, MachineBasicBlock *Other, iterator From)
Take an instruction from MBB 'Other' at the position From, and insert it into this MBB right before '...
@ LQR_Live
Register is known to be (at least partially) live.
void setMachineBlockAddressTaken()
Set this block to indicate that its address is used as something other than the target of a terminato...
bool isCleanupFuncletEntry() const
Returns true if this is the entry block of a cleanup funclet.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
bool needsSplitStackProlog() const
Return true if this function requires a split stack prolog, even if it uses no stack space.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
void ensureMaxAlignment(Align Alignment)
Make sure the function is at least Align bytes aligned.
bool hasCalls() const
Return true if the current function has any function calls.
bool isFrameAddressTaken() const
This method may be called any time after instruction selection is complete to determine if there is a...
Align getMaxAlign() const
Return the alignment in bytes that this function must be aligned to, which is greater than the defaul...
void setObjectOffset(int ObjectIdx, int64_t SPOffset)
Set the stack frame offset of the specified object.
bool hasPatchPoint() const
This method may be called any time after instruction selection is complete to determine if there is a...
bool hasOpaqueSPAdjustment() const
Returns true if the function contains opaque dynamic stack adjustments.
void setCVBytesOfCalleeSavedRegisters(unsigned S)
int CreateSpillStackObject(uint64_t Size, Align Alignment)
Create a new statically sized stack object that represents a spill slot, returning a nonnegative iden...
Align getObjectAlign(int ObjectIdx) const
Return the alignment of the specified stack object.
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
bool hasStackMap() const
This method may be called any time after instruction selection is complete to determine if there is a...
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
bool hasCopyImplyingStackAdjustment() const
Returns true if the function contains operations which will lower down to instructions which manipula...
bool hasStackObjects() const
Return true if there are any stack objects in this function.
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
void setStackSize(uint64_t Size)
Set the size of the stack.
bool isFixedObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a fixed stack object.
int getObjectIndexBegin() const
Return the minimum frame object index.
const WinEHFuncInfo * getWinEHFuncInfo() const
getWinEHFuncInfo - Return information about how the current function uses Windows exception handling.
unsigned addFrameInst(const MCCFIInstruction &Inst)
void setHasWinCFI(bool v)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
const std::vector< MCCFIInstruction > & getFrameInstructions() const
Returns a reference to a list of cfi instructions in the function's prologue.
void makeDebugValueSubstitution(DebugInstrOperandPair, DebugInstrOperandPair, unsigned SubReg=0)
Create a substitution between one <instr,operand> value to a different, new value.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
bool needsFrameMoves() const
True if this function needs frame moves for debug or exceptions.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
bool callsUnwindInit() const
void push_front(MachineBasicBlock *MBB)
const char * createExternalSymbolName(StringRef Name)
Allocate a string and populate it with the given external symbol name.
bool callsEHReturn() const
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
MachineModuleInfo & getMMI() const
bool shouldSplitStack() const
Should we be emitting segmented stack stuff for the function.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineBasicBlock & front() const
bool verify(Pass *p=nullptr, const char *Banner=nullptr, bool AbortOnError=true) const
Run the current MachineFunction through the machine code verifier, useful for debugger use.
bool hasEHFunclets() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
void insert(iterator MBBI, MachineBasicBlock *MBB)
const MachineInstrBuilder & addExternalSymbol(const char *FnName, unsigned TargetFlags=0) const
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & setMIFlag(MachineInstr::MIFlag Flag) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
const MachineInstrBuilder & addUse(Register RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Representation of each machine instruction.
unsigned getNumOperands() const
Retuns the total number of operands.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
unsigned getDebugInstrNum()
Fetch the instruction number of this MachineInstr.
const MachineOperand & getOperand(unsigned i) const
@ MOVolatile
The memory access is volatile.
@ MOLoad
The memory access reads data.
@ MOStore
The memory access writes data.
This class contains meta information specific to a module.
const MCContext & getContext() const
const Module * getModule() const
MachineOperand class - Representation of each machine instruction operand.
const GlobalValue * getGlobal() const
MachineBasicBlock * getMBB() const
void setIsDead(bool Val=true)
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg)
clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
bool isReserved(MCRegister PhysReg) const
isReserved - Returns true when PhysReg is a reserved register.
bool isLiveIn(Register Reg) const
NamedMDNode * getNamedMetadata(const Twine &Name) const
Return the first NamedMDNode in the module with the specified name.
unsigned getCodeViewFlag() const
Returns the CodeView Version by checking module flags.
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
MDNode * getOperand(unsigned i) const
unsigned getNumOperands() const
Wrapper class representing virtual and physical registers.
constexpr bool isValid() const
SlotIndex - An opaque wrapper around machine indexes.
SmallString - A SmallString is just a SmallVector with methods and accessors that make it work better...
void append(StringRef RHS)
Append from a StringRef.
StringRef str() const
Explicit conversion to StringRef.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
StackOffset holds a fixed and a scalable offset in bytes.
int64_t getFixed() const
Returns the fixed component of the stack.
static StackOffset getFixed(int64_t Fixed)
StringRef - Represent a constant reference to a string, i.e.
static constexpr size_t npos
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
TargetInstrInfo - Interface to description of machine instruction set.
const Triple & getTargetTriple() const
CodeModel::Model getCodeModel() const
Returns the code model.
const MCAsmInfo * getMCAsmInfo() const
Return target specific asm information.
SwiftAsyncFramePointerMode SwiftAsyncFramePointer
Control when and how the Swift async frame pointer bit should be set.
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
virtual Register getFrameRegister(const MachineFunction &MF) const =0
Debug information queries.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
bool isOSWindows() const
Tests whether the OS is Windows.
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, XROS, or DriverKit).
bool has128ByteRedZone(const MachineFunction &MF) const
Return true if the function has a redzone (accessible bytes past the frame of the top of stack functi...
bool canSimplifyCallFramePseudos(const MachineFunction &MF) const override
canSimplifyCallFramePseudos - If there is a reserved call frame, the call frame pseudos can be simpli...
bool needsFrameIndexResolution(const MachineFunction &MF) const override
X86FrameLowering(const X86Subtarget &STI, MaybeAlign StackAlignOverride)
const X86RegisterInfo * TRI
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
MachineBasicBlock::iterator restoreWin32EHStackPointers(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool RestoreSP=false) const
Sets up EBP and optionally ESI based on the incoming EBP value.
int getInitialCFAOffset(const MachineFunction &MF) const override
Return initial CFA offset value i.e.
bool canUseAsPrologue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a prologue for the target.
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
void emitStackProbe(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog, std::optional< MachineFunction::DebugInstrOperandPair > InstrNum=std::nullopt) const
Emit target stack probe code.
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool IsPrologue) const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
StackOffset getFrameIndexReferenceSP(const MachineFunction &MF, int FI, Register &SPReg, int Adjustment) const
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
bool enableShrinkWrapping(const MachineFunction &MF) const override
Returns true if the target will correctly handle shrink wrapping.
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe inline-stub with the actual probe code inline.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void emitSPUpdate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, int64_t NumBytes, bool InEpilogue) const
Emit a series of instructions to increment / decrement the stack pointer by a constant value.
bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override
Check whether or not the given MBB can be used as a epilogue for the target.
bool Is64Bit
Is64Bit implies that x86_64 instructions are available.
Register getInitialCFARegister(const MachineFunction &MF) const override
Return initial CFA register value i.e.
bool Uses64BitFramePtr
True if the 64-bit frame or stack pointer should be used.
unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override
void adjustForSegmentedStacks(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Adjust the prologue to have the function use segmented stacks.
DwarfFrameBase getDwarfFrameBase(const MachineFunction &MF) const override
Return the frame base information to be encoded in the DWARF subprogram debug info.
void emitCalleeSavedFrameMovesFullCFA(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const override
Emits Dwarf Info specifying offsets of callee saved registers and frame pointer.
int getWin64EHFrameIndexRef(const MachineFunction &MF, int FI, Register &SPReg) const
bool canUseLEAForSPInEpilogue(const MachineFunction &MF) const
Check that LEA can be used on SP in an epilogue sequence for MF.
bool stackProbeFunctionModifiesSP() const override
Does the stack probe function call return with a modified stack pointer?
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack.
void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const MCCFIInstruction &CFIInst, MachineInstr::MIFlag Flag=MachineInstr::NoFlags) const
Wraps up getting a CFI index and building a MachineInstr for it.
int mergeSPUpdates(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, bool doMergeWithPrevious) const
Check the instruction before/after the passed instruction.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
void processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameIndicesReplaced - This method is called immediately before MO_FrameIndex op...
StackOffset getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, Register &FrameReg, bool IgnoreSPUpdates) const override
Same as getFrameIndexReference, except that the stack pointer (as opposed to the frame pointer) will ...
void restoreWinEHStackPointersInParent(MachineFunction &MF) const
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
void adjustForHiPEPrologue(MachineFunction &MF, MachineBasicBlock &PrologueMBB) const override
Erlang programs may need a special prologue to handle the stack size they might need at runtime.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex) const override
void buildClearRegister(Register Reg, MachineBasicBlock &MBB, MachineBasicBlock::iterator Iter, DebugLoc &DL, bool AllowSideEffects=true) const override
int64_t getFrameAdjustment(const MachineInstr &I) const
Returns the stack pointer adjustment that happens inside the frame setup..destroy sequence (e....
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
X86MachineFunctionInfo - This class is derived from MachineFunction and contains private X86 target-s...
bool getForceFramePointer() const
void setPadForPush2Pop2(bool V)
bool isCandidateForPush2Pop2(Register Reg) const
unsigned getArgumentStackSize() const
bool hasVirtualTileReg() const
int getRestoreBasePointerOffset() const
int getSEHFramePtrSaveIndex() const
bool hasCFIAdjustCfa() const
int getTCReturnAddrDelta() const
void setRestoreBasePointer(const MachineFunction *MF)
bool getHasSEHFramePtrSave() const
DenseMap< int, unsigned > & getWinEHXMMSlotInfo()
void setUsesRedZone(bool V)
bool hasPreallocatedCall() const
bool hasSwiftAsyncContext() const
void setHasSEHFramePtrSave(bool V)
bool getRestoreBasePointer() const
MachineInstr * getStackPtrSaveMI() const
size_t getNumCandidatesForPush2Pop2() const
void addCandidateForPush2Pop2(Register Reg)
unsigned getCalleeSavedFrameSize() const
bool getHasPushSequences() const
bool padForPush2Pop2() const
void setStackPtrSaveMI(MachineInstr *MI)
bool getUsesRedZone() const
void setCalleeSavedFrameSize(unsigned bytes)
void setSEHFramePtrSaveIndex(int Index)
bool hasBasePointer(const MachineFunction &MF) const
Register getFrameRegister(const MachineFunction &MF) const override
unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI) const
findDeadCallerSavedReg - Return a caller-saved register that isn't live when it reaches the "return" ...
Register getStackRegister() const
unsigned getSlotSize() const
Register getFramePtr() const
Returns physical register used as frame pointer.
Register getBaseRegister() const
const X86TargetLowering * getTargetLowering() const override
bool isTargetDragonFly() const
bool isTargetWindowsMSVC() const
bool isTarget64BitILP32() const
Is this x86_64 with the ILP32 programming model (x32 ABI)?
bool isTargetDarwin() const
bool isTargetWin64() const
bool isTarget64BitLP64() const
Is this x86_64 with the LP64 programming model (standard AMD64, no x32)?
bool swiftAsyncContextIsDynamicallySet() const
Return whether FrameLowering should always set the "extended frame present" bit in FP,...
bool isTargetWindowsCoreCLR() const
const X86InstrInfo * getInstrInfo() const override
bool isCallingConvWin64(CallingConv::ID CC) const
bool isTargetFreeBSD() const
bool isTargetNaCl64() const
bool isTargetWin32() const
bool useIndirectThunkCalls() const
bool isTargetLinux() const
bool hasInlineStackProbe(const MachineFunction &MF) const override
Returns true if stack probing through inline assembly is requested.
StringRef getStackProbeSymbolName(const MachineFunction &MF) const override
Returns the name of the symbol used to emit stack probes or the empty string if not applicable.
bool hasStackProbeSymbol(const MachineFunction &MF) const override
Returns true if stack probing through a function call is requested.
unsigned getStackProbeSize(const MachineFunction &MF) const
self_iterator getIterator()
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
uint16_t StackAdjustment(const RuntimeFunction &RF)
StackAdjustment - calculated stack adjustment in words.
@ HiPE
Used by the High-Performance Erlang Compiler (HiPE).
@ X86_INTR
x86 hardware interrupt context.
@ Fast
Attempts to make calls as fast as possible (e.g.
@ Tail
Attemps to make calls as fast as possible while guaranteeing that tail call optimization can always b...
@ X86_FastCall
'fast' analog of X86_StdCall.
@ Implicit
Not emitted register (e.g. carry, or temporary result).
@ Define
Register definition.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
Reg
All possible values of the reg field in the ModR/M byte.
@ MO_GOTPCREL
MO_GOTPCREL - On a symbol operand this indicates that the immediate is offset to the GOT entry for th...
This is an optimization pass for GlobalISel generic memory operations.
void stable_sort(R &&Range)
bool all_of(R &&range, UnaryPredicate P)
Provide wrappers to std::all_of which take ranges instead of having to pass begin/end explicitly.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
bool isAligned(Align Lhs, uint64_t SizeInBytes)
Checks that SizeInBytes is a multiple of the alignment.
MCRegister getX86SubSuperRegister(MCRegister Reg, unsigned Size, bool High=false)
@ DwarfCFI
DWARF-like instruction based exceptions.
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
static const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset=0, bool mem=true)
addFrameReference - This function is used to add a reference to the base of an abstract object on the...
IterT skipDebugInstructionsForward(IterT It, IterT End, bool SkipPseudoOp=true)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator.
auto reverse(ContainerTy &&C)
static const MachineInstrBuilder & addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, bool isKill, int Offset)
addRegOffset - This function is used to add a memory reference of the form [Reg + Offset],...
@ Always
Always set the bit.
@ Never
Never set the bit.
@ DeploymentBased
Determine whether to set the bit statically or dynamically based on the deployment target.
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
EHPersonality classifyEHPersonality(const Value *Pers)
See if the given exception handling personality function is one that we understand.
IterT skipDebugInstructionsBackward(IterT It, IterT Begin, bool SkipPseudoOp=true)
Decrement It until it points to a non-debug instruction or to Begin and return the resulting iterator...
unsigned getUndefRegState(bool B)
unsigned getDefRegState(bool B)
unsigned getKillRegState(bool B)
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
bool isAsynchronousEHPersonality(EHPersonality Pers)
Returns true if this personality function catches asynchronous exceptions.
unsigned encodeSLEB128(int64_t Value, raw_ostream &OS, unsigned PadTo=0)
Utility function to encode a SLEB128 value to an output stream.
auto count_if(R &&Range, UnaryPredicate P)
Wrapper function around std::count_if to count the number of times an element satisfying a given pred...
auto find_if(R &&Range, UnaryPredicate P)
Provide wrappers to std::find_if which take ranges instead of having to pass begin/end explicitly.
unsigned encodeULEB128(uint64_t Value, raw_ostream &OS, unsigned PadTo=0)
Utility function to encode a ULEB128 value to an output stream.
uint64_t alignDown(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the largest uint64_t less than or equal to Value and is Skew mod Align.
static bool recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in's for a MBB.
This struct is a compact representation of a valid (non-zero power of two) alignment.
uint64_t value() const
This is a hole in the type system and should not be abused.
Pair of physical register and lane mask.
This class contains a discriminated union of information about pointers in memory operands,...
static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI, int64_t Offset=0)
Return a MachinePointerInfo record that refers to the specified FrameIndex.
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
union llvm::TargetFrameLowering::DwarfFrameBase::@235 Location
enum llvm::TargetFrameLowering::DwarfFrameBase::FrameBaseKind Kind
SmallVector< WinEHTryBlockMapEntry, 4 > TryBlockMap
SmallVector< WinEHHandlerType, 1 > HandlerArray