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SIFrameLowering.h
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1 //===--------------------- SIFrameLowering.h --------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
11 #define LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
12 
13 #include "AMDGPUFrameLowering.h"
14 
15 namespace llvm {
16 
17 class SIInstrInfo;
18 class SIMachineFunctionInfo;
19 class SIRegisterInfo;
20 class GCNSubtarget;
21 
22 class SIFrameLowering final : public AMDGPUFrameLowering {
23 public:
24  SIFrameLowering(StackDirection D, unsigned StackAl, int LAO,
25  unsigned TransAl = 1) :
26  AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
27  ~SIFrameLowering() override = default;
28 
30  MachineBasicBlock &MBB) const;
32  MachineBasicBlock &MBB) const override;
34  MachineBasicBlock &MBB) const override;
35  int getFrameIndexReference(const MachineFunction &MF, int FI,
36  unsigned &FrameReg) const override;
37 
38  void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
39  RegScavenger *RS = nullptr) const override;
40 
42  MachineFunction &MF,
43  RegScavenger *RS = nullptr) const override;
44 
47  MachineBasicBlock &MBB,
48  MachineBasicBlock::iterator MI) const override;
49 
50 private:
51  void emitFlatScratchInit(const GCNSubtarget &ST,
52  MachineFunction &MF,
53  MachineBasicBlock &MBB) const;
54 
55  unsigned getReservedPrivateSegmentBufferReg(
56  const GCNSubtarget &ST,
57  const SIInstrInfo *TII,
58  const SIRegisterInfo *TRI,
60  MachineFunction &MF) const;
61 
62  std::pair<unsigned, unsigned> getReservedPrivateSegmentWaveByteOffsetReg(
63  const GCNSubtarget &ST,
64  const SIInstrInfo *TII,
65  const SIRegisterInfo *TRI,
67  MachineFunction &MF) const;
68 
69  /// Emits debugger prologue.
70  void emitDebuggerPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const;
71 
72  // Emit scratch setup code for AMDPAL or Mesa, assuming ResourceRegUsed is set.
73  void emitEntryFunctionScratchSetup(const GCNSubtarget &ST, MachineFunction &MF,
75  MachineBasicBlock::iterator I, unsigned PreloadedPrivateBufferReg,
76  unsigned ScratchRsrcReg) const;
77 
78 public:
79  bool hasFP(const MachineFunction &MF) const override;
80  bool hasSP(const MachineFunction &MF) const;
81 };
82 
83 } // end namespace llvm
84 
85 #endif // LLVM_LIB_TARGET_AMDGPU_SIFRAMELOWERING_H
int getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
~SIFrameLowering() override=default
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS=nullptr) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
void emitEntryFunctionPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const
unsigned const TargetRegisterInfo * TRI
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
const HexagonInstrInfo * TII
Interface to describe a layout of a stack frame on an AMDGPU target.
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
SIFrameLowering(StackDirection D, unsigned StackAl, int LAO, unsigned TransAl=1)
This class keeps track of the SPI_SP_INPUT_ADDR config register, which tells the hardware which inter...
Information about the stack frame layout on the AMDGPU targets.
#define I(x, y, z)
Definition: MD5.cpp:58
bool hasSP(const MachineFunction &MF) const
IRTranslator LLVM IR MI
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register...