LLVM  6.0.0svn
Public Member Functions | Protected Attributes | List of all members
llvm::AMDGPUInstrInfo Class Reference

#include "Target/AMDGPU/AMDGPUInstrInfo.h"

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Public Member Functions

 AMDGPUInstrInfo (const AMDGPUSubtarget &st)
 
bool shouldScheduleLoadsNear (SDNode *Load1, SDNode *Load2, int64_t Offset1, int64_t Offset2, unsigned NumLoads) const override
 
int pseudoToMCOpcode (int Opcode) const
 Return a target-specific opcode if Opcode is a pseudo instruction. More...
 

Protected Attributes

AMDGPUAS AMDGPUASI
 

Detailed Description

Definition at line 34 of file AMDGPUInstrInfo.h.

Constructor & Destructor Documentation

◆ AMDGPUInstrInfo()

AMDGPUInstrInfo::AMDGPUInstrInfo ( const AMDGPUSubtarget st)
explicit

Definition at line 31 of file AMDGPUInstrInfo.cpp.

Member Function Documentation

◆ pseudoToMCOpcode()

int AMDGPUInstrInfo::pseudoToMCOpcode ( int  Opcode) const

Return a target-specific opcode if Opcode is a pseudo instruction.

Return -1 if the target-specific opcode for the pseudo instruction does not exist. If Opcode is not a pseudo instruction, this is identity.

Definition at line 87 of file AMDGPUInstrInfo.cpp.

References llvm::AMDGPUSubtarget::getGeneration(), llvm::AMDGPU::getMCOpcode(), llvm::AMDGPUSubtarget::GFX9, GFX9, llvm::SIInstrFlags::renamedInGFX9, llvm::SIInstrFlags::SDWA, SDWA, SDWA9, and subtargetEncodingFamily().

Referenced by llvm::SIInstrInfo::commuteOpcode(), llvm::SIInstrInfo::getMCOpcodeFromPseudo(), and llvm::SIInstrInfo::hasVALU32BitEncoding().

◆ shouldScheduleLoadsNear()

bool AMDGPUInstrInfo::shouldScheduleLoadsNear ( SDNode Load1,
SDNode Load2,
int64_t  Offset1,
int64_t  Offset2,
unsigned  NumLoads 
) const
override

Definition at line 46 of file AMDGPUInstrInfo.cpp.

References assert().

Member Data Documentation

◆ AMDGPUASI

AMDGPUAS llvm::AMDGPUInstrInfo::AMDGPUASI
protected

The documentation for this class was generated from the following files: