LLVM 22.0.0git
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#include "AArch64Disassembler.h"
#include "AArch64ExternalSymbolizer.h"
#include "MCTargetDesc/AArch64AddressingModes.h"
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "TargetInfo/AArch64TargetInfo.h"
#include "Utils/AArch64BaseInfo.h"
#include "llvm/MC/MCDecoder.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCDisassembler/MCRelocationInfo.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include <memory>
#include "AArch64GenDisassemblerTables.inc"
#include "AArch64GenInstrInfo.inc"
Go to the source code of this file.
Macros | |
#define | DEBUG_TYPE "aarch64-disassembler" |
#define | Success MCDisassembler::Success |
#define | Fail MCDisassembler::Fail |
#define | SoftFail MCDisassembler::SoftFail |
Typedefs | |
using | DecodeStatus = MCDisassembler::DecodeStatus |
#define DEBUG_TYPE "aarch64-disassembler" |
Definition at line 33 of file AArch64Disassembler.cpp.
#define Fail MCDisassembler::Fail |
Definition at line 43 of file AArch64Disassembler.cpp.
Referenced by checkedGetHex(), DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeGPR64x8ClassRegisterClass(), DecodeGPRSeqPairsClassRegisterClass(), DecodeImm8OptLsl(), DecodeLogicalImmInstruction(), DecodeMatrixTileListRegisterClass(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodePCRelLabel16(), DecodePPR2Mul2RegisterClass(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), DecodeSImm(), DecodeSimpleRegisterClass(), DecodeSVCROp(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeSystemPStateImm0_15Instruction(), DecodeSystemPStateImm0_1Instruction(), DecodeThreeAddrSRegInstruction(), DecodeUnsignedLdStInstruction(), DecodeZK(), DecodeZPR2Mul2RegisterClass(), DecodeZPR4Mul4RegisterClass(), DecodeZPRMul2_MinMax(), llvm::object::MachOObjectFile::getChainedFixupsSegments(), parseThunkName(), NodeArray::printAsString(), llvm::sys::RetryAfterSignal(), safeToMergeTerminators(), and llvm::BTFParser::symbolize().
#define SoftFail MCDisassembler::SoftFail |
Definition at line 44 of file AArch64Disassembler.cpp.
Referenced by DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodePairLdStInstruction(), and DecodeSignedLdStInstruction().
#define Success MCDisassembler::Success |
Definition at line 42 of file AArch64Disassembler.cpp.
Referenced by canRenameUntilSecondLoad(), collectMetadataInfo(), combineIRFlags(), computeLabelDiff(), createAtomicLibcall(), createCmpXchgInstFun(), DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeExclusiveLdStInstruction(), DecodeFixedPointScaleImm32(), DecodeFixedPointScaleImm64(), DecodeFMOVLaneInstruction(), DecodeGPR64x8ClassRegisterClass(), DecodeGPRSeqPairsClassRegisterClass(), DecodeImm8OptLsl(), DecodeLogicalImmInstruction(), DecodeMatrixTileListRegisterClass(), DecodeMemExtend(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeMoveImmInstruction(), DecodeMPR128RegisterClass(), DecodeMPR16RegisterClass(), DecodeMPR32RegisterClass(), DecodeMPR64RegisterClass(), DecodeMPR8RegisterClass(), DecodeMPRRegisterClass(), DecodeMRSSystemRegister(), DecodeMSRSystemRegister(), DecodePairLdStInstruction(), DecodePCRelLabel16(), DecodePCRelLabel19(), DecodePCRelLabel9(), DecodePPR2Mul2RegisterClass(), DecodePRFMRegInstruction(), DecodeSignedLdStInstruction(), DecodeSImm(), DecodeSimpleRegisterClass(), DecodeSMESpillFillInstruction(), DecodeSVCROp(), DecodeSVEIncDecImm(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeSystemPStateImm0_15Instruction(), DecodeSystemPStateImm0_1Instruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), DecodeUnconditionalBranch(), DecodeUnsignedLdStInstruction(), DecodeVecShiftLImm(), DecodeVecShiftRImm(), DecodeZeroImm(), DecodeZK(), DecodeZPR2Mul2RegisterClass(), DecodeZPR4Mul4RegisterClass(), DecodeZPRMul2_MinMax(), DecodeZTRRegisterClass(), emitLoad(), emitStore(), getCompoundInsn(), LowerCMP_SWAP(), mergeCompatibleInvokesImpl(), and sinkLastInstruction().
Definition at line 36 of file AArch64Disassembler.cpp.
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Definition at line 1595 of file AArch64Disassembler.cpp.
References T.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1639 of file AArch64Disassembler.cpp.
Referenced by LLVMInitializeAArch64Disassembler().
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Definition at line 1050 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1238 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1223 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 1015 of file AArch64Disassembler.cpp.
References DecodeSImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 1475 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 757 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), SoftFail, and Success.
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Definition at line 198 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 207 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 276 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 60 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1361 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
Referenced by DecodeWSeqPairsClassRegisterClass(), and DecodeXSeqPairsClassRegisterClass().
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Definition at line 1447 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1125 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 124 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 250 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodePRFMRegInstruction().
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Definition at line 1162 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1203 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 449 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::MCInst::getOperand(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 178 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 151 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 160 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 169 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Reg, and Success.
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Definition at line 145 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
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Definition at line 139 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
Referenced by DecodeSMESpillFillInstruction().
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Definition at line 258 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 268 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 850 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), SoftFail, and Success.
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Definition at line 214 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 229 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 240 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 187 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 1535 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeMemExtend(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1506 of file AArch64Disassembler.cpp.
References DecodeSimpleRegisterClass(), llvm::MCDisassembler::Fail, llvm::MCD::fieldFromInstruction(), and llvm::MCDisassembler::Success.
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Definition at line 554 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::SignExtend64(), SoftFail, and Success.
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Definition at line 1432 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
Referenced by DecodeAuthLoadInstruction().
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Definition at line 47 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
Referenced by DecodeAddSubERegInstruction(), DecodeAddSubImmShift(), DecodeAdrInstruction(), DecodeAuthLoadInstruction(), DecodeCPYMemOpInstruction(), DecodeExclusiveLdStInstruction(), DecodeFMOVLaneInstruction(), DecodeLogicalImmInstruction(), DecodeModImmInstruction(), DecodeModImmTiedInstruction(), DecodeMoveImmInstruction(), DecodePairLdStInstruction(), DecodePRFMRegInstruction(), DecodeSETMemOpInstruction(), DecodeSignedLdStInstruction(), DecodeSMESpillFillInstruction(), DecodeSVELogicalImmInstruction(), DecodeSyspXzrInstruction(), DecodeTestAndBranch(), DecodeThreeAddrSRegInstruction(), and DecodeUnsignedLdStInstruction().
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Definition at line 1573 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeMPRRegisterClass(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 1466 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, and Success.
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Definition at line 1459 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 1409 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), llvm::AArch64_AM::isValidDecodeLogicalImmediate(), and Success.
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Definition at line 1387 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), and Success.
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Definition at line 1297 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1318 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCSubtargetInfo::getFeatureBits(), llvm::MCDisassembler::getSubtargetInfo(), isInvalidPState(), and Success.
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Definition at line 1339 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 382 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), and Success.
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Definition at line 1279 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), llvm::MCD::fieldFromInstruction(), llvm::SignExtend64(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 488 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), DecodeSimpleRegisterClass(), Fail, llvm::MCD::fieldFromInstruction(), llvm::MCInst::getOpcode(), Success, and llvm::MCDisassembler::tryAddingSymbolicOperand().
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Definition at line 369 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 363 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 357 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 375 of file AArch64Disassembler.cpp.
References DecodeVecShiftLImm().
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Definition at line 309 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftL16Imm(), DecodeVecShiftL32Imm(), DecodeVecShiftL64Imm(), and DecodeVecShiftL8Imm().
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Definition at line 339 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 345 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 327 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 333 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 315 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 321 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 351 of file AArch64Disassembler.cpp.
References DecodeVecShiftRImm().
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Definition at line 303 of file AArch64Disassembler.cpp.
References llvm::Add, llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
Referenced by DecodeVecShiftR16Imm(), DecodeVecShiftR16ImmNarrow(), DecodeVecShiftR32Imm(), DecodeVecShiftR32ImmNarrow(), DecodeVecShiftR64Imm(), DecodeVecShiftR64ImmNarrow(), and DecodeVecShiftR8Imm().
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Definition at line 1374 of file AArch64Disassembler.cpp.
References DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1381 of file AArch64Disassembler.cpp.
References DecodeGPRSeqPairsClassRegisterClass().
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Definition at line 1426 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createImm(), and Success.
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Definition at line 101 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 88 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
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Definition at line 112 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, and Success.
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Definition at line 75 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), Fail, Reg, and Success.
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Definition at line 133 of file AArch64Disassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCOperand::createReg(), and Success.
Definition at line 1290 of file AArch64Disassembler.cpp.
Referenced by DecodeSystemPStateImm0_15Instruction(), and DecodeSystemPStateImm0_1Instruction().
LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler | ( | ) |
Definition at line 1648 of file AArch64Disassembler.cpp.
References createAArch64Disassembler(), createAArch64ExternalSymbolizer(), llvm::getTheAArch64_32Target(), llvm::getTheAArch64beTarget(), llvm::getTheAArch64leTarget(), llvm::getTheARM64_32Target(), llvm::getTheARM64Target(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().