9#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
10#define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
17class MachineRegisterInfo;
25std::pair<Register, unsigned>
27 GISelKnownBits *KnownBits =
nullptr,
28 bool CheckNUW =
false);
unsigned const MachineRegisterInfo * MRI
std::pair< Register, unsigned > getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, GISelKnownBits *KnownBits=nullptr, bool CheckNUW=false)
Returns base register and constant offset.
This is an optimization pass for GlobalISel generic memory operations.