LLVM 24.0.0git
GISelValueTracking.h
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1//===- llvm/CodeGen/GlobalISel/GISelValueTracking.h -------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8/// \file
9/// Provides analysis for querying information about KnownBits during GISel
10/// passes.
11///
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_CODEGEN_GLOBALISEL_GISELVALUETRACKING_H
15#define LLVM_CODEGEN_GLOBALISEL_GISELVALUETRACKING_H
16
17#include "llvm/ADT/APFloat.h"
18#include "llvm/ADT/DenseMap.h"
22#include "llvm/IR/InstrTypes.h"
23#include "llvm/IR/PassManager.h"
28
29namespace llvm {
30
31class TargetLowering;
32class DataLayout;
33
37 const TargetLowering &TL;
38 const DataLayout &DL;
39 unsigned MaxDepth;
40
41 void computeKnownBitsMin(Register Src0, Register Src1, KnownBits &Known,
42 const APInt &DemandedElts, unsigned Depth = 0);
43
44 unsigned computeNumSignBitsMin(Register Src0, Register Src1,
45 const APInt &DemandedElts, unsigned Depth = 0);
46
48 FPClassTest InterestedClasses, unsigned Depth);
49
51 const APInt &DemandedElts,
52 FPClassTest InterestedClasses,
53 KnownFPClass &Known, unsigned Depth);
54
55 void computeKnownFPClass(Register R, const APInt &DemandedElts,
56 FPClassTest InterestedClasses, KnownFPClass &Known,
57 unsigned Depth);
58
59public:
60 GISelValueTracking(MachineFunction &MF, unsigned MaxDepth = 6);
61 ~GISelValueTracking() override = default;
62
63 const MachineFunction &getMachineFunction() const { return MF; }
64
65 const DataLayout &getDataLayout() const { return DL; }
66
67 void computeKnownBitsImpl(Register R, KnownBits &Known,
68 const APInt &DemandedElts, unsigned Depth = 0);
69
70 unsigned computeNumSignBits(Register R, const APInt &DemandedElts,
71 unsigned Depth = 0);
72 unsigned computeNumSignBits(Register R, unsigned Depth = 0);
73
74 // KnownBitsAPI
75 KnownBits getKnownBits(Register R);
76 KnownBits getKnownBits(Register R, const APInt &DemandedElts,
77 unsigned Depth = 0);
78
79 // Calls getKnownBits for first operand def of MI.
80 KnownBits getKnownBits(MachineInstr &MI);
81 APInt getKnownZeroes(Register R);
82 APInt getKnownOnes(Register R);
83
84 /// \return true if 'V & Mask' is known to be zero in DemandedElts. We use
85 /// this predicate to simplify operations downstream.
86 /// Mask is known to be zero for bits that V cannot have.
87 bool maskedValueIsZero(Register Val, const APInt &Mask) {
88 return Mask.isSubsetOf(getKnownBits(Val).Zero);
89 }
90
91 /// \return true if the sign bit of Op is known to be zero. We use this
92 /// predicate to simplify operations downstream.
93 bool signBitIsZero(Register Op);
94
95 /// Return true if the value defined by \p R is provably never zero.
96 ///
97 /// \p DemandedElts selects the vector elements that must be proven nonzero.
98 /// For scalar values this is a one-bit mask. The overload without
99 /// \p DemandedElts demands every fixed-vector element, or the scalar value to
100 /// be non-zero.
101 bool isKnownNeverZero(Register R, unsigned Depth = 0);
102 bool isKnownNeverZero(Register R, const APInt &DemandedElts,
103 unsigned Depth = 0);
104
106 // The low bits are known zero if the pointer is aligned.
107 Known.Zero.setLowBits(Log2(Alignment));
108 }
109
110 /// \return The known alignment for the pointer-like value \p R.
111 Align computeKnownAlignment(Register R, unsigned Depth = 0);
112
113 /// If a G_SHL/G_ASHR/G_LSHR node with shift operand \p R has shift amounts
114 /// that are all less than the element bit-width of the shift node, return the
115 /// valid constant range.
116 std::optional<ConstantRange>
117 getValidShiftAmountRange(Register R, const APInt &DemandedElts,
118 unsigned Depth);
119
120 /// If a G_SHL/G_ASHR/G_LSHR node with shift operand \p R has shift amounts
121 /// that are all less than the element bit-width of the shift node, return the
122 /// minimum possible value.
123 std::optional<uint64_t> getValidMinimumShiftAmount(Register R,
124 const APInt &DemandedElts,
125 unsigned Depth = 0);
126
127 /// Determine which floating-point classes are valid for \p V, and return them
128 /// in KnownFPClass bit sets.
129 ///
130 /// This function is defined on values with floating-point type, values
131 /// vectors of floating-point type, and arrays of floating-point type.
132
133 /// \p InterestedClasses is a compile time optimization hint for which
134 /// floating point classes should be queried. Queries not specified in \p
135 /// InterestedClasses should be reliable if they are determined during the
136 /// query.
137 KnownFPClass computeKnownFPClass(Register R, const APInt &DemandedElts,
138 FPClassTest InterestedClasses,
139 unsigned Depth);
140
142 FPClassTest InterestedClasses = fcAllFlags,
143 unsigned Depth = 0);
144
145 /// Wrapper to account for known fast math flags at the use instruction.
146 KnownFPClass computeKnownFPClass(Register R, const APInt &DemandedElts,
147 uint32_t Flags,
148 FPClassTest InterestedClasses,
149 unsigned Depth);
150
152 FPClassTest InterestedClasses,
153 unsigned Depth);
154
155 /// Returns true if \p Val can be assumed to never be a NaN. If \p SNaN is
156 /// true, this returns whether \p Val can be assumed to never be a signaling
157 /// NaN.
158 bool isKnownNeverNaN(Register Val, bool SNaN = false);
159
160 /// Returns true if \p Val can be assumed to never be a signaling NaN.
161 bool isKnownNeverSNaN(Register Val) { return isKnownNeverNaN(Val, true); }
162
163 // Observer API. No-op for non-caching implementation.
164 void erasingInstr(MachineInstr &MI) override {}
165 void createdInstr(MachineInstr &MI) override {}
166 void changingInstr(MachineInstr &MI) override {}
167 void changedInstr(MachineInstr &MI) override {}
168
169protected:
170 unsigned getMaxDepth() const { return MaxDepth; }
171};
172
173/// To use KnownBitsInfo analysis in a pass,
174/// KnownBitsInfo &Info = getAnalysis<GISelValueTrackingInfoAnalysis>().get(MF);
175/// Add to observer if the Info is caching.
176/// WrapperObserver.addObserver(Info);
177
178/// Eventually add other features such as caching/ser/deserializing
179/// to MIR etc. Those implementations can derive from GISelValueTracking
180/// and override computeKnownBitsImpl.
182 std::unique_ptr<GISelValueTracking> Info;
183
184public:
185 static char ID;
188 void getAnalysisUsage(AnalysisUsage &AU) const override;
189 bool runOnMachineFunction(MachineFunction &MF) override;
190 void releaseMemory() override { Info.reset(); }
191};
192
194 : public AnalysisInfoMixin<GISelValueTrackingAnalysis> {
196 LLVM_ABI static AnalysisKey Key;
197
198public:
200
203};
204
206 : public RequiredPassInfoMixin<GISelValueTrackingPrinterPass> {
207 raw_ostream &OS;
208
209public:
211
214};
215} // namespace llvm
216
217#endif // LLVM_CODEGEN_GLOBALISEL_GISELVALUETRACKING_H
This file declares a class to represent arbitrary precision floating point values and provide a varie...
#define LLVM_ABI
Definition Compiler.h:215
This file defines the DenseMap class.
This contains common code to allow clients to notify changes to machine instr.
IRTranslator LLVM IR MI
This header defines various interfaces for pass management in LLVM.
void computeKnownFPClass(const Value *V, const APInt &DemandedElts, FPClassTest InterestedClasses, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth)
static void computeKnownFPClassForFPTrunc(const Operator *Op, const APInt &DemandedElts, FPClassTest InterestedClasses, KnownFPClass &Known, const SimplifyQuery &Q, unsigned Depth)
Class for arbitrary precision integers.
Definition APInt.h:78
Represent the analysis usage information of a pass.
A parsed version of the target data layout string in and methods for querying it.
Definition DataLayout.h:64
Abstract class that contains various methods for clients to notify about changes.
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
LLVM_ABI Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
LLVM_ABI PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM)
KnownBits getKnownBits(Register R)
void createdInstr(MachineInstr &MI) override
An instruction has been created and inserted into the function.
static void computeKnownBitsForAlignment(KnownBits &Known, Align Alignment)
bool maskedValueIsZero(Register Val, const APInt &Mask)
bool isKnownNeverSNaN(Register Val)
Returns true if Val can be assumed to never be a signaling NaN.
const DataLayout & getDataLayout() const
const MachineFunction & getMachineFunction() const
void changedInstr(MachineInstr &MI) override
This instruction was mutated in some way.
void erasingInstr(MachineInstr &MI) override
An instruction is about to be erased.
bool isKnownNeverNaN(Register Val, bool SNaN=false)
Returns true if Val can be assumed to never be a NaN.
~GISelValueTracking() override=default
void changingInstr(MachineInstr &MI) override
This instruction is about to be mutated in some way.
GISelValueTracking(MachineFunction &MF, unsigned MaxDepth=6)
Representation of each machine instruction.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
A set of analyses that are preserved following a run of a transformation pass.
Definition Analysis.h:112
Wrapper class representing virtual and physical registers.
Definition Register.h:20
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition raw_ostream.h:53
This is an optimization pass for GlobalISel generic memory operations.
@ Known
Known to have no common set bits.
AnalysisManager< MachineFunction > MachineFunctionAnalysisManager
decltype(auto) get(const PointerIntPair< PointerTy, IntBits, IntType, PtrTraits, Info > &Pair)
FPClassTest
Floating-point class tests, supported by 'is_fpclass' intrinsic.
DWARFExpression::Operation Op
LLVM_ABI bool isKnownNeverNaN(const Value *V, const SimplifyQuery &SQ, unsigned Depth=0)
Return true if the floating-point scalar value is not a NaN or if the floating-point vector value has...
unsigned Log2(Align A)
Returns the log2 of the alignment.
Definition Alignment.h:197
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition Alignment.h:39
A CRTP mix-in that provides informational APIs needed for analysis passes.
A special type used by analysis passes to provide an address that identifies that particular analysis...
Definition Analysis.h:29
A CRTP mix-in for passes that should not be skipped.