LLVM 20.0.0git
Macros | Functions | Variables
GCNNSAReassign.cpp File Reference

Try to reassign registers on GFX10+ from non-sequential to sequential in NSA image instructions. More...

#include "AMDGPU.h"
#include "GCNSubtarget.h"
#include "SIMachineFunctionInfo.h"
#include "SIRegisterInfo.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LiveIntervals.h"
#include "llvm/CodeGen/LiveRegMatrix.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/VirtRegMap.h"
#include "llvm/InitializePasses.h"

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "amdgpu-nsa-reassign"
 

Functions

 STATISTIC (NumNSAInstructions, "Number of NSA instructions with non-sequential address found")
 
 STATISTIC (NumNSAConverted, "Number of NSA instructions changed to sequential")
 
 INITIALIZE_PASS_BEGIN (GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign", false, false) INITIALIZE_PASS_END(GCNNSAReassign
 

Variables

 DEBUG_TYPE
 
GCN NSA Reassign
 
GCN NSA false
 

Detailed Description

Try to reassign registers on GFX10+ from non-sequential to sequential in NSA image instructions.

Later SIShrinkInstructions pass will replace NSA with sequential versions where possible.

Definition in file GCNNSAReassign.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "amdgpu-nsa-reassign"

Definition at line 29 of file GCNNSAReassign.cpp.

Function Documentation

◆ INITIALIZE_PASS_BEGIN()

INITIALIZE_PASS_BEGIN ( GCNNSAReassign  ,
DEBUG_TYPE  ,
"GCN NSA Reassign"  ,
false  ,
false   
)

◆ STATISTIC() [1/2]

STATISTIC ( NumNSAConverted  ,
"Number of NSA instructions changed to sequential"   
)

◆ STATISTIC() [2/2]

STATISTIC ( NumNSAInstructions  ,
"Number of NSA instructions with non-sequential address found"   
)

Variable Documentation

◆ DEBUG_TYPE

DEBUG_TYPE

Definition at line 100 of file GCNNSAReassign.cpp.

◆ false

GCN NSA false

Definition at line 101 of file GCNNSAReassign.cpp.

◆ Reassign

GCN NSA Reassign

Definition at line 100 of file GCNNSAReassign.cpp.