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void | llvm::HexagonMCInstrInfo::addConstant (MCInst &MI, uint64_t Value, MCContext &Context) |
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void | llvm::HexagonMCInstrInfo::addConstExtender (MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI) |
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iterator_range< Hexagon::PacketIterator > | llvm::HexagonMCInstrInfo::bundleInstructions (MCInstrInfo const &MCII, MCInst const &MCI) |
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iterator_range< MCInst::const_iterator > | llvm::HexagonMCInstrInfo::bundleInstructions (MCInst const &MCI) |
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size_t | llvm::HexagonMCInstrInfo::bundleSize (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::canonicalizePacket (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCB, HexagonMCChecker *Checker, bool AttemptCompatibility=false) |
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bool | llvm::HexagonMCInstrInfo::IsABranchingInst (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &I) |
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MCInst * | llvm::HexagonMCInstrInfo::deriveDuplex (MCContext &Context, unsigned iClass, MCInst const &inst0, MCInst const &inst1) |
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MCInst | llvm::HexagonMCInstrInfo::deriveExtender (MCInstrInfo const &MCII, MCInst const &Inst, MCOperand const &MO) |
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MCInst | llvm::HexagonMCInstrInfo::deriveSubInst (MCInst const &Inst) |
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MCInst const * | llvm::HexagonMCInstrInfo::extenderForIndex (MCInst const &MCB, size_t Index) |
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void | llvm::HexagonMCInstrInfo::extendIfNeeded (MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI) |
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unsigned | llvm::HexagonMCInstrInfo::getMemAccessSize (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned | llvm::HexagonMCInstrInfo::getAddrMode (MCInstrInfo const &MCII, MCInst const &MCI) |
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MCInstrDesc const & | llvm::HexagonMCInstrInfo::getDesc (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned | llvm::HexagonMCInstrInfo::getDuplexCandidateGroup (MCInst const &MI) |
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SmallVector< DuplexCandidate, 8 > | llvm::HexagonMCInstrInfo::getDuplexPossibilties (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCB) |
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unsigned | llvm::HexagonMCInstrInfo::getDuplexRegisterNumbering (MCRegister Reg) |
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MCExpr const & | llvm::HexagonMCInstrInfo::getExpr (MCExpr const &Expr) |
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unsigned short | llvm::HexagonMCInstrInfo::getExtendableOp (MCInstrInfo const &MCII, MCInst const &MCI) |
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MCOperand const & | llvm::HexagonMCInstrInfo::getExtendableOperand (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned | llvm::HexagonMCInstrInfo::getExtentAlignment (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned | llvm::HexagonMCInstrInfo::getExtentBits (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isExtentSigned (MCInstrInfo const &MCII, MCInst const &MCI) |
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int | llvm::HexagonMCInstrInfo::getMaxValue (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return the maximum value of an extendable operand.
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int | llvm::HexagonMCInstrInfo::getMinValue (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return the minimum value of an extendable operand.
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StringRef | llvm::HexagonMCInstrInfo::getName (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned short | llvm::HexagonMCInstrInfo::getNewValueOp (MCInstrInfo const &MCII, MCInst const &MCI) |
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MCOperand const & | llvm::HexagonMCInstrInfo::getNewValueOperand (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned short | llvm::HexagonMCInstrInfo::getNewValueOp2 (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return the new value or the newly produced value.
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MCOperand const & | llvm::HexagonMCInstrInfo::getNewValueOperand2 (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned | llvm::HexagonMCInstrInfo::getType (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return the Hexagon ISA class for the insn.
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unsigned | llvm::HexagonMCInstrInfo::getCVIResources (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI) |
| Return the resources used by this instruction.
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unsigned | llvm::HexagonMCInstrInfo::getUnits (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI) |
| Return the slots used by the insn.
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unsigned | llvm::HexagonMCInstrInfo::getOtherReservedSlots (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI) |
| Return the slots this instruction consumes in addition to the slot(s) it can execute out of.
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bool | llvm::HexagonMCInstrInfo::hasDuplex (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::hasExtenderForIndex (MCInst const &MCB, size_t Index) |
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bool | llvm::HexagonMCInstrInfo::hasImmExt (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::hasNewValue (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether the insn produces a value.
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bool | llvm::HexagonMCInstrInfo::hasNewValue2 (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether the insn produces a second value.
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bool | llvm::HexagonMCInstrInfo::hasTmpDst (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::hasHvxTmp (MCInstrInfo const &MCII, MCInst const &MCI) |
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unsigned | llvm::HexagonMCInstrInfo::iClassOfDuplexPair (unsigned Ga, unsigned Gb) |
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int64_t | llvm::HexagonMCInstrInfo::minConstant (MCInst const &MCI, size_t Index) |
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template<unsigned N, unsigned S> |
bool | llvm::HexagonMCInstrInfo::inRange (MCInst const &MCI, size_t Index) |
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template<unsigned N, unsigned S> |
bool | llvm::HexagonMCInstrInfo::inSRange (MCInst const &MCI, size_t Index) |
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template<unsigned N> |
bool | llvm::HexagonMCInstrInfo::inRange (MCInst const &MCI, size_t Index) |
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MCInst const & | llvm::HexagonMCInstrInfo::instruction (MCInst const &MCB, size_t Index) |
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bool | llvm::HexagonMCInstrInfo::isAccumulator (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return where the instruction is an accumulator.
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bool | llvm::HexagonMCInstrInfo::isBundle (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isCanon (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isCofMax1 (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isCofRelax1 (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isCofRelax2 (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isCompound (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isConstExtended (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isCVINew (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isDblRegForSubInst (MCRegister Reg) |
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bool | llvm::HexagonMCInstrInfo::isDuplex (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isDuplexPair (MCInst const &MIa, MCInst const &MIb) |
| Symmetrical. See if these two instructions are fit for duplex pair.
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bool | llvm::HexagonMCInstrInfo::isDuplexPairMatch (unsigned Ga, unsigned Gb) |
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bool | llvm::HexagonMCInstrInfo::isExtendable (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isExtended (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isFloat (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether it is a floating-point insn.
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bool | llvm::HexagonMCInstrInfo::isHVX (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isImmext (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isInnerLoop (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isIntReg (MCRegister Reg) |
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bool | llvm::HexagonMCInstrInfo::isIntRegForSubInst (MCRegister Reg) |
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bool | llvm::HexagonMCInstrInfo::isMemReorderDisabled (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isNewValue (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether the insn expects newly produced value.
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bool | llvm::HexagonMCInstrInfo::isNewValueStore (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return true if the operand is a new-value store insn.
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bool | llvm::HexagonMCInstrInfo::isOpExtendable (MCInstrInfo const &MCII, MCInst const &MCI, unsigned short) |
| Return whether the operand is extendable.
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bool | llvm::HexagonMCInstrInfo::isOrderedDuplexPair (MCInstrInfo const &MCII, MCInst const &MIa, bool ExtendedA, MCInst const &MIb, bool ExtendedB, bool bisReversable, MCSubtargetInfo const &STI) |
| non-Symmetrical. See if these two instructions are fit for duplex pair.
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bool | llvm::HexagonMCInstrInfo::isOuterLoop (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isPredicated (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isPredicateLate (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isPredicatedNew (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether the insn is newly predicated.
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bool | llvm::HexagonMCInstrInfo::isPredicatedTrue (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isPredReg (MCRegisterInfo const &MRI, MCRegister Reg) |
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bool | llvm::HexagonMCInstrInfo::isPredRegister (MCInstrInfo const &MCII, MCInst const &Inst, unsigned I) |
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bool | llvm::HexagonMCInstrInfo::isPrefix (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isSolo (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether the insn is solo, i.e., cannot be in a packet.
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bool | llvm::HexagonMCInstrInfo::isSoloAX (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether the insn can be packaged only with A and X-type insns.
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bool | llvm::HexagonMCInstrInfo::isRestrictSlot1AOK (MCInstrInfo const &MCII, MCInst const &MCI) |
| Return whether the insn can be packaged only with an A-type insn in slot #1.
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bool | llvm::HexagonMCInstrInfo::isRestrictNoSlot1Store (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isSubInstruction (MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::isVector (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::mustExtend (MCExpr const &Expr) |
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bool | llvm::HexagonMCInstrInfo::mustNotExtend (MCExpr const &Expr) |
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bool | llvm::HexagonMCInstrInfo::requiresSlot (MCSubtargetInfo const &STI, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::LoopNeedsPadding (MCInst const &MCB) |
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unsigned | llvm::HexagonMCInstrInfo::packetSize (StringRef CPU) |
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unsigned | llvm::HexagonMCInstrInfo::packetSizeSlots (MCSubtargetInfo const &STI) |
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unsigned | llvm::HexagonMCInstrInfo::slotsConsumed (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI) |
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void | llvm::HexagonMCInstrInfo::padEndloop (MCInst &MCI, MCContext &Context) |
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PredicateInfo | llvm::HexagonMCInstrInfo::predicateInfo (MCInstrInfo const &MCII, MCInst const &MCI) |
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bool | llvm::HexagonMCInstrInfo::prefersSlot3 (MCInstrInfo const &MCII, MCInst const &MCI) |
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void | llvm::HexagonMCInstrInfo::replaceDuplex (MCContext &Context, MCInst &MCI, DuplexCandidate Candidate) |
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bool | llvm::HexagonMCInstrInfo::s27_2_reloc (MCExpr const &Expr) |
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void | llvm::HexagonMCInstrInfo::setInnerLoop (MCInst &MCI) |
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void | llvm::HexagonMCInstrInfo::setMemReorderDisabled (MCInst &MCI) |
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void | llvm::HexagonMCInstrInfo::setMustExtend (MCExpr const &Expr, bool Val=true) |
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void | llvm::HexagonMCInstrInfo::setMustNotExtend (MCExpr const &Expr, bool Val=true) |
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void | llvm::HexagonMCInstrInfo::setS27_2_reloc (MCExpr const &Expr, bool Val=true) |
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void | llvm::HexagonMCInstrInfo::setOuterLoop (MCInst &MCI) |
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bool | llvm::HexagonMCInstrInfo::subInstWouldBeExtended (MCInst const &potentialDuplex) |
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unsigned | llvm::HexagonMCInstrInfo::SubregisterBit (MCRegister Consumer, MCRegister Producer, MCRegister Producer2) |
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bool | llvm::HexagonMCInstrInfo::IsVecRegSingle (MCRegister VecReg) |
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bool | llvm::HexagonMCInstrInfo::IsVecRegPair (MCRegister VecReg) |
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bool | llvm::HexagonMCInstrInfo::IsReverseVecRegPair (MCRegister VecReg) |
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bool | llvm::HexagonMCInstrInfo::IsSingleConsumerRefPairProducer (MCRegister Producer, MCRegister Consumer) |
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std::pair< unsigned, unsigned > | llvm::HexagonMCInstrInfo::GetVecRegPairIndices (MCRegister VecRegPair) |
| Returns an ordered pair of the constituent register ordinals for each of the elements of VecRegPair.
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void | llvm::HexagonMCInstrInfo::tryCompound (MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCI) |
| tryCompound - Given a bundle check for compound insns when one is found update the contents fo the bundle with the compound insn.
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