InOrderIssueStage.cpp File Reference

InOrderIssueStage implements an in-order execution pipeline. More...

#include "llvm/MCA/Stages/InOrderIssueStage.h"
#include "llvm/MCA/HardwareUnits/LSUnit.h"
#include "llvm/MCA/HardwareUnits/RegisterFile.h"
#include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
#include "llvm/MCA/Instruction.h"

Go to the source code of this file.

Namespaces
namespace	llvm
	This is an optimization pass for GlobalISel generic memory operations.
namespace	llvm::mca

Macros
#define	DEBUG_TYPE   "llvm-mca"

Functions
static bool	llvm::mca::hasResourceHazard (const ResourceManager &RM, const InstRef &IR)
static unsigned	llvm::mca::findFirstWriteBackCycle (const InstRef &IR)
static unsigned	llvm::mca::checkRegisterHazard (const RegisterFile &PRF, const MCSubtargetInfo &STI, const InstRef &IR)
	Return a number of cycles left until register requirements of the instructions are met.
static void	llvm::mca::addRegisterReadWrite (RegisterFile &PRF, Instruction &IS, unsigned SourceIndex, const MCSubtargetInfo &STI, SmallVectorImpl< unsigned > &UsedRegs)

Detailed Description

InOrderIssueStage implements an in-order execution pipeline.

Definition in file InOrderIssueStage.cpp.

Macro Definition Documentation

DEBUG_TYPE

#define DEBUG_TYPE   "llvm-mca"

Definition at line 20 of file InOrderIssueStage.cpp.