LLVM 22.0.0git
RISCVLateBranchOpt.cpp
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1//===-- RISCVLateBranchOpt.cpp - Late Stage Branch Optimization -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// This file provides RISC-V specific target optimizations, currently it's
10/// limited to convert conditional branches into unconditional branches when
11/// the condition can be statically evaluated.
12///
13//===----------------------------------------------------------------------===//
14
15#include "RISCVInstrInfo.h"
16#include "RISCVSubtarget.h"
17
18using namespace llvm;
19
20#define RISCV_LATE_BRANCH_OPT_NAME "RISC-V Late Branch Optimisation Pass"
21
22namespace {
23
24struct RISCVLateBranchOpt : public MachineFunctionPass {
25 static char ID;
26
27 RISCVLateBranchOpt() : MachineFunctionPass(ID) {}
28
29 StringRef getPassName() const override { return RISCV_LATE_BRANCH_OPT_NAME; }
30
31 void getAnalysisUsage(AnalysisUsage &AU) const override {
33 }
34
35 bool runOnMachineFunction(MachineFunction &Fn) override;
36
37private:
39
40 const RISCVInstrInfo *RII = nullptr;
41};
42} // namespace
43
44char RISCVLateBranchOpt::ID = 0;
45INITIALIZE_PASS(RISCVLateBranchOpt, "riscv-late-branch-opt",
46 RISCV_LATE_BRANCH_OPT_NAME, false, false)
47
48bool RISCVLateBranchOpt::runOnBasicBlock(MachineBasicBlock &MBB) const {
51 if (RII->analyzeBranch(MBB, TBB, FBB, Cond, /*AllowModify=*/false))
52 return false;
53
54 if (!TBB || Cond.size() != 3)
55 return false;
56
59
61
62 // Try and convert a conditional branch that can be evaluated statically
63 // into an unconditional branch.
64 int64_t C0, C1;
67 return false;
68
69 MachineBasicBlock *Folded =
70 RISCVInstrInfo::evaluateCondBranch(CC, C0, C1) ? TBB : FBB;
71
72 // At this point, its legal to optimize.
73 RII->removeBranch(MBB);
74
75 // Only need to insert a branch if we're not falling through.
76 if (Folded) {
78 RII->insertBranch(MBB, Folded, nullptr, {}, DL);
79 }
80
81 // Update the successors. Remove them all and add back the correct one.
82 while (!MBB.succ_empty())
84
85 // If it's a fallthrough, we need to figure out where MBB is going.
86 if (!Folded) {
88 if (Fallthrough != MBB.getParent()->end())
89 MBB.addSuccessor(&*Fallthrough);
90 } else
91 MBB.addSuccessor(Folded);
92
93 return true;
94}
95
96bool RISCVLateBranchOpt::runOnMachineFunction(MachineFunction &Fn) {
97 if (skipFunction(Fn.getFunction()))
98 return false;
99
100 auto &ST = Fn.getSubtarget<RISCVSubtarget>();
101 RII = ST.getInstrInfo();
102
103 bool Changed = false;
104 for (MachineBasicBlock &MBB : Fn)
105 Changed |= runOnBasicBlock(MBB);
106 return Changed;
107}
108
110 return new RISCVLateBranchOpt();
111}
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
MachineBasicBlock & MBB
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
static bool runOnBasicBlock(MachineBasicBlock *MBB, unsigned BasicBlockNum, VRegRenamer &Renamer)
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:56
#define RISCV_LATE_BRANCH_OPT_NAME
const SmallVectorImpl< MachineOperand > MachineBasicBlock * TBB
const SmallVectorImpl< MachineOperand > & Cond
Represent the analysis usage information of a pass.
A debug info location.
Definition: DebugLoc.h:124
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:314
LLVM_ABI void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
LLVM_ABI void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
LLVM_ABI DebugLoc findBranchDebugLoc()
Find and return the merged DebugLoc of the branch instructions of the block.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Function & getFunction()
Return the LLVM function that this machine code represents.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:85
static RISCVCC::CondCode getCondFromBranchOpc(unsigned Opc)
static bool evaluateCondBranch(RISCVCC::CondCode CC, int64_t C0, int64_t C1)
Return the result of the evaluation of C0 CC C1, where CC is a RISCVCC::CondCode.
static bool isFromLoadImm(const MachineRegisterInfo &MRI, const MachineOperand &Op, int64_t &Imm)
Return true if the operand is a load immediate instruction and sets Imm to the immediate value.
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1197
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:55
self_iterator getIterator()
Definition: ilist_node.h:134
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
MachineInstr * getImm(const MachineOperand &MO, const MachineRegisterInfo *MRI)
Definition: SPIRVUtils.cpp:976
FunctionPass * createRISCVLateBranchOptPass()