LLVM 20.0.0git
WebAssemblyAsmBackend.cpp
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1//===-- WebAssemblyAsmBackend.cpp - WebAssembly Assembler Backend ---------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file implements the WebAssemblyAsmBackend class.
11///
12//===----------------------------------------------------------------------===//
13
17#include "llvm/MC/MCAssembler.h"
18#include "llvm/MC/MCExpr.h"
22#include "llvm/MC/MCSymbol.h"
25
26using namespace llvm;
27
28namespace {
29
30class WebAssemblyAsmBackend final : public MCAsmBackend {
31 bool Is64Bit;
32 bool IsEmscripten;
33
34public:
35 explicit WebAssemblyAsmBackend(bool Is64Bit, bool IsEmscripten)
36 : MCAsmBackend(llvm::endianness::little), Is64Bit(Is64Bit),
37 IsEmscripten(IsEmscripten) {}
38
39 unsigned getNumFixupKinds() const override {
41 }
42
43 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
44
45 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
47 uint64_t Value, bool IsPCRel,
48 const MCSubtargetInfo *STI) const override;
49
50 std::unique_ptr<MCObjectTargetWriter>
51 createObjectTargetWriter() const override;
52
54 const MCSubtargetInfo *STI) const override;
55};
56
57const MCFixupKindInfo &
58WebAssemblyAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
60 // This table *must* be in the order that the fixup_* kinds are defined in
61 // WebAssemblyFixupKinds.h.
62 //
63 // Name Offset (bits) Size (bits) Flags
64 {"fixup_sleb128_i32", 0, 5 * 8, 0},
65 {"fixup_sleb128_i64", 0, 10 * 8, 0},
66 {"fixup_uleb128_i32", 0, 5 * 8, 0},
67 {"fixup_uleb128_i64", 0, 10 * 8, 0},
68 };
69
70 if (Kind < FirstTargetFixupKind)
72
73 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
74 "Invalid kind!");
75 return Infos[Kind - FirstTargetFixupKind];
76}
77
78bool WebAssemblyAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
79 const MCSubtargetInfo *STI) const {
80 for (uint64_t I = 0; I < Count; ++I)
81 OS << char(WebAssembly::Nop);
82
83 return true;
84}
85
86void WebAssemblyAsmBackend::applyFixup(const MCAssembler &Asm,
87 const MCFixup &Fixup,
88 const MCValue &Target,
90 uint64_t Value, bool IsPCRel,
91 const MCSubtargetInfo *STI) const {
92 const MCFixupKindInfo &Info = getFixupKindInfo(Fixup.getKind());
93 assert(Info.Flags == 0 && "WebAssembly does not use MCFixupKindInfo flags");
94
95 unsigned NumBytes = alignTo(Info.TargetSize, 8) / 8;
96 if (Value == 0)
97 return; // Doesn't change encoding.
98
99 // Shift the value into position.
100 Value <<= Info.TargetOffset;
101
102 unsigned Offset = Fixup.getOffset();
103 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
104
105 // For each byte of the fragment that the fixup touches, mask in the
106 // bits from the fixup value.
107 for (unsigned I = 0; I != NumBytes; ++I)
108 Data[Offset + I] |= uint8_t((Value >> (I * 8)) & 0xff);
109}
110
111std::unique_ptr<MCObjectTargetWriter>
112WebAssemblyAsmBackend::createObjectTargetWriter() const {
113 return createWebAssemblyWasmObjectWriter(Is64Bit, IsEmscripten);
114}
115
116} // end anonymous namespace
117
119 return new WebAssemblyAsmBackend(TT.isArch64Bit(), TT.isOSEmscripten());
120}
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
#define I(x, y, z)
Definition: MD5.cpp:58
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
raw_pwrite_stream & OS
This file provides WebAssembly-specific target descriptions.
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:42
virtual bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0
Write an (optimal) nop sequence of Count bytes to the given output.
virtual std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const =0
virtual unsigned getNumFixupKinds() const =0
Get the number of target specific fixup kinds.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const =0
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:71
Generic base class for all target subtargets.
This represents an "assembler immediate".
Definition: MCValue.h:36
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:310
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
LLVM Value Representation.
Definition: Value.h:74
This class implements an extremely fast bulk output stream that can only output to a stream.
Definition: raw_ostream.h:52
static const unsigned Nop
Instruction opcodes emitted via means other than CodeGen.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
@ Offset
Definition: DWP.cpp:480
MCAsmBackend * createWebAssemblyAsmBackend(const Triple &TT)
std::unique_ptr< MCObjectTargetWriter > createWebAssemblyWasmObjectWriter(bool Is64Bit, bool IsEmscripten)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:21
@ FirstTargetFixupKind
Definition: MCFixup.h:45
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
Definition: Alignment.h:155
endianness
Definition: bit.h:70
Target independent information on a fixup kind.