LLVM 22.0.0git
WebAssemblyOptimizeLiveIntervals.cpp
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1//===--- WebAssemblyOptimizeLiveIntervals.cpp - LiveInterval processing ---===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// Optimize LiveIntervals for use in a post-RA context.
11//
12/// LiveIntervals normally runs before register allocation when the code is
13/// only recently lowered out of SSA form, so it's uncommon for registers to
14/// have multiple defs, and when they do, the defs are usually closely related.
15/// Later, after coalescing, tail duplication, and other optimizations, it's
16/// more common to see registers with multiple unrelated defs. This pass
17/// updates LiveIntervals to distribute the value numbers across separate
18/// LiveIntervals.
19///
20//===----------------------------------------------------------------------===//
21
22#include "WebAssembly.h"
28#include "llvm/CodeGen/Passes.h"
29#include "llvm/Support/Debug.h"
31using namespace llvm;
32
33#define DEBUG_TYPE "wasm-optimize-live-intervals"
34
35namespace {
36class WebAssemblyOptimizeLiveIntervals final : public MachineFunctionPass {
37 StringRef getPassName() const override {
38 return "WebAssembly Optimize Live Intervals";
39 }
40
41 void getAnalysisUsage(AnalysisUsage &AU) const override {
42 AU.setPreservesCFG();
50 }
51
53 return MachineFunctionProperties().setTracksLiveness();
54 }
55
56 bool runOnMachineFunction(MachineFunction &MF) override;
57
58public:
59 static char ID; // Pass identification, replacement for typeid
60 WebAssemblyOptimizeLiveIntervals() : MachineFunctionPass(ID) {}
61};
62} // end anonymous namespace
63
64char WebAssemblyOptimizeLiveIntervals::ID = 0;
65INITIALIZE_PASS(WebAssemblyOptimizeLiveIntervals, DEBUG_TYPE,
66 "Optimize LiveIntervals for WebAssembly", false, false)
67
69 return new WebAssemblyOptimizeLiveIntervals();
70}
71
72bool WebAssemblyOptimizeLiveIntervals::runOnMachineFunction(
73 MachineFunction &MF) {
74 LLVM_DEBUG(dbgs() << "********** Optimize LiveIntervals **********\n"
75 "********** Function: "
76 << MF.getName() << '\n');
77
79 auto &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
80
81 // We don't preserve SSA form.
82 MRI.leaveSSA();
83
84 assert(MRI.tracksLiveness() && "OptimizeLiveIntervals expects liveness");
85
86 // Split multiple-VN LiveIntervals into multiple LiveIntervals.
88 for (unsigned I = 0, E = MRI.getNumVirtRegs(); I < E; ++I) {
90 auto &TRI = *MF.getSubtarget<WebAssemblySubtarget>().getRegisterInfo();
91
92 if (MRI.reg_nodbg_empty(Reg))
93 continue;
94
95 LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs);
96 if (Reg == TRI.getFrameRegister(MF) && SplitLIs.size() > 0) {
97 // The live interval for the frame register was split, resulting in a new
98 // VReg. For now we only support debug info output for a single frame base
99 // value for the function, so just use the last one. It will certainly be
100 // wrong for some part of the function, but until we are able to track
101 // values through live-range splitting and stackification, it will have to
102 // do.
103 MF.getInfo<WebAssemblyFunctionInfo>()->setFrameBaseVreg(
104 SplitLIs.back()->reg());
105 }
106 SplitLIs.clear();
107 }
108
109 // In FixIrreducibleControlFlow, we conservatively inserted IMPLICIT_DEF
110 // instructions to satisfy LiveIntervals' requirement that all uses be
111 // dominated by defs. Now that LiveIntervals has computed which of these
112 // defs are actually needed and which are dead, remove the dead ones.
114 if (MI.isImplicitDef() && MI.getOperand(0).isDead()) {
115 LiveInterval &LI = LIS.getInterval(MI.getOperand(0).getReg());
116 LIS.removeVRegDefAt(LI, LIS.getInstructionIndex(MI).getRegSlot());
117 LIS.RemoveMachineInstrFromMaps(MI);
118 MI.eraseFromParent();
119 }
120 }
121
122 return true;
123}
unsigned const MachineRegisterInfo * MRI
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
IRTranslator LLVM IR MI
#define I(x, y, z)
Definition: MD5.cpp:58
Register const TargetRegisterInfo * TRI
#define INITIALIZE_PASS(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:56
#define LLVM_DEBUG(...)
Definition: Debug.h:119
This file declares WebAssembly-specific per-machine-function information.
This file declares the WebAssembly-specific subclass of TargetSubtarget.
This file contains the entry points for global functions defined in the LLVM WebAssembly back-end.
Represent the analysis usage information of a pass.
AnalysisUsage & addPreservedID(const void *ID)
AnalysisUsage & addRequired()
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
LLVM_ABI void setPreservesCFG()
This function should be called by the pass, iff they do not:
Definition: Pass.cpp:270
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:314
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:690
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
virtual bool runOnMachineFunction(MachineFunction &MF)=0
runOnMachineFunction - This method must be overloaded to perform the desired machine code transformat...
virtual MachineFunctionProperties getRequiredProperties() const
Properties which a MachineFunction may have at a given point in time.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
StringRef getName() const
getName - Return the name of the corresponding LLVM function.
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineBasicBlock & front() const
Representation of each machine instruction.
Definition: MachineInstr.h:72
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
virtual StringRef getPassName() const
getPassName - Return a nice clean name for a pass.
Definition: Pass.cpp:85
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
static Register index2VirtReg(unsigned Index)
Convert a 0-based index to a virtual register number.
Definition: Register.h:67
size_t size() const
Definition: SmallVector.h:79
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1197
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:55
This class is derived from MachineFunctionInfo and contains private WebAssembly-specific information ...
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
Definition: CallingConv.h:24
Reg
All possible values of the reg field in the ModR/M byte.
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
LLVM_ABI char & MachineDominatorsID
MachineDominators - This pass is a machine dominators analysis pass.
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
Definition: STLExtras.h:663
LLVM_ABI raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:207
FunctionPass * createWebAssemblyOptimizeLiveIntervals()
LLVM_ABI char & LiveVariablesID
LiveVariables pass - This pass computes the set of blocks in which each variable is life and sets mac...