LLVM 22.0.0git
llvm::SGPRSpillBuilder Struct Reference

Classes

struct  PerVGPRData

Public Member Functions

 SGPRSpillBuilder (const SIRegisterInfo &TRI, const SIInstrInfo &TII, bool IsWave32, MachineBasicBlock::iterator MI, int Index, RegScavenger *RS)
 SGPRSpillBuilder (const SIRegisterInfo &TRI, const SIInstrInfo &TII, bool IsWave32, MachineBasicBlock::iterator MI, Register Reg, bool IsKill, int Index, RegScavenger *RS)
PerVGPRData getPerVGPRData ()
void prepare ()
void restore ()
void readWriteTmpVGPR (unsigned Offset, bool IsLoad)
void setMI (MachineBasicBlock *NewMBB, MachineBasicBlock::iterator NewMI)

Public Attributes

Register SuperReg
MachineBasicBlock::iterator MI
ArrayRef< int16_t > SplitParts
unsigned NumSubRegs
bool IsKill
const DebugLocDL
Register TmpVGPR = AMDGPU::NoRegister
int TmpVGPRIndex = 0
bool TmpVGPRLive = false
Register SavedExecReg = AMDGPU::NoRegister
int Index
unsigned EltSize = 4
RegScavengerRS
MachineBasicBlockMBB
MachineFunctionMF
SIMachineFunctionInfoMFI
const SIInstrInfoTII
const SIRegisterInfoTRI
bool IsWave32
Register ExecReg
unsigned MovOpc
unsigned NotOpc

Detailed Description

Definition at line 78 of file SIRegisterInfo.cpp.

Constructor & Destructor Documentation

◆ SGPRSpillBuilder() [1/2]

llvm::SGPRSpillBuilder::SGPRSpillBuilder ( const SIRegisterInfo & TRI,
const SIInstrInfo & TII,
bool IsWave32,
MachineBasicBlock::iterator MI,
int Index,
RegScavenger * RS )
inline

Definition at line 118 of file SIRegisterInfo.cpp.

References getReg(), Index, IsWave32, MI, RS, SGPRSpillBuilder(), TII, and TRI.

Referenced by SGPRSpillBuilder().

◆ SGPRSpillBuilder() [2/2]

llvm::SGPRSpillBuilder::SGPRSpillBuilder ( const SIRegisterInfo & TRI,
const SIInstrInfo & TII,
bool IsWave32,
MachineBasicBlock::iterator MI,
Register Reg,
bool IsKill,
int Index,
RegScavenger * RS )
inline

Member Function Documentation

◆ getPerVGPRData()

PerVGPRData llvm::SGPRSpillBuilder::getPerVGPRData ( )
inline

◆ prepare()

◆ readWriteTmpVGPR()

◆ restore()

◆ setMI()

void llvm::SGPRSpillBuilder::setMI ( MachineBasicBlock * NewMBB,
MachineBasicBlock::iterator NewMI )
inline

Definition at line 319 of file SIRegisterInfo.cpp.

References assert(), MBB, MF, and MI.

Referenced by llvm::SIRegisterInfo::spillEmergencySGPR().

Member Data Documentation

◆ DL

◆ EltSize

unsigned llvm::SGPRSpillBuilder::EltSize = 4

◆ ExecReg

Register llvm::SGPRSpillBuilder::ExecReg

Definition at line 114 of file SIRegisterInfo.cpp.

Referenced by prepare(), readWriteTmpVGPR(), restore(), and SGPRSpillBuilder().

◆ Index

int llvm::SGPRSpillBuilder::Index

Definition at line 104 of file SIRegisterInfo.cpp.

Referenced by readWriteTmpVGPR(), SGPRSpillBuilder(), and SGPRSpillBuilder().

◆ IsKill

bool llvm::SGPRSpillBuilder::IsKill

◆ IsWave32

bool llvm::SGPRSpillBuilder::IsWave32

Definition at line 113 of file SIRegisterInfo.cpp.

Referenced by getPerVGPRData(), prepare(), SGPRSpillBuilder(), and SGPRSpillBuilder().

◆ MBB

◆ MF

◆ MFI

◆ MI

◆ MovOpc

unsigned llvm::SGPRSpillBuilder::MovOpc

Definition at line 115 of file SIRegisterInfo.cpp.

Referenced by prepare(), restore(), and SGPRSpillBuilder().

◆ NotOpc

unsigned llvm::SGPRSpillBuilder::NotOpc

Definition at line 116 of file SIRegisterInfo.cpp.

Referenced by prepare(), readWriteTmpVGPR(), restore(), and SGPRSpillBuilder().

◆ NumSubRegs

◆ RS

◆ SavedExecReg

Register llvm::SGPRSpillBuilder::SavedExecReg = AMDGPU::NoRegister

Definition at line 102 of file SIRegisterInfo.cpp.

Referenced by prepare(), readWriteTmpVGPR(), and restore().

◆ SplitParts

◆ SuperReg

◆ TII

◆ TmpVGPR

◆ TmpVGPRIndex

int llvm::SGPRSpillBuilder::TmpVGPRIndex = 0

Definition at line 98 of file SIRegisterInfo.cpp.

Referenced by prepare(), and restore().

◆ TmpVGPRLive

bool llvm::SGPRSpillBuilder::TmpVGPRLive = false

Definition at line 100 of file SIRegisterInfo.cpp.

Referenced by prepare(), and restore().

◆ TRI

const SIRegisterInfo& llvm::SGPRSpillBuilder::TRI

The documentation for this struct was generated from the following file: