LLVM
20.0.0git
lib
Target
AVR
MCTargetDesc
AVRMCTargetDesc.h
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//===-- AVRMCTargetDesc.h - AVR Target Descriptions -------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides AVR specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_AVR_MCTARGET_DESC_H
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#define LLVM_AVR_MCTARGET_DESC_H
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#include "
llvm/Support/DataTypes.h
"
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#include <memory>
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namespace
llvm
{
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class
MCAsmBackend;
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class
MCCodeEmitter;
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class
MCContext;
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class
MCInstrInfo;
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class
MCObjectTargetWriter;
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class
MCRegisterInfo;
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class
MCSubtargetInfo;
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class
MCTargetOptions;
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class
Target
;
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MCInstrInfo *
createAVRMCInstrInfo
();
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/// Creates a machine code emitter for AVR.
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MCCodeEmitter
*
createAVRMCCodeEmitter
(
const
MCInstrInfo
&MCII,
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MCContext
&Ctx);
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/// Creates an assembly backend for AVR.
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MCAsmBackend
*
createAVRAsmBackend
(
const
Target
&
T
,
const
MCSubtargetInfo
&STI,
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const
MCRegisterInfo
&
MRI
,
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const
llvm::MCTargetOptions
&TO);
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/// Creates an ELF object writer for AVR.
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std::unique_ptr<MCObjectTargetWriter>
createAVRELFObjectWriter
(uint8_t OSABI);
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}
// end namespace llvm
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#define GET_REGINFO_ENUM
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#include "AVRGenRegisterInfo.inc"
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#define GET_INSTRINFO_ENUM
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#define GET_INSTRINFO_MC_HELPER_DECLS
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#include "AVRGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "AVRGenSubtargetInfo.inc"
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#endif
// LLVM_AVR_MCTARGET_DESC_H
MRI
unsigned const MachineRegisterInfo * MRI
Definition:
AArch64AdvSIMDScalarPass.cpp:105
T
llvm::MCAsmBackend
Generic interface to target specific assembler backends.
Definition:
MCAsmBackend.h:42
llvm::MCCodeEmitter
MCCodeEmitter - Generic instruction encoding interface.
Definition:
MCCodeEmitter.h:21
llvm::MCContext
Context object for machine code objects.
Definition:
MCContext.h:83
llvm::MCInstrInfo
Interface to description of machine instruction set.
Definition:
MCInstrInfo.h:26
llvm::MCRegisterInfo
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Definition:
MCRegisterInfo.h:146
llvm::MCSubtargetInfo
Generic base class for all target subtargets.
Definition:
MCSubtargetInfo.h:76
llvm::MCTargetOptions
Definition:
MCTargetOptions.h:39
llvm::Target
Target - Wrapper for Target specific information.
Definition:
TargetRegistry.h:144
DataTypes.h
llvm::AMDGPU::Exp::Target
Target
Definition:
SIDefines.h:972
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:18
llvm::createAVRMCInstrInfo
MCInstrInfo * createAVRMCInstrInfo()
Definition:
AVRMCTargetDesc.cpp:41
llvm::createAVRMCCodeEmitter
MCCodeEmitter * createAVRMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
Creates a machine code emitter for AVR.
llvm::createAVRELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createAVRELFObjectWriter(uint8_t OSABI)
Creates an ELF object writer for AVR.
Definition:
AVRELFObjectWriter.cpp:156
llvm::createAVRAsmBackend
MCAsmBackend * createAVRAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const llvm::MCTargetOptions &TO)
Creates an assembly backend for AVR.
Definition:
AVRAsmBackend.cpp:530
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