LLVM
16.0.0git
lib
Target
Lanai
MCTargetDesc
LanaiMCTargetDesc.h
Go to the documentation of this file.
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//===-- LanaiMCTargetDesc.h - Lanai Target Descriptions ---------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides Lanai specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIMCTARGETDESC_H
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#define LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIMCTARGETDESC_H
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#include "
llvm/MC/MCRegisterInfo.h
"
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#include "
llvm/MC/MCTargetOptions.h
"
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#include "
llvm/Support/DataTypes.h
"
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namespace
llvm
{
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class
MCAsmBackend;
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class
MCCodeEmitter;
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class
MCContext;
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class
MCInstrInfo;
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class
MCObjectTargetWriter;
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class
MCSubtargetInfo;
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class
Target
;
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MCCodeEmitter *
createLanaiMCCodeEmitter
(
const
MCInstrInfo &MCII,
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MCContext &Ctx);
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MCAsmBackend *
createLanaiAsmBackend
(
const
Target
&
T
,
const
MCSubtargetInfo &STI,
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const
MCRegisterInfo &
MRI
,
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const
MCTargetOptions &
Options
);
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std::unique_ptr<MCObjectTargetWriter>
createLanaiELFObjectWriter
(uint8_t OSABI);
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}
// namespace llvm
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// Defines symbolic names for Lanai registers. This defines a mapping from
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// register name to register number.
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#define GET_REGINFO_ENUM
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#include "LanaiGenRegisterInfo.inc"
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// Defines symbolic names for the Lanai instructions.
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#define GET_INSTRINFO_ENUM
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#define GET_INSTRINFO_MC_HELPER_DECLS
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#include "LanaiGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_ENUM
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#include "LanaiGenSubtargetInfo.inc"
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#endif // LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIMCTARGETDESC_H
llvm
This is an optimization pass for GlobalISel generic memory operations.
Definition:
AddressRanges.h:18
MCTargetOptions.h
llvm::createLanaiMCCodeEmitter
MCCodeEmitter * createLanaiMCCodeEmitter(const MCInstrInfo &MCII, MCContext &Ctx)
Definition:
LanaiMCCodeEmitter.cpp:306
llvm::AMDGPU::Exp::Target
Target
Definition:
SIDefines.h:858
T
#define T
Definition:
Mips16ISelLowering.cpp:341
Options
const char LLVMTargetMachineRef LLVMPassBuilderOptionsRef Options
Definition:
PassBuilderBindings.cpp:48
llvm::createLanaiAsmBackend
MCAsmBackend * createLanaiAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
Definition:
LanaiAsmBackend.cpp:161
MCRegisterInfo.h
MRI
unsigned const MachineRegisterInfo * MRI
Definition:
AArch64AdvSIMDScalarPass.cpp:105
llvm::createLanaiELFObjectWriter
std::unique_ptr< MCObjectTargetWriter > createLanaiELFObjectWriter(uint8_t OSABI)
Definition:
LanaiELFObjectWriter.cpp:90
DataTypes.h
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