55 std::unique_ptr<MCObjectTargetWriter>
73 for (
uint64_t i = 0; i < Count; i += 4)
93 unsigned NumBytes = (getFixupKindInfo(Kind).TargetSize + 7) / 8;
94 unsigned FullSize = 4;
100 for (
unsigned i = 0; i != NumBytes; ++i) {
101 unsigned Idx = (FullSize - 1 - i);
107 (
static_cast<uint64_t>(-1) >> (64 - getFixupKindInfo(Kind).TargetSize));
111 for (
unsigned i = 0; i != NumBytes; ++i) {
112 unsigned Idx = (FullSize - 1 - i);
117std::unique_ptr<MCObjectTargetWriter>
118LanaiAsmBackend::createObjectTargetWriter()
const {
123LanaiAsmBackend::getFixupKindInfo(
MCFixupKind Kind)
const {
135 {
"FIXUP_LANAI_NONE", 0, 32, 0},
136 {
"FIXUP_LANAI_21", 16, 16 , 0},
137 {
"FIXUP_LANAI_21_F", 16, 16 , 0},
138 {
"FIXUP_LANAI_25", 7, 25, 0},
139 {
"FIXUP_LANAI_32", 0, 32, 0},
140 {
"FIXUP_LANAI_HI16", 16, 16, 0},
141 {
"FIXUP_LANAI_LO16", 16, 16, 0}};
158 if (!TT.isOSBinFormatELF())
161 return new LanaiAsmBackend(
T, TT.getOS());
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
static unsigned adjustFixupValue(unsigned Kind, uint64_t Value)
PowerPC TLS Dynamic Call Fixup
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Generic interface to target specific assembler backends.
virtual bool writeNopData(raw_ostream &OS, uint64_t Count, const MCSubtargetInfo *STI) const =0
Write an (optimal) nop sequence of Count bytes to the given output.
virtual std::unique_ptr< MCObjectTargetWriter > createObjectTargetWriter() const =0
virtual unsigned getNumFixupKinds() const =0
Get the number of target specific fixup kinds.
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
virtual void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsResolved, const MCSubtargetInfo *STI) const =0
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Generic base class for all target subtargets.
const Triple & getTargetTriple() const
This represents an "assembler immediate".
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Target - Wrapper for Target specific information.
Triple - Helper class for working with autoconf configuration names.
LLVM Value Representation.
This class implements an extremely fast bulk output stream that can only output to a stream.
raw_ostream & write(unsigned char C)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr std::underlying_type_t< E > Mask()
Get a bitmask with 1s in all places up to the high-order bit of E's largest value.
This is an optimization pass for GlobalISel generic memory operations.
MCAsmBackend * createLanaiAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCFixupKind
Extensible enumeration to represent the type of a fixup.
@ FK_Data_8
A eight-byte fixup.
@ FK_Data_1
A one-byte fixup.
@ FK_Data_4
A four-byte fixup.
@ FK_Data_2
A two-byte fixup.
std::unique_ptr< MCObjectTargetWriter > createLanaiELFObjectWriter(uint8_t OSABI)
Target independent information on a fixup kind.