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36 #define DEBUG_TYPE "ppc-tls-dynamic-call"
51 bool NeedFence =
true;
61 if (
MI.getOpcode() != PPC::ADDItlsgdLADDR &&
62 MI.getOpcode() != PPC::ADDItlsldLADDR &&
63 MI.getOpcode() != PPC::ADDItlsgdLADDR32 &&
64 MI.getOpcode() != PPC::ADDItlsldLADDR32 &&
65 MI.getOpcode() != PPC::TLSGDAIX &&
66 MI.getOpcode() != PPC::TLSGDAIX8 && !IsPCREL) {
71 if (
MI.getOpcode() == PPC::ADJCALLSTACKDOWN)
73 else if (
MI.getOpcode() == PPC::ADJCALLSTACKUP)
84 Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3;
88 InReg =
MI.getOperand(1).getReg();
89 OrigRegs.push_back(InReg);
94 switch (
MI.getOpcode()) {
97 case PPC::ADDItlsgdLADDR:
98 Opc1 = PPC::ADDItlsgdL;
99 Opc2 = PPC::GETtlsADDR;
101 case PPC::ADDItlsldLADDR:
102 Opc1 = PPC::ADDItlsldL;
103 Opc2 = PPC::GETtlsldADDR;
105 case PPC::ADDItlsgdLADDR32:
106 Opc1 = PPC::ADDItlsgdL32;
107 Opc2 = PPC::GETtlsADDR32;
109 case PPC::ADDItlsldLADDR32:
110 Opc1 = PPC::ADDItlsldL32;
111 Opc2 = PPC::GETtlsldADDR32;
116 Opc2 = PPC::GETtlsADDR64AIX;
121 Opc2 = PPC::GETtlsADDR32AIX;
124 assert(IsPCREL &&
"Expecting General/Local Dynamic PCRel");
125 Opc1 = PPC::PADDI8pc;
126 Opc2 =
MI.getOperand(2).getTargetFlags() ==
128 ? PPC::GETtlsADDRPCREL
129 : PPC::GETtlsldADDRPCREL;
161 assert(InReg != PPC::NoRegister &&
"Operand must be a register");
170 Call->addOperand(
MI.getOperand(2));
172 Call->addOperand(
MI.getOperand(3));
186 MI.removeFromParent();
198 return (
MI.getOpcode() == PPC::PADDI8pc) &&
199 (
MI.getOperand(2).getTargetFlags() ==
201 MI.getOperand(2).getTargetFlags() ==
207 LIS = &getAnalysis<LiveIntervals>();
209 bool Changed =
false;
229 "PowerPC TLS Dynamic Call Fixup",
false,
false)
235 char PPCTLSDynamicCall::
ID = 0;
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
This is an optimization pass for GlobalISel generic memory operations.
@ MO_GOT_TLSLD_PCREL_FLAG
MO_GOT_TLSLD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
@ MO_GOT_TLSGD_PCREL_FLAG
MO_GOT_TLSGD_PCREL_FLAG - A combintaion of flags, if these bits are set they should produce the reloc...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Represent the analysis usage information of a pass.
const HexagonInstrInfo * TII
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
into llvm powi allowing the code generator to produce balanced multiplication trees First
INITIALIZE_PASS_BEGIN(PPCTLSDynamicCall, DEBUG_TYPE, "PowerPC TLS Dynamic Call Fixup", false, false) INITIALIZE_PASS_END(PPCTLSDynamicCall
unsigned ID
LLVM IR allows to use arbitrary numbers as calling convention identifiers.
#define INITIALIZE_PASS_END(passName, arg, name, cfg, analysis)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
Representation of each machine instruction.
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
FunctionPass * createPPCTLSDynamicCallPass()
iterator_range< early_inc_iterator_impl< detail::IterOfRange< RangeT > > > make_early_inc_range(RangeT &&Range)
Make a range that does early increment to allow mutation of the underlying range without disrupting i...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
void initializePPCTLSDynamicCallPass(PassRegistry &)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
AnalysisUsage & addPreserved()
Add the specified Pass class to the set of analyses preserved by this pass.
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
Wrapper class representing virtual and physical registers.
MachineInstrBuilder BuildMI(MachineFunction &MF, const DebugLoc &DL, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
void addOperand(MachineFunction &MF, const MachineOperand &Op)
Add the specified operand to the instruction.
bool isPCREL(unsigned Opcode)
void repairIntervalsInRange(MachineBasicBlock *MBB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, ArrayRef< Register > OrigRegs)
Update live intervals for instructions in a range of iterators.
FunctionPass class - This class is used to implement most global optimizations.
AnalysisUsage & addRequired()