LLVM 19.0.0git
MemoryTaggingSupport.h
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1//===- MemoryTaggingSupport.h - helpers for memory tagging implementations ===//
2// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
3// See https://llvm.org/LICENSE.txt for license information.
4// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
5//
6//===----------------------------------------------------------------------===//
7//
8// This file declares common infrastructure for HWAddressSanitizer and
9// Aarch64StackTagging.
10//
11//===----------------------------------------------------------------------===//
12#ifndef LLVM_TRANSFORMS_UTILS_MEMORYTAGGINGSUPPORT_H
13#define LLVM_TRANSFORMS_UTILS_MEMORYTAGGINGSUPPORT_H
14
15#include "llvm/ADT/MapVector.h"
20#include "llvm/IR/IRBuilder.h"
22
23namespace llvm {
24class DominatorTree;
25class DbgVariableIntrinsic;
26class IntrinsicInst;
27class PostDominatorTree;
28class AllocaInst;
29class Instruction;
30namespace memtag {
31// For an alloca valid between lifetime markers Start and Ends, call the
32// Callback for all possible exits out of the lifetime in the containing
33// function, which can return from the instructions in RetVec.
34//
35// Returns whether Ends covered all possible exits. If they did not,
36// the caller should remove Ends to ensure that work done at the other
37// exits does not happen outside of the lifetime.
39 const LoopInfo &LI, const Instruction *Start,
42 llvm::function_ref<void(Instruction *)> Callback);
43
45 const SmallVectorImpl<IntrinsicInst *> &LifetimeEnd,
46 const DominatorTree *DT, const LoopInfo *LI,
47 size_t MaxLifetimes);
48
50
51struct AllocaInfo {
56 // Non-intrinsic records of variable locations.
58};
59
60struct StackInfo {
64 bool CallsReturnTwice = false;
65};
66
68public:
69 StackInfoBuilder(const StackSafetyGlobalInfo *SSI) : SSI(SSI) {}
70
71 void visit(Instruction &Inst);
72 bool isInterestingAlloca(const AllocaInst &AI);
73 StackInfo &get() { return Info; };
74
75private:
76 StackInfo Info;
77 const StackSafetyGlobalInfo *SSI;
78};
79
83
86Value *getPC(const Triple &TargetTriple, IRBuilder<> &IRB);
87Value *getAndroidSlotPtr(IRBuilder<> &IRB, int Slot);
88
89} // namespace memtag
90} // namespace llvm
91
92#endif
Analysis containing CSE Info
Definition: CSEInfo.cpp:27
std::string Name
This file implements a map that provides insertion order iteration.
This file defines the SmallVector class.
an instruction to allocate memory on the stack
Definition: Instructions.h:59
Concrete subclass of DominatorTreeBase that is used to compute a normal dominator tree.
Definition: Dominators.h:162
This provides a uniform API for creating instructions and inserting them into a basic block: either a...
Definition: IRBuilder.h:2644
This class implements a map that also provides access to all stored values in a deterministic order.
Definition: MapVector.h:36
PostDominatorTree Class - Concrete subclass of DominatorTree that is used to compute the post-dominat...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:50
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
LLVM Value Representation.
Definition: Value.h:74
An efficient, type-erasing, non-owning reference to a callable.
bool isInterestingAlloca(const AllocaInst &AI)
StackInfoBuilder(const StackSafetyGlobalInfo *SSI)
Value * getFP(IRBuilder<> &IRB)
bool isStandardLifetime(const SmallVectorImpl< IntrinsicInst * > &LifetimeStart, const SmallVectorImpl< IntrinsicInst * > &LifetimeEnd, const DominatorTree *DT, const LoopInfo *LI, size_t MaxLifetimes)
bool forAllReachableExits(const DominatorTree &DT, const PostDominatorTree &PDT, const LoopInfo &LI, const Instruction *Start, const SmallVectorImpl< IntrinsicInst * > &Ends, const SmallVectorImpl< Instruction * > &RetVec, llvm::function_ref< void(Instruction *)> Callback)
uint64_t getAllocaSizeInBytes(const AllocaInst &AI)
Value * getAndroidSlotPtr(IRBuilder<> &IRB, int Slot)
Value * readRegister(IRBuilder<> &IRB, StringRef Name)
Instruction * getUntagLocationIfFunctionExit(Instruction &Inst)
void alignAndPadAlloca(memtag::AllocaInfo &Info, llvm::Align Align)
Value * getPC(const Triple &TargetTriple, IRBuilder<> &IRB)
bool isLifetimeIntrinsic(Value *V)
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
SmallVector< DbgVariableIntrinsic *, 2 > DbgVariableIntrinsics
SmallVector< DbgVariableRecord *, 2 > DbgVariableRecords
SmallVector< IntrinsicInst *, 2 > LifetimeEnd
SmallVector< IntrinsicInst *, 2 > LifetimeStart
MapVector< AllocaInst *, AllocaInfo > AllocasToInstrument
SmallVector< Instruction *, 4 > UnrecognizedLifetimes
SmallVector< Instruction *, 8 > RetVec